JP2997465B1 - Method of forming conductive bumps on wiring board - Google Patents
Method of forming conductive bumps on wiring boardInfo
- Publication number
- JP2997465B1 JP2997465B1 JP11064362A JP6436299A JP2997465B1 JP 2997465 B1 JP2997465 B1 JP 2997465B1 JP 11064362 A JP11064362 A JP 11064362A JP 6436299 A JP6436299 A JP 6436299A JP 2997465 B1 JP2997465 B1 JP 2997465B1
- Authority
- JP
- Japan
- Prior art keywords
- forming
- bump
- metal layer
- transfer plate
- protective metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Wire Bonding (AREA)
Abstract
【要約】
【課題】配線基板を転写板から適正に剥離することがで
き、剥離時における配線基板上のリード及び導電バンプ
の損傷を有効に防止する。
【解決手段】表面にバンプ成形用凹所７を設けた転写板
８の表面に配線パターンを形成すると同時に、上記バン
プ成形用凹所７の内面に上記配線パターンと一体の導電
バンプ３ａを成形し、上記転写板８の表面に上記配線パ
ターンを覆う保護メタル層６を形成すると同時に導電バ
ンプ３ａの内側に導電バンプ３ｂを成形し、上記保護メ
タル層６の表面に絶縁ベース２を重ねて一体積層構造と
し、上記転写板８から上記導電バンプ３ａ、３ｂを有す
る配線パターンを、上記保護メタル層６及び上記絶縁ベ
ース２と一緒に剥離した後、上記保護メタル層６を上記
配線パターン間においてエッチングする配線基板におけ
る導電バンプの形成方法。A wiring board can be properly peeled from a transfer plate, and damage to leads and conductive bumps on the wiring board at the time of peeling can be effectively prevented. A wiring pattern is formed on the surface of a transfer plate provided with a bump forming recess on the surface, and at the same time, a conductive bump integrated with the wiring pattern is formed on the inner surface of the bump forming recess. Forming a protective metal layer 6 covering the wiring pattern on the surface of the transfer plate 8 and simultaneously forming a conductive bump 3b inside the conductive bump 3a; After removing the wiring pattern having the conductive bumps 3a and 3b from the transfer plate 8 together with the protective metal layer 6 and the insulating base 2, the protective metal layer 6 is etched between the wiring patterns. A method for forming a conductive bump on a wiring board.
Description
【０００１】[0001]
【発明の属する技術分野】この発明はＩＣ等の電子部品
との接触又は接続に用いる配線基板、殊に上記接触又は
接続に供される配線基板における導電バンプの形成方法
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board used for contacting or connecting with an electronic component such as an IC, and more particularly to a method for forming a conductive bump on a wiring board used for the contacting or connecting.
【０００２】本願明細書において、接触とは接離の自由
な自由接触面を以っての電気的接続、接続とはハンダ等
を以って接離困難に結合する電気的接続を意味する。[0002] In the specification of the present application, the term "contact" means an electrical connection with a free contact surface that can freely contact and separate, and the term "connection" means an electrical connection that is difficult to contact and separate with solder or the like.
【０００３】[0003]
【従来の技術】特開平１０−２５６４１６号には、配線
基板における配線パターンを形成するリードの一部で導
電バンプを形成する方法として、表面にバンプ成形用凹
所を設けた転写板の表面に配線パターンをメッキ成形さ
せつつ該凹所にて導電バンプを一体にメッキ成形した
後、上記配線パターンの表面を覆うように絶縁層を成層
して絶縁ベースを形成し、上記転写板から上記絶縁ベー
スを上記配線パターンと共に剥離する方法が示されてい
る。2. Description of the Related Art Japanese Patent Application Laid-Open No. Hei 10-256416 discloses a method for forming a conductive bump on a part of a lead for forming a wiring pattern on a wiring board. After integrally forming the conductive bumps in the recesses while plating the wiring pattern, an insulating layer is formed so as to cover the surface of the wiring pattern to form an insulating base, and the insulating base is transferred from the transfer plate to the insulating base. And a method of stripping the same together with the wiring pattern.
【０００４】[0004]
【発明が解決しようとする課題】然しながら、上記方法
では上記転写板から絶縁ベースを剥離する工程におい
て、上記転写板と上記絶縁ベースが強固に接着してしま
い、転写板から配線パターンを有する絶縁ベースを確実
に剥離することができず、剥離時に絶縁ベース上の配線
パターンを損傷する問題点を有している。However, in the above method, in the step of peeling the insulating base from the transfer plate, the transfer plate and the insulating base are firmly adhered to each other, and the insulating base having the wiring pattern is transferred from the transfer plate. Cannot be reliably peeled off, and the wiring pattern on the insulating base is damaged at the time of peeling.
【０００５】[0005]
【課題を解決するための手段】そこで本発明は、上記問
題を適切に解決し実用化を促進する、下記ａ乃至ｅの工
程を含む配線基板における導電バンプの形成方法を提供
するものである。 ａ．表面において開口するバンプ成形用凹所を設けた転
写板の表面に配線パターンを形成すると同時に、上記バ
ンプ成形用凹所の内面に配線パターンと一体の導電バン
プを成形する工程。 ｂ．上記転写板の表面に上記配線パターンを覆う保護メ
タル層をメッキ形成する工程。 ｃ．上記保護メタル層の表面に絶縁ベースを重ね、一体
積層構造とする工程。 ｄ．上記転写板から上記導電バンプを有する配線パター
ン及び上記保護メタル層を有する上記絶縁ベースを剥離
する工程。 ｅ．上記保護メタル層を上記配線パターン間においてエ
ッチングする工程。SUMMARY OF THE INVENTION Accordingly, the present invention provides a method for forming a conductive bump on a wiring board, including the following steps a to e, which appropriately solves the above problems and promotes practical use. a. A step of forming a wiring pattern on the surface of the transfer plate provided with the bump-forming recess opening on the surface and simultaneously forming a conductive bump integral with the wiring pattern on the inner surface of the bump-forming recess. b. A step of plating a protective metal layer covering the wiring pattern on the surface of the transfer plate; c. A step of stacking an insulating base on the surface of the protective metal layer to form an integral laminated structure. d. Removing the wiring pattern having the conductive bumps and the insulating base having the protective metal layer from the transfer plate; e. Etching the protective metal layer between the wiring patterns.
【０００６】上記導電バンプは２種以上の金属で複層構
造である。The conductive bump has a multi-layer structure of two or more metals.
【０００７】[0007]
【発明の実施の形態】本発明の実施形態例を図１乃至図
４に示す。1 to 4 show an embodiment of the present invention.
【０００８】図１及び図２に示すように、配線基板１は
絶縁ベース２の表面に密着して延在するリード３を有
し、該リード３の端部又は延在長の途中を、上記絶縁ベ
ース２の表面より***させて山形に付形した突起状の導
電バンプ３ａを有する。このバンプ３ａを上記ＩＣ４の
表面に密着された電極パッド５（外部端子）との接触又
は接続に供する。As shown in FIGS. 1 and 2, the wiring board 1 has a lead 3 which is in close contact with the surface of an insulating base 2, and the end of the lead 3 or the middle of the extending length is defined by It has a protruding conductive bump 3a which is raised from the surface of the insulating base 2 and shaped like a mountain. The bumps 3a are used for contact or connection with the electrode pads 5 (external terminals) adhered to the surface of the IC 4.
【０００９】上記導電バンプ３ａは絶縁ベース２の表面
にリード３を形成する技術によって形成されるバンプで
あり、その一例を図３Ａ乃至図３Ｇに基づいて説明す
る。The conductive bumps 3a are bumps formed by a technique for forming the leads 3 on the surface of the insulating base 2. One example will be described with reference to FIGS. 3A to 3G.
【００１０】図３Ａに示すように、表面に多数の山形の
バンプ成形用凹所７を設けた転写板８を準備する。As shown in FIG. 3A, a transfer plate 8 having a large number of mountain-shaped bump forming recesses 7 on its surface is prepared.
【００１１】次に図３Ｂに示すように、上記転写板８の
表面にホトレジストを塗布、又はホトレジストをラミネ
ートし、露光と現像の工程によりパターニングし、レジ
ストパターン９を形成する。Next, as shown in FIG. 3B, a photoresist is coated on the surface of the transfer plate 8 or laminated with the photoresist, and is patterned by exposure and development steps to form a resist pattern 9.
【００１２】次に図３Ｃに示すように、メッキ工法によ
り上記レジストパターン９間において、転写板８の表面
に密着せる配線パターン（リード３）をメッキ形成す
る。Next, as shown in FIG. 3C, a wiring pattern (lead 3) which is brought into close contact with the surface of the transfer plate 8 is formed by plating between the resist patterns 9 by a plating method.
【００１３】上記リード３のメッキ形成と同時に、該リ
ード３の端部又は延在長の途中を、上記バンプ成形用凹
所７の存在部において同凹所７の内面に一体に密着せし
めて山形に付形された導電バンプ３ａを成形しつつ、こ
の導電バンプ３ａの内面側に凹所７´を形成する。At the same time as the plating of the lead 3, the end or the middle of the extending length of the lead 3 is brought into close contact with the inner surface of the bump forming recess 7 at the existing portion of the bump forming recess 7 so as to form a chevron. The concave portion 7 'is formed on the inner surface side of the conductive bump 3a while the conductive bump 3a is formed.
【００１４】次に図３Ｄに示すように、上記レジストパ
ターン９を除去した後、上記転写板８の表面に上記配線
パターンを覆う保護メタル層６をメッキ形成する。この
保護メタル層６は上記転写板８の表面に密着しつつ配線
パターンの表面に密着し、更に上記導電バンプ３ａの内
面側に存する凹所７´の存在部において同凹所７´の内
面に一体に密着せしめて山形に付形された導電バンプ３
ｂを形成する。Next, as shown in FIG. 3D, after the resist pattern 9 is removed, a protective metal layer 6 covering the wiring pattern is formed on the surface of the transfer plate 8 by plating. This protective metal layer 6 is in close contact with the surface of the transfer plate 8 and in contact with the surface of the wiring pattern. Further, the protective metal layer 6 is provided on the inner surface of the recess 7 ′ at the portion where the recess 7 ′ exists on the inner surface side of the conductive bump 3 a. Conductive bumps 3 formed in a chevron by sticking them together
b is formed.
【００１５】従って導電バンプ３ａ、３ｂは強固に密着
し複層構造のバンプを形成する。導電バンプ３ｂは上記
導電バンプ３ａをバックアップしつつ、その内側に凹所
１０を形成するか、又は凹所１０を形成せずに平面に積
層される。Therefore, the conductive bumps 3a and 3b are firmly adhered to each other to form a bump having a multilayer structure. The conductive bumps 3b may be formed as recesses 10 inside the conductive bumps 3a while backing up the conductive bumps 3a, or may be stacked on a flat surface without forming the recesses 10.
【００１６】次に図３Ｅに示すように、上記保護メタル
層６の表面に絶縁ベース２を一体に積層する。例えば上
記保護メタル層６の表面に上記絶縁ベース２を重ね、真
空熱プレス機等を用いて熱圧着して一体積層構造にす
る。又は絶縁材を塗布して絶縁ベース２を形成する。Next, as shown in FIG. 3E, the insulating base 2 is integrally laminated on the surface of the protective metal layer 6. For example, the insulating base 2 is overlaid on the surface of the protective metal layer 6 and thermocompression-bonded using a vacuum heat press or the like to form an integrated laminated structure. Alternatively, an insulating material is applied to form the insulating base 2.
【００１７】上記熱圧着に際して上記絶縁ベース２の局
部を上記保護メタル層６の局部に形成された上記凹所１
０内に押し込むことにより、***せしめ、同凹所１０に
より山形に付形された絶縁突起１１を成形するか、又は
上記凹所１０を形成せずに上記保護メタル層６上に積層
する。At the time of the thermocompression bonding, the local portion of the insulating base 2 is replaced with the concave portion 1 formed at the local portion of the protective metal layer 6.
By pushing it into the inside of the groove, the insulating protrusion 11 is formed to have a convex shape by the concave portion 10 or is laminated on the protective metal layer 6 without forming the concave portion 10.
【００１８】上記絶縁突起１１の表面は上記凹所１０の
内面に一体に密着し、上記導電バンプ３ａ、３ｂを上記
絶縁突起１１でバックアップしたバンプ構造を得る。こ
の場合、上記絶縁突起１１を形成せずに上記凹所１０に
よる空洞を形成し、上記導電バンプ３ａ、３ｂを該空洞
でバックアップする構造を採ることを妨げない。The surface of the insulating projection 11 is integrally adhered to the inner surface of the recess 10 to obtain a bump structure in which the conductive bumps 3a and 3b are backed up by the insulating projection 11. In this case, it is not prevented that a cavity is formed by the recess 10 without forming the insulating protrusion 11 and the conductive bumps 3a and 3b are backed up by the cavity.
【００１９】次に図３Ｆに示すように、上記リード３と
上記保護メタル層６と上記絶縁ベース２を、その一体積
層構造を維持しつつ転写板８から剥離する。Next, as shown in FIG. 3F, the leads 3, the protective metal layer 6, and the insulating base 2 are peeled off from the transfer plate 8 while maintaining their integral laminated structure.
【００２０】次に図３Ｇに示すように、上記保護メタル
層６の表面を、上記配線パターンを形成するリード３を
マスクとして機能させつつ、同リード３間においてホト
エッチングプロセス等によりパターニングする。Next, as shown in FIG. 3G, the surface of the protective metal layer 6 is patterned by a photoetching process or the like between the leads 3 while using the leads 3 for forming the wiring patterns as a mask.
【００２１】これにより上記絶縁ベース２の表面に、複
層構造の導電バンプ３ａ、３ｂ及びリード３を形成す
る。上記転写板８と上記絶縁ベース２間に保護メタル層
６を介することにより、図３Ｆの工程において上記転写
板８から上記絶縁ベース２を適正に剥離することがで
き、剥離時における上記リード３の損傷を有効に防止で
きる。Thus, conductive bumps 3a, 3b and leads 3 having a multilayer structure are formed on the surface of the insulating base 2. By interposing the protective metal layer 6 between the transfer plate 8 and the insulating base 2, the insulating base 2 can be properly separated from the transfer plate 8 in the step of FIG. Damage can be effectively prevented.
【００２２】又、他例として上記導電バンプを三層構造
に形成した配線基板の製造方法を図４Ｃ乃至図４Ｇに示
す。As another example, FIGS. 4C to 4G show a method of manufacturing a wiring board having the conductive bumps formed in a three-layer structure.
【００２３】図４Ｃに示すように、表面に多数の山形の
バンプ成形用凹所７を設けた転写板８を準備し、該転写
板８には、予め上記バンプ成形用凹所７の存在部におい
て導電バンプ３ｃをメッキ成形しておく。As shown in FIG. 4C, a transfer plate 8 having a large number of chevron-shaped bump forming recesses 7 provided on the surface is prepared. , The conductive bumps 3c are formed by plating.
【００２４】上記導電バンプ３ｃは上記バンプ成形用凹
所７の内面に一体に密着して山形に付形され、該導電バ
ンプ３ｃの内面側に凹所７′を形成する。好ましくは上
記導電バンプ３ｃはＡｕ等の導電性の優れた金属で成形
する。The conductive bump 3c is integrally formed on the inner surface of the bump forming recess 7 so as to be in close contact with the inner surface of the bump forming recess 7, thereby forming a recess 7 'on the inner surface side of the conductive bump 3c. Preferably, the conductive bump 3c is formed of a metal having excellent conductivity such as Au.
【００２５】又上記転写板８の表面にホトレジストを塗
布、又はホトレジストをラミネートし、露光と現像の工
程によりパターニングし、レジストパターン９を形成す
る。Further, a photoresist is applied to the surface of the transfer plate 8 or a photoresist is laminated, and is patterned by exposure and development steps to form a resist pattern 9.
【００２６】上記レジストパターン９間において、転写
板８の表面に密着せる配線パターン（リード３）をメッ
キ形成する。Between the resist patterns 9, a wiring pattern (lead 3) to be in close contact with the surface of the transfer plate 8 is formed by plating.
【００２７】上記リード３のメッキ形成と同時に、該リ
ード３の端部又は延在長の途中を、上記凹所７′の存在
部において同凹所７′の内面に一体に密着せしめて山形
に付形された導電バンプ３ａを成形する。この導電バン
プ３ａは上記導電バンプ３ｃに密着してバックアップし
つつ、その内側に凹所７″を形成するか、又は凹所７″
を形成せずに平面に積層される。At the same time as the formation of the plating of the lead 3, the end or the middle of the extending length of the lead 3 is integrally brought into close contact with the inner surface of the recess 7 ′ at the portion where the recess 7 ′ exists, thereby forming a mountain shape. The shaped conductive bump 3a is formed. The conductive bump 3a is closely contacted with the conductive bump 3c and backs up, while forming a recess 7 ″ inside the conductive bump 3c, or forming a recess 7 ″ inside the recess.
Are stacked on a flat surface without forming the same.
【００２８】次に図４Ｄに示すように、上記レジストパ
ターン９を除去した後、上記転写板８の表面に上記配線
パターンを覆う保護メタル層６をメッキ形成する。この
保護メタル層６は上記転写板８の表面に密着しつつ配線
パターンの表面に密着し、更に上記導電バンプ３ａの内
面側に存する凹所７″の存在部において同凹所７″の内
面に一体に密着せしめて山形に付形された導電バンプ３
ｂを形成するか、又は凹所７″を形成せずに平面に積層
される。Next, as shown in FIG. 4D, after the resist pattern 9 is removed, a protective metal layer 6 covering the wiring pattern is formed on the surface of the transfer plate 8 by plating. The protective metal layer 6 is in close contact with the surface of the transfer pattern 8 and in contact with the surface of the wiring pattern. In addition, the protective metal layer 6 is provided on the inner surface of the recess 7 "on the inner surface side of the conductive bump 3a. Conductive bumps 3 formed in a chevron by sticking them together
b or laminated on a flat surface without forming the recess 7 ".
【００２９】従って導電バンプ３ａ、３ｂ、３ｃは強固
に密着し三層構造のバンプを形成する。上記導電バンプ
３ｂは上記導電バンプ３ａ、３ｃをバックアップしつ
つ、その内側に凹所１０を形成するか、又は凹所１０を
形成せずに平面に積層される。Therefore, the conductive bumps 3a, 3b and 3c are firmly adhered to each other to form a three-layered bump. The conductive bumps 3b are formed on the inner surface of the conductive bumps 3a and 3c while backing up the conductive bumps 3a and 3c, or are stacked without forming the recesses 10.
【００３０】次に図４Ｅに示すように、上記保護メタル
層６の表面に絶縁ベース２を一体に積層する。例えば上
記保護メタル層６の表面に上記絶縁ベース２を重ね、真
空熱プレス機等を用いて熱圧着して一体積層構造にす
る。又は絶縁材を塗布して絶縁ベース２を形成する。Next, as shown in FIG. 4E, the insulating base 2 is integrally laminated on the surface of the protective metal layer 6. For example, the insulating base 2 is overlaid on the surface of the protective metal layer 6 and thermocompression-bonded using a vacuum heat press or the like to form an integrated laminated structure. Alternatively, an insulating material is applied to form the insulating base 2.
【００３１】上記熱圧着に際して上記絶縁ベース２の局
部を上記保護メタル層６の局部に形成された上記凹所１
０内に押し込むことにより、***せしめ、同凹所１０に
より山形に付形された絶縁突起１１を成形するか、又は
凹所１０を形成せずに平面に積層される。At the time of the thermocompression bonding, the local portion of the insulating base 2 is replaced with the concave portion 1 formed at the local portion of the protective metal layer 6.
By pushing it into 0, it is raised to form an insulating projection 11 shaped like a mountain by the recess 10 or laminated on a flat surface without forming the recess 10.
【００３２】よって上記絶縁突起１１の表面は上記凹所
１０の内面に一体に密着し、上記導電バンプ３ａ、３
ｂ、３ｃを上記絶縁突起１１でバックアップしたバンプ
構造を得る。この場合、上記絶縁突起１１を形成せずに
上記凹所１０による空洞を形成し、上記導電バンプ３
ａ、３ｂ、３ｃを該空洞でバックアップする構造を採る
ことを妨げない。Therefore, the surface of the insulating projection 11 is integrally adhered to the inner surface of the recess 10, and the conductive bumps 3a, 3a
A bump structure in which b and 3c are backed up by the insulating protrusions 11 is obtained. In this case, a cavity is formed by the recess 10 without forming the insulating protrusion 11 and the conductive bump 3 is formed.
It does not prevent adopting a structure in which a, 3b and 3c are backed up by the cavity.
【００３３】次に図４Ｆに示すように、上記導電バンプ
３ａ、３ｂ、３ｃを有するリード３と上記保護メタル層
６と上記絶縁ベース２を、その一体積層構造を維持しつ
つ転写板８から剥離する。Next, as shown in FIG. 4F, the lead 3 having the conductive bumps 3a, 3b, 3c, the protective metal layer 6, and the insulating base 2 are peeled off from the transfer plate 8 while maintaining their integral laminated structure. I do.
【００３４】次に図４Ｇに示すように、上記保護メタル
層６の表面を、配線パターンを形成するリード３と上記
導電バンプ３ｃ、３ａをマスクとして機能させつつ、同
リード３間においてホトエッチングプロセス等によりパ
ターニングする。Next, as shown in FIG. 4G, the surface of the protective metal layer 6 is subjected to a photo-etching process between the leads 3 by using the leads 3 for forming a wiring pattern and the conductive bumps 3c and 3a as masks. And the like.
【００３５】これにより上記絶縁ベース２の表面に、三
層構造の導電バンプ３ａ、３ｂ、３ｃ及びリード３を形
成する。上記転写板８と上記絶縁ベース２間に保護メタ
ル層６を介することにより、図４Ｆの工程において上記
転写板８から上記絶縁ベース２を適正に剥離することが
でき、剥離時における上記リード３の損傷を有効に防止
できる。Thus, conductive bumps 3a, 3b, 3c and leads 3 having a three-layer structure are formed on the surface of the insulating base 2. By interposing the protective metal layer 6 between the transfer plate 8 and the insulating base 2, the insulating base 2 can be properly separated from the transfer plate 8 in the step of FIG. Damage can be effectively prevented.
【００３６】上記転写板８は好ましくはＳＵＳで形成
し、該転写板８の表面には離型材をスプレーで貧コート
することができ、又は上記転写板８の表面仕上げによっ
ては離型材を使用せずに実施する。The transfer plate 8 is preferably formed of SUS, and the surface of the transfer plate 8 may be poorly coated with a release material by spraying, or a release material may be used depending on the surface finish of the transfer plate 8. Do without.
【００３７】一適例として上記絶縁ベース２の素材とし
て合成樹脂を用いる。As a suitable example, a synthetic resin is used as the material of the insulating base 2.
【００３８】又適例として、上記保護メタル層６として
銅又は銅合金を用いる。As a suitable example, copper or a copper alloy is used as the protective metal layer 6.
【００３９】又好ましくは上記リード３をＮｉ、Ｃｒ又
はその合金等の硬質金属にて形成する。これにより上記
リード３の強度を高め、又Ｎｉ、Ｃｒ又はその合金から
成る上記リード３をマスクにして、銅又は銅合金から成
る上記保護メタル層６のエッチングを行う。Preferably, the leads 3 are formed of a hard metal such as Ni, Cr or an alloy thereof. Thus, the strength of the lead 3 is increased, and the protective metal layer 6 made of copper or a copper alloy is etched using the lead 3 made of Ni, Cr or an alloy thereof as a mask.
【００４０】上記導電バンプの形成方法によれば、絶縁
ベース２の配線パターンを施した側と反対側の表面に別
の配線パターンを形成することを妨げない。この場合両
配線パターンは絶縁ベース２を通して互いに電気的に接
続することができる。According to the method for forming the conductive bumps described above, the formation of another wiring pattern on the surface of the insulating base 2 on the side opposite to the side on which the wiring pattern is formed is not prevented. In this case, both wiring patterns can be electrically connected to each other through the insulating base 2.
【００４１】以上述べた配線基板１としては、絶縁ベー
ス２の表面に多数のリード３を並列して設け、この各リ
ード３の端部に上記各バンプ構造を持つ導電バンプを設
け、この導電バンプを液晶表示器等の電子部品の端子
（電極パッド５）に加圧接触させる場合を包含するもの
である。In the wiring board 1 described above, a large number of leads 3 are provided in parallel on the surface of an insulating base 2, and conductive bumps having the above-described bump structures are provided at the ends of the leads 3. Is brought into pressure contact with a terminal (electrode pad 5) of an electronic component such as a liquid crystal display.
【００４２】[0042]
【発明の効果】本発明によれば、転写板を用いて配線基
板上のリードの一部で導電バンプを形成する際に、転写
板と絶縁ベースの間に保護メタル層を形成することによ
り、転写板から絶縁ベースを剥離する工程において、上
記絶縁ベースを上記転写板から適正に剥離することがで
き、剥離時におけるリード及び導電バンプの損傷を防止
できる。According to the present invention, when a conductive bump is formed on a part of a lead on a wiring board using a transfer plate, a protective metal layer is formed between the transfer plate and the insulating base. In the step of separating the insulating base from the transfer plate, the insulating base can be properly separated from the transfer plate, and damage to the leads and the conductive bumps during separation can be prevented.
【図１】本発明に係る配線基板にＩＣ等の電子部品を搭
載した場合を示す断面図。FIG. 1 is a sectional view showing a case where an electronic component such as an IC is mounted on a wiring board according to the present invention.
【図２】図１に示す配線基板上のリードの一部で形成さ
れた導電バンプを一部切欠して示す拡大平面図。FIG. 2 is an enlarged plan view showing a conductive bump formed by a part of a lead on the wiring board shown in FIG.
【図３】Ａ乃至Ｇは図２に示すバンプ構造を持つ配線基
板の製造方法の一例を、工程順に示す断面図。3A to 3G are cross-sectional views showing an example of a method for manufacturing a wiring board having the bump structure shown in FIG. 2 in the order of steps.
【図４】Ｃ乃至Ｇは図２に示す導電バンプを三層構造で
形成した場合の配線基板の製造方法の一例を、工程順に
示す断面図。FIGS. 4A to 4G are cross-sectional views showing an example of a method of manufacturing a wiring board in the case where the conductive bumps shown in FIG. 2 are formed in a three-layer structure, in the order of steps.
１ 配線基板 ２ 絶縁ベース ３ リード ３ａ、３ｂ、３ｃ 導電バンプ ４ ＩＣ ５ 電極パッド ６ 保護メタル層 ７ バンプ成形用凹所 ７´ 凹所 ７″ 凹所 ８ 転写板 ９ レジストパターン １０ 凹所 １１ 絶縁突起 Reference Signs List 1 wiring board 2 insulating base 3 lead 3a, 3b, 3c conductive bump 4 IC 5 electrode pad 6 protective metal layer 7 bump forming recess 7 'recess 7 "recess 8 transfer plate 9 resist pattern 10 recess 11 insulating protrusion
Claims (3)
表面に配線パターンを形成すると同時に、上記バンプ成
形用凹所の内面に上記配線パターンと一体の導電バンプ
を成形する工程と；上記転写板の表面に上記配線パター
ンを覆う保護メタル層を形成する工程と；上記保護メタ
ル層の表面に絶縁ベースを重ねて一体積層構造とする工
程と；上記転写板から上記導電バンプを有する配線パタ
ーンを上記保護メタル層及び上記絶縁ベースと一緒に剥
離する工程と；上記保護メタル層を上記配線パターン間
においてエッチングする工程を含む配線基板における導
電バンプの形成方法。A step of forming a wiring pattern on the surface of a transfer plate provided with a bump-forming recess on the surface, and simultaneously forming a conductive bump integral with the wiring pattern on the inner surface of the bump-forming recess; A step of forming a protective metal layer covering the wiring pattern on the surface of the transfer plate; a step of laminating an insulating base on the surface of the protective metal layer to form an integrated laminated structure; a wiring having the conductive bumps from the transfer plate A method of forming a conductive bump on a wiring board, comprising: removing a pattern together with the protective metal layer and the insulating base; and etching the protective metal layer between the wiring patterns.
徴とする請求項１記載の配線基板における導電バンプの
形成方法。2. The method for forming a conductive bump on a wiring board according to claim 1, wherein said conductive bump is formed by plating.
特徴とする請求項１記載の配線基板における導電バンプ
の形成方法。3. The method as claimed in claim 1, wherein said protective metal layer is formed by plating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11064362A JP2997465B1 (en) | 1999-03-11 | 1999-03-11 | Method of forming conductive bumps on wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11064362A JP2997465B1 (en) | 1999-03-11 | 1999-03-11 | Method of forming conductive bumps on wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2997465B1 true JP2997465B1 (en) | 2000-01-11 |
| JP2000260821A JP2000260821A (en) | 2000-09-22 |
Family
ID=13256089
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11064362A Expired - Fee Related JP2997465B1 (en) | 1999-03-11 | 1999-03-11 | Method of forming conductive bumps on wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2997465B1 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003059971A (en) * | 2001-08-20 | 2003-02-28 | Nec Kansai Ltd | Wiring board and manufacturing method therefor, and semiconductor device |
| JP3839400B2 (en) * | 2002-12-16 | 2006-11-01 | 日立建機株式会社 | Anti-theft device |
| KR100955605B1 (en) * | 2008-04-18 | 2010-05-03 | 주식회사 에이디피엔지니어링 | Method for removing of extra solder in template for forming solder bump, and method for forming solder bump |
-
1999
- 1999-03-11 JP JP11064362A patent/JP2997465B1/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2000260821A (en) | 2000-09-22 |
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