JP2962939B2 - Package for storing semiconductor elements - Google Patents

Package for storing semiconductor elements

Info

Publication number
JP2962939B2
JP2962939B2 JP4193618A JP19361892A JP2962939B2 JP 2962939 B2 JP2962939 B2 JP 2962939B2 JP 4193618 A JP4193618 A JP 4193618A JP 19361892 A JP19361892 A JP 19361892A JP 2962939 B2 JP2962939 B2 JP 2962939B2
Authority
JP
Japan
Prior art keywords
lid
semiconductor element
package
container
sealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP4193618A
Other languages
Japanese (ja)
Other versions
JPH0645470A (en
Inventor
弘 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP4193618A priority Critical patent/JP2962939B2/en
Publication of JPH0645470A publication Critical patent/JPH0645470A/en
Application granted granted Critical
Publication of JP2962939B2 publication Critical patent/JP2962939B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は半導体素子を収容するた
めの半導体素子収納用パッケージの改良に関するもので
ある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in a semiconductor device housing package for housing a semiconductor device.

【0002】[0002]

【従来の技術】従来、LSI(大規模集積回路素子) 等の半
導体素子を収容するためのパッケージ、例えばガラス封
止型の半導体素子収納用パッケージは図2 に示すように
通常、酸化アルミニウム質焼結体、ムライト質焼結体、
窒化アルミニウム質焼結体、窒化珪素質焼結体等の電気
絶縁材料から成り、中央部に半導体素子23を載置収容す
るための凹部21a を有し、上面に封止用のガラス層24が
被着された絶縁基体21と、同じく電気絶縁材料から成
り、中央部に半導体素子23を収容する空所を形成するた
めの凹部を有し、下面に封止用のガラス層25が被着され
た蓋体22と、内部に収容する半導体素子23を外部の電気
回路に電気的に接続するための外部リード端子26とによ
り構成されており、絶縁基体21の上面に外部リード端子
26を載置させるとともに予め被着させておいた封止用の
ガラス層24を溶融させることによって外部リード端子26
を絶縁基体21上に仮止めし、次に前記絶縁基体21の凹部
21a 底面に半導体素子23を取着するとともに該半導体素
子23の各電極をボンディングワイヤ27を介して外部リー
ド端子26に接続し、しかる後、絶縁基体21と蓋体22とを
その相対向する主面に被着させておいた各々の封止用の
ガラス層24、25を約400℃の温度で溶融一体化させ、
絶縁基体21と蓋体22とから成る容器を気密に封止する
ことによって製品としての半導体装置となる。
2. Description of the Related Art Conventionally, a package for accommodating a semiconductor element such as an LSI (large-scale integrated circuit element), for example, a package for accommodating a glass-encapsulated semiconductor element is usually made of aluminum oxide as shown in FIG. Sintered, mullite sintered body,
It is made of an electrically insulating material such as an aluminum nitride sintered body or a silicon nitride sintered body, has a concave portion 21a for mounting and housing the semiconductor element 23 in the center, and a sealing glass layer 24 on the upper surface. The attached insulating base 21, which is also made of an electrically insulating material, has a concave portion for forming a cavity for accommodating the semiconductor element 23 in the center portion, and a sealing glass layer 25 is attached on the lower surface. And an external lead terminal 26 for electrically connecting the semiconductor element 23 housed therein to an external electric circuit.
The external lead terminals 26 are mounted by melting the glass layer 24 for sealing which has been mounted and previously applied.
Is temporarily fixed on the insulating substrate 21 and then the concave portion of the insulating substrate 21 is formed.
21a Attach a semiconductor element 23 to the bottom surface and connect each electrode of the semiconductor element 23 to an external lead terminal 26 via a bonding wire 27. Thereafter, the insulating base 21 and the lid 22 are The glass layers 24 and 25 for sealing which have been adhered to the surface are melted and integrated at a temperature of about 400 ° C.,
A semiconductor device as a product is obtained by hermetically sealing a container including the insulating base 21 and the lid 22.

【0003】尚、前記絶縁基体21及び蓋体22は、例えば
酸化アルミニウム質焼結体から成る場合、一般にアルミ
ナ(Al 2 O 3 ) 、シリカ(SiO2 ) 等に適当な有機溶剤、
溶媒を添加混合して得た原料粉末を所定形状のプレス金
型内に充填するとともに一定圧力で押圧して成形し、し
かる後、前記成形品を約1500℃の温度で焼成することに
よって製作されている。
When the insulating base 21 and the lid 22 are made of, for example, a sintered body of aluminum oxide, an organic solvent suitable for alumina (Al 2 O 3 ), silica (SiO 2 ) or the like is generally used.
The raw material powder obtained by adding and mixing the solvent is filled in a press mold of a predetermined shape and pressed at a constant pressure to be molded, and thereafter, the molded product is manufactured by firing at a temperature of about 1500 ° C. ing.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、近時、
ICカード等、情報処理装置は薄型化が急激に進み、該
情報処理装置に搭載される半導体装置もその厚みを薄く
したものが要求されるようになり、同時に半導体装置を
構成する半導体素子収納用パッケージも蓋体の厚みを0.
4mm 以下としてパッケージ全体の厚みを薄型化すること
が要求されるようになってきた。
However, recently,
Information processing devices such as IC cards are rapidly becoming thinner, and semiconductor devices mounted on the information processing devices are required to have a reduced thickness. The package also has a lid thickness of 0.
It has been required to reduce the thickness of the entire package to 4 mm or less.

【0005】そこで上述した従来の半導体素子収納用パ
ッケージの蓋体の厚みを0.4mm 以下とし、パッケージ全
体の厚みを薄くした場合、パッケージの蓋体は酸化アル
ミニウム質焼結体等の電気絶縁材料より成り、該酸化ア
ルミニウム質焼結体等は脆弱で機械的強度が弱いことか
ら絶縁基体と蓋体とから成る容器内部に半導体素子を気
密に収容した後、蓋体に外力が印加されると該外力によ
って蓋体が容器内部側に撓んで破損し、その結果、容器
内部の気密封止が破れ、内部に収容する半導体素子を長
期間にわたり正常、且つ安定に作動させることができな
いという欠点を招来した。
Therefore, when the thickness of the lid of the above-mentioned conventional package for housing a semiconductor element is set to 0.4 mm or less and the thickness of the entire package is reduced, the lid of the package is made of an electrically insulating material such as an aluminum oxide sintered body. Since the aluminum oxide sintered body and the like are fragile and have low mechanical strength, the semiconductor element is hermetically accommodated in a container formed of an insulating base and a lid, and then when an external force is applied to the lid, The lid is bent toward the inside of the container by an external force and is broken. As a result, the hermetic seal inside the container is broken, and the semiconductor element contained therein cannot be operated normally and stably for a long period of time. did.

【0006】また同時に蓋体に外力が印加され、蓋体が
容器内部側に撓んだ場合、蓋体が絶縁基体と蓋体とを接
合させている封止用ガラス層を引っ張って割れやクラッ
クを発生させ、その結果、これによっても容器内部の気
密封止が破れ、内部に収容する半導体素子を長期間にわ
たり正常、且つ安定に作動させることができないという
欠点を有していた。
When an external force is simultaneously applied to the lid and the lid flexes toward the inside of the container, the lid pulls the sealing glass layer that joins the insulating base and the lid to break or crack. As a result, the hermetic sealing of the inside of the container is broken as a result, and the semiconductor element contained therein cannot be operated normally and stably for a long period of time.

【0007】[0007]

【発明の目的】本発明は上記欠点に鑑み案出されたもの
で、その目的は絶縁基体と蓋体とから成る容器内部の気
密封止を完全とし、内部に収容する半導体素子を長期間
にわたり正常、且つ安定に作動させることができる半導
体素子収納用パッケージを提供することにある。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks, and has as its object to complete the hermetic sealing of the inside of a container composed of an insulating base and a lid, and to provide a semiconductor device housed therein for a long period of time. An object of the present invention is to provide a semiconductor element housing package that can be operated normally and stably.

【0008】[0008]

【課題を解決するための手段】本発明は絶縁基体と蓋体
とから成り、内部に半導体素子を収容するための空所を
有するとともに、前記絶縁基体と蓋体とがこれらに熱膨
張係数が近似する封止用低融点ガラスにより間に外部リ
ード端子を挟んで接合される半導体素子収納用パッケー
ジであって、前記蓋体はその厚みが0.4mm 以下で、且つ
半導体素子を収容する空所に対接する面に面積が0.01mm
2 以上で高さが0.05mm以上の正方形状、長方形状または
十字形状の突起が形成されていることを特徴とするもの
である。
SUMMARY OF THE INVENTION The present invention comprises an insulating base and a lid, having a space for accommodating a semiconductor element therein, and the insulating base and the lid having a thermal expansion coefficient therebetween. What is claimed is: 1. A package for housing a semiconductor element, which is joined with an external lead terminal sandwiched therebetween by a similar low-melting glass for sealing, wherein the lid has a thickness of 0.4 mm or less and is in a space for housing the semiconductor element. 0.01mm area on the opposite surface
A square, rectangular or cross-shaped projection having a height of 2 mm or more and a height of 0.05 mm or more is formed.

【0009】[0009]

【作用】本発明の半導体素子収納用パッケージによれ
ば、半導体素子を収容するための容器を構成する蓋体の
半導体素子を収容する空所に対接する面に突起を設けた
ことから蓋体の厚みが0.4mm 以下と薄くなったとしても
外力印加によって大きく撓むことはなく、該撓みに起因
して破損することは皆無となる。
According to the package for housing a semiconductor element of the present invention, a projection is provided on the surface of the lid constituting the container for housing the semiconductor element, the surface being in contact with the cavity for housing the semiconductor element. Even if the thickness is reduced to 0.4 mm or less, it does not bend significantly due to the application of external force, and there is no breakage due to the bending.

【0010】また蓋体の大きな撓みがなくなることから
絶縁基体と蓋体とを接合させる封止用ガラス層に割れや
クラック等が発生することもなくなり、その結果、絶縁
基体と蓋体とから成る容器内部の気密封止を完全とし内
部に収容する半導体素子を長期間にわたり正常且つ安定
に作動させることが可能となる。
[0010] In addition, since the lid is not largely bent, cracks and cracks are not generated in the sealing glass layer for joining the insulating substrate and the lid. As a result, the lid is formed of the insulating substrate and the lid. It is possible to completely and hermetically seal the inside of the container and to operate the semiconductor element housed therein normally and stably for a long period of time.

【0011】[0011]

【実施例】次に本発明を添付図面に基づき詳細に説明す
る。図1 は本発明の半導体素子収納用パッケージの一実
施例を示し、1 は絶縁基体、2 は蓋体である。この絶縁
基体1 と蓋体2 とで半導体素子3 を収容するための容器
4 が構成される。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. FIG. 1 shows an embodiment of a package for housing a semiconductor element according to the present invention, wherein 1 is an insulating base, and 2 is a lid. A container for housing the semiconductor element 3 with the insulating base 1 and the lid 2
4 is configured.

【0012】前記絶縁基体1 は酸化アルミニウム質焼結
体、ムライト質焼結体、窒化アルミニウム質焼結体、炭
化珪素質焼結体等の電気絶縁材料から成り、その上面略
中央部に半導体素子3 を収容するための凹部1aが設けて
あり、該凹部1a底面には半導体素子3 がガラス、樹脂、
ロウ材等の接着材を介して取着固定される。
The insulating substrate 1 is made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, a silicon carbide sintered body, etc. A recess 1a for accommodating the semiconductor element 3 is provided on the bottom surface of the recess 1a.
It is attached and fixed via an adhesive such as brazing material.

【0013】前記絶縁基体1 は例えば酸化アルミニウム
質焼結体から成る場合、アルミナ(Al 2 O 3 ) 、シリカ
(SiO2 ) 、カルシア(CaO) 、マグネシア(MgO) 等に適当
な有機溶剤、溶媒を添加混合してセラミック原料粉末を
調整するとともに該セラミック原料粉末を従来周知のプ
レス成形法によって成形し、しかる後、前記成形体を約
1500℃の温度で焼成することによって製作される。
When the insulating substrate 1 is made of, for example, an aluminum oxide sintered body, alumina (Al 2 O 3 ), silica
(SiO 2 ), calcia (CaO), magnesia (MgO), etc., an appropriate organic solvent and a solvent are added and mixed to prepare a ceramic raw material powder, and the ceramic raw material powder is molded by a conventionally known press molding method. After that, the molded body
It is manufactured by firing at a temperature of 1500 ° C.

【0014】また前記絶縁基体1 はその上面に金属材料
から成る外部リード端子5 が封止用のガラス層6 を介し
て仮止めされており、該外部リード端子5 は内部に収容
する半導体素子3 を外部電気回路に接続する作用を為
し、その一端には半導体素子3の各電極がボンディング
イヤ7 を介して接続され、また他端は外部電気回路に半
田等のロウ材を介して接続される。
On the upper surface of the insulating substrate 1, an external lead terminal 5 made of a metal material is temporarily fixed via a glass layer 6 for sealing, and the external lead terminal 5 is a semiconductor element 3 housed inside. Is connected to an external electric circuit, one end of which is connected to each electrode of the semiconductor element 3 via a bonding ear 7, and the other end is connected to the external electric circuit via a brazing material such as solder. You.

【0015】前記外部リード端子5 はコバール金属(Fe-
Ni-Co 合金) や42アロイ(Fe-Ni合金) 等の金属材料から
成り、該コバール金属等のインゴット( 塊) を従来周知
の圧延加工法や打ち抜き加工法等を採用することによっ
て所定の板状に形成される。
The external lead terminal 5 is made of Kovar metal (Fe-
Ni-Co alloy) and 42 alloy (Fe-Ni alloy), etc., and the ingot (lumps) of the Kovar metal or the like is formed into a predetermined plate by employing a conventionally known rolling method or punching method. It is formed in a shape.

【0016】尚、前記外部リード端子5 はその表面にニ
ッケル、金等から成る良導電性で、且つ耐蝕性に優れた
金属をメッキ法により1.0 乃至20.0μm の厚みに層着さ
せておくと、外部リード端子5 の酸化腐食を有効に防止
するとともに外部リード端子5 とボンディングワイヤ7
及び外部電気回路との電気的接続を良好となすことがで
きる。従って、前記外部リード端子5 はその表面にニッ
ケル、金等をメッキ法により1.0 乃至20.0μm の厚みに
層着させておくことが好ましい。
The external lead terminal 5 may be formed by plating a metal having good conductivity and excellent corrosion resistance made of nickel, gold or the like on the surface thereof to a thickness of 1.0 to 20.0 μm by plating. It effectively prevents oxidation corrosion of the external lead terminal 5 and the external lead terminal 5 and bonding wire 7
In addition, good electrical connection with an external electric circuit can be achieved. Therefore, it is preferable that nickel, gold, or the like be layered on the surface of the external lead terminal 5 by plating to a thickness of 1.0 to 20.0 μm.

【0017】また前記外部リード端子5 が仮止めされた
絶縁基体1 の上面には蓋体2 が該蓋体2 の下面に被着さ
せた封止用のガラス層8 と絶縁基体1 の上面に被着させ
たガラス層6 とを溶融一体化させることによって接合さ
れ、これによって絶縁基体1と蓋体2 とから成る容器4
内部に半導体素子3 が気密に封止される。
On the upper surface of the insulating base 1 to which the external lead terminals 5 are temporarily fixed, a lid 2 is provided on the sealing glass layer 8 attached to the lower surface of the lid 2 and on the upper surface of the insulating base 1. The applied glass layer 6 is joined by being melted and integrated, thereby forming a container 4 comprising an insulating base 1 and a lid 2.
The semiconductor element 3 is hermetically sealed inside.

【0018】前記蓋体2 は酸化アルミニウム質焼結体、
ムライト質焼結体、窒化アルミニウム質焼結体、炭化珪
素質焼結体等の電気絶縁材料から成り、例えば酸化アル
ミニウム質焼結体から成る場合には絶縁基体1 と同様の
方法、即ち、アルミナ、シリカ、カルシア、マグネシア
等に適当な有機溶剤、溶媒を添加混合してセラミック原
料粉末を調整するとともに該セラミック原料粉末を従来
周知のプレス成形法によって成形し、しかる後、これを
約1500℃の温度で焼成することによって製作される。
The lid 2 is made of an aluminum oxide sintered body,
It is made of an electrically insulating material such as a mullite sintered body, an aluminum nitride sintered body, and a silicon carbide sintered body. , Silica, calcia, magnesia, etc., an appropriate organic solvent, a solvent is added and mixed to adjust the ceramic raw material powder, and the ceramic raw material powder is molded by a conventionally known press molding method, and thereafter, this is heated to about 1500 ° C. It is manufactured by firing at a temperature.

【0019】また前記蓋体2 は半導体素子を収容する空
所に対接する面に突起2aが形成されている。
The lid 2 has a projection 2a formed on a surface thereof which is in contact with a space for accommodating a semiconductor element.

【0020】前記突起2aは蓋体2 が0.4mm 以下と薄く成
り、外力印加によって撓もうとするのを阻止する補強部
材として作用し、これによって絶縁基体1 と蓋体2 とか
ら成る容器内部に半導体素子3 を気密に収容した後、蓋
体2 に外力が印加されたとしても蓋体2 が容器内部側に
撓んで破損することは皆無となり、その結果、容器内部
の気密封止を完全として、内部に収容する半導体素子3
を長期間にわたり正常、且つ安定に作動させることがで
きる。
The protrusions 2a serve as reinforcing members for preventing the lid 2 from becoming thinner to 0.4 mm or less and preventing the lid 2 from bending due to the application of an external force. After housing the semiconductor element 3 in an airtight manner, even if an external force is applied to the lid 2, the lid 2 does not flex and break inside the container, and as a result, the hermetic sealing inside the container is completely completed. , Semiconductor element 3 housed inside
Can be operated normally and stably for a long period of time.

【0021】更に前記蓋体2 は突起2aによって撓むこと
が殆どないことから蓋体2 の撓みに起因して発生する封
止用ガラス層6 、8 の破損も殆どなく、これによっても
半導体素子を収容する容器の気密封止を完全となすこと
ができる。
Further, since the cover 2 hardly bends due to the projections 2a, the sealing glass layers 6, 8 caused by the warp of the cover 2 hardly break. Can be completely hermetically sealed.

【0022】尚、前記蓋体2 に設ける突起2aはその面積
が0.01mm2 未満であり、且つ高さが0.05mm未満であると
蓋体2 の撓みを有効に阻止するのが困難となるため面積
は0.01mm2 以上に、高さは0.05mm以上にするのが好まし
い。また突起2aは蓋体2 の中央部に正方形状、長方形
状、十字形状に設けておくと蓋体2 の撓みを極めて有効
に阻止することができる。
If the area of the projection 2a provided on the lid 2 is less than 0.01 mm 2 and the height is less than 0.05 mm, it becomes difficult to effectively prevent the deflection of the lid 2. The area is preferably 0.01 mm 2 or more, and the height is preferably 0.05 mm or more. If the protrusions 2a are provided in the center of the lid 2 in a square, rectangular, or cross shape, the bending of the lid 2 can be extremely effectively prevented.

【0023】また一方、前記絶縁基体1 の上面に被着さ
せた封止用のガラス層6 及び蓋体2の下面に被着させた
ガラス層8 はそれぞれ絶縁基体1 及び蓋体2 が酸化アル
ミニウム質焼結体から成る場合には酸化鉛50.0乃至60.0
重量%、酸化珪素1.0 乃至5.0 重量%、酸化ホウ素3.0
乃至13.0重量%、酸化ビスマス3.0 乃至13.0重量%に、
フィラーとしてのコージライトを10.0乃至20.0重量%、
チタン酸錫系化合物を10.0乃至20.0重量%含有させたガ
ラスが好適に使用され、両ガラス層6 、8 を加熱溶融さ
せ一体化させることによって絶縁基体1 と蓋体2 とから
成る容器4 内部に半導体素子3 が気密に封止される。
On the other hand, the sealing glass layer 6 adhered to the upper surface of the insulating substrate 1 and the glass layer 8 adhered to the lower surface of the lid 2 are made of aluminum oxide and aluminum oxide, respectively. Lead oxide 50.0 to 60.0
Wt%, silicon oxide 1.0 to 5.0 wt%, boron oxide 3.0
To 13.0% by weight, bismuth oxide 3.0 to 13.0% by weight,
10.0 to 20.0% by weight of cordierite as a filler,
A glass containing 10.0 to 20.0% by weight of a tin titanate compound is preferably used, and the two glass layers 6 and 8 are heated and melted and integrated to form a container 4 comprising an insulating substrate 1 and a lid 2. The semiconductor element 3 is hermetically sealed.

【0024】前記封止用のガラス層6 、8 はその軟化溶
融温度が約400 ℃と低く、そのため封止用ガラス層6 、
8 を溶融一体化させて絶縁基体1 と蓋体2 とから成る容
器4内部に半導体素子3 を気密に封止する際、半導体素
子3 に封止用ガラス層6 、8を溶融させるための熱が印
加されたとしても半導体素子3 に熱破壊や特性に熱変化
を生じさせることはなく、内部に収容する半導体素子3
を正常、且つ安定に作動させることが可能となる。
The sealing glass layers 6 and 8 have a low softening and melting temperature of about 400 ° C., so that the sealing glass layers 6 and 8
When the semiconductor element 3 is air-tightly sealed inside the container 4 composed of the insulating base 1 and the lid 2 by melting and integrating the glass layers 8, the heat for melting the sealing glass layers 6, 8 in the semiconductor element 3. The semiconductor element 3 does not cause thermal destruction or change in characteristics even if the semiconductor element 3 is applied.
Can be operated normally and stably.

【0025】前記封止用のガラス層6 、8 はまたその熱
膨張係数が7.1 ×10-6/ ℃であり、絶縁基体1 及び蓋体
2 を構成する酸化アルミニウム質焼結体の熱膨張係数
(6.5〜7.5 ×10-6/ ℃) と近似することから、絶縁基体
1 と蓋体2 とを封止用のガラス層6 、8 を溶融一体化さ
せ、絶縁基体1 と蓋体2 とから成る容器4 内部に半導体
素子3 を気密に封止する際、絶縁基体1 と蓋体2 と封止
用のガラス層6 、8 との接合を極めて強固として容器4
内部に半導体素子3 を完全に気密封止することが可能と
なる。
The glass layers 6 and 8 for sealing have a coefficient of thermal expansion of 7.1 × 10 −6 / ° C., and include an insulating substrate 1 and a lid.
Coefficient of thermal expansion of aluminum oxide sintered body composing 2
(6.5 to 7.5 × 10 -6 / ℃)
When the semiconductor element 3 is hermetically sealed inside a container 4 composed of the insulating base 1 and the lid 2 by melting and integrating the glass layers 6 and 8 for sealing And the lid 2 and the glass layers 6 and 8 for sealing are extremely tightly bonded.
The semiconductor element 3 can be completely hermetically sealed inside.

【0026】かくして本発明の半導体素子収納用パッケ
ージによれば絶縁基体1 の凹部1a底面に半導体素子3 を
取着固定するとともに該半導体素子3 の各電極をボンデ
ィングワイヤ7 により外部リード端子5 に接続させ、し
かる後、絶縁基体1 と蓋体2とをその各々の相対向する
主面に被着させておいた封止用ガラス層6 、8 を加熱溶
融させ、接合することによって絶縁基体1 と蓋体2 とか
ら成る容器4 内部に半導体素子3 を気密に封止し、これ
によって製品としての半導体装置が完成する。
Thus, according to the package for accommodating a semiconductor element of the present invention, the semiconductor element 3 is attached and fixed to the bottom surface of the concave portion 1a of the insulating base 1, and each electrode of the semiconductor element 3 is connected to the external lead terminal 5 by the bonding wire 7. Thereafter, the sealing glass layers 6 and 8 having the insulating substrate 1 and the lid 2 adhered to the opposing main surfaces thereof are heated and melted, and are joined to each other. The semiconductor element 3 is hermetically sealed inside the container 4 including the lid 2, thereby completing a semiconductor device as a product.

【0027】尚、本発明は上述の実施例に限定されるも
のではなく、本発明の要旨を逸脱しない範囲であれば種
々の変更は可能である。
The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention.

【0028】[0028]

【発明の効果】本発明の半導体素子収納用パッケージに
よれば、熱膨張係数が近似する封止用低融点ガラスによ
り間に外部リード端子を挟んで絶縁基体に接合される、
半導体素子を収容するための容器を構成する蓋体の半導
体素子を収容する空所に対接する面に、面積が0.01mm2
以上で高さが0.05mm以上の正方形状、長方形状または十
字形状の突起を形成したことから、熱破壊や特性の熱変
化を生じさせることなく半導体素子を内部に収容するこ
とができるとともに、蓋体の厚みが0.4mm 以下の薄いも
のとなったとしても蓋体が外力印加によって撓むことは
なく、その結果、蓋体に撓みに起因する破損が発生する
ことは皆無で、封止用低融点ガラスに蓋体の撓みに起因
する破損が発生することもなく、絶縁基体と蓋体とから
成る容器の気密封止を完全とし、内部に収容する半導体
素子を長期間にわたり正常、且つ安定に作動させること
ができる。
According to the package for housing a semiconductor element of the present invention, the package is joined to the insulating base with the external lead terminal interposed therebetween by the sealing low melting point glass having a similar thermal expansion coefficient.
An area of 0.01 mm 2 is provided on the surface of the lid constituting the container for housing the semiconductor element, which is in contact with the space for housing the semiconductor element.
Since a square, rectangular or cross-shaped projection having a height of 0.05 mm or more is formed as described above, the semiconductor element can be housed inside without causing thermal destruction or thermal change in characteristics, and a lid. Even when the body thickness is as thin as 0.4 mm or less, the lid does not bend due to the application of external force, and as a result, there is no breakage due to the bending of the lid, The melting point glass is not damaged due to the bending of the lid, the hermetic sealing of the container consisting of the insulating base and the lid is completed, and the semiconductor element contained therein can be normally and stably stored for a long period of time. Can be activated.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の半導体素子収納用パッケージの一実施
例を示す断面図である。
FIG. 1 is a cross-sectional view showing one embodiment of a semiconductor element storage package according to the present invention.

【図2】従来の半導体素子収納用パッケージの断面図で
ある。
FIG. 2 is a cross-sectional view of a conventional semiconductor element storage package.

【符号の説明】[Explanation of symbols]

1・・・・・絶縁基体 2・・・・・蓋体 2a・・・・突起 3・・・・・半導体素子 4・・・・・容器 5・・・・・外部リード端子 DESCRIPTION OF SYMBOLS 1 ... Insulating base 2 ... Lid 2a ... Projection 3 ... Semiconductor element 4 ... Container 5 ... External lead terminal

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】絶縁基体と蓋体とから成り、内部に半導体
素子を収容するための空所を有するとともに、前記絶縁
基体と蓋体とがこれらに熱膨張係数が近似する封止用低
融点ガラスにより間に外部リード端子を挟んで接合され
半導体素子収納用パッケージであって、前記蓋体はそ
の厚みが0.4mm 以下で、且つ半導体素子を収容する空所
に対接する面に面積が0.01mm 2 以上で高さが0.05mm以上
の正方形状、長方形状または十字形状の突起が形成され
ていることを特徴とする半導体素子収納用パッケージ。
A cover for accommodating a semiconductor element therein;
The base and lid have a similar thermal expansion coefficient
Bonded with external lead terminals sandwiched by melting point glass
A package for housing semiconductor chip that, the lid body in its thickness 0.4mm or less, and the area on the surface contact against the cavity for accommodating the semiconductor element is more than 0.05mm height 0.01 mm 2 or more
Wherein the square, rectangular or cross-shaped projections are formed.
JP4193618A 1992-07-21 1992-07-21 Package for storing semiconductor elements Expired - Fee Related JP2962939B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4193618A JP2962939B2 (en) 1992-07-21 1992-07-21 Package for storing semiconductor elements

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4193618A JP2962939B2 (en) 1992-07-21 1992-07-21 Package for storing semiconductor elements

Publications (2)

Publication Number Publication Date
JPH0645470A JPH0645470A (en) 1994-02-18
JP2962939B2 true JP2962939B2 (en) 1999-10-12

Family

ID=16310938

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4193618A Expired - Fee Related JP2962939B2 (en) 1992-07-21 1992-07-21 Package for storing semiconductor elements

Country Status (1)

Country Link
JP (1) JP2962939B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20180315894A1 (en) * 2017-04-26 2018-11-01 Advanced Semiconductor Engineering, Inc. Semiconductor device package and a method of manufacturing the same

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006061943B4 (en) 2006-12-29 2023-03-30 Pictiva Displays International Limited Light Emitting Device
US8830695B2 (en) * 2007-01-25 2014-09-09 Osram Opto Semiconductors Gmbh Encapsulated electronic device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20180315894A1 (en) * 2017-04-26 2018-11-01 Advanced Semiconductor Engineering, Inc. Semiconductor device package and a method of manufacturing the same

Also Published As

Publication number Publication date
JPH0645470A (en) 1994-02-18

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