JP2956255B2 - Method for manufacturing ridge waveguide semiconductor laser - Google Patents
Method for manufacturing ridge waveguide semiconductor laserInfo
- Publication number
- JP2956255B2 JP2956255B2 JP9323791A JP9323791A JP2956255B2 JP 2956255 B2 JP2956255 B2 JP 2956255B2 JP 9323791 A JP9323791 A JP 9323791A JP 9323791 A JP9323791 A JP 9323791A JP 2956255 B2 JP2956255 B2 JP 2956255B2
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- JP
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- layer
- semiconductor laser
- type semiconductor
- active layer
- ridge waveguide
- Prior art date
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Description
【０００１】[0001]
【産業上の利用分野】本発明は、光通信用または光情報
処理用光源として用いられる高性能な半導体レーザ装置
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high performance semiconductor laser device used as a light source for optical communication or optical information processing.
【０００２】[0002]
【従来の技術】近年、光通信システムは加入者系線路に
まで普及しはじめている。加入者系光通信システムにお
いては、光伝送装置の低価格化が重要であり、光源にも
低価格で高性能な半導体レーザが要求されている。従
来、光通信システムに用いられる半導体レーザには、発
光領域である活性層を、活性層よりも大きな禁制帯幅を
有する半導体層で埋め込んだ埋め込み型（ＢＨ）半導体
レーザが用いられていた。2. Description of the Related Art In recent years, optical communication systems have begun to spread to subscriber lines. In a subscriber optical communication system, it is important to reduce the price of an optical transmission device, and a low-cost and high-performance semiconductor laser is also required for a light source. Conventionally, as a semiconductor laser used in an optical communication system, a buried (BH) semiconductor laser in which an active layer, which is a light emitting region, is embedded with a semiconductor layer having a larger band gap than the active layer has been used.
【０００３】埋め込み型半導体レーザの代表的な構造の
素子断面図を図３（ａ），（ｂ）に示す〔（ａ）Ｍｉｔ
ｏらエレクトロニクスレターズ（Ｅｌｅｃｔｒｏｎｉｃ
ｓＬｅｔｔｅｒｓ）２８ｔｈ Ｏｃｔｏｂｅｒ １９８
２，Ｖｏｌ．１８，Ｎｏ．２２，ｐｐ９５３−９５４，
（ｂ）ＫａｋｉｍｏｔｏらＩＥＥＥジャーナル・オブ・
クォンタムエレクトロニクス（Ｊ．ｏｆ Ｑｕａｎｔｕ
ｍ Ｅｌｅｃｔｒｏｎｉｃｓ）Ｖｏｌ．ＱＥ−２４ Ｎ
ｏ１，Ｊａｎｕａｒｙ １９８８ ｐｐ２９−３５）。
図３（ａ）は２重チャネルプレー埋め込み半導体レーザ
を示し、図３（ａ）において、３０は電極、３１は第１
導電型半導体基板、３２は第１導電型半導体層、３３は
活性層、３４は第２導電型半導体層、３５は第２導電型
電流ブロック層、３６は第１導電型電流ブロック層、３
７は第２導電型半導体層、３８は第２導電型コンタクト
層、３９は電極である。また、図３（ｂ）は埋め込みク
レセントレーザを示し、図３（ｂ）において、４０は電
極、４１は第１導電型半導体基板、４２は第２導電型電
流ブロック層、４３は第１導電型電流ブロック層、４４
は第２導電型半導体層、４５は活性層、４６は第２導電
型半導体層、４７は第２導電型コンタクト層、４８は電
極である。FIGS. 3A and 3B are cross-sectional views of a typical structure of a buried semiconductor laser.
oara Electronics Letters (Electronic)
sLetters) 28th October 198
2, Vol. 18, No. 22, pp 953-954,
(B) Kakimoto et al. IEEE Journal of
Quantum Electronics (J. of Quantu)
Electronics) Vol. QE-24 N
o1, January 1988 pp 29-35).
FIG. 3A shows a double channel play embedded semiconductor laser. In FIG. 3A, reference numeral 30 denotes an electrode, and 31 denotes a first electrode.
A conductive type semiconductor substrate; 32, a first conductive type semiconductor layer; 33, an active layer; 34, a second conductive type semiconductor layer; 35, a second conductive type current blocking layer;
7, a second conductivity type semiconductor layer; 38, a second conductivity type contact layer; and 39, an electrode. 3B shows a buried crescent laser. In FIG. 3B, reference numeral 40 denotes an electrode, 41 denotes a first conductivity type semiconductor substrate, 42 denotes a second conductivity type current blocking layer, and 43 denotes a first conductivity type. Current block layer, 44
Is a second conductivity type semiconductor layer, 45 is an active layer, 46 is a second conductivity type semiconductor layer, 47 is a second conductivity type contact layer, and 48 is an electrode.
【０００４】これらの埋め込み型半導体レーザでは、低
発振しきい値の素子が得られやすい反面、その製造工程
には液相成長（ＬＰＥ）による埋め込み成長の工程を有
する。このため、大きい面積の基板の全面にわたり均一
な特性の素子を実現することが難しかった。[0004] In these buried type semiconductor lasers, a device having a low oscillation threshold is easily obtained, but the manufacturing process includes a buried growth step by liquid phase epitaxy (LPE). For this reason, it has been difficult to realize an element having uniform characteristics over the entire surface of a substrate having a large area.
【０００５】[0005]
【発明が解決しようとする課題】これに対して、リッジ
導波型半導体レーザでは、埋め込み成長が不要であるか
ら、作製工程が単純であり、高い歩留まりで均一性に優
れた素子が得られやすい（ＡＺＩＺ Ｍ．ＲＡＳＨＩＤ
Ｓらジャーナル・オブ・ライトウェーブ・テクノロジー
（Ｊ．ｏｆ Ｌｉｇｈｔｗａｖｅ Ｔｅｃｈｎｏｌｏｇ
ｙ）Ｖｏｌ．６，Ｎｏ１，Ｊａｎｕａｒｙ １９８８
ｐｐ２５−２９）。図２は従来のリッジ導波型半導体レ
ーザの素子構造を示す断面図である。本図で矢印は注入
電流の拡がる様子を模式的に示している。この図におい
て、２０は第１導電型半導体基板、２１は第１導電型半
導体層、２２は活性層、２３は光ガイド層、２４は第２
導電型半導体層、２５は第２導電型コンタクト層、２６
は誘電体絶縁膜、２７は電極、２８は電極である。On the other hand, the ridge waveguide type semiconductor laser does not require burying growth, so that the manufacturing process is simple, and a device with high yield and excellent uniformity is easily obtained. (AZIZ M. RASHID
S et al. Journal of Lightwave Technology (J. of Lightwave Technology)
y) Vol. 6, No1, January 1988
pp25-29). FIG. 2 is a sectional view showing an element structure of a conventional ridge waveguide type semiconductor laser. In this figure, the arrows schematically show how the injection current spreads. In this figure, reference numeral 20 denotes a first conductivity type semiconductor substrate, 21 denotes a first conductivity type semiconductor layer, 22 denotes an active layer, 23 denotes a light guide layer, and 24 denotes a second
A conductive type semiconductor layer, 25 is a second conductive type contact layer, 26
Is a dielectric insulating film, 27 is an electrode, and 28 is an electrode.
【０００６】しかし、一般にリッジ導波型半導体レーザ
では、図２に示すように活性層２２が横方向に一様に存
在するから、注入電子が活性層２２内で拡散し、発振し
きい値電流が高くなり、特に高温環境では発振しきい値
電流が格段に高くなる。このように、従来の半導体レー
ザには、製作工程に液相成長を含むことから歩留り及び
素子の均一性に関し解決すべき課題があるか、又は発振
しきい値電流に関し解決すべき課題があった。However, in a ridge waveguide type semiconductor laser, since the active layer 22 generally exists in the lateral direction as shown in FIG. 2, the injected electrons diffuse in the active layer 22 and the oscillation threshold current is increased. The oscillation threshold current becomes extremely high especially in a high temperature environment. As described above, in the conventional semiconductor laser, there is a problem to be solved regarding the yield and the uniformity of the element because the manufacturing process includes the liquid phase growth, or a problem to be solved regarding the oscillation threshold current. .
【０００７】[0007]
【課題を解決するための手段】前述の課題を解決するた
めに、本発明では、第１導電型半導体基板上にこの第１
導電型半導体基板より狭い禁制帯幅の活性層とこの活性
層よりも大きい禁制帯幅の第２導電型半導体層とを積層
してなる２重ヘテロ構造半導体レーザであって、光伝播
領域の両側の一部分では半導体層を有しない凹部が形成
されたリッジ導波型半導体レーザの製造方法において、
２重ヘテロ構造をエピタキシャル成長する工程と、光伝
播領域の両側を活性層と前記半導体基板との界面に至る
までエッチングする工程と、エッチングにより露出され
た半導体表面上に少なくとも前記活性層と同等の厚みを
有し該活性層よりも禁制帯幅の広い第２導電型か又はノ
ンドープの半導体層をエピタキシャル成長する行程とを
含むことを特徴とする作製プロセスにより、前記課題を
解決することができる。According to the present invention, there is provided a semiconductor device comprising: a first conductive type semiconductor substrate;
What is claimed is: 1. A double heterostructure semiconductor laser comprising an active layer having a narrower forbidden band width than a conductive type semiconductor substrate and a second conductive type semiconductor layer having a forbidden band width larger than the active layer. In a method of manufacturing a ridge waveguide type semiconductor laser in which a recess having no semiconductor layer is formed in a part of
A step of epitaxially growing a double heterostructure, a step of etching both sides of a light propagation region to an interface between the active layer and the semiconductor substrate, and a thickness at least equivalent to that of the active layer on the semiconductor surface exposed by the etching. And a step of epitaxially growing a second conductivity type or a non-doped semiconductor layer having a larger forbidden band width than the active layer.
【０００８】[0008]
【作用】次に本発明の作用を図面を参照にして説明す
る。図２は、活性層２２が横方向に一様につながってい
る従来のリッジ導波型半導体レーザの模式図である。こ
の従来のインジウム燐系リッジ導波型半導体レーザに電
流注入したときに生ずるキャリアの活性層内横方向分布
を計算した結果を図４に示す。電子の横方向拡散現象に
より、約１０μｍにわたり、注入電子が拡散している。
このため、同構造のリッジ導波型半導体レーザにおい
て、室温（２０℃）における発振しきい値電流の計算値
は２４ｍＡであり、高温（８５℃）における発振しきい
値電流の計算値は４９ｍＡとなり、埋め込み型半導体レ
ーザと比較して高いしきい値電流で発振するという結果
となった。Next, the operation of the present invention will be described with reference to the drawings. FIG. 2 is a schematic view of a conventional ridge waveguide type semiconductor laser in which the active layers 22 are connected uniformly in the lateral direction. FIG. 4 shows the result of calculating the lateral distribution of carriers generated in the active layer when current is injected into the conventional indium-phosphorus ridge waveguide semiconductor laser. Due to the lateral diffusion phenomenon of electrons, injected electrons are diffused over about 10 μm.
Therefore, in the ridge waveguide semiconductor laser having the same structure, the calculated value of the oscillation threshold current at room temperature (20 ° C.) is 24 mA, and the calculated value of the oscillation threshold current at high temperature (85 ° C.) is 49 mA. As a result, the semiconductor laser oscillates at a higher threshold current than the buried semiconductor laser.
【０００９】一方、本発明のリッジ導波型半導体レーザ
の製造方法により作製する半導体レーザ素子構造図を図
１に示す。活性層１２の両脇に、活性層１２よりも禁制
帯幅の広い半導体層１５が連結するため、注入電子が横
方向に拡散することが殊んどない。実際に同構造の半導
体レーザに電流注入したときの電子の横方向濃度分布を
計算した結果を図５に示す。活性層１２外では注入電子
が分布しない階段状の濃度分布となった。さらに、活性
層１２の脇を流れる無効電流も殆んど生じない。同構造
の半導体レーザにおいて、室温（２０℃）における発振
しきい値電流の計算値は１６ｍＡ、高温（８５℃）にお
ける発振しきい値電流の計算値は３５ｍＡとなり、埋め
込み型半導体レーザとほぼ同等の発振しきい値電流が得
られた。On the other hand, FIG. 1 shows a structure diagram of a semiconductor laser device manufactured by the method of manufacturing a ridge waveguide type semiconductor laser of the present invention. Since the semiconductor layer 15 having a wider bandgap than the active layer 12 is connected to both sides of the active layer 12, injected electrons are not particularly diffused in the lateral direction. FIG. 5 shows a result of calculating a lateral concentration distribution of electrons when current is actually injected into a semiconductor laser having the same structure. Outside the active layer 12, a step-like concentration distribution was obtained in which injected electrons were not distributed. Further, almost no reactive current flows beside the active layer 12. In the semiconductor laser having the same structure, the calculated value of the oscillation threshold current at room temperature (20 ° C.) is 16 mA, and the calculated value of the oscillation threshold current at high temperature (85 ° C.) is 35 mA, which is almost the same as that of the embedded semiconductor laser. An oscillation threshold current was obtained.
【００１０】また、発振状態における同構造のＬＤの近
視野像の計算結果を図６に示す。通常のリッジ導波型半
導体レーザ同様、横方向に屈折率の階段状分布をもつか
ら単一基本横モード発振を実現できることを計算により
確認した。本発明によるリッジ導波型半導体レーザの製
造方法においては、素子作製工程で液相成長（ＬＰＥ）
を必要とせず、高性能な素子を均一性よく作製すること
ができる。FIG. 6 shows a calculation result of a near-field image of an LD having the same structure in an oscillation state. It has been confirmed by calculation that a single fundamental transverse mode oscillation can be realized because of the stepwise distribution of the refractive index in the lateral direction, similarly to a normal ridge waveguide type semiconductor laser. In the method for manufacturing a ridge waveguide type semiconductor laser according to the present invention, liquid phase growth (LPE) is performed in an element manufacturing process.
And a high-performance element can be manufactured with high uniformity.
【００１１】[0011]
【実施例】次に本発明の実施例について、図面を参照し
て説明する。図１は本発明によるリッジ導波型半導体レ
ーザの製造方法の実施例で作製した素子を示す断面図で
ある。本実施例における説明ではインジウム燐（Ｉｎ
Ｐ）系材料を用いた場合に限定して説明する。Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a sectional view showing an element manufactured by an embodiment of a method for manufacturing a ridge waveguide semiconductor laser according to the present invention. In the description of this embodiment, indium phosphide (In)
The description will be limited to the case where a P) -based material is used.
【００１２】（１００）面を表面に有する硫黄（ｓ）ド
ーピングＮ型インジウム燐（ＩｎＰ）基板１０上に、有
機金属気相成長法（ＭＯＶＰＥ）を用いて硫黄ドーピン
グＮ型〔Ｎ＝１×１０18ｃｍ-3〕インジウム燐層１１を
１μｍ、発光波長１．３μｍのバンドギャップを有する
インジウムガリウムひ素燐（ＩｎＧａＡｓＰ）活性層１
２を厚み０．１５μｍ、亜鉛（Ｚｎ）ドーピングＰ型
〔Ｐ＝１×１０18ｃｍ-3〕インジウム燐層１３を厚み２
μｍ、亜鉛ドーピングＰ型〔Ｐ＝１×１０19ｃｍ-3〕イ
ンジウムガリウムひ素（ＩｎＧａＡｓ）層１４を厚み
０．２μｍ、順次に連続的にエピタキシャル成長する。
次に、ＣＶＤ技術により厚み２０００ÅのＳｉＯ2 膜を
表面に堆積させた後、フォトリソグラフィーにより、中
央部に＜０１１＞方向に２μｍ幅のストライプを残し
て、ストライプの両脇に幅１０μｍのストライプ状のＳ
ｉＯ2 間隙を設ける。次に塩素（Ｃｌ2 ）を反応ガスと
したリアクティブイオンエッチング（ＲＩＥ）により、
半導体表面より約１μｍのエッチングを施す。さらに化
学エッチングにより、メサ部分両脇の領域において、Ｎ
型インジウム燐層が露出するまでエッチングを施す。エ
ッチングにより、リッジ型光導波路を形成した後、エッ
チングの施された表面に、有機金属気相成長法により、
厚み０．２μｍの亜鉛ドーピングＰ型（Ｐ＝１×１０17
ｃｍ-3）インジウム燐層１５を選択的にエピタキシャル
成長する。On a sulfur (s) -doped N-type indium phosphide (InP) substrate 10 having a (100) plane on the surface, a sulfur-doped N-type [N = 1 × 10 18 cm -3 ] Indium gallium arsenide phosphorus (InGaAsP) active layer 1 having a band gap of 1 μm and an emission wavelength of 1.3 μm.
2 with a thickness of 0.15 μm and a zinc (Zn) -doped p-type [P = 1 × 10 18 cm −3 ] indium phosphorus layer 13 with a thickness of 2
[mu] m, a zinc doped P-type [P = 1 × 10 19 cm -3] indium gallium arsenide (InGaAs) layer 14 thickness 0.2 [mu] m, are sequentially and continuously epitaxially grown.
Next, after depositing a 2000 mm thick SiO 2 film on the surface by the CVD technique, a 10 μm wide stripe is formed on both sides of the stripe by photolithography, leaving a 2 μm wide stripe in the <011> direction at the center. S
An iO 2 gap is provided. Next, by reactive ion etching (RIE) using chlorine (Cl 2 ) as a reaction gas,
Etching is performed about 1 μm from the semiconductor surface. Further, by chemical etching, N
Etching is performed until the indium phosphide layer is exposed. After forming a ridge type optical waveguide by etching, the surface subjected to etching is subjected to metalorganic vapor phase epitaxy.
0.2 μm thick zinc-doped P-type (P = 1 × 10 17
cm −3 ) The indium phosphorus layer 15 is selectively epitaxially grown.
【００１３】しかる後、エッチング、及び選択成長のた
めに形成したＳｉＯ2 マスクを除去し、全面に半導体の
露出した表面にＳｉＯ2 膜１６を再びＣＶＤ技術により
形成する。そして、幅２μｍのメサ上に堆積したＳｉＯ
2 膜を選択的に除去し、その後、Ｐ型半導体側に電極１
７を形成する。そして、Ｎ型半導体基板を厚み１２０μ
ｍまで研磨し、Ｎ型半導体基板側に電極１８を形成す
る。さらに、電極−半導体間のオーミック接触をとるた
めに、アニーリングを施し、全プロセスを完了する。Thereafter, the SiO 2 mask formed for etching and selective growth is removed, and an SiO 2 film 16 is formed again on the entire exposed surface of the semiconductor by the CVD technique. Then, the SiO deposited on the mesa having a width of 2 μm
2 Selectively remove the film, and then put the electrode 1 on the P-type semiconductor side.
7 is formed. Then, the N-type semiconductor substrate is made
Then, the electrode 18 is formed on the N-type semiconductor substrate side. Furthermore, annealing is performed to obtain ohmic contact between the electrode and the semiconductor, and the entire process is completed.
【００１４】以上に説明したリッジ導波型半導体レーザ
の製造方法により作製した素子は、室温における発振し
きい値電流１５ｍＡで発振し、良好な特性を示した。The device manufactured by the above-described method for manufacturing a ridge waveguide semiconductor laser oscillated at an oscillation threshold current of 15 mA at room temperature and showed good characteristics.
【００１５】[0015]
【発明の効果】以上に説明したように、本発明のリッジ
導波型半導体レーザの製造方法によれば、簡単な作製プ
ロセスにより、発振しきい値電流が小さく高性能な半導
体レーザを半導体基板面内に均一に作製することができ
る。したがって、本発明の方法を採用することにより、
優れた性能の半導体レーザを安価に製造できる。As described above, according to the method of manufacturing a ridge waveguide type semiconductor laser of the present invention, a high performance semiconductor laser having a small oscillation threshold current can be manufactured by a simple manufacturing process. It can be manufactured uniformly in the inside. Therefore, by employing the method of the present invention,
Semiconductor lasers with excellent performance can be manufactured at low cost.
【図１】本発明によるリッジ導波型半導体レーザの製造
方法実施例で作製された素子を示す断面図である。FIG. 1 is a cross-sectional view showing an element manufactured by a method for manufacturing a ridge waveguide type semiconductor laser according to an embodiment of the present invention.
【図２】従来のリッジ導波型半導体レーザの素子構造を
示す断面図である。FIG. 2 is a cross-sectional view showing an element structure of a conventional ridge waveguide semiconductor laser.
【図３】埋め込み型半導体レーザの素子構造の例を示す
断面図である。FIG. 3 is a cross-sectional view illustrating an example of an element structure of a buried type semiconductor laser.
【図４】従来のリッジ導波型半導体レーザの活性層にお
ける電子濃度の横方向分布を計算した結果を示す図であ
る。FIG. 4 is a diagram showing a calculation result of a lateral distribution of an electron concentration in an active layer of a conventional ridge waveguide semiconductor laser.
【図５】本発明によるリッジ導波型半導体レーザの製造
方法により作製された素子の活性層位置横方向における
電子濃度の横方向分布を計算した結果を示す図である。FIG. 5 is a diagram showing a result of calculating a lateral distribution of an electron concentration in a lateral direction of an active layer position of an element manufactured by a method of manufacturing a ridge waveguide semiconductor laser according to the present invention.
【図６】本発明によるリッジ導波型半導体レーザの製造
方法により作製された素子における伝播光の断面内強度
分布を計算した結果を示す図である。FIG. 6 is a diagram showing a calculation result of an in-section intensity distribution of propagating light in an element manufactured by the method of manufacturing a ridge waveguide semiconductor laser according to the present invention.
１０ 第１導電型半導体基板 １１ 第１導電型半導体層 １２ 活性層 １３ 第２導電型半導体層 １４ 第２導電型コンタクト層 １５ 第２導電型半導体層 １６ 誘電体絶縁膜 １７ 電極 １８ 電極 ２０ 第１導電型半導体基板 ２１ 第１導電型半導体層 ２２ 活性層 ２３ 光ガイド層 ２４ 第２導電型半導体層 ２５ 第２導電型コンタクト層 ２６ 誘電体絶縁膜 ２７ 電極 ２８ 電極 ３０ 電極 ３１ 第１導電型半導体基板 ３２ 第１導電型半導体層 ３３ 活性層 ３４ 第２導電型半導体層 ３５ 第２導電型電流ブロック層 ３６ 第１導電型電流ブロック層 ３７ 第２導電型半導体層 ３８ 第２導電型コンタクト層 ３９ 電極 ４０ 電極 ４１ 第１導電型半導体基板 ４２ 第２導電型電流ブロック層 ４３ 第１導電型電流ブロック層 ４４ 第２導電型半導体層 ４５ 活性層 ４６ 第２導電型半導体層 ４７ 第２導電型コンタクト層 ４８ 電極 DESCRIPTION OF SYMBOLS 10 1st conductive type semiconductor substrate 11 1st conductive type semiconductor layer 12 Active layer 13 2nd conductive type semiconductor layer 14 2nd conductive type contact layer 15 2nd conductive type semiconductor layer 16 Dielectric insulating film 17 Electrode 18 Electrode 20 First Conductive semiconductor substrate 21 First conductive semiconductor layer 22 Active layer 23 Light guide layer 24 Second conductive semiconductor layer 25 Second conductive contact layer 26 Dielectric insulating film 27 Electrode 28 Electrode 30 Electrode 31 First conductive semiconductor substrate 32 First conductivity type semiconductor layer 33 Active layer 34 Second conductivity type semiconductor layer 35 Second conductivity type current block layer 36 First conductivity type current block layer 37 Second conductivity type semiconductor layer 38 Second conductivity type contact layer 39 Electrode 40 Electrode 41 First conductivity type semiconductor substrate 42 Second conductivity type current block layer 43 First conductivity type current block layer 44 Second conductivity type semiconductor layer 45 Active Conductive layer 46 second conductivity type semiconductor layer 47 second conductivity type contact layer 48 electrode
Claims (1)
型半導体基板より狭い禁制帯幅の活性層とこの活性層よ
りも大きい禁制帯幅の第２導電型半導体層とを積層して
なる２重ヘテロ構造半導体レーザであって、光伝播領域
の両側の一部分では半導体層を有しない凹部が形成され
たリッジ導波型半導体レーザの製造方法において、２重
ヘテロ構造をエピタキシャル成長する工程と、光伝播領
域の両側を活性層と前記半導体基板との界面に至るまで
エッチングする工程と、エッチングにより露出された半
導体表面上に、少なくとも前記活性層と同等の厚みを有
し該活性層よりも禁制帯幅の広い第２導電型か又はノン
ドープの半導体層をエピタキシャル成長する工程とを含
むことを特徴とするリッジ導波型半導体レーザの製造方
法。An active layer having a narrower forbidden band width than the first conductive type semiconductor substrate and a second conductive type semiconductor layer having a larger forbidden band width than the active layer are laminated on the first conductive type semiconductor substrate. A method of manufacturing a ridge waveguide type semiconductor laser in which a concave portion having no semiconductor layer is formed in a part on both sides of a light propagation region, wherein a double hetero structure is epitaxially grown; Etching both sides of the light propagation region to the interface between the active layer and the semiconductor substrate; and, on the semiconductor surface exposed by the etching, having a thickness at least equal to that of the active layer and more forbidden than the active layer. Epitaxially growing a second conductive type or a non-doped semiconductor layer having a wide bandwidth.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9323791A JP2956255B2 (en) | 1991-03-31 | 1991-03-31 | Method for manufacturing ridge waveguide semiconductor laser |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9323791A JP2956255B2 (en) | 1991-03-31 | 1991-03-31 | Method for manufacturing ridge waveguide semiconductor laser |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04303983A JPH04303983A (en) | 1992-10-27 |
| JP2956255B2 true JP2956255B2 (en) | 1999-10-04 |
Family
ID=14076926
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9323791A Expired - Fee Related JP2956255B2 (en) | 1991-03-31 | 1991-03-31 | Method for manufacturing ridge waveguide semiconductor laser |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2956255B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19813180A1 (en) * | 1998-03-25 | 1999-10-07 | Siemens Ag | Method for producing a ridge waveguide in III-V compound semiconductor layer structures and semiconductor laser device especially for low series resistances |
-
1991
- 1991-03-31 JP JP9323791A patent/JP2956255B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04303983A (en) | 1992-10-27 |
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