JP2884357B2 - Dielectric hetero ultra-low resistance film - Google Patents
Dielectric hetero ultra-low resistance filmInfo
- Publication number
- JP2884357B2 JP2884357B2 JP1299563A JP29956389A JP2884357B2 JP 2884357 B2 JP2884357 B2 JP 2884357B2 JP 1299563 A JP1299563 A JP 1299563A JP 29956389 A JP29956389 A JP 29956389A JP 2884357 B2 JP2884357 B2 JP 2884357B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- hetero
- ultra
- dielectric
- low resistance
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
- H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/02—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having positive temperature coefficient
- H01C7/021—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having positive temperature coefficient formed as one or more layers or coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Ceramic Engineering (AREA)
- Physical Vapour Deposition (AREA)
- Non-Insulated Conductors (AREA)
- Thermistors And Varistors (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本発明は有極性と無極性の誘電体膜とくにラングミュ
ア・プロジェット(LB)膜のZ形膜或いはA形膜(有極
性膜)とY形膜(無極性膜)とを重ねて作製したLBヘテ
ロ膜を金属膜で挟み、膜面方向の抵抗が金属より極めて
低くなる様な超低抵抗膜に関係する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polar and non-polar dielectric film, in particular, a Z-type film or a A-type (polar film) and a Y-type film of Langmuir Project (LB) film. It is related to an ultra low resistance film in which the resistance in the film surface direction is extremely lower than that of a metal by sandwiching an LB hetero film formed by laminating (a non-polar film) with a metal film.
従来の技術 一般に誘電体は絶縁体でもある。本発明の様に誘電体
が室温あるいはそれ以上の温度において金属より遥かに
低い超低抵抗値を示す材料は今まで皆無である。しかし
本発明で作製された様に有極性と無極性のヘテロ膜によ
って電子ガスの充満する数十Åの厚さのポテンシャル井
戸の面が出来れば、十分に二次元低抵抗面の発生するこ
とが考えられる。2. Description of the Related Art Generally, a dielectric is also an insulator. There is no material as in the present invention in which the dielectric exhibits an extremely low resistance value much lower than that of metal at room temperature or higher. However, if a surface of a potential well with a thickness of several tens of millimeters filled with an electron gas is formed by a polar and nonpolar hetero film as produced in the present invention, a two-dimensional low-resistance surface can be sufficiently generated. Conceivable.
発明が解決しようとする問題点 電子ガスの充満したポテンシャル井戸による数十Åの
厚さの二次元導電面を構築することと、これを誘電体膜
で挟む構造を作製することが必要である。この様な構造
は[誘電体/金属の超薄膜/誘電体]の形と同様で、金
属面内で超伝導の発生することも期待されて来た。Problems to be Solved by the Invention It is necessary to construct a two-dimensional conductive surface having a thickness of several tens of millimeters by a potential well filled with electron gas, and to fabricate a structure in which this is sandwiched between dielectric films. Such a structure is similar to the shape of [dielectric / ultra-thin metal / dielectric], and it has been expected that superconductivity occurs in the metal plane.
問題点を解決するための手段 有極性の膜として利用出来るものにZ形又はA形のLB
膜がある。これは電圧を印加しなくても強誘電体の飽和
分極程の大きな分極を持っている。又広い面積にわたっ
て均一なポテンシャル井戸を形成させるために、膜を累
積する面を平滑にすることが必要であり、これにはシリ
コン・ウエーハの酸化膜(SiO2膜)面が使用出来る。Means to solve the problem Z-type or A-type LB that can be used as a polar film
There is a membrane. This has a polarization as large as the saturation polarization of the ferroelectric even without applying a voltage. In order to form a uniform potential well over a wide area, it is necessary to smooth the surface on which the film is accumulated, and for this, an oxide film (SiO 2 film) surface of a silicon wafer can be used.
(実施例) 次に本発明の誘電体ヘテロ超低抵抗膜の実施例につい
て図面を参照して説明する。(Example) Next, an example of the dielectric hetero ultra-low resistance film of the present invention will be described with reference to the drawings.
実施例1 この実施例においては第1図、第2図に示す様に、先
ず表面に酸化シリコン(SiO2)の絶縁膜(2)(厚さ:5
000Å程度)を持つシリコン・ウエーハ(1)の上にア
ルミニウムの薄い蒸着膜(3)を形成する。該蒸着膜
(3)は厚さ数百Åであり幅は10mmであって、その膜上
30mm離れた両端から測った抵抗はほぼ600Ωである。次
いで該蒸着膜(3)の上にLB法によって4〜6単分子層
アラキン酸のLB膜(4−a)とやはり同数の単分子層よ
りなる2−ペンタデシル−7,7′,8,8′−テトラシラノ
キノジメタン(C15・TCNQ)のLB膜(4−b)重ねてLB
ヘテロ膜(4)を被着させる。更に該LBヘテロ膜(4)
の上に金蒸着薄膜(5)を被着させることによって該LB
ヘテロ膜(4)の垂直方向に対して[Al/LBヘテロ膜/A
u]の構造を有する本発明の誘電体ヘテロ超低抵抗膜が
形成される。そして最後に測定端子として9個の金の電
極(6)が該金蒸着薄膜(5)の上に蒸着される。ここ
でアラキン酸LB膜はY形で殆ど分極の無い無極性の膜
で、C15・TCNQのLB膜はZ形で大きい分極を持つ有極性
の膜である。Embodiment 1 In this embodiment, as shown in FIGS. 1 and 2, an insulating film (2) (thickness: 5) of silicon oxide (SiO 2 ) is first formed on the surface.
A thin aluminum evaporated film (3) is formed on a silicon wafer (1) having a thickness of about 000 °. The deposited film (3) has a thickness of several hundreds of mm and a width of 10 mm.
The resistance measured from both ends 30mm apart is almost 600Ω. Next, 4-pentadecyl-7,7 ', 8,8 composed of the same number of monolayers as the LB film (4-a) of 4 to 6 monolayers of arachidic acid on the vapor-deposited film (3) by the LB method. '- LB film of tetra silanol quinodimethane (C 15 · TCNQ) (4 -b) Cascade LB
A hetero-film (4) is deposited. Further, the LB hetero film (4)
The LB by depositing a gold-deposited thin film (5) on the
The vertical direction of the hetero film (4) is [Al / LB hetero film / A
u], and the dielectric hetero ultra-low resistance film of the present invention having the structure of [u] is formed. Finally, nine gold electrodes (6) are deposited on the gold deposited thin film (5) as measurement terminals. Here arachidic acid LB film almost nonpolar film without polarization in Y-shape, LB films of C 15 · TCNQ is a membrane polar with large polarization in the Z-shaped.
第3図はアルミニウムの蒸着膜(3)及び金の蒸着膜
(5)を含むLBヘテロ膜(4−a、4−b)の膜に垂直
な断面のポテンシャル図(横方向は膜の断面、縦方向は
ポテンシャル)を示す。簡単化のために無極性誘電体と
考えられるアラキン酸のLB膜(4−a)と有極性誘電体
とされるC15・TCNQのLB膜(4−b)の誘電率と厚さを
同じとしてこれらをεとdとし、両LB膜の面とアルミニ
ウム及び金との間の障壁の高さを同じくφとした。両金
属蒸着膜が図のように同電位になるとき、有極性膜に生
じている分極電荷±P[C/cm2])によってLB膜中には
電界E[V/cm]が発生し、LB膜には分極が生じる。無極
性LB膜(4−a)に発生した分極電荷を±q[C/cm2]
とし有極性LB膜(4−b)にも分極電荷が生じるのでこ
れを±p[C/cm2]とする。また同時に両LB膜に接する
両金属蒸着膜の内表面にも電荷±Q[C/cm2]が誘起さ
れる(電荷の中性から両金属蒸着膜に誘起される電荷は
等量で異符号である)。このように発生した電界Eによ
って両LB膜の界面のポテンシャルが低下してポテンシャ
ル井戸が生じる。第3図はこのように簡単化して描かれ
たものである。以下にポテンシャル井戸の深さHをもと
めてみる。FIG. 3 is a potential diagram of a cross section perpendicular to a film of the LB hetero film (4-a, 4-b) including a vapor deposition film of aluminum (3) and a vapor deposition film of gold (5). The vertical direction indicates potential). LB film of arachidic acid considered nonpolar dielectric for simplicity (4-a) and the dielectric constant and thickness of the polar dielectric and is the C 15 · TCNQ the LB film (4-b) The same And ε and d, and the height of the barrier between the surfaces of both LB films and aluminum and gold is also φ. When the two metal deposition films have the same potential as shown in the figure, an electric field E [V / cm] is generated in the LB film due to the polarization charge ± P [C / cm 2 ] generated in the polar film, Polarization occurs in the LB film. The polarization charge generated in the non-polar LB film (4-a) is ± q [C / cm 2 ].
Since a polarized charge is also generated in the polar LB film (4-b), this is set to ± p [C / cm 2 ]. At the same time, electric charge ± Q [C / cm 2 ] is induced on the inner surfaces of both metal deposited films that are in contact with both LB films. Is). The electric field E generated in this manner lowers the potential at the interface between the two LB films, thereby generating a potential well. FIG. 3 is drawn in such a simplified manner. The depth H of the potential well will be described below.
電磁気学によると、電界Eは電荷P、Q、pと誘電率
εによって次のように表される(p《Pなるためにpを
省略する)。According to the electromagnetism, the electric field E is represented by the charges P, Q, p and the dielectric constant ε as follows (p is omitted because p << P).
−E={(−Q+q)/ε}={(−P+Q)/ε} ∴(−Q+q)=(−P+Q) (1) よって 2Q=P+q (2) 一方電磁気学の基本定理から、分極電荷qと電界Eとの
間には次の関係がある。−E = {(− Q + q) / ε} = {(− P + Q) / ε} {(−Q + q) = (− P + Q) (1) 2Q = P + q (2) On the other hand, from the basic theorem of electromagnetism, the polarization charge The following relationship exists between q and the electric field E.
q=εo(εr−1)E (3) ただしεo、εrは真空誘電率、LB膜の比誘電率であ
る。(1)、(3)式より {q/εo(εr−1)}=−{(−Q+q)/εoεr} ∴q={(εr−1)/(2εr+1)}Q (4) (2)、(4)式より Q={3(εr+1)/(2εr+1)}P (5) (4)、(5)式より q={3(εr−1)(εr+1)/(2εr+1)2}P (6) 従って井戸の深さHは{(E)x(d)}であり、
(1)、(5)、(6)式より H=(E)x(d)=d(1/εrεo)[{3(εr+
1)/(2εr+1) −{3(εr+1)(εr−1)/(2εr+1)2}]
P (7) 実施例1では、C15・TCNQのLB膜の単分子層の厚さは約2
5Åであり、このLB膜は四層程度累積されている。従っ
てd=100Åとする。両LB膜とも比誘電率はεr=3.0程
度である。またC15・TCNQの分子は長さが単分子層の厚
さ25Åで、断面積はほぼ40Å2であって分子の体積は100
0Å3となる。また我々の研究によれば、この分子の双極
子モーメントは約13デバイであった。これらのデータを
用いて分極Pを計算すると P=単位体積中の双極子モーメントの総和 =43.3x10-7[C/cm2] (8) 上に得られたPの値とεrの数値を(7)式に入れて井
戸の深さHを計算する下式のような値が得られる。q = ε o (ε r −1) E (3) where ε o and ε r are the vacuum permittivity and the relative permittivity of the LB film. (1), (3) = {q / ε o (ε r -1)} from the equation - {(- Q + q) / ε o ε r} ∴q = {(ε r -1) / (2ε r +1) } Q (4) From equations (2) and (4), Q = {3 (ε r +1) / (2ε r +1)} P (5) From equations (4) and (5), q = {3 (ε r -1) (ε r +1) / (2ε r +1) 2 {P (6) Therefore, the depth H of the well is {(E) x (d)},
(1), (5), (6) H = from the equation (E) x (d) = d (1 / ε r ε o) [{3 (ε r +
1) / (2ε r +1) - {3 (ε r +1) (ε r -1) / (2ε r +1) 2}]
P (7) In Example 1, the thickness of the monolayer LB film of C 15 · TCNQ about 2
This is 5Å, and about four LB films are accumulated. Therefore, d = 100 °. Both LB films have a relative dielectric constant of about ε r = 3.0. The thick 25Å molecular length of C 15 · TCNQ monomolecular layer, the volume of cross-sectional area is a substantially 40 Å 2 molecules 100
The 0Å 3. According to our study, the dipole moment of this molecule was about 13 Debye. When the polarization P is calculated using these data, P = sum of dipole moments per unit volume = 43.3 × 10 −7 [C / cm 2 ] (8) The value of P obtained above and the value of ε r A value as shown in the following equation for calculating the well depth H in the equation (7) is obtained.
H≒20[V] (9) 第3図に示した障壁の高さφは種々の誘電体と金属に対
して1V程度であるので、井戸の深さは両側の金属のフェ
ルミ準位より十分に低くなり、両側の金属より自由電子
が井戸に流れ込んで、井戸は導電性になると考えられ
る。H ≒ 20 [V] (9) Since the height φ of the barrier shown in FIG. 3 is about 1 V for various dielectrics and metals, the depth of the well is more than the Fermi level of the metal on both sides. It is considered that free electrons flow into the well from the metal on both sides, and the well becomes conductive.
種々の分子の双極子モーメントの大きさが報告されて
いるが、大体1〜10デバイである。我々の研究結果の13
デバイは少し大きいと思われるが、もっとモーメントが
小さくても十分に二次元の導電性のポテンシャル井戸は
形成されると考えられる。The magnitude of the dipole moment of various molecules has been reported, but is approximately 1 to 10 Debye. 13 of our findings
Although the Debye seems to be a little large, it is considered that a two-dimensional conductive potential well is formed even with a smaller moment.
第4図は四端子法による抵抗測定回路である。本発明
の誘電体ヘテロ超低抵抗膜の上に蒸着された9個の金電
極の中の最外側の一対の電極(6−1、6−9)から電
源(8)によって電流を流出入させ、他の一対の電極
(6−a、6−b)の間の電圧降下(v)を電圧計(1
0)で測って、該電極(6−a、6−b)の間の誘電体
ヘテロ超低抵抗膜の抵抗を求める。この時、該電圧計
(10)は十分に内部抵抗が高いものであり、該電極(6
−a、6−b)の間の該電圧降下(v)を正しく測定し
ている。電流計(9)は最外側の該電極(6−1、6−
9)間を流れる電流Iを測定する。酸化シリコン(Si
O2)の絶縁膜(2)は厚さが5000Åもあって極めて良好
な絶縁性を持っているので、該電極(6−1、6−9)
の間を流れる該電流Iは非常に薄いアルミニーム蒸着膜
(3)、LBヘテロ膜(4)、金蒸着膜(5)等を通り、
該電極(6−a、6−b)間の凡そ3.3mmの上記の薄い
膜の抵抗Rは R=v/I (10) で求められる。FIG. 4 shows a resistance measuring circuit according to the four-terminal method. A power source (8) allows current to flow in and out of a pair of outermost electrodes (6-1, 6-9) among the nine gold electrodes deposited on the dielectric hetero ultra-low resistance film of the present invention. , A voltage drop (v) between the other pair of electrodes (6-a, 6-b) is measured with a voltmeter (1).
0), the resistance of the dielectric hetero ultra-low resistance film between the electrodes (6-a, 6-b) is determined. At this time, the voltmeter (10) has sufficiently high internal resistance and the electrode (6)
The voltage drop (v) during -a, 6-b) is correctly measured. The ammeter (9) is connected to the outermost electrodes (6-1, 6-
9) Measure the current I flowing between them. Silicon oxide (Si
Since the insulating film ( 2 ) of O 2 ) has an extremely good insulating property with a thickness of 5000 °, the electrodes (6-1, 6-9)
The current I flowing between passes through a very thin aluminum evaporated film (3), LB hetero film (4), gold evaporated film (5), etc.
The resistance R of the above-mentioned thin film of about 3.3 mm between the electrodes (6-a, 6-b) is obtained by R = v / I (10).
第5図はアラキン酸LB膜とC15・TCNQ LB膜がそれぞれ
5単分子層からなっているLBヘテロ膜を用いた本誘電体
ヘテロ超低抵抗膜の試料(Si−5L)について測定した9
個の電極の間の電圧降下を示している。電流Iを変え
て、I=1.1A(5L−1)、I=0.55A(5L−2)、I=
0.16A(5L−3)の電流を流した時の特性を示してあ
る。図より判る様に電極(6−2)〜(6−8)の間で
は電圧降下が小さく、電極間によっても多少その値は異
なるけれども、隣接電極間では電圧降下を(1)式→に
よって抵抗に換算すると大体10-2〜10-3Ωである。電極
間(6−1)と(6−2)および(6−8)と(6−
9)の間では電圧降下が大きく、これは電極とLB膜との
接触抵抗などに依ると考えられる。Figure 5 were measured for the samples (Si-5L) of the dielectric hetero ultra low resistance film using the LB hetero film arachidic acid LB film and the C 15 · TCNQ LB film is made from the 5 monolayer 9
The voltage drop between the electrodes is shown. By changing the current I, I = 1.1A (5L-1), I = 0.55A (5L-2), I =
The characteristics when a current of 0.16 A (5L-3) is applied are shown. As can be seen from the figure, the voltage drop between the electrodes (6-2) to (6-8) is small, and the value differs somewhat depending on the electrodes. It is approximately 10 -2 to 10 -3 Ω when converted to. (6-1) and (6-2) and (6-8) and (6-
The voltage drop is large during 9), which is considered to depend on the contact resistance between the electrode and the LB film.
第6図は、第1、2図に示す試料からLBヘテロ膜だけ
を取り除いた試料(Si−0L)についての電圧降下を示し
たものである。電流をIとして、I=0.026A(0L−
1)、I=0.013A(0L−2)及びI=0.0026A(0L−
3)の3通りの電流を流した場合に発生する電圧降下
は、電極(6−7)から測定してほぼ電極(6−7)か
らの距離に比例している。そして両外側の電極(6−
1)と(6−7)の間の抵抗は約28Ωであり、隣接電極
間では4.4Ωとなる。この抵抗値は電極直下のAl/Auの蒸
着膜の値にほぼ等しい。FIG. 6 shows a voltage drop of a sample (Si-0L) obtained by removing only the LB hetero film from the samples shown in FIGS. Assuming that the current is I, I = 0.026A (0L−
1), I = 0.013A (0L-2) and I = 0.0026A (0L-
The voltage drop generated when the three types of currents of 3) are applied is substantially proportional to the distance from the electrode (6-7) as measured from the electrode (6-7). The outer electrodes (6-
The resistance between 1) and (6-7) is about 28Ω, and 4.4Ω between adjacent electrodes. This resistance value is almost equal to the value of the deposited Al / Au film immediately below the electrode.
第7図は第4図と第5図の結果から得られた隣接電極
端子間の抵抗をLBヘテロ膜の無いSi−0Lとこれを含むSi
−3L、Si−4L、Si−5Lとで比較したものである。わずか
189Å(Si−3L)、252Å(Si−4L)、315Å(Si−5L)
の厚さのLB膜がAlとAuの蒸着膜の間に介在するだけで抵
抗は10-3倍も小さくなっている。このことは電流が極め
て薄いLB膜の面内を通っていることを示している。FIG. 7 shows the resistance between adjacent electrode terminals obtained from the results of FIG. 4 and FIG.
-3L, Si-4L, and Si-5L. Just
189Å (Si-3L) 、 252Å (Si-4L) 、 315Å (Si-5L)
The resistance is as low as 10 -3 times only because the LB film having a thickness of 3 mm is interposed between the deposited films of Al and Au. This indicates that the current passes through the extremely thin LB film.
LBヘテロ膜の厚さが判っているので、これと電極の幅
及び電極間隔からLBヘテロ膜の抵抗率が求められる。こ
の値をLB膜に流れる電流に対してプロットしたものが第
7図である。それぞれ10-8〜10-9Ωcmの値が得られた
が、図示する様な金属の10-5Ωcm程度の値(M)に対し
て10-3〜10-4倍も小さい。Since the thickness of the LB hetero film is known, the resistivity of the LB hetero film is obtained from the thickness, the electrode width and the electrode interval. FIG. 7 shows this value plotted against the current flowing through the LB film. The respective values of 10 -8 to 10 -9 Ωcm were obtained, but 10 -3 to 10 -4 times smaller than the value (M) of about 10 -5 Ωcm of the metal as shown.
以上示した実験から、本発明のLB膜による誘電体ヘテ
ロ膜は金属よりもはるかに低い抵抗値を持つ膜であるこ
とが判明した。From the experiments described above, it was found that the dielectric hetero-film made of the LB film of the present invention is a film having much lower resistance than metal.
実施例2 本発明のLB膜による誘電体ヘテロ超低抵抗膜は室温か
ら80→℃程度まで抵抗率が殆ど変化しない。第9図はSi
−4Lの試料についての例を示す。温度はシリコン基板に
熱電対の温接点を接触させて測ったものである。抵抗率
は約8.6x10-8Ωcm(4L−1)である。この温度の上昇は
印加電圧を大きくしていく途上での試料からの発熱に依
るものであって、各温度における電流(4L−2)も示し
てある。この実験から電流が基板のシリコン・ウエーハ
の中を通っていないことが明確に判る。それはシリコン
の抵抗率は温度と共に急速に減少するから、もし電流が
シリコン・ウエーハ中を通過していれば、抵抗率は図示
する様に一定ではなく、温度と共に低下する筈だからで
ある。Embodiment 2 The resistivity of the dielectric hetero ultra-low resistance film made of the LB film of the present invention hardly changes from room temperature to about 80 → ° C. Fig. 9 shows Si
An example for a -4 L sample is shown. The temperature was measured by bringing a hot junction of a thermocouple into contact with a silicon substrate. The resistivity is about 8.6 × 10 −8 Ωcm (4L−1). This rise in temperature is due to heat generation from the sample in the course of increasing the applied voltage, and the current (4L-2) at each temperature is also shown. This experiment clearly shows that no current is passing through the silicon wafer of the substrate. Because the resistivity of silicon decreases rapidly with temperature, if current is flowing through the silicon wafer, the resistivity is not constant as shown, but should decrease with temperature.
実施例3 本発明のLBヘテロ超低抵抗膜には第9図に見られる様
に1A程度の電流が流れていて、これは電流密度になおす
と40万A/cm2にもなる。そしてこの時、第9図に示され
る様に温度が80℃にも上昇する。しかし、本LBヘテロ膜
は損傷されなかった。また印加電圧を更に増して電流を
増加させようとしてもスイッチング現象を起こし電流が
急に減少してしまい、それ以上は増大しなかった。The LB hetero ultra low resistance film of Example 3 the present invention have the current of about 1A as seen in FIG. 9 flows, which also becomes fix the 400,000 A / cm 2 in current density. At this time, the temperature rises to 80 ° C. as shown in FIG. However, the LB hetero film was not damaged. Further, even if an attempt was made to increase the current by further increasing the applied voltage, a switching phenomenon occurred, and the current suddenly decreased, and did not increase any more.
第10図はスイッチング現象を示す一例で、印加電圧
(V)に対する電流(I)(5L−8)と隣接電極端子
(6−8)と(6−9)の間の電圧降下(5L−9)とを
示す。この図に見られる様に、電流は1.3Aで急に3x10-4
に減少し、同時に電圧降下は15.5Vに上昇している。こ
の電圧降下はこの時点で試料に印加されている電源の電
圧にほぼ等しい。印加電圧を下げていくと、再び電流が
急増し(印加電圧2V点)、元の状態に戻る。同時に抵抗
も減少して元に戻る。つまり印加電圧の増減に対して、
電流は0−a−b−c−d−a−0、電圧降下は0−e
−f−b−g−h−a−e−0の様な道筋をたど。この
様なスイッチング現象は何回繰り返しても発生した。又
Si−4Lの試料にも同様な現が観測された。FIG. 10 shows an example of the switching phenomenon, in which the current (I) (5L-8) with respect to the applied voltage (V) and the voltage drop (5L-9) between the adjacent electrode terminals (6-8) and (6-9). ). As seen in this figure, the current is 1.3A and suddenly 3x10 -4
And at the same time the voltage drop has risen to 15.5V. This voltage drop is approximately equal to the voltage of the power supply being applied to the sample at this point. When the applied voltage is reduced, the current rapidly increases again (applied voltage 2 V point) and returns to the original state. At the same time, the resistance decreases and returns. In other words, when the applied voltage increases or decreases,
Current is 0-abcdc-a-0, voltage drop is 0-e
Follow a path like -fbghae-0. Such a switching phenomenon occurred no matter how many times it was repeated. or
A similar phenomenon was observed in the Si-4L sample.
本発明のLB膜を用いた誘電体ヘテロ超低抵抗膜の今後
の応用は種々考えられるが、最後に本発明のヘテロ膜の
特性を第11図の表1にまとめた。これらの特性はすべて
常温又はそれ以上の温度において得られた値である。Although various future applications of the dielectric hetero ultra-low resistance film using the LB film of the present invention are conceivable, finally, the characteristics of the hetero film of the present invention are summarized in Table 1 in FIG. These properties are all values obtained at room temperature or higher.
第1図は本発明の誘電体ヘテロ超低抵抗膜の実施例の概
略図、第2図は第1図のII−II線による断面図、第3図
は実施例のヘテロ膜内に発生するポテンシャル井戸の
図、第4図は第1図に示した本発明の超低抵抗膜の抵抗
測定の概略図、第5図は本発明の超低抵抗膜について電
圧降下特性を示す図、第6図は本発明の超低抵抗膜の無
い試料の電圧降下特性を示す図、第7図は本発明の超低
抵抗膜の抵抗特性を示す図、第8図は本発明の超低抵抗
膜の抵抗率を金属の抵抗率と比較した図、第9図は本発
明の超低抵抗膜の温度特性を示す図、第10図は本発明の
超低抵抗膜のスイッチング特性を示す図、第11図は本発
明の超低抵抗膜の特性を示した表である。FIG. 1 is a schematic view of an embodiment of a dielectric hetero ultra-low resistance film of the present invention, FIG. 2 is a sectional view taken along line II-II of FIG. 1, and FIG. 3 is generated in the hetero film of the embodiment. FIG. 4 is a schematic diagram of the resistance measurement of the ultra-low resistance film of the present invention shown in FIG. 1, FIG. 5 is a diagram showing a voltage drop characteristic of the ultra-low resistance film of the present invention, and FIG. The figure shows the voltage drop characteristics of the sample without the ultra-low resistance film of the present invention, FIG. 7 shows the resistance characteristics of the ultra-low resistance film of the present invention, and FIG. FIG. 9 is a diagram comparing the resistivity with the resistivity of a metal, FIG. 9 is a diagram showing the temperature characteristics of the ultra-low-resistance film of the present invention, FIG. 10 is a diagram showing the switching characteristics of the ultra-low-resistance film of the present invention, FIG. The figure is a table showing the characteristics of the ultra low resistance film of the present invention.
Claims (2)
膜を金属膜で挟んだ構造で、ヘテロ膜の界面にポテンシ
ャル井戸が発生し、この井戸に電子ガスが充満すること
により二次元導電面を形成し、室温以上で膜面方向に金
属以下の抵抗率を持つ超低抵抗膜。A potential well is generated at an interface between the hetero film and a hetero film in which a polar and a non-polar dielectric film are stacked, and a potential well is generated at an interface of the hetero film. An ultra-low-resistance film that forms a two-dimensional conductive surface and has a resistivity equal to or lower than the metal in the film surface direction at room temperature or higher.
極性の誘電体膜がラングミュア・プロジェット膜である
ことを特徴とする特許請求の範囲(1)に記載の超低抵
抗膜。2. The ultra-low resistance film according to claim 1, wherein at least one of said hetero films is a Langmuir-Projet film.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1299563A JP2884357B2 (en) | 1989-11-20 | 1989-11-20 | Dielectric hetero ultra-low resistance film |
EP19900312659 EP0429296B1 (en) | 1989-11-20 | 1990-11-20 | Dielectric ultra-low resistivity heterofilm |
DE1990624760 DE69024760T2 (en) | 1989-11-20 | 1990-11-20 | Dielectric heterofilm with extremely low specific resistance |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1299563A JP2884357B2 (en) | 1989-11-20 | 1989-11-20 | Dielectric hetero ultra-low resistance film |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH03160759A JPH03160759A (en) | 1991-07-10 |
JP2884357B2 true JP2884357B2 (en) | 1999-04-19 |
Family
ID=17874247
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1299563A Expired - Fee Related JP2884357B2 (en) | 1989-11-20 | 1989-11-20 | Dielectric hetero ultra-low resistance film |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0429296B1 (en) |
JP (1) | JP2884357B2 (en) |
DE (1) | DE69024760T2 (en) |
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JP2013000028A (en) | 2011-06-14 | 2013-01-07 | Makita Corp | Electric mower |
JP5689753B2 (en) | 2011-06-14 | 2015-03-25 | 株式会社マキタ | Electric lawn mower |
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Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2564231B1 (en) * | 1984-05-10 | 1986-09-05 | Commissariat Energie Atomique | ELECTRICALLY CONDUCTIVE FILMS COMPRISING AT LEAST ONE MONOMOLECULAR LAYER OF AN ORGANIC COMPLEX WITH LOAD TRANSFER AND THEIR MANUFACTURING METHOD |
JPS63280460A (en) * | 1987-05-13 | 1988-11-17 | Hitachi Ltd | Storage element |
JPH01209767A (en) * | 1988-02-18 | 1989-08-23 | Canon Inc | Electric/electronic device element |
-
1989
- 1989-11-20 JP JP1299563A patent/JP2884357B2/en not_active Expired - Fee Related
-
1990
- 1990-11-20 DE DE1990624760 patent/DE69024760T2/en not_active Expired - Fee Related
- 1990-11-20 EP EP19900312659 patent/EP0429296B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0429296B1 (en) | 1996-01-10 |
EP0429296A2 (en) | 1991-05-29 |
JPH03160759A (en) | 1991-07-10 |
DE69024760D1 (en) | 1996-02-22 |
EP0429296A3 (en) | 1992-04-29 |
DE69024760T2 (en) | 1996-08-29 |
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