JP2833272B2 - IC mounting method - Google Patents

IC mounting method

Info

Publication number
JP2833272B2
JP2833272B2 JP3176615A JP17661591A JP2833272B2 JP 2833272 B2 JP2833272 B2 JP 2833272B2 JP 3176615 A JP3176615 A JP 3176615A JP 17661591 A JP17661591 A JP 17661591A JP 2833272 B2 JP2833272 B2 JP 2833272B2
Authority
JP
Japan
Prior art keywords
chip
conductive adhesive
sealing resin
mounting method
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP3176615A
Other languages
Japanese (ja)
Other versions
JPH0521520A (en
Inventor
敏昭 竹中
利浩 西井
邦雄 岸本
真治 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3176615A priority Critical patent/JP2833272B2/en
Publication of JPH0521520A publication Critical patent/JPH0521520A/en
Application granted granted Critical
Publication of JP2833272B2 publication Critical patent/JP2833272B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、ICチップに代表され
る電気マイクロ回路素子の入出力パッド上に形成された
突起接点と回路基板上に形成された電極端子とを導電性
接着剤を用いて電気接続するためのICチップの実装方
法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention uses a conductive adhesive to connect a projecting contact formed on an input / output pad of an electric micro circuit element represented by an IC chip to an electrode terminal formed on a circuit board. And a method of mounting an IC chip for electrical connection.

【0002】[0002]

【従来の技術】従来、電気マイクロ回路素子の接点領域
と回路基板上の電極端子部との接続には半田付けが良く
利用されていた。しかしながら近年、例えばICフラッ
トパッケージなど小型化と接続端子の増加により接続端
子間、いわゆるピッチ間隔が次第に狭くなり従来の半田
付け技術で対処することが困難になってきた。また最近
では電卓、電子時計、あるいは液晶ディスプレイなどに
あたっては裸のICチップをガラス基板上の電極に直付
けして実装面積の効率的使用を図ろうとする動きがあり
半田付けに変わる有効かつ微細な電気的接続手段が強く
望まれていた。
2. Description of the Related Art Conventionally, soldering has often been used to connect a contact area of an electric microcircuit element to an electrode terminal on a circuit board. However, in recent years, as the size of the IC flat package is reduced and the number of connection terminals is increased, the pitch between the connection terminals, that is, the so-called pitch interval is gradually narrowed. Recently, there has been a movement to use a mounting area efficiently by directly attaching a bare IC chip to an electrode on a glass substrate when using a calculator, an electronic watch, or a liquid crystal display. Electrical connection means have been strongly desired.

【0003】裸のICチップを配線基板上の電極と電気
的に接続する方法としてはICチップの電極パッド上に
形成した電気導電性の突起接点の頭頂部に導電性接着剤
を転写・塗布し、配線基板の電極端子に位置合わせし接
着硬化することでICチップと配線基板の電気的接続を
図る技術がある(例えば、特公昭62−285446号
公報)。この技術において、ICチップを回路基板上に
実装し、導電性接着剤を加熱硬化した後、機械的補強と
信頼性確保のため液状の封止樹脂をICチップと回路基
板の間隙に充填し、乾燥器で加熱硬化していた。
A method for electrically connecting a bare IC chip to an electrode on a wiring board is to transfer and apply a conductive adhesive to the top of an electrically conductive projection contact formed on an electrode pad of the IC chip. There is a technique for electrically connecting an IC chip to a wiring board by positioning and bonding the electrode to an electrode terminal of the wiring board (for example, Japanese Patent Publication No. Sho 62-285446). In this technology, after mounting an IC chip on a circuit board and heating and curing the conductive adhesive, a liquid sealing resin is filled into a gap between the IC chip and the circuit board for mechanical reinforcement and reliability. It was cured by heating in a dryer.

【0004】以下図面を参照しながら上述した従来のI
Cチップの実装方法について説明する。図1〜図5と図
8は従来例のIC実装工程を示したものである。図にお
いて1はICチップであり、150μmピッチで配置し
た約150個の電極パッド2上には高さ約70μm、径
約80μmのバンプ(突起接点)3が形成してある。4
は導電性接着剤である。5は液晶パネルなどの回路基板
であり、ICチップ1の電極パッド2と同数・同ピッチ
のITO電極からなる電極端子6が形成されている。7
はエポキシ系の液状の封止樹脂である。9は膜形成ブレ
ード11を用いて導電性接着剤4膜を作成するための支
持体である。
[0004] The conventional I described above with reference to the drawings
A method for mounting the C chip will be described. 1 to 5 and 8 show a conventional IC mounting process. In FIG. 1, reference numeral 1 denotes an IC chip, and bumps (protrusion contacts) 3 having a height of about 70 μm and a diameter of about 80 μm are formed on about 150 electrode pads 2 arranged at a pitch of 150 μm. 4
Is a conductive adhesive. Reference numeral 5 denotes a circuit board such as a liquid crystal panel, on which electrode terminals 6 composed of ITO electrodes having the same number and the same pitch as the electrode pads 2 of the IC chip 1 are formed. 7
Is an epoxy liquid sealing resin. Reference numeral 9 denotes a support for forming the conductive adhesive 4 film using the film forming blade 11.

【0005】従来のIC実装方法は、まず図1に示すよ
うにICチップ1上の電極パッド2上にワイヤーボンデ
ィング法でもってAu線を溶着しバンプ(突起接点)3
を形成し、形成後高さを揃えるためにバンプ3の頭頂部
を約40μmの高さに平たく成形している。
In a conventional IC mounting method, first, as shown in FIG. 1, an Au wire is welded onto an electrode pad 2 on an IC chip 1 by a wire bonding method to form a bump (projection contact) 3.
Is formed, and the top of the bump 3 is flattened to a height of about 40 μm in order to make the height uniform after the formation.

【0006】つぎに、図2に示すように別に用意した支
持体10上に膜形成ブレード11を用いて約25μmの
均一な導電性接着剤6膜を作成する。そして、図3に示
すようにICチップ1のバンプ3の頭頂部を支持体10
上に形成した導電性接着剤4膜に3秒間浸積し、前記バ
ンプ3の頭頂部に導電性接着剤4を転写・塗布する。
Next, as shown in FIG. 2, a uniform film of conductive adhesive 6 having a thickness of about 25 μm is formed on a separately prepared support 10 using a film forming blade 11. Then, as shown in FIG. 3, the top of the bump 3 of the IC chip 1 is
The conductive adhesive 4 is immersed in the conductive adhesive 4 film formed thereon for 3 seconds, and the conductive adhesive 4 is transferred and applied to the top of the bump 3.

【0007】図4はICチップ1のバンプ3の頭頂部に
導電性接着剤4の転写・塗布が終了した図である。その
後、図5に示すように導電性接着剤4が塗布されたIC
チップ1を回路基板5の端子電極6と位置合わせ結合
し、100℃3時間加熱することで導電性接着剤4を硬
化する。
FIG. 4 is a view in which the transfer and application of the conductive adhesive 4 to the top of the bump 3 of the IC chip 1 has been completed. After that, as shown in FIG. 5, the IC coated with the conductive adhesive 4
The chip 1 is aligned with and bonded to the terminal electrodes 6 of the circuit board 5, and the conductive adhesive 4 is cured by heating at 100 ° C. for 3 hours.

【0008】そして、その後、図8に示すようにICチ
ップ1と回路基板5との間隙に液状のエポキシ系封止樹
脂7を充填し、100℃2時間加熱して封止樹脂7を硬
化させてICチップ1の実装が完了する。
Then, as shown in FIG. 8, a gap between the IC chip 1 and the circuit board 5 is filled with a liquid epoxy-based sealing resin 7 and heated at 100 ° C. for 2 hours to cure the sealing resin 7. Thus, the mounting of the IC chip 1 is completed.

【0009】[0009]

【発明が解決しようとする課題】しかしながら、上記従
来の方法では、封止樹脂の硬化時に封止樹脂の熱膨張に
よってICチップが突き上げられ、封止樹脂硬化後のI
Cチップと回路基板の接続が不安定となり、接続抵抗増
大やオープン現象が多発するという課題があった。
However, in the above-mentioned conventional method, the IC chip is pushed up due to the thermal expansion of the sealing resin when the sealing resin is cured, and the I.C.
There has been a problem that the connection between the C chip and the circuit board becomes unstable, and the connection resistance increases and the open phenomenon frequently occurs.

【0010】[0010]

【課題を解決するための手段】上記目的を達成するた
め、本発明のIC実装方法は、封止樹脂硬化時に機械的
に加圧をしながら硬化するものである。
In order to achieve the above object, an IC mounting method according to the present invention is to cure the resin while mechanically applying pressure during curing of the sealing resin.

【0011】あるいは、加熱した圧縮空気や圧縮ガスを
ICチップ裏面に吹きつけながら硬化するものである。
Alternatively, it is cured while blowing heated compressed air or compressed gas onto the back surface of the IC chip.

【0012】[0012]

【作用】したがって上記第1の手段によれば、封止樹脂
の熱膨張によるICチップ突き上げ力より大きな荷重で
機械的に加圧することで、ICチップの突き上げをなく
しICチップと回路基板の接続が安定し、接続抵抗増大
やオープン現象をなくすことができる。
Therefore, according to the first means, the IC chip is prevented from being pushed up by mechanically pressing the IC chip with a load larger than the IC chip pushing-up force due to the thermal expansion of the sealing resin. It is stable and eliminates an increase in connection resistance and an open phenomenon.

【0013】また、上記第2の手段によれば、封止樹脂
の熱膨張によるICチップ突き上げ力より大きな圧力の
加熱した圧縮空気や圧縮ガスをICチップ裏面に直接吹
きつけるために、第1の手段におけると同様の効果が得
られる。
According to the second means, the compressed air or compressed gas having a pressure greater than the IC chip pushing-up force due to the thermal expansion of the sealing resin is directly blown to the back surface of the IC chip. The same effect as in the means is obtained.

【0014】[0014]

【実施例】以下、本発明の一実施例について同一機能を
有するものには同一番号を付して詳しい説明を省略し、
相違する点について説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the same reference numerals are given to those having the same functions in one embodiment of the present invention, and detailed description thereof will be omitted.
The differences will be described.

【0015】(実施例1)本発明のIC実装方法の第1
の実施例では、図1〜図5まで従来例と同一の工程であ
る。そして、本実施例では、図5の工程に引続き、図6
の封止樹脂の充填・硬化工程を実施する。図6において
8はICチップ1を押圧する測定プローバ等の弾性体突
起9を設けてある重量約200gのステンレス製の加圧
冶具である。 即ち、本実施例では、まず図1に示すよ
うにICチップ1上の電極パッド2上にワイヤーボンデ
ィング法でもってAu線を溶着しバンプ(突起接点)3
を形成し、形成後高さを揃えるためにバンプ3の頭頂部
を約40μmの高さに平たく成形している。
(Embodiment 1) First of the IC mounting method of the present invention
1 to 5 are the same as those in the conventional example. In the present embodiment, following the process of FIG.
The sealing resin is filled and cured. In FIG. 6, reference numeral 8 denotes a stainless steel pressing jig having a weight of about 200 g provided with an elastic projection 9 such as a measurement prober for pressing the IC chip 1. That is, in this embodiment, first, as shown in FIG. 1, an Au wire is welded onto the electrode pad 2 on the IC chip 1 by a wire bonding method to form a bump (projection contact) 3.
Is formed, and the top of the bump 3 is flattened to a height of about 40 μm in order to make the height uniform after the formation.

【0016】つぎに、図2に示すように別に用意した支
持体10上に膜形成ブレード11を用いて約25μmの
均一な導電性接着剤6膜を作成する。そして、図3に示
すようにICチップ1のバンプ3の頭頂部を支持体10
上に形成した導電性接着剤4膜に3秒間浸積し、前記バ
ンプ3の頭頂部に導電性接着剤4を転写・塗布する。
Next, as shown in FIG. 2, a uniform conductive adhesive 6 film of about 25 μm is formed on a separately prepared support 10 using a film forming blade 11. Then, as shown in FIG. 3, the top of the bump 3 of the IC chip 1 is
The conductive adhesive 4 is immersed in the conductive adhesive 4 film formed thereon for 3 seconds, and the conductive adhesive 4 is transferred and applied to the top of the bump 3.

【0017】図4はICチップ1のバンプ3の頭頂部に
導電性接着剤4の転写・塗布が終了した図である。その
後、図5に示すように導電性接着剤4が塗布されたIC
チップ1を回路基板5の端子電極6と位置合わせ結合
し、100℃3時間加熱することで導電性接着剤4を硬
化する。
FIG. 4 is a diagram in which the transfer and application of the conductive adhesive 4 to the top of the bump 3 of the IC chip 1 has been completed. After that, as shown in FIG. 5, the IC coated with the conductive adhesive 4
The chip 1 is aligned with and bonded to the terminal electrodes 6 of the circuit board 5, and the conductive adhesive 4 is cured by heating at 100 ° C. for 3 hours.

【0018】そして、図6に示すようにICチップ1と
回路基板5との間隙に液状のエポキシ系封止樹脂7を充
填した後、加圧冶具9の弾性体突起10でICチップ1
の裏面を押圧しながら、乾燥器内で100℃2時間加熱
して封止樹脂7を硬化させてICチップ1の実装が完了
する。
After filling the gap between the IC chip 1 and the circuit board 5 with a liquid epoxy-based sealing resin 7 as shown in FIG.
While pressing the back surface, the sealing resin 7 is heated in a dryer for 2 hours at 100 ° C. for 2 hours to complete the mounting of the IC chip 1.

【0019】封止樹脂の加熱時の熱膨張によるICチッ
プの突き上げ力はいまのところ確かな測定法がなく不明
であるため、実際に荷重を変えながら突き上げ力を確認
した。評価に用いたICはサイズが10mm×2mm、電極
パッド数が150個である。このICチップを導電性接
着剤で回路基板に接続したときのせん断強度は約500
gである。ICチップの裏面に載せる荷重は50〜50
0gの範囲で実施した。
The push-up force of the IC chip due to thermal expansion during heating of the sealing resin is unknown at present because there is no reliable measuring method. Therefore, the push-up force was confirmed while actually changing the load. The IC used for evaluation has a size of 10 mm × 2 mm and 150 electrode pads. The shear strength when this IC chip is connected to a circuit board with a conductive adhesive is about 500.
g. The load placed on the back of the IC chip is 50-50
Performed in the range of 0 g.

【0020】その結果100g以上であれば効果がある
ことがわかった。本実施例において、封止樹脂の硬化時
の熱膨張によるICチップ突き上げ力より大きな荷重で
ICチップ裏面を押圧しながら硬化することでICチッ
プの突き上げがなくなり、接続抵抗の増大やオープン現
象がないことを確認した。
As a result, it was found that an effect was obtained when the amount was 100 g or more. In this embodiment, the IC chip is hardened while pressing against the back surface of the IC chip with a load larger than the IC chip pushing force due to thermal expansion at the time of hardening of the sealing resin. It was confirmed.

【0021】(実施例2)本発明の第2の実施例におい
ては、図1〜図5まで従来例と同一の工程である。そし
て、本実施例では、図5の工程に引き続いて図7の封止
樹脂の充填・硬化工程を実施する。図7において12は
ICチップ1裏面温度が100℃になるように加熱した
圧縮空気であり、13は前記圧縮空気12を加熱するヒ
ータ14を内蔵した加熱装置である。
(Embodiment 2) In the second embodiment of the present invention, the same steps as those of the conventional example are shown in FIGS. Then, in the present embodiment, following the step of FIG. 5, the sealing resin filling and curing step of FIG. 7 is performed. In FIG. 7, reference numeral 12 denotes compressed air heated so that the back surface temperature of the IC chip 1 becomes 100 ° C., and reference numeral 13 denotes a heating device having a built-in heater 14 for heating the compressed air 12.

【0022】即ち、本実施例の実装方法では、まず図1
に示すようにICチップ1上の電極パッド2上にワイヤ
ーボンディング法でもってAu線を溶着しバンプ(突起
接点)3を形成し、形成後高さを揃えるためにバンプ3
の頭頂部を約40μmの高さに平たく成形している。
That is, in the mounting method of this embodiment, first, FIG.
As shown in FIG. 1, an Au wire is welded on an electrode pad 2 on an IC chip 1 by a wire bonding method to form a bump (projection contact) 3 and a bump 3 is formed after the formation to make the height uniform.
Is flattened to a height of about 40 μm.

【0023】つぎに、図2に示すように別に用意した支
持体10上に膜形成ブレード11を用いて約25μmの
均一な導電性接着剤6膜を作成する。そして、図3に示
すようにICチップ1のバンプ3の頭頂部を支持体10
上に形成した導電性接着剤4膜に3秒間浸積し、前記バ
ンプ3の頭頂部に導電性接着剤4を転写・塗布する。
Next, as shown in FIG. 2, a uniform conductive adhesive 6 film of about 25 μm is formed on a separately prepared support 10 using a film forming blade 11. Then, as shown in FIG. 3, the top of the bump 3 of the IC chip 1 is
The conductive adhesive 4 is immersed in the conductive adhesive 4 film formed thereon for 3 seconds, and the conductive adhesive 4 is transferred and applied to the top of the bump 3.

【0024】図4はICチップ1のバンプ3の頭頂部に
導電性接着剤4の転写・塗布が終了した図である。その
後、図5に示すように導電性接着剤4が塗布されたIC
チップ1を回路基板5の端子電極6と位置合わせ結合
し、100℃3時間加熱することで導電性接着剤4を硬
化する。
FIG. 4 is a diagram in which the transfer and application of the conductive adhesive 4 to the top of the bump 3 of the IC chip 1 has been completed. After that, as shown in FIG. 5, the IC coated with the conductive adhesive 4
The chip 1 is aligned with and bonded to the terminal electrodes 6 of the circuit board 5, and the conductive adhesive 4 is cured by heating at 100 ° C. for 3 hours.

【0025】そして、引き続いて、図7に示すようにI
Cチップ1と回路基板5との間隙に液状のエポキシ系封
止樹脂7を充填した後、ICチップ1の裏面が100℃
になるように加熱装置13のヒーター14で加熱した圧
力が2kg/cm2の圧縮空気12をICチップ3から約5m
mの距離から2時間直接吹きつけて硬化させICチップ
1の実装が完了する。
Then, as shown in FIG.
After filling the gap between the C chip 1 and the circuit board 5 with the liquid epoxy-based sealing resin 7, the back surface of the IC chip 1 is heated to 100 ° C.
Compressed air 12 with a pressure of 2 kg / cm 2 heated by the heater 14 of the heating device 13 is about 5 m from the IC chip 3.
It is directly blown for 2 hours from a distance of m to cure and complete the mounting of the IC chip 1.

【0026】本実施例においても、封止樹脂の硬化時の
熱膨張によるICチップ突き上げ力より大きな圧力の加
熱した圧縮空気ででICチップ裏面に直接吹きつけなが
ら硬化することでICチップの突き上げをなくなり、接
続抵抗の増大やオープン現象がないことを確認した。
Also in the present embodiment, the IC chip is pushed up by being directly blown to the back surface of the IC chip with heated compressed air having a pressure larger than the pushing force of the IC chip due to thermal expansion of the sealing resin during curing. It was confirmed that there was no increase in connection resistance and no open phenomenon.

【0027】このように上記実施例によれば、封止樹脂
の熱膨張によるICチップの突き上げ力より大きな荷重
や圧力でICチップ裏面を押圧しながら加熱することで
ICチップの突き上げがなくなり、接続抵抗増大やオー
プン現象が皆無となった。
As described above, according to the above-described embodiment, the IC chip is heated while pressing the back surface of the IC chip with a load and pressure larger than the pushing force of the IC chip due to the thermal expansion of the sealing resin. There was no resistance increase and no open phenomenon.

【0028】[0028]

【発明の効果】上記実施例から明らかなように、本発明
は封止樹脂の熱膨張によるICチップ突き上げ力より大
きな荷重を機械的に加えながら硬化する(第1の方法)
ことや、ICチップ突き上げ力より大きな圧力の加熱し
た圧縮空気や圧縮ガスをICチップ裏面に吹きつけなが
ら硬化する(第2の方法)ことによって、ICチップ突
き上げをなくすことができ、接続抵抗増大やオープン現
象のない安定した電気的接続を得ることができる。
As is apparent from the above embodiment, the present invention cures while mechanically applying a load larger than the IC chip pushing force due to the thermal expansion of the sealing resin (first method).
In addition, by blowing heated compressed air or compressed gas having a pressure greater than the IC chip pushing-up force onto the backside of the IC chip and hardening (second method), the pushing up of the IC chip can be eliminated, and the connection resistance can be increased. A stable electrical connection without an open phenomenon can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のIC実装方法の第1、第2の実施例及
び従来の実装方法に共通な、バンプ(突起接点)の形成
工程図
FIG. 1 is a process diagram of forming bumps (projecting contacts) common to the first and second embodiments of the IC mounting method of the present invention and the conventional mounting method.

【図2】本発明のIC実装方法の第1、第2の実施例及
び従来の実装方法に共通な、導電性接着剤の膜作成工程
FIG. 2 is a diagram showing a process for forming a conductive adhesive film common to the first and second embodiments of the IC mounting method of the present invention and the conventional mounting method.

【図3】本発明のIC実装方法の第1、第2の実施例及
び従来の実装方法に共通な、導電性接着剤の塗布工程図
FIG. 3 is an application process diagram of a conductive adhesive common to the first and second embodiments of the IC mounting method of the present invention and the conventional mounting method.

【図4】本発明のIC実装方法の第1、第2の実施例及
び従来の実装方法に共通な、導電性接着剤の塗布完了状
態図
FIG. 4 is a diagram showing the completion of application of a conductive adhesive, which is common to the first and second embodiments of the IC mounting method of the present invention and the conventional mounting method.

【図5】本発明のIC実装方法の第1、第2の実施例及
び従来の実装方法に共通な、ICチップの位置合わせ・
結合の工程図
FIG. 5 is a diagram showing an IC chip positioning and alignment method common to the first and second embodiments of the IC mounting method of the present invention and the conventional mounting method.
Joining process diagram

【図6】本発明の第1の実施例における封止樹脂の充填
・硬化工程図
FIG. 6 is a diagram illustrating a filling and curing process of a sealing resin according to the first embodiment of the present invention.

【図7】本発明の第2の実施例における封止樹脂の充填
・硬化工程図
FIG. 7 is a diagram showing a filling and curing process of a sealing resin according to a second embodiment of the present invention.

【図8】従来例における封止樹脂の充填・硬化工程図FIG. 8 is a diagram showing a filling and curing process of a sealing resin in a conventional example.

【符号の説明】[Explanation of symbols]

1 ICチップ 2 電極パッド 3 バンプ(突起接点) 4 導電性接着剤 5 回路基板 6 端子電極 7 封止樹脂 8 加圧治具 9 弾性体突起 10 支持体 11 膜形成ブレード 12 圧縮空気 13 加熱装置 14 ヒーター DESCRIPTION OF SYMBOLS 1 IC chip 2 Electrode pad 3 Bump (protrusion contact) 4 Conductive adhesive 5 Circuit board 6 Terminal electrode 7 Sealing resin 8 Pressure jig 9 Elastic projection 10 Support 11 Film forming blade 12 Compressed air 13 Heating device 14 heater

───────────────────────────────────────────────────── フロントページの続き (72)発明者 中村 真治 大阪府門真市大字門真1006番地 松下電 器産業株式会社内 (56)参考文献 特開 平1−226161(JP,A) 特開 平2−34949(JP,A) 特開 昭63−237426(JP,A) (58)調査した分野(Int.Cl.6,DB名) H01L 21/60 311────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shinji Nakamura 1006 Kazuma Kadoma, Osaka Pref. Matsushita Electric Industrial Co., Ltd. (56) References JP-A-1-226161 (JP, A) JP-A-2- 34949 (JP, A) JP-A-63-237426 (JP, A) (58) Fields investigated (Int. Cl. 6 , DB name) H01L 21/60 311

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 ICチップ上の電極パッドに突起接点を形
成する工程と、支持体上に一定厚に形成された導電性接
着剤膜に、前記ICチップ上の電極パッドに形成した前記
突起接点を浸積し前記導電性接着剤を前記突起接点に転
写する工程と、前記導電性接着剤を前記突起接点に転写
した前記ICチップを回路基板の端子電極に位置決めし圧
接したのち加熱硬化する工程と、前記ICチップと前記
路基板の間隙に液状の封止樹脂を充填したのち、前記IC
チップの裏面を弾性部を介して機械的に加圧しながら
記封止樹脂を加熱硬化する工程からなるIC実装方法。
And 1. A process of forming a projecting contact on the electrode pads on the IC chip, the conductive adhesive film formed on one Teiatsu on a support, wherein formed on the electrode pads on the IC chip < br /> the steps of the immersed projections contact the conductive adhesive is transferred to the projection contacts and the conductive adhesive is pressed against positioning the terminal electrode of the circuit board to the IC chip has been transferred to the projecting contact a step of heat curing later, after filled with liquid sealing resin of the IC chip and the times <br/> the circuit substrate gap, the IC
Before while applying mechanical pressure to the back surface of the chip via an elastic portion
An IC mounting method comprising a step of heating and curing the sealing resin .
【請求項2】 封止樹脂の加熱硬化の工程が、加熱した
圧縮空気もしくは圧縮ガスをICチップ裏面に吹きつけな
がら行なわれる請求項1記載のIC実装方法。
2. The IC mounting method according to claim 1, wherein the step of heating and curing the sealing resin is performed while blowing heated compressed air or compressed gas onto the back surface of the IC chip.
JP3176615A 1991-07-17 1991-07-17 IC mounting method Expired - Fee Related JP2833272B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3176615A JP2833272B2 (en) 1991-07-17 1991-07-17 IC mounting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3176615A JP2833272B2 (en) 1991-07-17 1991-07-17 IC mounting method

Publications (2)

Publication Number Publication Date
JPH0521520A JPH0521520A (en) 1993-01-29
JP2833272B2 true JP2833272B2 (en) 1998-12-09

Family

ID=16016669

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3176615A Expired - Fee Related JP2833272B2 (en) 1991-07-17 1991-07-17 IC mounting method

Country Status (1)

Country Link
JP (1) JP2833272B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3097644B2 (en) 1998-01-06 2000-10-10 日本電気株式会社 Semiconductor device connection structure and connection method
JP3595853B2 (en) 1999-03-18 2004-12-02 日本エー・エス・エム株式会社 Plasma CVD film forming equipment
JP2002134484A (en) 2000-10-19 2002-05-10 Asm Japan Kk Semiconductor substrate holding device
CN102396106B (en) * 2009-04-16 2014-12-31 旭硝子株式会社 Vehicle glass antenna, vehicle window glass, and vehicle glass antenna feeding structure

Also Published As

Publication number Publication date
JPH0521520A (en) 1993-01-29

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