JP2762059B2 - CCD solid-state imaging device and signal processing method thereof - Google Patents
CCD solid-state imaging device and signal processing method thereofInfo
- Publication number
- JP2762059B2 JP2762059B2 JP7250095A JP25009595A JP2762059B2 JP 2762059 B2 JP2762059 B2 JP 2762059B2 JP 7250095 A JP7250095 A JP 7250095A JP 25009595 A JP25009595 A JP 25009595A JP 2762059 B2 JP2762059 B2 JP 2762059B2
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- signal charges
- region
- signal
- conductivity type
- imaging device
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- Transforming Light Signals Into Electric Signals (AREA)
Description
【0001】[0001]
【発明の属する技術分野】本発明はCCD固体撮像素子
に係り、特に電子とホールとを利用して信号を検出する
ことにより感度を向上させ、照度に対するダイナミック
レンジを増加させたCCD固体撮像素子及びその信号処
理方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CCD solid-state image pickup device, and more particularly to a CCD solid-state image pickup device in which sensitivity is improved by detecting a signal using electrons and holes and a dynamic range with respect to illuminance is increased. It relates to the signal processing method.
【0002】[0002]
【従来の技術】通常のCCD固体撮像素子は、入射光に
よって発生した電子とホールの対のどちらか一つのみを
信号電荷として選択して蓄積及び転送して信号処理し、
選択されなかった信号電荷は不要な電荷として除去し
た。電子の移動度がホールの移動度より大きいので、通
常は信号電荷として電子が選択される。2. Description of the Related Art An ordinary CCD solid-state image pickup device selects only one of a pair of electrons and holes generated by incident light as a signal charge, stores and transfers the signal charge, and performs signal processing.
Unselected signal charges were removed as unnecessary charges. Since the mobility of electrons is larger than the mobility of holes, electrons are usually selected as signal charges.
【0003】図1は従来のフレーム転送方式のCCD固
体撮像素子のブロック図である。図1のフレーム転送C
CD固体撮像素子は、入射光に対して信号電荷を発生さ
せる受光領域11と、受光領域11からの信号電荷を一
定時間蓄積する蓄積領域12と、蓄積領域12に蓄積さ
れた信号電荷を1ラインずつ抽出するHCCD13と、
HCCD13から出力される信号電荷を検出して増幅す
る電荷検出及び増幅回路14とを含む。FIG. 1 is a block diagram of a conventional frame transfer type CCD solid-state imaging device. Frame transfer C of FIG.
The CD solid-state imaging device includes a light receiving region 11 for generating a signal charge for incident light, a storage region 12 for storing the signal charge from the light receiving region 11 for a certain period of time, and one line of the signal charge stored in the storage region 12. HCCD 13 that extracts each time,
And a charge detection and amplification circuit 14 for detecting and amplifying signal charges output from the HCCD 13.
【0004】フレーム転送方式のCCD固体撮像素子
は、入射する光に対して受光領域11は信号電荷を発生
させ、発生した信号電荷を一定時間累積させる。受光領
域11に累積した信号電荷を垂直消去期間に一時に蓄積
領域12へ転送させて蓄積させ、蓄積領域12に蓄積さ
れた信号電荷をその次の垂直消去期間までの間に1ライ
ンずつ抽出してHCCD13へ転送する。蓄積領域12
に蓄積されていた信号電荷が全て抽出されると、その間
受光領域で発生して累積されていた信号電荷はさらに蓄
積領域に移動して前記動作を繰り返し行う。ここで、信
号電荷として電子が利用されるので、検出及び増幅回路
14として電子用信号検出及び増幅回路が使用される。In the CCD solid-state image pickup device of the frame transfer system, the light receiving region 11 generates signal charges for incident light, and accumulates the generated signal charges for a certain period of time. The signal charges accumulated in the light receiving region 11 are temporarily transferred to and accumulated in the accumulation region 12 during the vertical erasing period, and the signal charges accumulated in the accumulation region 12 are extracted line by line until the next vertical erasing period. To the HCCD 13. Storage area 12
When all the signal charges accumulated in the light receiving area are extracted, the signal charges generated and accumulated in the light receiving area during that time are further moved to the accumulation area and the above operation is repeated. Here, since electrons are used as signal charges, an electronic signal detection and amplification circuit is used as the detection and amplification circuit 14.
【0005】図2は図1のフレーム転送方式のCCD固
体撮像素子の蓄積領域12に対する断面構造を示す。図
2には従来のフレーム転送方式のCCD固体撮像素子の
蓄積領域12に対する断面構造のみを示したが、受光領
域11と蓄積領域12はほぼ同じ断面構造を有する。但
し、蓄積領域上には入射光を遮断するためのアルミニウ
ムからなる遮光膜と転送電極とが形成されているが、入
射光に対して信号電荷を発生させる受光領域上には遮光
膜と転送電極は形成されない。FIG. 2 shows a sectional structure of the frame transfer type CCD solid-state imaging device of FIG. FIG. 2 shows only the cross-sectional structure of the conventional frame transfer type CCD solid-state imaging device with respect to the storage region 12, but the light receiving region 11 and the storage region 12 have substantially the same cross-sectional structure. However, a light-shielding film made of aluminum for blocking incident light and a transfer electrode are formed on the accumulation region, but the light-shielding film and the transfer electrode are formed on a light-receiving region for generating signal charges for the incident light. Is not formed.
【0006】図2を参照して従来のフレーム転送CCD
の蓄積領域12に対する構造をみれば、n- 型基板12
1と、その基板121に形成されたp- 型ウェル122
と、このウェル122に形成されたn型埋込チャンネル
領域123と、p- 型ウェル122のn型埋込チャンネ
ル領域123に接して形成されたチャンネルストップ領
域124と、これらの表面に形成されたSiO2 からな
る絶縁膜125と、絶縁膜125上に形成された転送電
極126とからなることがわかる。Referring to FIG. 2, a conventional frame transfer CCD
The structure of the n − type substrate 12
1 and a p - type well 122 formed on the substrate 121.
And an n-type buried channel region 123 formed in the well 122, a channel stop region 124 formed in contact with the n-type buried channel region 123 in the p − -type well 122, and formed on the surfaces thereof. It can be seen that it is composed of an insulating film 125 made of SiO 2 and a transfer electrode 126 formed on the insulating film 125.
【0007】図3(A)と(B)は図2の2A−2A′
及び2B−2B′線における断面構造を示し、図3
(C)は図2の2A−2A′及び2B−2B′線におけ
る電位分布を示す。FIGS. 3A and 3B show 2A-2A 'of FIG.
3B and 2B-2B ', and FIG.
(C) shows the potential distribution on the lines 2A-2A 'and 2B-2B' in FIG.
【0008】入射光によって受光領域11から発生した
信号電荷のうち、電子は図3(C)の線132で表れた
ように蓄積領域12のn型埋込チャンネル領域123に
蓄積され、ホールは図3(C)の線131で表れたよう
に基板121と絶縁膜125、即ちSi/SiO2 の界
面近傍とp- 型ウェル122をそれぞれ経由してp+型
チャンネルストップ領域124に集まって周辺部へ除去
される。このように、従来のCCD固体撮像素子ではホ
ールは不要な信号電荷として処理され、電子の転送に悪
影響がないように迅速に除去する事以外考慮されなかっ
た。Of the signal charges generated from the light receiving region 11 by the incident light, electrons are accumulated in the n-type buried channel region 123 of the accumulation region 12 as shown by a line 132 in FIG. 3 substrate 121 and the insulating film 125 as appearing on line 131 of (C), i.e. Si / SiO 2 near the interface and p - periphery gathered type well 122 to the p + -type channel stop region 124 via respective Removed. As described above, in the conventional CCD solid-state imaging device, the holes are processed as unnecessary signal charges, and no consideration is given except for removing the holes quickly so as not to adversely affect the electron transfer.
【0009】図4は従来のCCD固体撮像素子の光電変
換特性をグラフ化したものであり、X軸は入射光による
CDD表面の照度、Y軸はCCDの出力電圧である。通
常CCDのダイナミックレンジは照度と出力電圧が比例
する線形領域によって定義される。また、固体撮像素子
の感度はこの線形領域での傾き(mV/Lux)によっ
て表せる。従って、図4に示すように、Aで示された感
度特性をもつ固体撮像素子と、Bで示された感度特性を
もつ固体撮像素子において、BよりAが約2倍高い感度
を有している。しかし、照度に関するダイナミックレン
ジの場合には、AよりBが広いダイナミックレンジを有
している。AでBと同じダイナミックレンジを維持しよ
うとする場合には、Aの最大出力電圧をBの2倍にしな
ければならない。しかし、CCDの駆動電圧やビデオ信
号の処理ICの入力電圧等には制限があるため、実際に
は容易に出来ない。FIG. 4 is a graph showing the photoelectric conversion characteristics of a conventional CCD solid-state imaging device. The X-axis represents the illuminance of the CDD surface due to incident light, and the Y-axis represents the output voltage of the CCD. Usually, the dynamic range of a CCD is defined by a linear region where the illuminance and the output voltage are proportional. Further, the sensitivity of the solid-state imaging device can be represented by a slope (mV / Lux) in this linear region. Therefore, as shown in FIG. 4, in the solid-state imaging device having the sensitivity characteristic indicated by A and the solid-state imaging device having the sensitivity characteristic indicated by B, A has a sensitivity about twice higher than B. I have. However, in the case of a dynamic range related to illuminance, B has a wider dynamic range than A. If A wants to maintain the same dynamic range as B, the maximum output voltage of A must be twice that of B. However, there are limitations on the drive voltage of the CCD, the input voltage of the video signal processing IC, and the like, so that it is not easy in practice.
【0010】[0010]
【発明が解決しようとする課題】従来より10倍以上の
光感度電荷検出技術があるとしても、この技術を利用す
るには前述した照度に対するダイナミックレンジの問題
がある。つまり、非常に低い照度では前記の高感度電荷
検出技術が有用であるが、高感度であれば、明るい被写
体と暗い被写体が混在する場合や非常に明るい昼の屋外
等の風景では、一定以上の明るさをもつ部分が完全に白
くなり、濃淡を識別できなくなる。尚、最大出力電圧を
10倍にし、駆動電圧や信号処理回路もすべてそれに合
わせる事は理論的にも現実的にも不可能である。これに
より、同一画面内でも低照度領域は高感度で高照度領域
は低感度で電荷を検出し増幅することのできる固体撮像
素子が求められている。Even if there is a photosensitivity charge detection technique that is ten times or more than the conventional technique, there is a problem of the dynamic range with respect to the illuminance as described above when using this technique. In other words, the above-described high-sensitivity charge detection technique is useful at very low illuminance, but at a high sensitivity, it is more than a certain level in a case where bright and dark subjects are mixed, or in a scene such as outdoors in a very bright daytime. The portion having brightness becomes completely white, and the shade cannot be distinguished. Incidentally, it is theoretically and practically impossible to increase the maximum output voltage by a factor of ten and to match all the drive voltages and signal processing circuits. Accordingly, there is a need for a solid-state imaging device capable of detecting and amplifying charges with low sensitivity in a low illuminance area and low sensitivity in a high illuminance area even within the same screen.
【0011】本発明はかかる問題点を解決するためのも
のであって、その目的は低照度領域は高感度で高照度領
域は低感度で信号を検出できるCCDの固体撮像素子及
びその信号処理方法を提供することにある。本発明の他
の目的は、高感度と照度に対する広いダイナミックレン
ジを両立させるCCD固体撮像素子及びその信号処理方
法を提供することにある。The present invention has been made to solve the above problems, and has as its object to provide a CCD solid-state imaging device capable of detecting a signal with high sensitivity in a low illuminance region and low sensitivity in a high illuminance region, and a signal processing method therefor. Is to provide. It is another object of the present invention to provide a CCD solid-state imaging device that achieves both high sensitivity and a wide dynamic range for illuminance, and a signal processing method thereof.
【0012】[0012]
【課題を解決するための手段】上記目的を達成するため
の本発明は、入射光に対して信号電荷を発生する受光領
域と、受光領域からの信号電荷を一定時間蓄積する蓄積
領域と、蓄積領域に蓄積された信号電荷を1ラインずつ
抽出するHCCDと、HCCDから出力される信号電荷
のうち、電子に対する信号電荷を検出し増幅する高感度
用信号電荷検出及び増幅回路と、HCCDから出力され
る信号電荷のうち、ホールに対する信号電荷を検出し増
幅する低感度用信号電荷検出及び増幅回路とを含むCC
D固体撮像素子を提供することを特徴とする。According to the present invention, there is provided a light receiving region for generating a signal charge with respect to incident light, a storage region for storing a signal charge from the light receiving region for a predetermined time, An HCCD that extracts the signal charges accumulated in the area line by line, a signal charge detection and amplification circuit for high sensitivity that detects and amplifies the signal charges for electrons among the signal charges output from the HCCD, and an output signal from the HCCD. Including a low-sensitivity signal charge detection and amplification circuit that detects and amplifies signal charges for holes among the signal charges
A feature is to provide a D solid-state imaging device.
【0013】本発明の固体撮像素子の受光領域と蓄積領
域は、第1導電型の低濃度基板と、基板上に形成された
第2導電型のウェルと、前記ウェルに形成された第1導
電型を有する第1不純物領域と、前記第1不純物領域の
表面に形成された第2導電型を有する第2不純物領域
と、第1及び第2不純物領域と接して前記ウェルに形成
された第1導電型を有する第3不純物領域と、前記第3
不純物領域と接して前記ウェルに形成された高濃度の第
2導電型を有する第4不純物領域とを有する。The light-receiving region and the storage region of the solid-state imaging device according to the present invention include a low-concentration substrate of a first conductivity type, a well of a second conductivity type formed on the substrate, and a first conductivity type formed in the well. A first impurity region having a first conductivity type, a second impurity region having a second conductivity type formed on a surface of the first impurity region, and a first impurity region formed in the well in contact with the first and second impurity regions. A third impurity region having a conductivity type;
A fourth impurity region having a high concentration of the second conductivity type formed in the well in contact with the impurity region.
【0014】本発明方法は、入射光に対して電子とホー
ルの信号電荷を発生させる段階と、前記発生した信号電
荷を一定時間蓄積する段階と、前記蓄積された信号電荷
を1ラインずつ抽出する段階と、1ラインずつ抽出され
る信号電荷のうち、電子に対する信号電荷を検出する段
階と、1ラインずつ抽出される信号電荷のうち、ホール
に対する信号電荷を検出する段階と、電子に対する検出
信号とホールに対する検出信号を合成処理して出力する
段階とを含むことを特徴とする。According to the method of the present invention, signal charges of electrons and holes are generated for incident light, the generated signal charges are stored for a predetermined time, and the stored signal charges are extracted line by line. Detecting a signal charge for electrons among signal charges extracted line by line, detecting signal charges for holes among signal charges extracted line by line, and detecting a signal for electrons. Combining and outputting a detection signal for the hole.
【0015】[0015]
【発明の実施の形態】以下、本発明の実施の形態を図面
に基づいて詳しく説明する。図5は本発明の実施の形態
によるCCD固体撮像素子の構成を示すものである。図
5によれば、本発明の実施の形態によるフレーム転送C
CD固体撮像素子は、入射光に対して信号電荷を発生す
る受光領域51と、受光領域51からの信号電荷を一定
時間蓄積する蓄積領域52と、蓄積領域52に蓄積され
た信号電荷を1ラインずつ抽出するHCCD53と、H
CCD53から出力される信号電荷のうち、電子に対す
る信号電荷を検出し増幅する高感度用信号電荷検出及び
増幅回路54と、HCCD53から出力される信号電荷
のうち、ホールに対する信号電荷を検出し増幅する低感
度用信号電荷検出及び増幅回路55とを含む。Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 5 shows a configuration of a CCD solid-state imaging device according to an embodiment of the present invention. According to FIG. 5, the frame transfer C according to the embodiment of the present invention is performed.
The CD solid-state imaging device includes a light receiving region 51 that generates signal charges for incident light, a storage region 52 that stores the signal charges from the light receiving region 51 for a certain period of time, and one line of the signal charges stored in the storage region 52. HCCD 53 that extracts
Among the signal charges output from the CCD 53, a high-sensitivity signal charge detection and amplification circuit 54 that detects and amplifies signal charges for electrons, and among the signal charges output from the HCCD 53, detects and amplifies signal charges for holes. And a signal charge detection and amplification circuit 55 for low sensitivity.
【0016】図5のような構造を有する本発明のフレー
ム転送方式のCCD固体撮像素子において、受光領域5
1は入射光に対して信号電荷、即ち電子とホールとを発
生させ、発生したそれらの信号電荷を一定時間累積させ
る。受光領域51に累積された信号電荷は垂直消去期間
に蓄積領域52へ転送されて蓄積される。蓄積領域52
に蓄積された信号電荷はその次の垂直消去期間まで1ラ
インずつ抽出されてHCCD53へ転送される。蓄積領
域12に蓄積されていた信号電荷が全て抽出されると、
その間に受光領域で発生して累積された信号電荷がさら
に蓄積領域に移動して前記動作を繰り返し行う。一方、
HCCD53に転送された信号電荷のうち、電子は高感
度用信号電荷検出及び増幅回路54で検出されて信号処
理され、ホールは低感度用信号電荷検出及び増幅回路5
5で検出されて信号処理される。In the frame transfer type CCD solid-state imaging device of the present invention having a structure as shown in FIG.
Numeral 1 generates signal charges, that is, electrons and holes, with respect to incident light, and accumulates the generated signal charges for a certain period of time. The signal charges accumulated in the light receiving region 51 are transferred to and accumulated in the accumulation region 52 during the vertical erase period. Storage area 52
The signal charges stored in the line are extracted line by line until the next vertical erasing period and transferred to the HCCD 53. When all the signal charges accumulated in the accumulation region 12 are extracted,
Meanwhile, the signal charges generated and accumulated in the light receiving region further move to the accumulation region, and the above operation is repeated. on the other hand,
Of the signal charges transferred to the HCCD 53, electrons are detected and signal-processed by the high-sensitivity signal charge detection and amplification circuit 54, and holes are formed in the low-sensitivity signal charge detection and amplification circuit 5.
The signal is detected and processed at 5.
【0017】図6は図5のフレーム転送方式のCCD固
体撮像素子の蓄積領域52に対する断面構造図であり、
(A)は信号電荷が転送される方向に垂直な断面の構造
図、(B)は信号電荷が転送される方向に平行な断面の
構造図である。図6には本発明の実施の形態によるフレ
ーム転送方式のCCD固体撮像素子の蓄積領域52に対
する断面構造のみを示したが、受光領域51と蓄積領域
52はほぼ同じ断面構造をもつ。但し、蓄積領域上には
入射光を遮断するためのアルミニウム製遮光膜と転送電
極が形成されているのに対して、入射光に対して信号電
荷を発生する受光領域上には遮光膜と転送電極が形成さ
れない。FIG. 6 is a sectional structural view of the storage area 52 of the frame transfer type CCD solid-state imaging device of FIG.
(A) is a structural view of a cross section perpendicular to the direction in which signal charges are transferred, and (B) is a structural view of a cross section parallel to the direction in which signal charges are transferred. FIG. 6 shows only the sectional structure of the storage region 52 of the frame transfer type CCD solid-state imaging device according to the embodiment of the present invention, but the light receiving region 51 and the storage region 52 have substantially the same sectional structure. However, an aluminum light-shielding film and a transfer electrode for blocking incident light are formed on the accumulation region, whereas the light-shielding film and the transfer electrode are formed on a light-receiving region that generates signal charges for the incident light. No electrodes are formed.
【0018】図6によれば、本発明の実施の形態による
フレーム転送方式のCCD固体撮像素子の蓄積領域52
に対する構造は、n- 型基板521と、n- 型基板52
1に形成されたp- 型ウェル522と、p- 型ウェル5
22に形成された電子用の埋込チャンネル領域として作
用する第1のn型領域523と、第1のn型領域523
の表面に形成されたホール用の埋込チャンネル領域とし
て作用するp型領域524と、前記第1のn型領域52
3及びp型領域524と接してその両側に形成されたホ
ールに対してチャンネルストップ領域となり、電子に対
して埋込チャンネル領域として作用する第2のn型領域
525と、第2のn型領域525と接してp- 型ウェル
522に形成された電子に対するチャンネルストップ領
域及びホールに対してドレイン領域として作用するp+
型領域526と、基板上に形成されたSiO2 からなる
絶縁膜527と、絶縁膜527上に形成された転送電極
528とからなる。図6には図示しなかったが、転送電
極528上には遮光膜が形成されている。Referring to FIG. 6, a storage area 52 of a frame transfer type CCD solid-state imaging device according to an embodiment of the present invention.
Are composed of an n − type substrate 521 and an n − type substrate 52.
1 and a p - type well 522 and a p - type well 5
22, a first n-type region 523 acting as a buried channel region for electrons, and a first n-type region 523
A p-type region 524 formed as a buried channel region for holes formed in the surface of the first n-type region 52;
A second n-type region 525 which serves as a channel stop region for holes formed in contact with the p-type region 524 on both sides thereof and serves as a buried channel region for electrons; p acting as a drain region for the channel stop region and the hole for the formed type well 522 electronic + - p contact 525
It comprises a mold region 526, an insulating film 527 made of SiO 2 formed on the substrate, and a transfer electrode 528 formed on the insulating film 527. Although not shown in FIG. 6, a light-shielding film is formed on the transfer electrode 528.
【0019】図7(A)と(B)は図6の5A−5A′
線における断面構造及びバンドダイアグラムをそれぞれ
示すものである。伝導帯では電子の埋込チャンネルが形
成され、価電子帯ではホールの埋込チャンネルが形成さ
れる。FIGS. 7A and 7B show 5A-5A 'of FIG.
2 shows a cross-sectional structure and a band diagram along a line, respectively. A buried channel of electrons is formed in the conduction band, and a buried channel of holes is formed in the valence band.
【0020】図8(A)と(B)は、図6(A)の5A
−5A′及び5B−5B′線における断面構造を示し、
図8(C)は図6(A)の5A−5A′及び5B−5
B′線における伝導帯のプロファイルを示す。入射光に
よって発生した信号電子のうち、電子は図8(C)の線
531と532で示されたように、電子用の埋込チャン
ネル領域として作用する第1のn型領域523に蓄積さ
れ、第1のn型領域523の容量以上に過剰の電子が発
生すると、過剰の電子はp- 型ウェル522の電位障壁
をオーバーフローしてn- 型基板521へ流れ出る。従
って、本発明の固体撮像素子は電子に対して垂直オーバ
ーフロードレイン構造が形成される。FIGS. 8A and 8B show 5A of FIG. 6A.
-5A 'and 5B-5B' show a cross-sectional structure along the line,
FIG. 8 (C) shows 5A-5A 'and 5B-5 of FIG. 6 (A).
4 shows a profile of a conduction band at a line B ′. Of the signal electrons generated by the incident light, the electrons are accumulated in the first n-type region 523 acting as a buried channel region for electrons, as shown by lines 531 and 532 in FIG. When excess electrons are generated in excess of the capacity of the first n-type region 523, the excess electrons overflow the potential barrier of the p − -type well 522 and flow out to the n − -type substrate 521. Therefore, the solid-state imaging device of the present invention has a vertical overflow drain structure for electrons.
【0021】図9(A)と(B)は図6(A)の5A−
5A′及び5B−5B′線における断面構造を示し、図
9(C)は図6(A)の5A−5A′及び5B−5B′
線における価電子帯のプロファイルを示す。図9を参照
すると、第2のn型領域525はホールに対するチャン
ネルストップ領域として作用し、p型領域524はホー
ルの埋込チャンネル領域として作用することが分かる。FIGS. 9 (A) and 9 (B) show 5A-A in FIG. 6 (A).
FIG. 9C is a sectional view taken along line 5A 'and 5B-5B', and FIG. 9C is a sectional view taken along lines 5A-5A 'and 5B-5B' in FIG.
2 shows a profile of a valence band in a line. Referring to FIG. 9, it can be seen that the second n-type region 525 acts as a channel stop region for holes and the p-type region 524 acts as a buried channel region for holes.
【0022】図10(A)は図6(A)の5C−5C′
線における断面構造を示し、図10(B)は図6(A)
の5C−5C′線における価電子帯のプロファイルを示
す。転送電極528や基板521等の印加電圧を適切に
調整すれば、図10(B)のように、図6(A)の5C
−5C′線における価電子帯のプロファイルが得られ
る。入射光によって発生した信号電荷のうち、ホールは
図10(B)に示すようにホール埋込チャンネル領域と
して作用するp型領域524に蓄積される。p+ 型領域
526はホールに対する水平オーバーフロードレインと
して作用する。従って、電子に対する無感度期間にはn
- 型基板521に十分大きな正電圧を印加する。この期
間にはn- 型基板521に印加された正電圧によって第
1のn型領域523には電子が蓄積されない。よって、
第1のn型領域523は電子の埋込チャンネル領域とし
て作用しない。従って、電子に対する無感度期間には入
射光によって生成した電子は第1のn型領域523に蓄
積されずにすべてn- 型基板521へ掃き出される。一
方、ホールに対する無感度期間は転送電極528に負電
圧を印加する。この期間には転送電極に印加された負電
圧によってp型領域524にホールが蓄積されない。よ
って、p型領域254はホールの埋込チャンネル領域と
して作用しない。従って、ホールに対する無感度期間に
は入射光によって生成したホールはp型領域524に蓄
積されずにすべてp+ 型領域526を通過して掃き出さ
れる。FIG. 10A shows 5C-5C 'of FIG. 6A.
FIG. 10B shows a cross-sectional structure taken along a line, and FIG.
3 shows a valence band profile at the 5C-5C ′ line of FIG. By appropriately adjusting the applied voltage to the transfer electrode 528, the substrate 521, and the like, as shown in FIG. 10B, 5C of FIG.
A valence band profile at the -5C 'line is obtained. Of the signal charges generated by the incident light, holes are accumulated in the p-type region 524 acting as a hole buried channel region as shown in FIG. The p + type region 526 acts as a horizontal overflow drain for holes. Therefore, during the period of insensitivity to electrons, n
- applying a sufficiently large positive voltage to the mold substrate 521. During this period, no electrons are accumulated in the first n-type region 523 due to the positive voltage applied to the n − -type substrate 521. Therefore,
The first n-type region 523 does not function as a buried channel region for electrons. Therefore, during the period of insensitivity to electrons, all the electrons generated by the incident light are not accumulated in the first n-type region 523 but are swept out to the n − -type substrate 521. On the other hand, a negative voltage is applied to the transfer electrode 528 during the period of insensitivity to holes. During this period, no holes are accumulated in the p-type region 524 due to the negative voltage applied to the transfer electrode. Therefore, p-type region 254 does not function as a buried channel region for holes. Therefore, during the period of insensitivity to holes, all holes generated by incident light are not accumulated in the p-type region 524 but are swept out through the p + -type region 526.
【0023】以下、電荷の転送について説明する。本発
明のCCD固体撮像素子は4相駆動方式と2相駆動方式
の両方が適用可能である。図11(A)〜(D)は4相
駆動クロックパルスの波形図を示し、図12(A)〜
(H)は各期間毎のチャンネル領域の電位分布を示す。
図12に示すように、4相駆動方式を採用した本発明の
CCD固体撮像素子の場合には、電子551とホール5
52が同一方向へ転送される。Hereinafter, the transfer of charges will be described. The CCD solid-state imaging device of the present invention is applicable to both the four-phase drive system and the two-phase drive system. FIGS. 11A to 11D show waveform diagrams of the four-phase driving clock pulse, and FIGS.
(H) shows the potential distribution of the channel region for each period.
As shown in FIG. 12, in the case of the CCD solid-state imaging device of the present invention employing the four-phase driving method, the electrons 551 and the holes 5
52 are transferred in the same direction.
【0024】図13(A)〜(B)は2相駆動クロック
パルスの波形図を示し、図14(A)〜(D)は各期間
毎のチャンネル領域の電位分布を示す。図14に示すよ
うに、2相駆動方式を採用した本発明のCCD固体撮像
素子の場合には電子551とホール552が互いに反対
の方向に転送される。このように2相駆動方式で電子と
ホールの転送方向が逆になる特性を用いて電子とホール
の分離が可能となる。FIGS. 13A and 13B show waveform diagrams of two-phase driving clock pulses, and FIGS. 14A to 14D show potential distributions in the channel region for each period. As shown in FIG. 14, in the case of the CCD solid-state imaging device of the present invention employing the two-phase driving method, electrons 551 and holes 552 are transferred in directions opposite to each other. As described above, the two-phase driving method makes it possible to separate electrons and holes by using the characteristic that the transfer directions of electrons and holes are reversed.
【0025】以上説明したように、本発明のCCD映像
素子は電子ばかりではなくホールも信号電荷として利用
するので信号電荷が従来の2倍近く増加し、感度も大幅
向上する。即ち、信号電荷検出及び増幅回路の感度を電
子用は高感度に、ホール用は低感度に設定して2種類の
信号電荷をスイッチングすることにより、高照度撮影と
低照度撮影の両方に対応するCCDカメラを実現するこ
とができる。前記信号電荷検出及び増幅回路の感度を電
子用は高感度に、ホール用は低感度に設定し、アナログ
/ディジタル変換器とディジタル信号プロセッサ等によ
って同一画面に対する2種類の信号を合成処理すれば、
従来より照度に対するダイナミックレンジの広く且つ高
感度な映像を得ることが可能となる。As described above, since the CCD image element of the present invention utilizes not only electrons but also holes as signal charges, the signal charges are increased almost twice as much as in the prior art, and the sensitivity is greatly improved. That is, by setting the sensitivity of the signal charge detection and amplification circuit to high sensitivity for electronic and to low sensitivity for hall, and switching between two kinds of signal charges, it is possible to cope with both high illuminance shooting and low illuminance shooting. A CCD camera can be realized. If the sensitivity of the signal charge detection and amplification circuit is set to high sensitivity for electronic and low sensitivity for hall, and two types of signals for the same screen are synthesized by an analog / digital converter and a digital signal processor,
It is possible to obtain a high-sensitivity image with a wide dynamic range with respect to the illuminance than before.
【0026】次に、図4に示したCCD固体撮像素子の
光電変換特性を用いて説明する。例えば、AとBをそれ
ぞれ電子の信号に対する出力感度、ホールに対する出力
感度特性とし、C=A+Bとして、合成の感度特性を定
義する。この場合、低照度領域では高感度用電子信号に
対する出力感度に低感度用ホール信号に対する出力感度
を加えた値が本発明による固体撮像素子の新たな感度と
なる。従って、本発明の固体撮像素子では従来のように
電子信号に対する出力感度だけを利用する場合よりもや
や高い感度が得られる。尚、高照度領域では、電子信号
に対する出力感度は飽和状態にあるので、低感度用ホー
ル信号に対する出力感度が得られる。従って、本発明の
固体撮像素子では従来の固体撮像素子のように電子信号
に対する出力感度だけを利用する場合より2倍以上広い
照度に対するダイナミックレンジを実現することができ
る。Next, a description will be given using the photoelectric conversion characteristics of the CCD solid-state imaging device shown in FIG. For example, A and B are output sensitivity characteristics for an electron signal and output sensitivity characteristics for a hole, respectively, and a combined sensitivity characteristic is defined as C = A + B. In this case, in the low illuminance region, a value obtained by adding the output sensitivity to the low-sensitivity Hall signal to the output sensitivity to the high-sensitivity electronic signal becomes a new sensitivity of the solid-state imaging device according to the present invention. Therefore, the solid-state imaging device of the present invention can provide a slightly higher sensitivity than the conventional case where only the output sensitivity to an electronic signal is used. In the high illuminance region, the output sensitivity to the electronic signal is saturated, so that the output sensitivity to the hall signal for low sensitivity can be obtained. Therefore, the solid-state imaging device of the present invention can realize a dynamic range for illuminance that is twice or more as wide as that of a conventional solid-state imaging device using only output sensitivity to an electronic signal.
【0027】[0027]
【発明の効果】前記本発明によれば、電子とホールを信
号電荷として同時に出力することにより、同一画面に対
して低照度領域は高感度に、高照度領域は低感度に撮像
するCCD固体撮像素子を実現することができる。電子
とホールを全て信号電荷として用いる本発明の固体撮像
素子は、電子信号にホール信号が追加されることによっ
て、信号量が増加し素子の感度が向上する。また、電子
とホールにそれぞれ異なる感度を有する信号電荷検出及
び増幅回路を接続して電子とホール信号を同時に検出す
ることにより、入射光に対するダイナミックレンジが拡
大し素子の感度を向上させることができる。According to the present invention, by simultaneously outputting electrons and holes as signal charges, a CCD solid-state imaging device is provided for imaging a low illuminance region with high sensitivity and a high illuminance region with low sensitivity for the same screen. An element can be realized. In the solid-state imaging device according to the present invention, in which all electrons and holes are used as signal charges, by adding a hole signal to an electronic signal, the signal amount increases and the sensitivity of the device improves. Further, by connecting a signal charge detection and amplification circuit having different sensitivities to electrons and holes and detecting electrons and hole signals simultaneously, the dynamic range with respect to incident light can be expanded and the sensitivity of the element can be improved.
【図1】 従来のフレーム転送方式のCCD固体撮像素
子の構成図である。FIG. 1 is a configuration diagram of a conventional frame transfer type CCD solid-state imaging device.
【図2】 図1のフレーム転送方式のCCD固体撮像素
子の蓄積領域の断面構造図である。FIG. 2 is a sectional structural view of a storage area of the frame transfer type CCD solid-state imaging device of FIG. 1;
【図3】 図2の2A−2A′線及び2B−2B′線に
おける各断面構造及びそれに対する電位分布図である。FIG. 3 is a cross-sectional structure along line 2A-2A ′ and line 2B-2B ′ in FIG. 2 and a potential distribution diagram corresponding thereto.
【図4】 図1のCCD固体撮像素子の光電変換特性図
である。FIG. 4 is a diagram showing a photoelectric conversion characteristic of the CCD solid-state imaging device of FIG. 1;
【図5】 本発明の実施の形態によるフレーム転送方式
のCCD固体撮像素子の構成図である。FIG. 5 is a configuration diagram of a frame transfer type CCD solid-state imaging device according to an embodiment of the present invention.
【図6】 本発明の実施の形態によるフレーム転送方式
のCCD固体撮像素子の断面構造図である。FIG. 6 is a sectional structural view of a frame transfer type CCD solid-state imaging device according to an embodiment of the present invention.
【図7】 図6(A)の2A−2A′線における断面構
造及びそれに対するバンドダイアグラムである。FIG. 7 is a cross-sectional structure taken along line 2A-2A ′ of FIG. 6A and a band diagram corresponding thereto.
【図8】 図6(A)の2A−2A′線及び2B−2
B′線における断面構造及びそれに対する伝導帯のプロ
ファイルである。8A and 2B-2 of FIG. 6A;
It is a cross-sectional structure in the B 'line, and the profile of the conduction band with respect to it.
【図9】 図6(A)の2A−2A′線及び2B−2
B′線における断面構造及びそれに対する価電子帯のプ
ロファイルである。9A and 2B-2 of FIG. 6A.
It is a cross-sectional structure in the B 'line, and the profile of the valence band with respect to it.
【図10】 図6(A)のC−C′線における断面構造
及びそれに対する価電子帯のプロファイルである。FIG. 10 is a cross-sectional structure taken along line CC ′ of FIG. 6A and a valence band profile corresponding thereto.
【図11】 本発明のCCD固体撮像素子に採用された
4相駆動クロック信号の波形図である。FIG. 11 is a waveform diagram of a four-phase driving clock signal employed in the CCD solid-state imaging device of the present invention.
【図12】 本発明のCCD固体撮像素子の各期間毎の
電位分布図である。FIG. 12 is a potential distribution diagram for each period of the CCD solid-state imaging device of the present invention.
【図13】 本発明のCCD固体撮像素子に採用された
2相駆動クロック信号の波形図である。FIG. 13 is a waveform diagram of a two-phase driving clock signal used in the CCD solid-state imaging device of the present invention.
【図14】 本発明のCCD固体撮像素子の各期間毎の
電位分布図である。FIG. 14 is a potential distribution diagram for each period of the CCD solid-state imaging device of the present invention.
51…受光領域、52…蓄積領域、53…HCCD、5
4,55…電荷検出及び増幅回路。51: light receiving area, 52: accumulation area, 53: HCCD, 5
4,55 ... Charge detection and amplification circuit.
Claims (5)
領域と、 受光領域からの信号電荷を一定時間蓄積する蓄積領域
と、 蓄積領域に蓄積された信号電荷を1ラインずつ抽出する
HCCDと、 HCCDから出力される信号電荷のうち、電子に対する
信号電荷を検出し増幅する高感度用信号電荷検出及び増
幅回路と、 HCCDから出力される信号電荷のうち、ホールに対す
る信号電荷を検出し増幅する低感度用信号電荷検出及び
増幅回路と、 を有することを特徴とするCCD固体撮像素子。1. A light receiving area for generating signal charges with respect to incident light, a storage area for storing signal charges from the light receiving area for a certain period of time, and an HCCD for extracting the signal charges stored in the storage area line by line. A high-sensitivity signal charge detection and amplification circuit for detecting and amplifying signal charges for electrons among signal charges output from the HCCD; and detecting and amplifying signal charges for holes among signal charges output from the HCCD. A CCD solid-state imaging device comprising: a low-sensitivity signal charge detection and amplification circuit.
領域と、 前記第1不純物領域の表面に形成された第2導電型を有
する第2不純物領域と、 第1及び第2不純物領域と接して前記ウェルに形成され
た第1導電型を有する第3不純物領域と、 前記第3不純物領域と接して前記ウェルに形成された高
濃度の第2導電型を有する第4不純物領域と、 を有することを特徴とする請求項1記載のCCD固体撮
像素子。2. The light-receiving region includes a low-concentration substrate of a first conductivity type, a well of a second conductivity type formed on the substrate, and a first impurity region having a first conductivity type formed in the well. A second impurity region having a second conductivity type formed on a surface of the first impurity region; and a third impurity having a first conductivity type formed in the well in contact with the first and second impurity regions. The CCD solid-state imaging device according to claim 1, further comprising: a region; and a fourth impurity region having a high concentration of a second conductivity type and formed in the well in contact with the third impurity region.
領域と、 前記第1不純物領域の表面に形成された第2導電型を有
する第2不純物領域と、 第1及び第2不純物領域と接して前記ウェルに形成され
た第1導電型を有する第3不純物領域と、 前記第3不純物領域と接して前記ウェルに形成された高
濃度の第2導電型を有する第4不純物領域と、 を有することを特徴とする請求項1記載のCCD固体撮
像素子。3. The low-concentration substrate of a first conductivity type, a well of a second conductivity type formed on the substrate, and a first impurity region having a first conductivity type formed in the well. A second impurity region having a second conductivity type formed on a surface of the first impurity region; and a third impurity having a first conductivity type formed in the well in contact with the first and second impurity regions. The CCD solid-state imaging device according to claim 1, further comprising: a region; and a fourth impurity region having a high concentration of a second conductivity type and formed in the well in contact with the third impurity region.
固体撮像素子。4. The storage region further includes: an insulating film formed on the entire surface of the substrate; a transfer electrode formed on the insulating film; and a light-shielding film formed on the transfer electrode. 4. The CCD according to claim 3,
Solid-state imaging device.
を発生する段階と、 前記発生した信号電荷を一定時間蓄積する段階と、 前記蓄積された信号電荷を1ラインずつ抽出する段階
と、 1ラインずつ抽出される信号電荷のうち、電子に対する
信号電荷を検出する段階と、 1ラインずつ抽出される信号電荷のうち、ホールに対す
る信号電荷を検出する段階と、 電子に対する検出信号とホールに対する検出信号を合成
処理するとき、低照度領域では電子に対する検出信号に
ホールに対する検出信号を加えた値を出力し、高照度領
域ではホールに対する検出信号を出力する段階と、 を有することを特徴とするCCD固体撮像素子の信号処
理方法。5. A step of generating signal charges of electrons and holes with respect to incident light, a step of storing the generated signal charges for a predetermined time, and a step of extracting the stored signal charges line by line. Detecting signal charges for electrons among signal charges extracted line by line; detecting signal charges for holes among signal charges extracted line by line; detecting signal for electrons and detecting for holes When synthesizing signals, the detection signal for electrons is
Outputs the value to which the detection signal for the hole is added,
Outputting a detection signal for a hole in a region, and a signal processing method for a CCD solid-state imaging device.
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1995
- 1995-09-05 JP JP7250095A patent/JP2762059B2/en not_active Expired - Fee Related
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JPH0974181A (en) | 1997-03-18 |
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