JP2759594B2 - Manufacturing method of epitaxial substrate - Google Patents
Manufacturing method of epitaxial substrateInfo
- Publication number
- JP2759594B2 JP2759594B2 JP5034358A JP3435893A JP2759594B2 JP 2759594 B2 JP2759594 B2 JP 2759594B2 JP 5034358 A JP5034358 A JP 5034358A JP 3435893 A JP3435893 A JP 3435893A JP 2759594 B2 JP2759594 B2 JP 2759594B2
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- JP
- Japan
- Prior art keywords
- epitaxial layer
- substrate
- epitaxial
- layer
- defects
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Mechanical Treatment Of Semiconductor (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、エピタキシャル基板の
製造方法に関し、より詳しくは、非常に厚いシリコンエ
ピタキシャル層の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an epitaxial substrate, and more particularly to a method for manufacturing a very thick silicon epitaxial layer.
【０００２】[0002]
【発明の背景技術】ＩＧＢＴ（Ｉｎｓｕｌａｔｅｄ Ｇ
ａｔｅ Ｂｉｐｏｌａｒ Ｔｒａｎｓｉｓｔｏｒ）は、
パワーＭＯＳＦＥＴの高速スイッチング特性とバイポー
ラトランジスタの高電力特性とを併せ備え、パワー半導
体素子として例えばインバータや小型電力変換装置等に
使用されている。BACKGROUND OF THE INVENTION IGBT (Insulated G)
ate Bipolar Transistor)
It has both the high-speed switching characteristics of a power MOSFET and the high power characteristics of a bipolar transistor, and is used as a power semiconductor element in, for example, inverters and small power converters.
【０００３】このＩＧＢＴの製造に用いるエピタキシャ
ル基板は、周縁部が面取りされたシリコン単結晶基板上
にエピタキシャル層を成長させたものが用いられる。こ
のエピタキシャル層は非常に厚く形成され、その厚さは
１５０μｍ以上必要となる場合がよくある。An epitaxial substrate used for manufacturing the IGBT is obtained by growing an epitaxial layer on a silicon single crystal substrate whose peripheral edge is chamfered. This epitaxial layer is formed very thick, and often needs to have a thickness of 150 μm or more.
【０００４】しかし、このような厚膜エピタキシャル層
を成長させると、前記単結晶基板の主面と面取り部の斜
面との境界線付近が異常成長してエッジクラウンと呼ば
れる盛り上がりが生じる。シリンダ型エピタキシャル層
成長装置を用いてエピタキシャル層を成長させる場合に
は、エッジクラウンはエピタキシャル層の成長側におい
てのみ生じるが、パンケーキ型エピタキシャル層成長装
置を用いてエピタキシャル層を成長させる場合には、エ
ッジクラウンはエピタキシャル層の成長側のみならずそ
の裏面側にも生じる。[0004] However, when such a thick film epitaxial layer is grown, the vicinity of the boundary between the main surface of the single crystal substrate and the slope of the chamfered portion grows abnormally, and a bulge called an edge crown occurs. When the epitaxial layer is grown using the cylinder type epitaxial layer growth apparatus, the edge crown occurs only on the growth side of the epitaxial layer, but when the epitaxial layer is grown using the pancake type epitaxial layer growth apparatus, The edge crown occurs not only on the growth side of the epitaxial layer but also on the back side thereof.
【０００５】エッジクラウンの高さは、例えばエピタキ
シャル層の厚さが１５０μｍの場合、エピタキシャル層
の成長側では１５μｍを越えることがしばしばあり、裏
面側では２０μｍを越える場合もある。このようなエッ
ジクラウンがエピタキシャル層の成長側に生じると、フ
ォトリソグラフィー工程においてマスクとエピタキシャ
ル層との密着性が悪くなり、パターンの焼き付け不良を
生じる。また、裏面側に生じると、真空吸着による基板
の吸着性が悪くなり、最悪の場合には基板が飛んでしま
うという事故も生じる。従って、エッジクラウンは生じ
ないことが望ましいが、生じた場合でもその高さが５μ
ｍ以下であるのが望ましい。For example, when the thickness of the epitaxial layer is 150 μm, the height of the edge crown often exceeds 15 μm on the growth side of the epitaxial layer, and sometimes exceeds 20 μm on the back side. When such an edge crown is formed on the growth side of the epitaxial layer, the adhesion between the mask and the epitaxial layer is deteriorated in the photolithography process, resulting in poor pattern printing. In addition, if it occurs on the back surface side, the suction property of the substrate due to vacuum suction deteriorates, and in the worst case, an accident occurs in which the substrate flies. Therefore, it is desirable that the edge crown does not occur, but even if it occurs, the height is 5 μm.
m or less.
【０００６】一方、上記のようにエピタキシャル層を厚
く成長する場合、エピタキシャル層表面に突起状欠陥が
形成される場合がある。これは、厚いエピタキシャル層
を成長する間にエピタキシャル層成長装置のノズルや石
英ベルジャ内面等に堆積した微小シリコン粒がエピタキ
シャル層表面に付着してエピタキシャル成長の核とな
り、これが突起状欠陥に成長するものである。また、エ
ピタキシャル層の成長中に副次的に生成するオイリーシ
ランがエピタキシャル層成長装置のベースプレートや排
ガス管入口部に付着し、石英ベルジャを開けた時に空気
中の酸素や水分と接触してＳｉＯ2が生成し、これがエ
ピタキシャル反応中に基板に付着して成長の核となって
突起状欠陥が成長する場合もある。On the other hand, when the epitaxial layer is grown thick as described above, a projection defect may be formed on the surface of the epitaxial layer. This is because, during the growth of a thick epitaxial layer, fine silicon particles deposited on the inner surface of the nozzle or the quartz bell jar of the epitaxial layer growth device adhere to the surface of the epitaxial layer and become nuclei for epitaxial growth, which grow into protrusion-like defects. is there. In addition, oily silane that is produced as a by-product during the growth of the epitaxial layer adheres to the base plate or the exhaust gas inlet of the epitaxial layer growth apparatus, and comes into contact with oxygen or moisture in the air when the quartz bell jar is opened, thereby causing SiO 2. Is generated, which adheres to the substrate during the epitaxial reaction and becomes a nucleus of growth, whereby a protruding defect may grow.
【０００７】これらの突起状欠陥はフォトリソグラフィ
ー工程時のマスクコンタクト不良を引き起こし、パター
ンを精密に焼き付けることができなくなる。また、突起
状欠陥がマスクに接触し、マスク自体に傷を付けること
もある。さらに、パターンを焼き付けることができても
突起状欠陥が配線パターン部にある場合には、その後デ
バイス工程で製造されるデバイスの配線不良を引き起こ
す等の問題を引き起こす。[0007] These protruding defects cause mask contact failure during the photolithography process, and the pattern cannot be printed accurately. In addition, the projection-like defect may come into contact with the mask and damage the mask itself. Further, even if the pattern can be printed, if a protruding defect exists in the wiring pattern portion, a problem such as a defective wiring of a device manufactured in a subsequent device process is caused.
【０００８】従来、上記のような問題点を解決するた
め、エッジクラウンについては、エピタキシャル層成長
装置、基板の面取り形状、基板保持用サセプタのポケッ
ト形状、成長温度等の条件を適切に選択することによっ
てエッジクラウンの高さを所定の規格値以下に抑えてい
た。また、突起状欠陥については、成長炉内の清浄度を
保ち、突起状欠陥の発生をできるだけ防止するととも
に、手動又は突起取り装置により除去することが一般的
であった。Conventionally, in order to solve the above-mentioned problems, for the edge crown, conditions such as an epitaxial layer growth apparatus, a chamfered shape of a substrate, a pocket shape of a susceptor for holding a substrate, and a growth temperature are appropriately selected. As a result, the height of the edge crown is suppressed to a predetermined standard value or less. In addition, it has been common practice to maintain the cleanliness in the growth furnace, prevent the occurrence of protrusion-like defects as much as possible, and remove the protrusion-like defects manually or by using a protrusion removing device.
【０００９】[0009]
【発明が解決しようとする課題】しかし、エピタキシャ
ル層の厚さは年々さらに厚いものが求められ、上記のよ
うな従来の方法では効率的にエッジクラウン及び突起状
欠陥を除去することができなくなった。特にエッジクラ
ウンについては、エピタキシャル層成長装置、基板の面
取り形状、基板保持用サセプタのポケット形状、成長温
度等の条件を適切に選ぶことだけではエッジクラウン高
さを規格値以下に抑えることが困難となっている。However, the thickness of the epitaxial layer is required to be thicker year by year, and it is no longer possible to efficiently remove the edge crown and the projection-like defects by the above-mentioned conventional method. . Especially for the edge crown, it is difficult to keep the edge crown height below the standard value only by appropriately selecting the conditions such as the epitaxial layer growth apparatus, the chamfered shape of the substrate, the pocket shape of the susceptor for holding the substrate, and the growth temperature. Has become.
【００１０】そこで本発明は、エッジクラウンや突起状
欠陥を効率的に除去することにより、面取り部とエピタ
キシャル表面境界部付近及び裏面境界部付近にエッジク
ラウンが全く無く且つエピタキシャル層表面に突起状欠
陥が全く無いエピタキシャル基板の製造方法を提供する
ことを目的とする。Accordingly, the present invention provides a method for efficiently removing edge crowns and protrusion-like defects so that there is no edge crown near the chamfered portion, near the epitaxial surface boundary, and near the back surface boundary, and the protrusion-like defects are present on the epitaxial layer surface. It is an object of the present invention to provide a method of manufacturing an epitaxial substrate having no defects.
【００１１】[0011]
【課題を解決するための手段】本発明は、特許請求の範
囲に記載したように、面取り加工及び鏡面加工済の半導
体単結晶基板上にエピタキシャル層を成長したエピタキ
シャル基板の周縁部を再度面取り加工して前記周縁部に
生成したエッジクラウンを除去する工程と、前記エピタ
キシャル層面に生成した突起状欠陥を除去する工程と、
前記エピタキシャル層面を再度鏡面研磨加工するととも
に前記突起状欠陥除去工程で前記エピタキシャル層面に
生じた歪層を除去する工程とを有することを特徴とする
エピタキシャル基板の製造方法を提供する。SUMMARY OF THE INVENTION According to the present invention, as described in the claims, the periphery of an epitaxial substrate having an epitaxial layer grown on a chamfered and mirror-polished semiconductor single crystal substrate is chamfered again. Removing the edge crown generated on the peripheral portion and removing the protruding defects generated on the epitaxial layer surface,
Polishing the epitaxial layer surface again and removing a strained layer formed on the epitaxial layer surface in the projection-like defect removing step.
【００１２】[0012]
【作用】本発明においては、まず、面取り加工及び鏡面
加工済の単結晶基板上にエピタキシャル層を成長したエ
ピタキシャル基板の周縁部を再度面取り加工することに
より、前記周縁部に生成したエッジクラウンが除去され
る。また、エピタキシャル層面に生成した突起状欠陥
は、前記面取り加工後にエピタキシャル基板を平面研削
する方法等により除去される。この突起状欠陥の除去工
程により、エピタキシャル層表面には歪層が形成される
が、この歪層はその後に鏡面研磨することによって除去
される。According to the present invention, the edge crown formed on the peripheral portion is first removed by chamfering the peripheral portion of the epitaxial substrate on which the epitaxial layer has been grown on the single-crystal substrate which has been subjected to the chamfering process and the mirror-finished surface. Is done. In addition, the protrusion-like defects generated on the epitaxial layer surface are removed by a method such as surface grinding of the epitaxial substrate after the chamfering. In the step of removing the projection-like defects, a strained layer is formed on the surface of the epitaxial layer, and the strained layer is subsequently removed by mirror polishing.
【００１３】[0013]
【実施例】以下、本発明の実施例について図を参照して
説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to the drawings.
【００１４】まず、基板ウエーハとして、ＣＺ法で作製
され、鏡面加工された、面方位〈１００〉、直径１２６
ｍｍ、厚さ５００μｍ、抵抗率０．０１５Ω・ｃｍ、面
取り角度１１°、面取り幅０．４ｍｍで、ＣＶＤ法によ
り基板裏面に厚さ１０００ｎｍのシリコン酸化膜を形成
したｐ型単結晶シリコン基板１１を用いた（図１
（ａ））。First, as a substrate wafer, a plane orientation <100>, a diameter 126
mm, a thickness of 500 μm, a resistivity of 0.015 Ω · cm, a chamfer angle of 11 °, a chamfer width of 0.4 mm, and a p-type single crystal silicon substrate 11 having a 1000 nm thick silicon oxide film formed on the back surface of the substrate by a CVD method. Used (Figure 1
(A)).
【００１５】このｐ型単結晶シリコン基板１１をパンケ
ーキ型エピタキシャル層成長装置にセットし、基板表面
側に、第１層抵抗率０．１０Ω・ｃｍ、第２層抵抗率５
０Ω・ｃｍ、第１層と第２層のトータル厚さ２３４μｍ
（面内１７点測定での平均値）のｎ／ｎ／ｐ+型のエピ
タキシャル層１２を成長させた（図１（ｂ））。このと
き、エッジクラウン１３及び突起状欠陥１４が生じてい
る。The p-type single crystal silicon substrate 11 is set in a pancake type epitaxial layer growth apparatus, and a first layer resistivity of 0.10 Ω · cm and a second layer resistivity of 5
0 Ω · cm, total thickness of the first layer and the second layer is 234 μm
An n / n / p + type epitaxial layer 12 (average value measured at 17 points in the plane) was grown (FIG. 1B). At this time, an edge crown 13 and a projection-like defect 14 have occurred.
【００１６】次に、上記エピタキシャル基板について、
面取り番手＃１５００の面取り機により面取りを行い、
基板直径１２５ｍｍ、面取り角度２２°、面取り幅０．
２ｍｍとした。この面取り再整形により基板径を僅かに
縮小させ、エッジクラウン１３を除去した。Next, regarding the above epitaxial substrate,
Chamfering with a # 500 chamfering machine,
Substrate diameter 125mm, chamfer angle 22 °, chamfer width 0.
It was 2 mm. By this chamfering reshaping, the substrate diameter was slightly reduced, and the edge crown 13 was removed.
【００１７】上記面取り工程により面取り部に歪層が形
成される。この歪層を除去するために、面取り後のエピ
タキシャル基板を洗浄後、フッ酸液に浸漬して裏面のＣ
ＶＤ酸化膜を除去してから、さらに室温でフッ酸と硝酸
の混合液に浸漬し、両面を各々約５μｍエッチングし
た。このエッチングにより、面取り部の歪層を除去する
とともに、面取り面を発塵が防止できる程度に平滑にし
た。A strain layer is formed on the chamfered portion by the chamfering step. In order to remove this strained layer, the epitaxial substrate after chamfering is washed and then immersed in a hydrofluoric acid solution to remove C on the back surface.
After removing the VD oxide film, the film was further immersed in a mixed solution of hydrofluoric acid and nitric acid at room temperature, and both surfaces were etched by about 5 μm each. By this etching, the strained layer in the chamfered portion was removed, and the chamfered surface was smoothed to such an extent that dust generation was prevented.
【００１８】次に、面取り加工後のエピタキシャル層１
２面を、＃１５００の平面研削盤により平均２０μｍ研
削し、エピタキシャル層１２の厚さが基板全面にわたり
均一になるようにした。さらに、＃２０００の平面研削
盤で基板の表面側全面を１０μｍ研削することにより、
エピタキシャル層１２面に生成した突起状欠陥１４を完
全に除去した（図１（ｄ））。一方、エピタキシャル層
１２には、この平面研削により歪層１５が形成される。Next, the chamfered epitaxial layer 1
The two surfaces were ground on an average of 20 μm using a # 1500 surface grinder so that the thickness of the epitaxial layer 12 was uniform over the entire surface of the substrate. Furthermore, by grinding the entire front surface side of the substrate with a # 2000 surface grinder by 10 μm,
The protruding defects 14 generated on the surface of the epitaxial layer 12 were completely removed (FIG. 1D). On the other hand, a strained layer 15 is formed on the epitaxial layer 12 by this surface grinding.
【００１９】最後に、平面研削後のエピタキシャル基板
のエピタキシャル層１２面を１０μｍ鏡面研磨し、平面
研削により生成した歪層１５を除去した（図１
（ｅ））。一連の工程により、エピタキシャル層１２の
第１層と第２層のトータル厚さ（面内１７点測定での平
均値）は１８９μｍになった。Finally, the surface of the epitaxial layer 12 of the epitaxial substrate after the surface grinding is mirror-polished by 10 μm to remove the strained layer 15 generated by the surface grinding (FIG. 1).
(E)). Through a series of steps, the total thickness of the first layer and the second layer of the epitaxial layer 12 (average value measured at in-plane 17 points) became 189 μm.
【００２０】エピタキシャル層成長後と研磨後の表面状
態を比較評価し、その結果を表１にまとめた。The surface conditions after the growth of the epitaxial layer and after the polishing were compared and evaluated, and the results are summarized in Table 1.
【００２１】表１から分かるように、研磨後は突起状欠
陥、エッジクラウン共に無くなり、エピタキシャル層の
厚さ分布もエピタキシャル層成長後に比べ、大幅に改善
された。As can be seen from Table 1, both protrusion-like defects and edge crowns disappeared after polishing, and the thickness distribution of the epitaxial layer was greatly improved as compared with that after the epitaxial layer was grown.
【００２２】[0022]
【表１】 [Table 1]
【００２３】本実施例では平面研削盤を用いて突起状欠
陥を除去したが、平面研削盤以外の切削加工や砥粒加工
等により突起状欠陥を除去することも可能である。ま
た、本実施例では、ｎ／ｎ／ｐ+型のエピタキシャル層
を成長する場合について説明したが、ｎ／ｎ+、ｐ／ｐ+
等のように、ｎ型又はｐ型の単結晶基板上にｎ型又はｐ
型の非常に厚いエピタキシャル層を成長させる場合につ
いても適応可能である。In this embodiment, the protruding defects are removed by using a surface grinder. However, it is also possible to remove the protruding defects by cutting or abrasive processing other than the surface grinder. Further, in this embodiment, the case of growing an n / n / p + type epitaxial layer has been described, but n / n + and p / p +
And so on, the n-type or p-type
It is also applicable for growing very thick epitaxial layers of the mold.
【００２４】[0024]
【発明の効果】以上の説明で明らかなように本発明によ
れば、面取り部とエピタキシャル表面境界部付近及び裏
面境界部付近にエッジクラウンが全く無く且つエピタキ
シャル層表面に突起状欠陥が全く無いエピタキシャル基
板を提供することができる。As is apparent from the above description, according to the present invention, the epitaxial layer having no edge crown near the chamfered portion, near the epitaxial surface boundary and near the back surface boundary, and having no projection defects on the epitaxial layer surface. A substrate can be provided.
【図１】本発明の一実施例の製造工程を示す工程図であ
る。FIG. 1 is a process chart showing a manufacturing process according to one embodiment of the present invention.
１１ ｐ型単結晶シリコン基板 １２ エピタキシャル層 １３ エッジクラウン １４ 突起状欠陥 １５ 歪層 Reference Signs List 11 p-type single crystal silicon substrate 12 epitaxial layer 13 edge crown 14 protruding defect 15 strained layer
Claims (1)
晶基板上にエピタキシャル層を成長したエピタキシャル
基板の周縁部を再度面取り加工して前記周縁部に生成し
たエッジクラウンを除去する工程と、前記エピタキシャ
ル層面に生成した突起状欠陥を除去する工程と、前記エ
ピタキシャル層面を再度鏡面研磨加工するとともに前記
突起状欠陥除去工程で前記エピタキシャル層面に生じた
歪層を除去する工程とを有することを特徴とするエピタ
キシャル基板の製造方法。A step of chamfering a peripheral portion of an epitaxial substrate on which an epitaxial layer has been grown on a semiconductor single crystal substrate which has been chamfered and mirror-finished to remove an edge crown generated on the peripheral portion; A step of removing the projecting defects generated on the layer surface, and a step of removing the strained layer formed on the epitaxial layer surface in the projecting defect removing step while mirror polishing the epitaxial layer surface again. Manufacturing method of epitaxial substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5034358A JP2759594B2 (en) | 1993-01-30 | 1993-01-30 | Manufacturing method of epitaxial substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5034358A JP2759594B2 (en) | 1993-01-30 | 1993-01-30 | Manufacturing method of epitaxial substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH06232057A JPH06232057A (en) | 1994-08-19 |
| JP2759594B2 true JP2759594B2 (en) | 1998-05-28 |
Family
ID=12411945
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5034358A Expired - Fee Related JP2759594B2 (en) | 1993-01-30 | 1993-01-30 | Manufacturing method of epitaxial substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2759594B2 (en) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3368799B2 (en) * | 1997-05-22 | 2003-01-20 | 住友電気工業株式会社 | III-V compound semiconductor wafer and method of manufacturing the same |
| JP4982355B2 (en) * | 2004-02-27 | 2012-07-25 | エーエスエム アメリカ インコーポレイテッド | Method for forming germanium film |
| JP4528599B2 (en) * | 2004-10-25 | 2010-08-18 | Ｓｕｍｃｏ Ｔｅｃｈｘｉｖ株式会社 | Epitaxial substrate manufacturing method |
| JP2006190703A (en) * | 2004-12-28 | 2006-07-20 | Shin Etsu Handotai Co Ltd | Method of manufacturing epitaxial wafer and epitaxial wafer |
| JP5040814B2 (en) * | 2008-05-30 | 2012-10-03 | 株式会社デンソー | Method for manufacturing silicon carbide semiconductor device |
| JP5795461B2 (en) | 2009-08-19 | 2015-10-14 | 株式会社Sumco | Epitaxial silicon wafer manufacturing method |
| JP5803979B2 (en) | 2013-05-29 | 2015-11-04 | 住友電気工業株式会社 | Silicon carbide substrate and silicon carbide semiconductor device, and method for manufacturing silicon carbide substrate and silicon carbide semiconductor device |
| JP2016028009A (en) * | 2015-09-02 | 2016-02-25 | 住友電気工業株式会社 | Silicon carbide substrate and silicon carbide semiconductor device, and methods of producing silicon carbide substrate and silicon carbide semiconductor device |
| JP6515866B2 (en) * | 2016-05-09 | 2019-05-22 | 信越半導体株式会社 | Evaluation method of epitaxial wafer |
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1993
- 1993-01-30 JP JP5034358A patent/JP2759594B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH06232057A (en) | 1994-08-19 |
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