JP2583916B2 - Recording / playback circuit - Google Patents
Recording / playback circuitInfo
- Publication number
- JP2583916B2 JP2583916B2 JP62278614A JP27861487A JP2583916B2 JP 2583916 B2 JP2583916 B2 JP 2583916B2 JP 62278614 A JP62278614 A JP 62278614A JP 27861487 A JP27861487 A JP 27861487A JP 2583916 B2 JP2583916 B2 JP 2583916B2
- Authority
- JP
- Japan
- Prior art keywords
- recording
- circuit
- signal
- transistor
- reproducing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Description
【発明の詳細な説明】 産業上の利用分野 本発明はテープレコーダなどの録音再生装置に用いる
録音再生回路に関するものである。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a recording / reproducing circuit used for a recording / reproducing device such as a tape recorder.
従来の技術 録音再生装置の録音再生回路は録音時と再生時に機械
的スイッチによって従来から切換えられていたが、最近
では電子スイッチによって切換えられる方向になってき
ている。2. Description of the Related Art The recording / reproducing circuit of a recording / reproducing apparatus has been conventionally switched by a mechanical switch at the time of recording and at the time of reproduction, but recently it has been switched to a direction of being switched by an electronic switch.
以下図面を参照しながら上述した従来の録音再生回路
の一例について説明する。第10図は従来の録音再生回路
例を示すものである。第10図において、１は録音再生用
ヘッド、２は再生信号増幅回路、３は録音バイヤス信号
発生回路、８は低周波増幅回路、９はスピーカ、10は録
音信号増幅回路、S1，S2，S3は切換スイッチである。Hereinafter, an example of the above-described conventional recording / reproducing circuit will be described with reference to the drawings. FIG. 10 shows an example of a conventional recording / reproducing circuit. In FIG. 10, 1 is a recording / reproducing head, 2 is a reproduction signal amplifying circuit, 3 is a recording bias signal generating circuit, 8 is a low frequency amplifying circuit, 9 is a speaker, 10 is a recording signal amplifying circuit, and S 1 and S 2. , S 3 is the change-over switch.
この第10図の動作について説明すると、再生動作時に
はスイッチS1，S2，S3はＡ側に接続され、録音再生用ヘ
ッド１によって磁気テープから再生した信号はスイッチ
S1を通して再生信号増幅回路２に加えられ、トランジス
タ22,23,24,25,26,41を通って増幅され、コンデンサ７
を通って低周波回路８で増幅し、スピーカ９で再生音が
鳴る。10, the switches S 1 , S 2 , S 3 are connected to the A side during the reproducing operation, and the signal reproduced from the magnetic tape by the recording / reproducing head 1 is switched.
Added to the reproduced signal amplifier circuit 2 through S 1, it is amplified through the transistor 22,23,24,25,26,41, capacitor 7
Then, the signal is amplified by the low frequency circuit 8, and the reproduced sound is produced by the speaker 9.
次に録音動作時にはスイッチS1，S2，S3はＢ側に接続
されている。録音するための信号を端子11に加え、録音
信号増幅回路10で増幅した後、抵抗5,コンデンサ６を介
して、録音再生用ヘッド１に加えるとともに録音バイヤ
ス信号発生回路３からバイヤス信号を録音再生用ヘッド
１に加えて磁気テープに録音する。Next, during the recording operation, the switches S 1 , S 2 , S 3 are connected to the B side. A signal for recording is applied to a terminal 11, amplified by a recording signal amplifier circuit 10, and then applied to a recording / reproducing head 1 via a resistor 5 and a capacitor 6, and a bias signal is recorded / reproduced from a recording bias signal generating circuit 3. Recording on a magnetic tape in addition to the recording head 1.
発明が解決しようとする問題点 しかしながら、上記のような構成では録音動作時と再
生動作時とを機械的スイッチによって切換える切換回路
が多く必要であった。しかし、単純に再生信号増幅回路
２の電源電圧と録音信号増幅回路の電源電圧とを切り換
える手段を用いた場合、録音動作時に不動作となってい
るトランジスタ22の寄生ダイオードが導通し、録音信号
を歪ませるという不都合があった。Problems to be Solved by the Invention However, in the above configuration, many switching circuits for switching between the recording operation and the reproducing operation by a mechanical switch are required. However, when a means for simply switching between the power supply voltage of the reproduction signal amplification circuit 2 and the power supply voltage of the recording signal amplification circuit is used, the parasitic diode of the transistor 22 which is inactive during the recording operation conducts, and the recording signal is transmitted. There was the inconvenience of distorting.
本発明は上記問題点を鑑み、録音動作時と再生動作時
との切換回路を少なくすると共に、回路を切り換えた時
の不都合を解消する録音再生回路を提供するものであ
る。SUMMARY OF THE INVENTION In view of the above problems, the present invention provides a recording / reproducing circuit which reduces the number of switching circuits between a recording operation and a reproducing operation and eliminates inconvenience when switching circuits.
問題点を解決するための手段 上記問題点を解決するために、再生信号増幅回路、録
音信号増幅回路、録音再生用ヘッドおよび録音バイヤス
信号発生回路を有し、前記再生信号増幅回路内の入力部
を成す第１のトランジスタのベースに、前記録音再生用
ヘッドの一端と前記録音信号増幅回路の出力信号の信号
伝送系とを常に接続し、前記第１のトランジスタのコレ
クタと一方の電源端との間に第２のトランジスタを設
け、前記録音再生用ヘッドの他端と前記録音バイヤス信
号発生回路の接続点と前記一方の電源端との間に第３の
トランジスタを設け、再生動作時には、前記再生信号増
幅回路に電源電圧を加えると共に前記録音信号増幅回路
の電源電圧を遮断し、前記電源電圧に連動して前記第２
のトランジスタと前記第３のトランジスタをオン状態に
して前記再生信号増幅回路を動作させ、一方、録音動作
時には、前記録音信号増幅回路に電源電圧を加えると共
に前記再生信号増幅回路を電源電圧を遮断し、前記第２
のトランジスタと前記第３のトランジスタをオフ状態に
して前記録音信号増幅回路と前記録音バイヤス信号発生
回路を動作させ、前記再生信号増幅回路を不動作にする
ものである。Means for Solving the Problems In order to solve the above problems, a reproduction signal amplification circuit, a recording signal amplification circuit, a recording / reproduction head and a recording bias signal generation circuit are provided, and an input section in the reproduction signal amplification circuit is provided. One end of the recording / reproducing head and a signal transmission system of an output signal of the recording signal amplifying circuit are always connected to the base of the first transistor, so that the collector of the first transistor and one power supply terminal are connected to each other. A second transistor provided between the other end of the recording / reproducing head and a connection point between the recording bias signal generating circuit and the one power supply terminal; A power supply voltage is applied to the signal amplification circuit and the power supply voltage of the recording signal amplification circuit is cut off.
The third signal transistor and the third transistor are turned on to operate the reproduction signal amplification circuit. On the other hand, during a recording operation, a power supply voltage is applied to the recording signal amplification circuit, and the reproduction signal amplification circuit is turned off. , The second
And the third transistor is turned off to operate the recording signal amplification circuit and the recording bias signal generation circuit, thereby disabling the reproduction signal amplification circuit.
作用 本発明は上記した構成によって録音再生用ヘッドと再
生信号増幅回路内の第１のトランジスタのベースに録音
信号伝送系を接続したままでも第２のトランジスタを設
けることによって録音動作時に信号が歪まなく、しかも
切換スイッチの回路数を少くすることができる。According to the present invention, the signal is not distorted during the recording operation by providing the second transistor even if the recording signal transmission system is connected to the recording / reproducing head and the base of the first transistor in the reproduction signal amplifier circuit. Further, the number of circuits of the changeover switch can be reduced.
実施例 以下本発明の一実施例の録音再生回路について、図面
を参照しながら説明する。第１図は本発明の第１の実施
例における録音再生回路の電気的結線図を示すものであ
る。第１図において、１は録音再生用ヘッド、２は再生
信号増幅回路、３は録音バイヤス信号発生回路、4,6,7
はコンデンサ、８は低周波増幅回路、９はスピーカ、10
は録音信号増幅器、S3は切換スイッチ、14,22,23,24,2
5,26,27,30,35,36,40,41,52,56,57はトランジスタ、38
はダイオード、5,13,21,28,51,29,31,33,34,37,39は抵
抗である。Embodiment A recording / playback circuit according to an embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows an electrical connection diagram of a recording / reproducing circuit according to a first embodiment of the present invention. In FIG. 1, 1 is a recording / reproducing head, 2 is a reproduction signal amplifying circuit, 3 is a recording bias signal generating circuit, and 4, 6, 7
Is a capacitor, 8 is a low frequency amplifier circuit, 9 is a speaker, 10
Recording signal amplifier, S 3 is the change-over switch, 14,22,23,24,2
5,26,27,30,35,36,40,41,52,56,57 are transistors, 38
Is a diode, and 5,13,21,28,51,29,31,33,34,37,39 are resistors.
以上のように構成された録音再生回路について、以下
第１図から第９図までを用いてその動作を説明する。The operation of the recording / reproducing circuit configured as described above will be described below with reference to FIGS.
まず、第１図は本発明の一実施例を示すものであっ
て、再生動作時にはスイッチS3はＡ側に接続されてい
る。磁気テープに記録された信号は録音再生用ヘッド１
によって再生され、トランジスタ22のベースに加えら
れ、トランジスタ23,24,25,26,41によって増幅され、コ
ンデンサ7,低周波増幅回路８を通して、スピーカ９で再
生音が鳴る。次に、録音動作時には録音するための信号
が端子11に加えられると、録音信号増幅回路10,抵抗５
とコンデンサ６を介して録音再生用ヘッド１に加えられ
るとともに、録音バイヤス信号発生回路３からバイヤス
信号を録音再生用ヘッド１に加えて磁気テープ上に録音
する。First, FIG. 1, there is shown an embodiment of the present invention, the switch S 3 upon reproduction operation is connected to the A side. The signal recorded on the magnetic tape is recorded and reproduced by the head 1.
And the signal is added to the base of the transistor 22, amplified by the transistors 23, 24, 25, 26 and 41, passed through the capacitor 7 and the low-frequency amplifier circuit 8, and reproduced by the speaker 9. Next, during the recording operation, when a signal for recording is applied to the terminal 11, the recording signal amplifier circuit 10, the resistor 5
And the capacitor 6, the bias signal is applied to the recording / reproducing head 1 from the recording bias signal generating circuit 3, and the bias signal is applied to the recording / reproducing head 1 and recorded on a magnetic tape.
この録音状態の時にトランジスタ52がない場合には、
トランジスタ22のコレクタが、直接、アースされ、再生
信号増幅回路２にはスイッチS3がＢ側のために電圧が供
給されていなく、トランジスタ22には電流が流れていな
い。そのために、トランジスタ22の第５図に示す部分は
第６図のようにダイオード61,62を接続したのとほぼ等
価となる。そのため、抵抗５とコンデンサ６からの信号
がトランジスタ22のベースに加わった時において、信号
の振幅が負側に振られるとマイナス0.6V位でダイオード
62が導通となり、信号がクリップされ第７図のようにな
る。そのために、本発明の第１図の実施例ではトランジ
スタ22を設け、第８図に示すトランジスタ22,52の回路
は録音時には第９図のダイオード61,62,63,64と等価と
なり、ダイオード64が逆方向バイヤスとなり導通しなく
なり、録音信号が負に約0.6V以上加わっても歪まない。
しかも録音再生の切換スイッチの回路数を少くすること
ができる。If there is no transistor 52 in this recording state,
The collector of transistor 22 is directly connected to ground, the switch S 3 is in the reproduction signal amplifier 2 is not a voltage is supplied to the B-side, the transistor 22 no current flows. Therefore, the portion of the transistor 22 shown in FIG. 5 is substantially equivalent to connecting the diodes 61 and 62 as shown in FIG. Therefore, when the signal from the resistor 5 and the capacitor 6 is applied to the base of the transistor 22, when the amplitude of the signal is shifted to the negative side, the diode is at about -0.6V.
62 becomes conductive and the signal is clipped, as shown in FIG. For this purpose, in the embodiment of FIG. 1 of the present invention, the transistor 22 is provided, and the circuit of the transistors 22, 52 shown in FIG. 8 is equivalent to the diodes 61, 62, 63, 64 of FIG. Becomes biased in the reverse direction and becomes non-conductive. Even if the recording signal is applied to about 0.6V or more negatively, it will not be distorted.
Moreover, the number of circuits for the recording / reproduction changeover switch can be reduced.
次に、本発明の第２の実施例について図面を参照しな
がら説明する。第２図は本発明の第２の実施例を示す録
音再生回路を示す電気的結線図である。第２図は第１図
の差動増幅器を構成するトランジスタ23,24の代りにト
ランジスタ22と42とで差動増幅器を構成したもので、第
１図と同じようにトランジスタ22のコレクタとアースと
の間にトランジスタ52をそのコレクタとエミッタとで接
続して挿入し、トランジスタ52は再生動作時にはオン，
録音動作時にはオフとなるように動作し、第１図と同じ
効果を有するものである。Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 2 is an electrical connection diagram showing a recording / reproducing circuit according to a second embodiment of the present invention. FIG. 2 shows a differential amplifier composed of transistors 22 and 42 instead of the transistors 23 and 24 constituting the differential amplifier shown in FIG. 1. Similar to FIG. 1, the collector and ground of the transistor 22 are connected to each other. A transistor 52 is connected between the collector and the emitter of the transistor 52 and inserted.
It operates so as to be turned off during the recording operation, and has the same effect as that of FIG.
次に、第３図，第４図では、第１図，第２図の入力抵
抗21が録音動作時にインピーダンスを低くするのを防ぐ
ために、トランジスタ53を設けたもので、再生時にはト
ランジスタ53がオンし、録音時にはオフとなり、録音時
のインピーダンスを高くすることができるものである。
再生動作時には、トランジスタ14がオンしているため、
トランジスタ22のベースが録音再生用ヘッド１とトラン
ジスタ14を介してアースされ、第10図の従来例の切換ス
イッチS2と同様に動作する。その他の動作及び効果は第
１図，第２図と同じようである。Next, in FIGS. 3 and 4, a transistor 53 is provided to prevent the input resistor 21 of FIGS. 1 and 2 from lowering the impedance during the recording operation, and the transistor 53 is turned on during reproduction. However, it is turned off during recording, so that the impedance during recording can be increased.
At the time of reproduction operation, since the transistor 14 is on,
The base of transistor 22 is grounded via the recording and reproducing head 1 and the transistor 14 operates similarly to the changeover switch S 2 of the conventional example of FIG. 10. Other operations and effects are the same as those in FIG. 1 and FIG.
以上のように再生増幅回路の第１のトランジスタとコ
レクタと一方の電源との間に第２のトランジスタを設け
ることによって録音時の信号の歪をなくし、しかも録音
再生の切換スイッチ回路を少なくすることができる。As described above, by providing the second transistor between the first transistor and the collector of the reproduction amplifier circuit and one of the power supplies, distortion of a signal at the time of recording is eliminated, and the number of recording / reproduction changeover switch circuits is reduced. Can be.
発明の効果 以上のように、本発明の録音再生回路は、再生信号増
幅回路の電源電圧と録音信号増幅回路の電源電圧の切換
えで、再生状態と録音状態とを切換えられるだけでな
く、録音状態では再生信号増幅回路を不動作とするとと
もに、第２のトランジスタをオフ状態にすることにより
録音時の信号の歪をなくし、録音再生の切換スイッチ回
路を少くすることができる。As described above, the recording / reproducing circuit of the present invention not only can switch between the reproducing state and the recording state by switching the power supply voltage of the reproducing signal amplifying circuit and the power supply voltage of the recording signal amplifying circuit, but also can change the recording state. In this case, the reproduction signal amplifier circuit is made inoperative and the second transistor is turned off, thereby eliminating the distortion of the signal at the time of recording and reducing the number of switch circuits for recording and reproduction.
第１図は本発明の第１の実施例における録音再生回路の
電気的結線図、第２図は本発明の第２の実施例における
録音再生回路の電気的結線図、第３図，第４図は本発明
における第3,第４の実施例における録音再生回路の電気
的結線図、第５図，第６図，第７図，第８図，第９図は
本発明の実施例における説明図、第10図は従来の録音再
生回路の電気的結線図である。 １……録音再生用ヘッド、２……再生信号増幅回路、３
……録音バイヤス信号発生回路、4,6,7……コンデン
サ、８……低周波増幅回路、９……スピーカ、10……録
音信号増幅回路、S1，S2，S3……切換スイッチ、14,22,
23,24,25,26,27,30,35,36,40,41,52,50,57……トランジ
スタ、38……ダイオード、5,13,21,28,51,29,31,33,34,
37,39……抵抗。FIG. 1 is an electrical connection diagram of a recording / reproducing circuit according to a first embodiment of the present invention, FIG. 2 is an electrical connection diagram of a recording / reproducing circuit according to a second embodiment of the present invention, and FIGS. The drawings are the electrical connection diagrams of the recording / reproducing circuits in the third and fourth embodiments of the present invention, and FIGS. 5, 6, 7, 8, and 9 are the explanations in the embodiments of the present invention. FIG. 10 is an electrical connection diagram of a conventional recording / reproducing circuit. 1 ... head for recording and reproduction, 2 ... reproduction signal amplifier circuit, 3
… Recording bias signal generation circuit, 4,6,7 …… Capacitor, 8 …… Low frequency amplifier circuit, 9 …… Speaker, 10 …… Recording signal amplifier circuit, S 1 , S 2 , S 3 … Switch , 14,22,
23,24,25,26,27,30,35,36,40,41,52,50,57 …… transistor, 38 …… diode, 5,13,21,28,51,29,31,33, 34,
37,39 ... resistance.
Claims (1)
音再生用ヘッドおよび録音バイヤス信号発生回路を有
し、前記再生信号増幅回路内の入力部を成す第１のトラ
ンジスタのベースに、前記録音再生用ヘッドの一端と前
記録音信号増幅回路の出力信号の信号伝送系とを常に接
続し、前記第１のトランジスタのコレクタと一方の電極
端との間に第２のトランジスタを設け、前記録音再生用
ヘッドの他端と前記録音バイヤス信号発生回路の接続点
と前記一方の電源端との間に第３のトランジスタを設
け、再生動作時には、前記再生信号増幅回路に電源電圧
を加えると共に前記録音信号増幅回路の電源電圧を遮断
し、前記電源電圧に連動して前記第２のトランジスタと
前記第３のトランジスタをオン状態にして前記再生信号
増幅回路を動作させ、一方、録音動作時には、前記録音
信号増幅回路に電源電圧を加えると共に前記再生信号増
幅回路を電源電圧を遮断し、前記第２のトランジスタと
前記第３のトランジスタをオフ状態にして、前記録音信
号増幅回路と前記録音バイヤス信号発生回路を動作さ
せ、前記再生信号増幅回路を不動作にすることを特徴と
する録音再生回路。1. A reproduction signal amplification circuit, a recording signal amplification circuit, a recording / reproduction head, and a recording bias signal generation circuit, wherein a base of a first transistor serving as an input part in the reproduction signal amplification circuit is provided with a base for the recording. One end of the reproducing head is always connected to a signal transmission system of an output signal of the recording signal amplifier circuit, and a second transistor is provided between a collector of the first transistor and one electrode end. A third transistor is provided between the other end of the recording head and the connection point of the recording bias signal generating circuit and the one power supply terminal. During a reproducing operation, a power supply voltage is applied to the reproducing signal amplifying circuit and the recording signal is supplied. Shutting off the power supply voltage of the amplifier circuit, turning on the second transistor and the third transistor in conjunction with the power supply voltage to operate the reproduction signal amplifier circuit, On the other hand, at the time of the recording operation, the power supply voltage is applied to the recording signal amplification circuit, the power supply voltage of the reproduction signal amplification circuit is cut off, the second transistor and the third transistor are turned off, and the recording signal amplification is performed. A recording / reproducing circuit which operates a circuit and the recording bias signal generating circuit and deactivates the reproducing signal amplifying circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62278614A JP2583916B2 (en) | 1987-11-04 | 1987-11-04 | Recording / playback circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62278614A JP2583916B2 (en) | 1987-11-04 | 1987-11-04 | Recording / playback circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01119902A JPH01119902A (en) | 1989-05-12 |
| JP2583916B2 true JP2583916B2 (en) | 1997-02-19 |
Family
ID=17599733
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62278614A Expired - Lifetime JP2583916B2 (en) | 1987-11-04 | 1987-11-04 | Recording / playback circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2583916B2 (en) |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5545530U (en) * | 1978-09-18 | 1980-03-25 | ||
| JPS5737708A (en) * | 1980-08-20 | 1982-03-02 | Toshiba Corp | Electronic switching device |
| JPS58133606A (en) * | 1982-01-30 | 1983-08-09 | Hitachi Ltd | Recording and reproducing circuit |
| JPS58205903A (en) * | 1982-05-24 | 1983-12-01 | Matsushita Electric Ind Co Ltd | Magnetic recorder and reproducer |
| JPS5930212A (en) * | 1982-08-11 | 1984-02-17 | Matsushita Electric Ind Co Ltd | Magnetic recording and reproducing device |
-
1987
- 1987-11-04 JP JP62278614A patent/JP2583916B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01119902A (en) | 1989-05-12 |
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