JP2579680B2 - Heat treatment method for silicon wafer - Google Patents

Heat treatment method for silicon wafer

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Publication number
JP2579680B2
JP2579680B2 JP63333535A JP33353588A JP2579680B2 JP 2579680 B2 JP2579680 B2 JP 2579680B2 JP 63333535 A JP63333535 A JP 63333535A JP 33353588 A JP33353588 A JP 33353588A JP 2579680 B2 JP2579680 B2 JP 2579680B2
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JP
Japan
Prior art keywords
silicon wafer
annealing
heat treatment
pressure
mirror
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP63333535A
Other languages
Japanese (ja)
Other versions
JPH02177542A (en
Inventor
宏 白井
好生 桐野
淳 吉川
誠司 栗原
和宏 森島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Coorstek KK
Original Assignee
Toshiba Ceramics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Ceramics Co Ltd filed Critical Toshiba Ceramics Co Ltd
Priority to JP63333535A priority Critical patent/JP2579680B2/en
Publication of JPH02177542A publication Critical patent/JPH02177542A/en
Application granted granted Critical
Publication of JP2579680B2 publication Critical patent/JP2579680B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はシリコンウェハの熱処理方法に関し、特にシ
リコンウェハの熱処理誘起結晶欠陥の発生を少なくし、
シリコンウェハ表面に形成される酸化膜の耐圧特性を向
上させるものである。
Description: FIELD OF THE INVENTION The present invention relates to a method for heat-treating a silicon wafer, and more particularly to reducing the occurrence of heat-induced crystal defects in a silicon wafer.
This is to improve the breakdown voltage characteristics of the oxide film formed on the surface of the silicon wafer.

〔従来の技術〕[Conventional technology]

従来より、シリコンウェハの熱処理誘起結晶欠陥の発
生を少なくし、シリコンウェハ表面に形成される酸化膜
の耐圧特性を向上させるために、シリコンウェハに種々
の熱処理が施す方法が提案されている。
2. Description of the Related Art Conventionally, various methods have been proposed for performing various heat treatments on a silicon wafer in order to reduce the occurrence of heat treatment-induced crystal defects in the silicon wafer and to improve the breakdown voltage characteristics of an oxide film formed on the surface of the silicon wafer.

これらの方法のうち、シリコンウェハを水素含有雰囲
気中で熱処理する方法が知られている(例えば、特開昭
61−193456号、特開昭62−123098号など)。このように
シリコンウェハを水素含有雰囲気中で熱処理すれば、シ
リコンウェハの熱処理誘起結晶欠陥の発生を少なくし、
シリコンウェハ表面に形成される酸化膜の耐圧特性を向
上させることができる。
Among these methods, a method of heat-treating a silicon wafer in a hydrogen-containing atmosphere is known (for example, Japanese Patent Application Laid-Open No.
No. 61-193456, JP-A-62-123098). By heat-treating a silicon wafer in a hydrogen-containing atmosphere in this manner, the occurrence of heat-induced crystal defects in the silicon wafer is reduced,
The withstand voltage characteristics of the oxide film formed on the surface of the silicon wafer can be improved.

〔発明が解決しようとする課題〕[Problems to be solved by the invention]

ところで、シリコンウェハの高温アニールを行うと炉
内の石英炉芯管などの石英治具の寿命が短くなるうえ、
ヒーターの劣化も早くなるため、シリコンウェハのアニ
ール温度は低いほど望ましいことはよく知られている。
By the way, when a silicon wafer is subjected to high-temperature annealing, the life of a quartz jig such as a quartz core tube in the furnace is shortened, and
It is well known that the lower the annealing temperature of a silicon wafer, the more desirable it is because the heater deteriorates faster.

しかし、シリコンウェハを水素含有雰囲気中で熱処理
する従来の方法では、シリコンウェハの熱処理誘起結晶
欠陥の発生を少なくし、シリコンウェハ表面に形成され
る酸化膜の耐圧特性を向上させるためには、かなりの高
温でアニールする必要があった。
However, the conventional method of heat-treating a silicon wafer in a hydrogen-containing atmosphere requires a considerable amount of heat in order to reduce the occurrence of heat treatment-induced crystal defects in the silicon wafer and to improve the breakdown voltage characteristics of an oxide film formed on the surface of the silicon wafer. Annealing at a high temperature.

本発明は前記問題点を解決するためになされたもので
あり、低温でのアニールによって、シリコンウェハの熱
処理誘起結晶欠陥の発生を少なくし、シリコンウェハ表
面に形成される酸化膜の耐圧特性を向上させることが可
能なシリコンウェハの熱処理方法を提供することを目的
とする。
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and the annealing at a low temperature reduces the occurrence of heat treatment-induced crystal defects in a silicon wafer and improves the breakdown voltage characteristics of an oxide film formed on the silicon wafer surface. It is an object of the present invention to provide a heat treatment method for a silicon wafer which can be performed.

〔課題を解決するための手段と作用〕[Means and actions for solving the problem]

本発明のシリコンウェハの熱処理方法は、鏡面シリコ
ンウェハを水素含有雰囲気中、5〜20atm、600〜1300℃
で5分〜100時間処理することを特徴とするものであ
る。
The heat treatment method for a silicon wafer according to the present invention includes the steps of: placing a mirror-finished silicon wafer in a hydrogen-containing atmosphere at 5 to 20 atm,
For 5 minutes to 100 hours.

本発明において、水素含有雰囲気とは100%水素雰囲
気、又は水素を10%以上含有し、残部が不活性ガスであ
る雰囲気をいう。
In the present invention, the hydrogen-containing atmosphere refers to a 100% hydrogen atmosphere or an atmosphere containing 10% or more of hydrogen and the balance being an inert gas.

本発明において、水素含有雰囲気の圧力を5〜20atm
としたのは以下のような理由による。すなわち、雰囲気
の圧力が5atm未満では圧力が1atmの場合と比較して、シ
リコンウェハの熱処理誘起結晶欠陥の発生を少なくし、
シリコンウェハ表面に形成される酸化膜の耐圧特性を向
上させる効果がほとんど変化しない。一方、20atmを超
えると、製造装置が大型化して維持が困難となり、製造
コストが高くなる。
In the present invention, the pressure of the hydrogen-containing atmosphere is 5 to 20 atm.
The reason was as follows. That is, when the pressure of the atmosphere is less than 5 atm, the occurrence of heat treatment-induced crystal defects of the silicon wafer is reduced as compared with the case where the pressure is 1 atm,
The effect of improving the breakdown voltage characteristics of the oxide film formed on the surface of the silicon wafer hardly changes. On the other hand, if it exceeds 20 atm, the manufacturing equipment becomes large and difficult to maintain, and the manufacturing cost increases.

本発明において、アニール温度を600〜1300℃とした
のは、600℃未満では所期の効果を得ることができず、
一方1300℃を超えると石英治具、ヒータなどの炉まわり
の寿命が大幅に短くなるためである。このように本発明
では、600℃という低温でもシリコンウェハの熱処理誘
起結晶欠陥の発生を少なくし、シリコンウェハ表面に形
成される酸化膜の耐圧特性を向上させる効果を得ること
ができる。
In the present invention, the reason why the annealing temperature is set to 600 to 1300 ° C. is that an intended effect cannot be obtained at a temperature lower than 600 ° C.
On the other hand, when the temperature exceeds 1300 ° C., the life around the furnace such as a quartz jig and a heater is significantly shortened. As described above, according to the present invention, even at a low temperature of 600 ° C., it is possible to reduce the occurrence of heat treatment-induced crystal defects in a silicon wafer and obtain an effect of improving the breakdown voltage characteristics of an oxide film formed on the silicon wafer surface.

本発明において、アニール時間を5分〜100時間とし
たのは、5分未満では所期の効果を得ることができず、
一方100時間を超えてアニールしても、それほどの効果
は得られないためである。
In the present invention, the reason for setting the annealing time to 5 minutes to 100 hours is that the desired effect cannot be obtained if the annealing time is less than 5 minutes.
On the other hand, even if annealing is performed for more than 100 hours, not much effect can be obtained.

〔実施例〕〔Example〕

以下、本発明の実施例を説明する。 Hereinafter, embodiments of the present invention will be described.

実施例1 同一のCZ−シリコン単結晶インゴットの同一領域から
複数のシリコンウェハを切り出し、鏡面加工した。これ
らの鏡面シリコンウェハはnタイプ、比抵抗約15Ωcm、
酸素濃度1.6×1018cm-3、面方位(100)である。これら
の鏡面シリコンウェハを、100%水素雰囲気中におい
て、それぞれ1atm、10atm、20atmの加圧条件で、アニー
ル温度を800℃、1000℃、1200℃、1300℃と変化させて
1時間アニールした。更に、これらの鏡面シリコンウェ
ハを酸素雰囲気中、1000℃で16時間の酸化を行い、酸化
誘起積層欠陥(OSF)を観察した。第1図に圧力をパラ
メータとしてアニール温度とOSF密度との関係を示す。
なお、第1図中、H2アニールなしの場合は、鏡面シリコ
ンウェハに水素雰囲気中でのアニールを施さずに、前述
した条件で酸化を行っただけの場合である(以下の実施
例においても同様である)。
Example 1 A plurality of silicon wafers were cut out from the same region of the same CZ-silicon single crystal ingot and mirror-finished. These mirror-finished silicon wafers are n-type, specific resistance about 15Ωcm,
The oxygen concentration is 1.6 × 10 18 cm −3 and the plane orientation is (100). These mirror-finished silicon wafers were annealed for 1 hour in a 100% hydrogen atmosphere under pressure conditions of 1 atm, 10 atm, and 20 atm while changing the annealing temperature to 800 ° C, 1000 ° C, 1200 ° C, and 1300 ° C. Further, these mirror-finished silicon wafers were oxidized at 1000 ° C. for 16 hours in an oxygen atmosphere, and oxidation-induced stacking faults (OSF) were observed. FIG. 1 shows the relationship between the annealing temperature and the OSF density using pressure as a parameter.
In FIG. 1, the case without H 2 annealing is a case where the mirror-polished silicon wafer is not subjected to annealing in a hydrogen atmosphere and is only oxidized under the above-described conditions (also in the following embodiments). The same is true).

第1図から明らかなように、水素雰囲気中で加圧して
アニールする場合、同一のアニール温度、アニール時間
であれば、圧力が高いほど、OSFの発生を抑制する効果
が高いことがわかる。
As is clear from FIG. 1, when annealing is performed under pressure in a hydrogen atmosphere, if the annealing temperature and the annealing time are the same, the effect of suppressing the generation of OSF increases as the pressure increases.

実施例2 実施例1と同一のCZ−シリコン単結晶インゴットの同
一領域から切り出した複数の鏡面シリコンウェハを、10
0%水素雰囲気中において、10atmの加圧条件で、アニー
ル温度を600〜1300℃の範囲で変化させて1〜100時間ア
ニールした。更に、これらの鏡面シリコンウェハを酸素
雰囲気中、1000℃で16時間の酸化を行い、酸化誘起積層
欠陥(OSF)を観察した。第2図にアニール温度をパラ
メータとしてアニール時間とOSF密度との関係を示す。
Example 2 A plurality of mirror-finished silicon wafers cut from the same region of the same CZ-silicon single crystal ingot as in Example 1
Annealing was performed in a 0% hydrogen atmosphere at a pressure of 10 atm while changing the annealing temperature in the range of 600 to 1300 ° C. for 1 to 100 hours. Further, these mirror-finished silicon wafers were oxidized at 1000 ° C. for 16 hours in an oxygen atmosphere, and oxidation-induced stacking faults (OSF) were observed. FIG. 2 shows the relationship between the annealing time and the OSF density using the annealing temperature as a parameter.

第2図から明らかなように、水素雰囲気中で加圧して
アニールする場合、アニール温度が600℃と従来の熱処
理より低温でも、OSFの発生を抑制できることがわか
る。
As is clear from FIG. 2, when annealing is performed under pressure in a hydrogen atmosphere, generation of OSF can be suppressed even at an annealing temperature of 600 ° C. lower than the conventional heat treatment.

実施例3 実施例1と同一のCZ−シリコン単結晶インゴットの同
一領域から切り出した複数の鏡面シリコンウェハを、10
0%水素雰囲気中において、実施例1と同一の条件で1
時間アニールした。更に、これらの鏡面シリコンウェハ
を酸素雰囲気中、800℃で3時間、酸素雰囲気中、1000
℃で16時間という2段階の酸化を行い、酸素析出量を測
定した。第3図に圧力をパラメータとしてアニール温度
と酸素析出量との関係を示す。
Example 3 A plurality of mirror-finished silicon wafers cut out from the same region of the same CZ-silicon single crystal ingot as in Example 1 were used.
1% in a 0% hydrogen atmosphere under the same conditions as in Example 1.
Annealed for hours. Further, these mirror-finished silicon wafers were placed in an oxygen atmosphere at 800 ° C. for 3 hours,
A two-stage oxidation at 16 ° C. for 16 hours was performed, and the amount of precipitated oxygen was measured. FIG. 3 shows the relationship between the annealing temperature and the amount of precipitated oxygen using pressure as a parameter.

第3図から明らかなように、水素雰囲気中で加圧して
アニールする場合、同一のアニール温度、アニール時間
であれば、圧力が高いほど、酸素析出量が少ないことが
わかる。
As is clear from FIG. 3, when annealing is performed under pressure in a hydrogen atmosphere, the amount of precipitated oxygen decreases as the pressure increases, at the same annealing temperature and the same annealing time.

実施例4 実施例1と同一のCZ−シリコン単結晶インゴットの同
一領域から切り出した複数の鏡面シリコンウェハを、10
0%水素雰囲気中において、実施例1と同一の条件で1
時間アニールした。更に、これらの鏡面シリコンウェハ
表面に膜厚400Åの酸化膜及び膜厚4000Åの多結晶シリ
コンからなる電極を形成し、MOSキャパシタを作製し
た。このようにして作製されたMOSキャパシタの酸化膜
の耐圧特性を測定した。第4図に圧力をパラメータとし
てアニール温度と耐圧良好率との関係を示す。
Example 4 A plurality of mirror-finished silicon wafers cut from the same region of the same CZ-silicon single crystal ingot as in Example 1
1% in a 0% hydrogen atmosphere under the same conditions as in Example 1.
Annealed for hours. Further, an electrode made of an oxide film having a thickness of 400 及 び and a polycrystalline silicon having a thickness of 4,000 形成 was formed on the surface of these mirror-finished silicon wafers, thereby producing MOS capacitors. The breakdown voltage characteristics of the oxide film of the MOS capacitor thus manufactured were measured. FIG. 4 shows the relationship between the annealing temperature and the good breakdown voltage ratio using the pressure as a parameter.

第4図から明らかなように、水素雰囲気中で加圧して
アニールする場合、同一のアニール温度、アニール時間
であれば、圧力が高いほど、シリコンウェハ表面に形成
される酸化膜の耐圧特性が良好であることがわかる。
As is clear from FIG. 4, when the annealing is performed under pressure in a hydrogen atmosphere, the higher the pressure, the better the pressure resistance of the oxide film formed on the silicon wafer surface if the annealing temperature and the annealing time are the same. It can be seen that it is.

〔発明の効果〕〔The invention's effect〕

以上詳述したように本発明によれば、低温でのアニー
ルによって、シリコンウェハの熱処理誘起結晶欠陥の発
生を少なくし、シリコンウェハ表面に形成される酸化膜
の耐圧特性を向上させることができ、その工業的価値は
大きい。
As described in detail above, according to the present invention, annealing at a low temperature can reduce the occurrence of heat treatment-induced crystal defects in a silicon wafer and improve the breakdown voltage characteristics of an oxide film formed on the surface of the silicon wafer. Its industrial value is great.

【図面の簡単な説明】[Brief description of the drawings]

第1図は圧力をパラメータとしてアニール温度とOSF密
度との関係を示す特性図、第2図はアニール温度をパラ
メータとしてアニール時間とOSF密度との関係を示す特
性図、第3図は圧力をパラメータとしてアニール温度と
酸素析出量との関係を示す特性図、第4図は圧力をパラ
メータとしてアニール温度と耐圧良好率との関係を示す
特性図である。
FIG. 1 is a characteristic diagram showing the relationship between the annealing temperature and the OSF density using the pressure as a parameter, FIG. 2 is a characteristic diagram showing the relationship between the annealing time and the OSF density using the annealing temperature as a parameter, and FIG. FIG. 4 is a characteristic diagram showing a relationship between the annealing temperature and the oxygen precipitation amount, and FIG. 4 is a characteristic diagram showing a relationship between the annealing temperature and the good breakdown voltage ratio using pressure as a parameter.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 栗原 誠司 山形県西置賜郡小国町大字小国町378番 地 東芝セラミックス株式会社小国製造 所内 (72)発明者 森島 和宏 神奈川県秦野市曽屋30番地 東芝セラミ ックス株式会社中央研究所内 (56)参考文献 特開 昭54−127278(JP,A) ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Seiji Kurihara 378, Oguni-machi, Oguni-machi, Oguni-machi, Nishiokitama-gun, Yamagata Prefecture Inside the Oguni Plant of Toshiba Ceramics Co., Ltd. Central Research Institute, Inc. (56) References JP-A-54-127278 (JP, A)

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】鏡面シリコンウェハを水素含有雰囲気中、
5〜20atm、600〜1300℃で5分〜100時間処理すること
を特徴とするシリコンウェハの熱処理方法。
A mirror-finished silicon wafer is placed in a hydrogen-containing atmosphere.
A heat treatment method for a silicon wafer, wherein the heat treatment is performed at 5 to 20 atm and 600 to 1300 ° C. for 5 minutes to 100 hours.
JP63333535A 1988-12-28 1988-12-28 Heat treatment method for silicon wafer Expired - Lifetime JP2579680B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63333535A JP2579680B2 (en) 1988-12-28 1988-12-28 Heat treatment method for silicon wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63333535A JP2579680B2 (en) 1988-12-28 1988-12-28 Heat treatment method for silicon wafer

Publications (2)

Publication Number Publication Date
JPH02177542A JPH02177542A (en) 1990-07-10
JP2579680B2 true JP2579680B2 (en) 1997-02-05

Family

ID=18267134

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Application Number Title Priority Date Filing Date
JP63333535A Expired - Lifetime JP2579680B2 (en) 1988-12-28 1988-12-28 Heat treatment method for silicon wafer

Country Status (1)

Country Link
JP (1) JP2579680B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2535701B2 (en) * 1992-03-27 1996-09-18 株式会社東芝 Semiconductor device
JP5052728B2 (en) * 2002-03-05 2012-10-17 株式会社Sumco Method for producing silicon single crystal layer

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54127278A (en) * 1978-03-27 1979-10-03 Cho Lsi Gijutsu Kenkyu Kumiai Annealing method

Also Published As

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