JP2568995B2 - Superconducting element - Google Patents
Superconducting elementInfo
- Publication number
- JP2568995B2 JP2568995B2 JP60030366A JP3036685A JP2568995B2 JP 2568995 B2 JP2568995 B2 JP 2568995B2 JP 60030366 A JP60030366 A JP 60030366A JP 3036685 A JP3036685 A JP 3036685A JP 2568995 B2 JP2568995 B2 JP 2568995B2
- Authority
- JP
- Japan
- Prior art keywords
- superconducting
- semiconductor
- layer
- electrode
- impurity concentration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/10—Junction-based devices
- H10N60/128—Junction-based devices having three or more electrodes, e.g. transistor-like structures
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
Description
【発明の詳細な説明】 〔発明の利用分野〕 本発明は、極低温で動作する超電導素子に係り、特に
半導体中をトンネルする超電導あるいは常電導電子の数
を、制御電極に印加する電圧によつて制御する超電導素
子に関する。Description: FIELD OF THE INVENTION The present invention relates to a superconducting element which operates at a very low temperature, and in particular, determines the number of superconducting or normal conductors tunneling in a semiconductor by a voltage applied to a control electrode. The present invention relates to a superconducting element for controlling a superconducting element.
半導体を使用し、デバイスの特性を制御するための電
極を有する超電導デバイスとしては、T.D.Clarkによつ
て提案されたJOFET（Hybrid Josephson Field Effect T
ransistors）が月刊応用物理（J.Appl.Phys.）2736,51
（1980）に報告されており公知である。JOFETにおいて
は高濃度にドープされた半導体基板上に超電導体より成
る電極を形成するか、あるいは高純度のバツフア層上に
ドープ層を形成し、その上に超電導体より成る電極を形
成する。この場合、デバイス特性の制御は、制御電極に
電圧を印加し、反転層を制御電極側から半導体側へ拡げ
ることによつて行つている。この場合、制御電極直下に
半導体層の不純物濃度が高いために、制御電極に印加す
べき電圧は、数百ミリボルトに達するのに対して出力と
して得られる電圧はこれと同程度かあるいはこれよりも
小さく、従来の半導体技術において使用されている回路
と同様の回路を使用することはできなかつた。As a superconducting device using a semiconductor and having an electrode for controlling device characteristics, a JOFET (Hybrid Josephson Field Effect TJ) proposed by TDClark is used.
ransistors) monthly application physics (J.Appl.Phys.) 2736,51
(1980) and is well known. In a JOFET, an electrode made of a superconductor is formed on a highly doped semiconductor substrate, or a doped layer is formed on a high-purity buffer layer, and an electrode made of a superconductor is formed thereon. In this case, control of the device characteristics is performed by applying a voltage to the control electrode and expanding the inversion layer from the control electrode side to the semiconductor side. In this case, the voltage to be applied to the control electrode reaches several hundred millivolts because the impurity concentration of the semiconductor layer is high immediately below the control electrode, whereas the voltage obtained as an output is equal to or lower than this. It has not been possible to use circuits that are small and similar to those used in conventional semiconductor technology.
本発明の目的は、印加電圧で超電導電極間の結合状態
を制御する際の利得が大きい超電導素子を提供すること
にある。An object of the present invention is to provide a superconducting element having a large gain when controlling a coupling state between superconducting electrodes by an applied voltage.
本発明は、半導体層（若しくは基板）に少なくとも２
個の超電導電極を接して設けるとともに該超電導電極間
に流れる電流を制御する（超電導電極間の超電導弱給合
状態を変化させる）電極を少なくとも１個設け、かつ半
導体層に含まれる不純物の分布が、平均以上の不純物濃
度を有する少なくとも１つの高不純物濃度部と平均以下
の不純物濃度を有する少なくとも１つの低不純物濃度部
とから成り、高不純物濃度部または低不純物濃度部のど
ちらか一方が超電導電極に接するように構成するもので
ある。すなわち、超電導電極を形成する半導体層中に含
まれる不純物の濃度分布に変化を持たせることによつて
前記目的を達成するものである。The present invention provides that at least two semiconductor layers (or substrates)
And at least one electrode for controlling the current flowing between the superconducting electrodes (changing the superconducting weakly supplying state between the superconducting electrodes) and providing a distribution of impurities contained in the semiconductor layer. At least one high-impurity-concentration part having an impurity concentration above the average and at least one low-impurity-concentration part having an impurity concentration below the average, and one of the high-impurity-concentration part and the low-impurity-concentration part is a superconducting electrode. It is constituted so that it may contact. That is, the above object is achieved by changing the concentration distribution of impurities contained in the semiconductor layer forming the superconducting electrode.
従来の超電導デバイスにおける半導体層は不純物を高
濃度かつ均一に含有しているため制御電極に印加する電
圧に比して電荷の蓄積層若しくは反転層の拡がりが小さ
い。本発明においては不純物の分布に変化をつけている
ことから均一に不純物を含有している場合に比べて電荷
の蓄積層若しくは反転層の拡がりが異なり、小さな印加
電圧でも容易に蓄積層若しくは反転層を拡げることがで
き利得を大きくすることができる。Since the semiconductor layer in the conventional superconducting device contains impurities at a high concentration and uniformly, the spread of the charge storage layer or the inversion layer is smaller than the voltage applied to the control electrode. In the present invention, since the distribution of the impurities is changed, the spread of the charge accumulation layer or the inversion layer is different from that in the case where the impurities are uniformly contained, and the accumulation layer or the inversion layer can be easily formed even with a small applied voltage. And the gain can be increased.
例えば本発明の推奨される一実施例においては半導体
層の一方に２つの超電導電極を設けるとともに半導体層
の他方に絶縁膜を介して制御電極を設け、かつ半導体層
の深さ方向に濃度分布が形成されるようにし、超電導電
極は少なくとも一層の不純物層と接触しており、上記不
純物層はいずれも高不純物濃度部としている。また、制
御電極に近い側の半導体中の不純物濃度を高くし超電導
電極に近い側の半導体中の不純物濃度を低くしてもよい
このような不純物分布の場合、小さな制御電圧でも高不
純物濃度層から低不純物濃度層に電荷の蓄積層が容易に
拡がることができる。従つて、このような特性を利用す
れば超電導弱結合状態を小さな制御電圧で容易に変える
ことができ利得を大きくすることができる。一方反転層
に関しては、制御電圧が一定の値を越すまでは（すなわ
ち高不純物濃度層に反転層が拡がるまでは）反転層は拡
がりにくいが、反転層が低不純物濃度層に拡がるような
電圧になると電圧の小さな増加でも反転層は容易に拡が
るようになる。従つてこのような特性を利用すれば、制
御電圧が一定の値になるまでは殆ど特性が変化せず、そ
の後制御電圧が一定の値を越すと素子特性が急に変化す
る利得の大きい超電導素子が得られる。For example, in one preferred embodiment of the present invention, two superconducting electrodes are provided on one of the semiconductor layers, and a control electrode is provided on the other of the semiconductor layers via an insulating film, and the concentration distribution is in the depth direction of the semiconductor layer. The superconducting electrode is in contact with at least one impurity layer, and each of the impurity layers is a high impurity concentration portion. In addition, the impurity concentration in the semiconductor near the control electrode may be increased and the impurity concentration in the semiconductor near the superconducting electrode may be lowered. The charge storage layer can easily spread over the low impurity concentration layer. Therefore, by utilizing such characteristics, the superconducting weak coupling state can be easily changed with a small control voltage, and the gain can be increased. On the other hand, with respect to the inversion layer, the inversion layer is difficult to spread until the control voltage exceeds a certain value (that is, until the inversion layer spreads to the high impurity concentration layer), but the voltage is such that the inversion layer spreads to the low impurity concentration layer. Thus, the inversion layer can easily spread even with a small increase in voltage. Therefore, if such characteristics are used, the characteristics hardly change until the control voltage reaches a constant value, and thereafter, when the control voltage exceeds a certain value, the element characteristics change suddenly. Is obtained.
以下、本発明の実施例を図面により詳細に説明する。
第１図に本発明の一実施例を示す。Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 shows an embodiment of the present invention.
（100）方位のSi単結晶基板１上に、分子線エピタキ
シー法あるいは気相成長法によってホウ素を不純物とし
て1016〜1018cm-3程度含んだ低不純物濃度層２が形成さ
れる。表面を清浄化処理したのち、続いてその上にホウ
素を加速電圧70KeVで1015cm-2の密度でイオン打込み
し、900℃において窒素中で35分間のアニールを行っ
た。この処理によって厚さ約200nmの高不純物濃度層３
が形成される。低不純物濃度層２に含まれる不純物ホウ
素の量は、高不純物濃度層３に含まれる不純物ホウ素の
量よりも少なくなるように選ぶ。半導体がSiの場合不純
物濃度は、低下純物濃度層では1014〜1016cm-3程度，高
不純物濃度層では1016〜1019程度であることが望まし
い。A low impurity concentration layer 2 containing about 10 16 to 10 18 cm -3 of boron as an impurity is formed on a (100) oriented Si single crystal substrate 1 by molecular beam epitaxy or vapor phase epitaxy. After the surface was cleaned, boron was ion-implanted thereon at an acceleration voltage of 70 KeV at a density of 10 15 cm −2 and annealed at 900 ° C. in nitrogen for 35 minutes. By this process, a high impurity concentration layer 3 having a thickness of about 200 nm is formed.
Is formed. The amount of the impurity boron contained in the low impurity concentration layer 2 is selected so as to be smaller than the amount of the impurity boron contained in the high impurity concentration layer 3. When the semiconductor is Si, the impurity concentration is desirably about 10 14 to 10 16 cm −3 in the reduced pure substance concentration layer and about 10 16 to 10 19 in the high impurity concentration layer.
次に常圧気相成長法によつて形成したSiO2等をマスク
としてKOH等の薬品によつてSi単結晶基板１を裏面から
エツチングする。このエツチングでは、Si単結晶の（10
0）面のエツチング速度が（111）面のエツチング速度に
比べて大きいことから、第１図に示したような形状を得
ることができる。続いてSi単結晶基板１の表面を1000℃
の純酸素中で酸化して厚さ約40nmのSiO2層４を形成し、
次にAlを抵抗加熱蒸着法により約500nm堆積させ制御電
極５とした。SiO2層４を形成した際に、低不純物濃度層
２の表面にもSiの酸化膜が成長しているので、これを化
学エツチングによつて除去し、低不純物濃度層２の表面
を清浄化する。この清浄化した低不純物濃度層２上に厚
さ約300nmのNbをDCマグネトロンスパツタリング法によ
つて堆積させ、これを厚さ約350nmの電子線レジストの
パターンをマスクとして反応性イオンエツチング法によ
つて加工して、第１の超電導電極６及び第２の超電導電
極７とした。第１及び第２の超電導電極の電極間距離
は、半導体の材料がSiの場合にあつては、0.2μｍ以下
であることが望ましい。以上によつて本発明の超電導素
子を作製することができた。制御電極に近い側に低不純
物濃度層を、超電導電極に近い側に高不純物濃度層を設
けた場合にも小さな制御電圧で、電荷の反転層若しくは
蓄積層が低不純物濃度層に容易に拡がるので利得を大き
くすることができる。尚、この場合にはある一定の電圧
以上になると反転層・蓄積層は高不純物濃度層の中を拡
がるようになるので、反転層・蓄積層はそれ以上拡がり
にくくなり素子特性の変化が小さくなるという性質を有
する。また超電導電極側の不純物濃度が高い場合には、
半導体と超電導体との界面に存在するシヨツトキ障壁の
高さと幅を低減し、超電導電極から半導体中への電子の
しみ出しを容易にするという効果を生ずる。この場合に
は、第１および第２の超電導電極の空間的な距離を従来
よりも長くして良いために、素子の作製が容易になる。Then etching the SiO 2 or the like which have been conducted under the form at normal gas phase growth method Yotsute Si single crystal substrate 1 to chemicals such as KOH from the back surface as a mask. In this etching, (10
Since the etching speed of the (0) plane is higher than that of the (111) plane, the shape shown in FIG. 1 can be obtained. Subsequently, the surface of the Si single crystal substrate 1 is heated to 1000 ° C.
Is oxidized in pure oxygen to form a SiO 2 layer 4 having a thickness of about 40 nm,
Next, Al was deposited to a thickness of about 500 nm by resistance heating evaporation to form a control electrode 5. When the SiO 2 layer 4 was formed, an Si oxide film was also grown on the surface of the low impurity concentration layer 2. This was removed by chemical etching to clean the surface of the low impurity concentration layer 2. I do. Nb having a thickness of about 300 nm is deposited on the cleaned low-impurity-concentration layer 2 by a DC magnetron sputtering method. The Nb is deposited by a reactive ion etching method using an electron beam resist pattern having a thickness of about 350 nm as a mask. Thus, a first superconducting electrode 6 and a second superconducting electrode 7 were formed. The distance between the electrodes of the first and second superconducting electrodes is desirably 0.2 μm or less when the semiconductor material is Si. As described above, the superconducting element of the present invention was manufactured. Even when a low impurity concentration layer is provided near the control electrode and a high impurity concentration layer is provided near the superconducting electrode, the charge inversion layer or the accumulation layer easily spreads to the low impurity concentration layer with a small control voltage. The gain can be increased. In this case, when the voltage exceeds a certain level, the inversion layer / accumulation layer spreads in the high impurity concentration layer, so that the inversion layer / accumulation layer hardly spreads further and the change in element characteristics is reduced. It has the property of When the impurity concentration on the superconducting electrode side is high,
The effect of reducing the height and width of a shot barrier present at the interface between the semiconductor and the superconductor and facilitating the exudation of electrons from the superconducting electrode into the semiconductor is produced. In this case, the spatial distance between the first and second superconducting electrodes can be made longer than in the conventional case, so that the device can be easily manufactured.
第２図に本発明の他の実施例を示す。この実施例では
不純物濃度の低い部分が半導体層の中央に位置するよう
になつている。すなわち、第１図に示す実施例と同様に
形成した低不純物濃度層２上に分子線エピタキシー法等
によつて高不純物濃度層３′を形成している。この実施
例の場合、前述の実施例（制御電極側に低不純物濃度層
を設け超電導電極側に高不純物濃度層を設けた実施例）
の効果を併せ持つ。すなわち、利得が大きく、素子の作
成が容易となる。FIG. 2 shows another embodiment of the present invention. In this embodiment, the portion having a low impurity concentration is located at the center of the semiconductor layer. That is, a high impurity concentration layer 3 'is formed on the low impurity concentration layer 2 formed in the same manner as the embodiment shown in FIG. 1 by a molecular beam epitaxy method or the like. In the case of this embodiment, the above-described embodiment (an embodiment in which a low impurity concentration layer is provided on the control electrode side and a high impurity concentration layer is provided on the superconducting electrode side).
It has the effect of That is, the gain is large, and the device can be easily manufactured.
第３図に本発明の他の実施例であり、超電導電極を形
成する半導体層の面と同じ側に制御電極を設けた場合を
示す。不純物としてリンを1012cm-3含んだSi基板上301
に分子線エピタキシー法によつてリンを1013cm-3含んだ
低不純物濃度層302,リンを1015cm-3含んだ高不純物濃度
層303,リンを1013cm-3含んだ低不純物濃度層302′を形
成する。次いで500℃の低温でSiO2を形成しパターン化
したのち、これをマスクとしてリンをイオン打ち込み
し、高不純物濃度層を形成する。このリンをイオン打ち
込みした高不純物濃度層面上にNbを約200nmスパツタし
たのち、マスクとして用いたSiO2層をエツチングにより
除去する。このようにして超電導電極306,307を形成す
る。続いてO2プラズマの酸化によりSiO2膜304を形成
し、最後に厚さ500nmのAl蒸着膜により成る制御電極305
を形成する。FIG. 3 shows another embodiment of the present invention, in which a control electrode is provided on the same side as the surface of the semiconductor layer on which the superconducting electrode is formed. 301 on Si substrate containing 10 12 cm -3 of phosphorus as impurity
A low impurity concentration contained 10 13 cm -3 to Yotsute phosphorus in the molecular beam epitaxy on layer 302, the high impurity concentration layer 303 containing phosphorus 10 15 cm -3, a low impurity concentration, including phosphorus 10 13 cm -3 A layer 302 'is formed. Next, after SiO 2 is formed and patterned at a low temperature of 500 ° C., phosphorus is ion-implanted using the SiO 2 as a mask to form a high impurity concentration layer. After about 200 nm of Nb is sputtered on the surface of the high impurity concentration layer into which phosphorus is ion-implanted, the SiO 2 layer used as a mask is removed by etching. Thus, superconducting electrodes 306 and 307 are formed. Subsequently, an SiO 2 film 304 is formed by oxidation of O 2 plasma, and finally, a control electrode 305 formed of a 500 nm thick Al vapor-deposited film.
To form
これまで述べた実施例においては、超電導電極を２つ
含んだ場合について説明したが、超電導電極の数は３つ
又はそれ以上であつても良い。制御電極の数についても
同様である。例えば第４図に示すように３つの超電導電
極を有する超電導素子の場合でも本発明の効果を得られ
る。このような超電導素子は超電導電極の形成と加工の
際の形状が異なるだけで、他は第１図に説明した実施例
と全く同様の工程によつて作製できる。406,406′はソ
ース超電導電極,407はドレイン超電導電極に対応する。
このようなデバイスは、１つの素子で、２つの素子を並
列に接続した場合と同じ効果を有し、回路の集積度を向
上させることができる利点がある。In the embodiments described so far, the case where two superconducting electrodes are included has been described. However, the number of superconducting electrodes may be three or more. The same applies to the number of control electrodes. For example, even in the case of a superconducting element having three superconducting electrodes as shown in FIG. 4, the effect of the present invention can be obtained. Such a superconducting element can be manufactured by exactly the same steps as those of the embodiment described with reference to FIG. 1, except that the shape of the superconducting electrode during forming and processing is different. 406 and 406 'correspond to the source superconducting electrode, and 407 corresponds to the drain superconducting electrode.
Such a device has the same effect as a case where two elements are connected in parallel with one element, and has an advantage that the degree of integration of a circuit can be improved.
また、以上の実施例においては、不純物濃度の差を層
全体にわたって設けた場合または高不純物濃度部を半導
体層のある部分に限定した超電導電極の直下を含む範囲
に限定して高不純物濃度部を設けたが、不純物濃度の差
を階段上に設けずに徐々に変化するように設けても同様
の効果が得られる。Further, in the above embodiment, when the difference in impurity concentration is provided over the entire layer, or the high impurity concentration portion is limited to a range including immediately below the superconducting electrode in which the high impurity concentration portion is limited to a certain portion of the semiconductor layer, the high impurity concentration portion is reduced. However, the same effect can be obtained even if the difference in impurity concentration is provided so as to change gradually without being provided on the steps.
また以上説明した実施例においては半導体材料にSi単
結晶を用いたが、アモルフアル状あるいは多結晶状のSi
を用いても本発明の目的を達することができる。またSi
に替えてGe,GaAs,InAs,InP,InSb等の材料を用いても良
い。超電導電極の材料としてはNbの他にPb及びPbを主成
分とする合金,NbN,Nb3Sn，Nb3Al，Nb3Ge等のNb化合物を
用いても同様の効果が得られる。制御電極の材料につい
てもAlに限ることなくPb等の超電導金属を用いても同様
の効果が得られる。また絶縁膜を介して制御電極を設け
ているがシヨツトキ障壁を介して制御電極を形成しても
良い。Further, in the above-described embodiment, a silicon single crystal is used as a semiconductor material, but an amorphous or polycrystalline Si
Can achieve the object of the present invention. Also Si
Alternatively, a material such as Ge, GaAs, InAs, InP, and InSb may be used. Alloy as the superconducting electrode material composed mainly of Pb and Pb in addition to Nb, NbN, Nb 3 Sn, Nb 3 Al, the same effect be used Nb compound such as Nb 3 Ge is obtained. The same effect can be obtained by using a superconducting metal such as Pb without limiting the material of the control electrode to Al. Although the control electrode is provided via the insulating film, the control electrode may be formed via a shot barrier.
第５図に参考のために本発明に係る超電導素子の使用
例を示す。FIG. 5 shows a usage example of the superconducting element according to the present invention for reference.
本発明の超電導素子は液体ヘリウム温度あるいはそれ
に近い極低温環境において使用され、低消費電力で高速
のスイツチングを実現できる。このため本発明の超電導
素子によつて演算装置を作ると、小型でしかも高速の処
理が実現できる。第５図はこの特長を利用して構成され
たもので、核磁気共鳴を用いた人体の医用診断装置のた
めの画像信号処理装置を示している。該診断装置におい
て、磁場の発生用に液体ヘリウムを使つた超電導マグネ
ツト21が用いられており、液体ヘリウムの供給には小型
の液体ヘリウム冷凍機22が使用されている。この装置に
断熱器23に入つた本発明の超電導素子を使つた演算装置
24を用いると、従来の半導体素子による演算装置を用い
た場合に比べて複雑な画像信号の処理が５〜10倍程度高
速になり患者の診断に要する時間が低減されるととも
に、より高度な画像の処理が可能となり診断に対してよ
り多くの適切な情報を提供できるようになる。また、こ
のときの演算装置に用いられる液体ヘリウムの量はほと
んど無視できる程の増加で済む。尚第５図において、液
体ヘリウムは冷凍機22より配管31,32を通つて供給され
ている。また、核磁気共鳴信号34は信号検出器25から演
算装置24へ送られ、処理された画像信号はケーブル35を
通して表示器26に出力される。また、マグネツト21の制
御も演算装置24からの信号33を送ることにより行つてい
る。本使用例においては、マグネツト21と演算装置24と
は別の断熱容器に収納されているが、これを同一の断熱
の容器に収納しても良い。本使用例では、医用診断装置
について述べたが、同様の効果は、液体ヘリウムを使用
した装置の制御，あるいは信号処理について、一般的に
得ることができるものである。The superconducting element of the present invention is used in a liquid helium temperature or a very low temperature environment close to the temperature, and can realize high-speed switching with low power consumption. Therefore, when an arithmetic unit is formed by using the superconducting element of the present invention, a small and high-speed processing can be realized. FIG. 5 shows an image signal processing apparatus for a medical diagnostic apparatus for a human body using nuclear magnetic resonance, which is constructed by utilizing this feature. In the diagnostic apparatus, a superconducting magnet 21 using liquid helium is used for generating a magnetic field, and a small liquid helium refrigerator 22 is used for supplying liquid helium. An arithmetic unit using the superconducting element of the present invention in the heat insulator 23 in this device.
With the use of 24, processing of complex image signals is about 5 to 10 times faster than in the case of using a conventional arithmetic device using semiconductor elements, and the time required for patient diagnosis is reduced. And more appropriate information for diagnosis can be provided. Further, the amount of liquid helium used in the arithmetic unit at this time can be almost negligibly increased. In FIG. 5, liquid helium is supplied from the refrigerator 22 through pipes 31 and 32. The nuclear magnetic resonance signal 34 is sent from the signal detector 25 to the arithmetic unit 24, and the processed image signal is output to the display 26 through the cable 35. The control of the magnet 21 is also performed by sending a signal 33 from the arithmetic unit 24. In this use example, the magnet 21 and the arithmetic unit 24 are housed in separate heat-insulating containers, but they may be housed in the same heat-insulating container. In this use example, the medical diagnostic apparatus has been described, but the same effect can be generally obtained in control of an apparatus using liquid helium or signal processing.
〔発明の効果〕 本発明によれば、超電導電極に接触する不純物層を高
濃度層とすることにより、半導体と超電導体との界面に
存在するショットキ障壁の高さと幅を低減し、超電導電
極から半導体中への電子のしみ出しを容易にすることが
できる。[Effects of the Invention] According to the present invention, the height and width of the Schottky barrier existing at the interface between the semiconductor and the superconductor are reduced by making the impurity layer in contact with the superconducting electrode a high-concentration layer. The exudation of electrons into the semiconductor can be facilitated.
第１図〜第３図はそれぞれ本発明の一実施例である超電
導素子の断面図、第４図は本発明の一実施例である超電
導素子の平面図、第５図は本発明に係る超電導素子の使
用方法の参考例を示すブロツク図である。 1,301……Si単結晶基板、2,302,302′……低不純物濃度
層、3,3′,303……高不純物濃度層、4,304……SiO2層、
5,305……制御電極、6,306……第１の超電導電極、7,30
7……第２の超電導電極。1 to 3 are sectional views of a superconducting element according to one embodiment of the present invention, FIG. 4 is a plan view of a superconducting element according to one embodiment of the present invention, and FIG. 5 is a superconducting element according to the present invention. It is a block diagram which shows the reference example of the usage of an element. 1,301 ... Si single crystal substrate, 2,302,302 '... Low impurity concentration layer, 3,3', 303 ... High impurity concentration layer, 4,304 ... SiO 2 layer,
5,305: Control electrode, 6,306: First superconducting electrode, 7,30
7 Second superconducting electrode.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 川辺 潮 国分寺市東恋ヶ窪１丁目280番地 株式 会社日立製作所中央研究所内 (72)発明者 原田 豊 国分寺市東恋ヶ窪１丁目280番地 株式 会社日立製作所中央研究所内 (72)発明者 青木 正明 国分寺市東恋ヶ窪１丁目280番地 株式 会社日立製作所中央研究所内 (56)参考文献 特開 昭59−103389（ＪＰ，Ａ) Ｊ．Ａｐｐｌ．Ｐｈｙｓ．51（５）, Ｍａｙ 1980，ＰＰ．2736−2743 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Shio Kawabe 1-280 Higashi-Koigabo, Kokubunji-shi, Hitachi, Ltd. Central Research Laboratory Co., Ltd. 72) Inventor Masaaki Aoki 1-280 Higashi-Koigabo, Kokubunji-shi Inside the Central Research Laboratory, Hitachi, Ltd. (56) References JP-A-59-103389 (JP, A) Appl. Phys. 51 (5), May 1980, PP. 2736-2743
Claims (6)
半導体領域と、該半導体領域に電気的に接続された２つ
の超電導電極と、該半導体領域に生じる該超電導電極間
の電流を制御するように形成された制御電極を含み、上
記半導体領域は上記制御電極に向けて不純物濃度の異な
る半導体層を積層して形成され且つ該半導体層を構成す
る半導体材料は略同一であることを特徴とする超電導素
子。1. A semiconductor region comprising a semiconductor layer formed including impurities, two superconducting electrodes electrically connected to the semiconductor region, and a current generated between the superconducting electrodes in the semiconductor region. Wherein the semiconductor region is formed by laminating semiconductor layers having different impurity concentrations toward the control electrode, and the semiconductor material constituting the semiconductor layer is substantially the same. Superconducting element.
電導電極が形成されている側に形成されていることを特
徴とする特許請求の範囲第１項に記載の超電導素子。2. The superconducting element according to claim 1, wherein said control electrode is formed on a side of said semiconductor region on which said superconducting electrode is formed.
電導電極が形成されている側の反対側に形成されている
ことを特徴とする特許請求の範囲第１項に記載の超電導
素子。3. The superconducting element according to claim 1, wherein said control electrode is formed on a side of said semiconductor region opposite to a side on which said superconducting electrode is formed.
印加することにより該半導体領域に電荷を誘起し、上記
超電導電極間の超電導弱結合状態を制御することを特徴
とする特許請求の範囲第１項乃至第３項のいずれかに記
載の超電導素子。4. The control electrode according to claim 1, wherein a voltage is applied to said semiconductor region to induce a charge in said semiconductor region to control a superconducting weak coupling state between said superconducting electrodes. 4. A superconducting element according to any one of items 1 to 3.
る半導体層は、同じ導電型であることを特徴とする特許
請求の範囲第１項に記載の超電導素子。5. The superconducting element according to claim 1, wherein the semiconductor layers having different impurity concentrations in the semiconductor regions have the same conductivity type.
は、同じ不純物元素を含むことを特徴とする特許請求の
範囲第５項に記載の超電導素子。6. The superconducting element according to claim 5, wherein said semiconductor layers having different impurity concentrations contain the same impurity element.
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60030366A JP2568995B2 (en) | 1985-02-20 | 1985-02-20 | Superconducting element |
| EP95104470A EP0667645A1 (en) | 1984-11-05 | 1985-11-04 | Superconducting device |
| DE3588086T DE3588086T2 (en) | 1984-11-05 | 1985-11-04 | Superconductor arrangement |
| EP85308009A EP0181191B1 (en) | 1984-11-05 | 1985-11-04 | Superconducting device |
| US07/073,408 US4884111A (en) | 1984-11-05 | 1987-07-13 | Superconducting device |
| US07/412,201 US5126801A (en) | 1984-11-05 | 1989-09-25 | Superconducting device |
| US07/875,431 US5311036A (en) | 1984-11-05 | 1992-04-29 | Superconducting device |
| US08/201,410 US5442196A (en) | 1984-11-05 | 1994-02-24 | Superconducting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60030366A JP2568995B2 (en) | 1985-02-20 | 1985-02-20 | Superconducting element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61190990A JPS61190990A (en) | 1986-08-25 |
| JP2568995B2 true JP2568995B2 (en) | 1997-01-08 |
Family
ID=12301862
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60030366A Expired - Lifetime JP2568995B2 (en) | 1984-11-05 | 1985-02-20 | Superconducting element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2568995B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR200485150Y1 (en) | 2017-07-18 | 2017-12-04 | 선일터미날주식회사 | Bucket device for loading and unloading |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59103389A (en) * | 1982-12-04 | 1984-06-14 | Nippon Telegr & Teleph Corp <Ntt> | Superconductive element and manufacture thereof |
-
1985
- 1985-02-20 JP JP60030366A patent/JP2568995B2/en not_active Expired - Lifetime
Non-Patent Citations (1)
| Title |
|---|
| Ｊ．Ａｐｐｌ．Ｐｈｙｓ．５１（５），Ｍａｙ １９８０，ＰＰ．２７３６−２７４３ |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR200485150Y1 (en) | 2017-07-18 | 2017-12-04 | 선일터미날주식회사 | Bucket device for loading and unloading |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61190990A (en) | 1986-08-25 |
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