JP2567066B2 - Method for manufacturing semiconductor light emitting device - Google Patents
Method for manufacturing semiconductor light emitting deviceInfo
- Publication number
- JP2567066B2 JP2567066B2 JP25868488A JP25868488A JP2567066B2 JP 2567066 B2 JP2567066 B2 JP 2567066B2 JP 25868488 A JP25868488 A JP 25868488A JP 25868488 A JP25868488 A JP 25868488A JP 2567066 B2 JP2567066 B2 JP 2567066B2
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- mask
- emitting device
- inp
- semiconductor light
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Weting (AREA)
- Semiconductor Lasers (AREA)
- Led Devices (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は光通信等に用いられる発光ダイオード半導体
レーザといった半導体発光素子の製造方法に関する。The present invention relates to a method for manufacturing a semiconductor light emitting device such as a light emitting diode semiconductor laser used for optical communication and the like.
従来より行われていたこの種の半導体発光素子の製造
方法につき、メサ型端面発光ダイオードを例にとり、第
３図を用いて説明する。まず、第３図（ａ）においてｎ
型InP基板１上にエピタキシャル成長法によりｎ型InPバ
ッファ層２、InGaAsP活性層３、ｐ型InPクラッド層４、
ｐ型InGaAsPキャップ層５を連続的に成長した後、フォ
トリソグラフィによりメサエッチに用いるマスク６を形
成する。次に、第３図（ｂ）においてエッチングを行っ
てメサ構造を形成した後、第３図（ｃ）においてマスク
６を除去した後、結晶表面を軽くエッチングしてから電
流狭窄用の絶縁膜７を付着せしめる。最後に第３図
（ｄ）において、フォトリソグラフィにより通電用の開
口部９を設けてからｐ側電極８を形成し、続いてｎ型In
P基板１の裏面研磨を行った後ｎ側電極10を形成して全
工程が終了する。A conventional method of manufacturing a semiconductor light emitting device of this type will be described with reference to FIG. 3 by taking a mesa type edge emitting diode as an example. First, in FIG. 3 (a), n
N-type InP buffer layer 2, InGaAsP active layer 3, p-type InP clad layer 4, by epitaxial growth on the InP substrate 1.
After continuously growing the p-type InGaAsP cap layer 5, a mask 6 used for mesa etching is formed by photolithography. Next, after etching is performed in FIG. 3B to form a mesa structure, the mask 6 is removed in FIG. 3C, the crystal surface is lightly etched, and then the insulating film 7 for current confinement is formed. Attach. Finally, in FIG. 3D, an opening 9 for energization is provided by photolithography, and then a p-side electrode 8 is formed, followed by n-type In.
After the back surface of the P substrate 1 is polished, the n-side electrode 10 is formed and the whole process is completed.
上述した従来のメサ型端面発光ダイオードの製造にお
いては、第３図（ｃ）において、絶縁膜７を付着する直
前に結晶表面を清浄化するために、通常よく用いられる
硫酸，過酸化水素及び水よりなるエッチャントを用いて
いるために、メサ側面においてInPとInGaAsPとのエッチ
ングレートの差に伴うくびれが生じていた。このくびれ
の部分は絶縁膜７の付着不良が発生しやすく、そのため
に、しばしば素子の電流−電圧特性における逆方向耐圧
劣化を生じていた。In the production of the above-mentioned conventional mesa-type edge-emitting diode, sulfuric acid, hydrogen peroxide, and water which are often used in order to clean the crystal surface immediately before the insulating film 7 is attached in FIG. 3 (c). Because of the use of the etchant consisting of the above, a constriction was generated on the side surface of the mesa due to the difference in etching rate between InP and InGaAsP. Insufficient adhesion of the insulating film 7 is apt to occur in the constricted portion, which often causes reverse breakdown voltage deterioration in the current-voltage characteristics of the element.
本発明は結晶表面清浄化のためのエッチャントの組成
を適正化してくびれの発生を抑制し上述の問題点を解決
して特性の良い発光素子を得ることを目的としている。An object of the present invention is to optimize the composition of an etchant for cleaning the crystal surface, suppress the occurrence of constriction, solve the above-mentioned problems, and obtain a light emitting device with good characteristics.
本発明に基づく半導体発光素子の製造方法は、InP基
板上にInP及びInGaAsPよりなるダブルへテロ構造を有す
る多層構造を形成したエピタキシャルウェハー表面にフ
ォトリソグラフィによって選択的にマスクを設けてから
エッチングを行って多層構造中にメサ構造を形成する工
程と、マスクを除去した後、容積比0.1％程度の臭素を
含んだメタノールあるいはエタノール液によりウェハー
表面を処理する工程を含むことを特徴とする構成になっ
ている。A method for manufacturing a semiconductor light emitting device according to the present invention is performed by selectively providing a mask by photolithography on the surface of an epitaxial wafer on which a multilayer structure having a double hetero structure composed of InP and InGaAsP is formed on an InP substrate and then performing etching. To form a mesa structure in the multilayer structure, and after removing the mask, the wafer surface is treated with a methanol or ethanol solution containing bromine at a volume ratio of about 0.1%. ing.
〔実施例１〕 次に、本発明について図面を参照して説明する。First Embodiment Next, the present invention will be described with reference to the drawings.
第１図は本発明の一実施例を示すものであり、メサ型
端面発光ダイオードの製造工程に本発明を適用したもの
である。まず第１図（ａ）においてｎ型InP基板１上に
エピタキシャル成長法によりｎ型InPバッファ層２、InG
aAsP活性層３、ｐ型InPクラッド層４、ｐ型InGaAsPキャ
ップ層５を連続的に成長した後フォトリソグラフィによ
りメサエッチに用いるマスク６を形成する。次に第１図
（ｂ）において、臭素，メタノール及びリン酸からなる
エッチャントを用いてエッチングを行いメサ構造を形成
した後、第１図（ｃ）においてマスク６を除去してから
容積比で0.1％程度の臭素を含む室温で静止状態のメタ
ノール液あるいはエタノール液中にウェハーを20secあ
るいは40sec程度放置して結晶表面を軽くエッチングし
て清浄化した後、電流狭窄用の絶縁膜７を付着せしめ
る。臭素を含むメタノールあるいはエタノール液は、In
P及びInGaAsPに対するエッチングレートがほぼ等しいた
めに、メサ側面をエッチングしてもくびれを発生しな
い。なお、前述の条件下での結晶表面のエッチング量は
約0.1μｍであり、メサ構造を損ねることはない。この
後第１図（ｄ）においてフォトリソグラフィにより通電
用の開口部９を設けてからｐ側電極８を形成し、続いて
ｎ型InP基板１の裏面研磨を行った後ｎ側電極10を形成
して工程が終了する。FIG. 1 shows one embodiment of the present invention, in which the present invention is applied to a manufacturing process of a mesa type edge emitting diode. First, in FIG. 1A, the n-type InP buffer layer 2 and InG are formed on the n-type InP substrate 1 by an epitaxial growth method.
After the aAsP active layer 3, the p-type InP clad layer 4, and the p-type InGaAsP cap layer 5 are continuously grown, a mask 6 used for mesa etching is formed by photolithography. Next, in FIG. 1B, etching is performed using an etchant composed of bromine, methanol and phosphoric acid to form a mesa structure, and then the mask 6 is removed in FIG. % Of bromine at room temperature in a stationary methanol solution or ethanol solution for about 20 sec or 40 sec to allow the crystal surface to be lightly etched and cleaned, and then an insulating film 7 for current confinement is attached. Excuse me. The bromine-containing methanol or ethanol solution is In
Since the etching rates for P and InGaAsP are almost equal, constriction does not occur even if the side surface of the mesa is etched. The amount of etching of the crystal surface under the above-mentioned conditions is about 0.1 μm and does not impair the mesa structure. After that, in FIG. 1D, an opening 9 for energization is provided by photolithography, then a p-side electrode 8 is formed, and subsequently, a back surface of the n-type InP substrate 1 is polished, and then an n-side electrode 10 is formed. Then the process is completed.
〔実施例２〕 第２図は本発明のもう１つの実施例を示すものであ
り、エッチトミラーを有する半導体レーザの製造工程に
本発明を適用したものである。まず第２図（ａ）におい
てｎ側InP基板１上にエピタキシャル成長法によりｎ側I
nPバッファ層２、InGaAsP活性層３、ｐ型InPクラッド層
４、ｐ型InGaAsPキャップ層５を連続的に成長した後フ
ォトリソグラフィによりエッチトミラー形成用のマスク
６を形成する。次に第２図（ｂ）において塩素イオンを
主成分とする反応性イオンビーム11によってエッチング
を行いエッチトミラー12を形成する。この時エッチトミ
ラー12の表面にはイオン衝撃によってダメージ層13が生
ずる。次に第２図（ｃ）においてマスク６を除去した
後、容積比で0.1％程度の臭素を含む室温で静止状態の
メタノール液あるいはエタノール液中にウェハーを放置
して結晶表面を軽くエッチングすることによりダメージ
層13を除去する。臭素を含むメタノールあるいはエタノ
ール液はInP及びInGaAsPに対するエッチングレートがほ
ぼ等しいので、エッチトミラー12と表面に段差を発生さ
せることなくダメージ層13を除去することができる。こ
れに対し従来技術ではエッチトミラー12表面の段差発生
に伴うレーザ光の発光パターン異常の発生が不可能であ
ったためにダメージ層13を除去するためのエッチングを
行えず、これが原因で素子特性及び信頼性上の問題を生
じていた。最後に第２図（ｄ）においてｐ型電極８を設
けてから、ｎ側InP基板１の裏面研磨を行った後ｎ側電
極10を形成して工程が終了する。[Embodiment 2] FIG. 2 shows another embodiment of the present invention, in which the present invention is applied to a manufacturing process of a semiconductor laser having an etched mirror. First, in FIG. 2 (a), an n-side I is formed on the n-side InP substrate 1 by an epitaxial growth method.
After the nP buffer layer 2, the InGaAsP active layer 3, the p-type InP clad layer 4 and the p-type InGaAsP cap layer 5 are continuously grown, a mask 6 for forming an etched mirror is formed by photolithography. Next, in FIG. 2B, etching is performed by the reactive ion beam 11 containing chlorine ions as a main component to form an etched mirror 12. At this time, a damaged layer 13 is formed on the surface of the etched mirror 12 by ion bombardment. Next, in FIG. 2 (c), after removing the mask 6, the crystal surface is lightly etched by allowing the wafer to stand in a methanol solution or an ethanol solution which is stationary at room temperature and contains about 0.1% by volume of bromine. The damage layer 13 is removed by. The bromine-containing methanol or ethanol solution has almost the same etching rate for InP and InGaAsP, so that the damaged layer 13 can be removed without causing a step difference between the etched mirror 12 and the surface. On the other hand, in the prior art, since it was impossible to generate an abnormal light emission pattern of the laser beam due to the occurrence of a step on the surface of the etched mirror 12, it was not possible to perform etching for removing the damaged layer 13, which caused the device characteristics and It was causing reliability problems. Finally, in FIG. 2D, after the p-type electrode 8 is provided, the back surface of the n-side InP substrate 1 is polished and then the n-side electrode 10 is formed to complete the process.
以上説明したように本発明は、InP基板上にInP及びIn
GaAsPよりなるダブルヘテロ構造を有するエピタキシャ
ルウェハーを用いた半導体発光素子の製造において、電
流閉じこめのためのメサエッチ後行われる電流狭窄用の
絶縁膜付着の直前に必要となるウェハー表面清浄化のた
めの処理を、InPとInGaAsPに対して等速エッチが可能な
希薄臭素メタノール液あるいはエタノール液中で行うこ
とによりメサ側面のくびれの発生を抑制して絶縁膜付着
不良を回避し、素子の逆方向耐圧劣化を防止する効果を
生じる。更に本発明は、上述のものと同様のダブルヘテ
ロ構造を有するInPウェハーを用いたエッチトミラーを
有する半導体レーザの製造において、エッチトミラー形
成のための反応性イオンビームエッチング後のエッチト
ミラー表面のイオン衝撃によるダメージ層を、希釈メタ
ノール液あるいはエタノール液でヘテロ界面の段差を生
ずることなく除去することを可能ならしめる。これによ
ってレーザ光の発光パターンを損ねることなく、素子特
性及び信頼性の安定した半導体レーザを製造できるとい
う効果を生ずる。As described above, the present invention provides InP and In on the InP substrate.
In the production of semiconductor light emitting devices using an epitaxial wafer having a double heterostructure made of GaAsP, a treatment for cleaning the wafer surface, which is required immediately before deposition of an insulating film for current confinement performed after mesa etching for current confinement Is performed in a dilute bromine methanol solution or ethanol solution that can etch InP and InGaAsP at a constant rate, thereby suppressing the occurrence of constriction on the side of the mesa, avoiding defective adhesion of the insulating film, and degrading the reverse breakdown voltage of the device. The effect of preventing. Furthermore, the present invention is directed to the production of a semiconductor laser having an etched mirror using an InP wafer having a double heterostructure similar to that described above, in which the etched mirror surface after reactive ion beam etching for forming the etched mirror is used. The layer damaged by the ion bombardment can be removed with a diluted methanol solution or ethanol solution without causing a step at the hetero interface. This produces an effect that a semiconductor laser having stable device characteristics and reliability can be manufactured without damaging the emission pattern of laser light.
なお、本発明の実施例においては、端面発光ダイオー
ド及び半導体レーザの製造をとり上げたが、面発光ダイ
オードの製造に対しても本発明を適用することができ
る。Although the manufacturing of the edge emitting diode and the semiconductor laser is described in the embodiment of the present invention, the present invention can be applied to the manufacturing of the surface emitting diode.
第１図は本発明の第一の実施例を示す製造工程図、第２
図は本発明の第２の実施例を示す製造工程図、第３図は
従来の製造工程図である。 １……ｎ型InP基板、２……ｎ型InPバッファ層、３……
InGaAsP活性層、４……ｐ型InPクラッド層、５……ｐ型
InGaAsPキャップ層、６……マスク、７……絶縁膜、８
……ｐ側電極、９……開口部、10……ｎ側電極、11……
反応性イオンビーム、12……エッチトミラー。FIG. 1 is a manufacturing process diagram showing a first embodiment of the present invention, and FIG.
FIG. 3 is a manufacturing process diagram showing a second embodiment of the present invention, and FIG. 3 is a conventional manufacturing process diagram. 1 ... n-type InP substrate, 2 ... n-type InP buffer layer, 3 ...
InGaAsP active layer, 4 ... p type InP clad layer, 5 ... p type
InGaAsP cap layer, 6 ... Mask, 7 ... Insulating film, 8
...... p-side electrode, 9 ... opening, 10 ... n-side electrode, 11 ...
Reactive ion beam, 12 ... Etched mirror.
Claims (1)
ルへテロ構造を有する多層構造を形成したエピタキシャ
ルウェハーの表面にフォトリソグラフィによって選択的
にマスクを設けてから、第１の溶液によるウェットエッ
チングまたはドライエッチングを行ってメサ構造を形成
する工程と、前記マスクを除去する工程と、前記第１の
溶液とは異なる第２の溶液を用いてマスクが除去された
ウェハー表面を清浄化する処理を行う工程とを含む半導
体発光素子の製造方法において、前記第２の溶液は、容
積比で0.1％程度の臭素を含んだメタノールあるいはエ
タノール液であることを特徴とする半導体発光素子の製
造方法。1. A mask is selectively provided by photolithography on the surface of an epitaxial wafer in which a multilayer structure having a double hetero structure made of InP and InGaAsP is formed on an InP substrate, and then wet etching with a first solution or Dry etching is performed to form a mesa structure, the mask is removed, and a second solution different from the first solution is used to clean the surface of the wafer from which the mask is removed. In the method for manufacturing a semiconductor light emitting device, the second solution is a methanol or ethanol solution containing about 0.1% by volume of bromine.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25868488A JP2567066B2 (en) | 1988-10-13 | 1988-10-13 | Method for manufacturing semiconductor light emitting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25868488A JP2567066B2 (en) | 1988-10-13 | 1988-10-13 | Method for manufacturing semiconductor light emitting device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02105474A JPH02105474A (en) | 1990-04-18 |
| JP2567066B2 true JP2567066B2 (en) | 1996-12-25 |
Family
ID=17323664
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25868488A Expired - Fee Related JP2567066B2 (en) | 1988-10-13 | 1988-10-13 | Method for manufacturing semiconductor light emitting device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2567066B2 (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59231885A (en) * | 1983-06-14 | 1984-12-26 | Hitachi Ltd | Optical semiconductor device |
| JPS62118584A (en) * | 1985-11-19 | 1987-05-29 | Matsushita Electric Ind Co Ltd | Manufacture of optical semiconductor device |
| JPS63261773A (en) * | 1987-04-17 | 1988-10-28 | Fujitsu Ltd | Semiconductor light-emitting device and manufacture thereof |
-
1988
- 1988-10-13 JP JP25868488A patent/JP2567066B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02105474A (en) | 1990-04-18 |
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