JP2527015B2 - Method for manufacturing semiconductor film - Google Patents

Method for manufacturing semiconductor film

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Publication number
JP2527015B2
JP2527015B2 JP63285419A JP28541988A JP2527015B2 JP 2527015 B2 JP2527015 B2 JP 2527015B2 JP 63285419 A JP63285419 A JP 63285419A JP 28541988 A JP28541988 A JP 28541988A JP 2527015 B2 JP2527015 B2 JP 2527015B2
Authority
JP
Japan
Prior art keywords
film
sio
polycrystalline
opening
cavity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP63285419A
Other languages
Japanese (ja)
Other versions
JPH02130916A (en
Inventor
裕希 藤本
厚志 小椋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63285419A priority Critical patent/JP2527015B2/en
Publication of JPH02130916A publication Critical patent/JPH02130916A/en
Application granted granted Critical
Publication of JP2527015B2 publication Critical patent/JP2527015B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Recrystallisation Techniques (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体膜の製造方法に関するものである。TECHNICAL FIELD The present invention relates to a method for manufacturing a semiconductor film.

〔従来の技術〕[Conventional technology]

従来から用いられてきた半導体膜の製造方法では、Si
O2膜を所定の部分に形成し所定の領域の半導体層を露出
した部分にのみ選択的にエピタキシャル成長を行い、さ
らにSiO2膜上へ横方向に過剰成長を行う方法が知られて
いる(J.Appl.Phys.55(2)15,January 1984,p.519,Co
ntrol of lateral epitaxial chemical vapor depositi
on of silicon over insulators)。
In the conventional method of manufacturing a semiconductor film,
A method is known in which an O 2 film is formed in a predetermined portion, and epitaxial growth is selectively performed only in a portion where a semiconductor layer in a predetermined region is exposed, and further overgrowth is laterally formed on a SiO 2 film (J .Appl.Phys.55 (2) 15, January 1984, p.519, Co
ntrol of lateral epitaxial chemical vapor depositi
on of silicon over insulators).

〔発明が解決しようとする課題〕[Problems to be Solved by the Invention]

従来の技術では基板表面に形成した非晶質絶縁膜上へ
過剰成長を行って横方向へ半導体を形成してSOI(Semic
onductor On Insulator)の構造を得る場合、不必要な
縦方向へも成長が進行するため薄い成長膜を得ることが
できない。
In the conventional technology, over-growth is performed on the amorphous insulating film formed on the substrate surface to form a semiconductor in the lateral direction, and SOI (Semic
When obtaining an on-ductor-on-insulator structure, a thin growth film cannot be obtained because the growth progresses in the unnecessary vertical direction.

本発明の目的は、この問題を解決した半導体膜の製造
方法を提供することにある。
An object of the present invention is to provide a method for manufacturing a semiconductor film that solves this problem.

〔課題を解決するための手段〕[Means for solving the problem]

上記目的を達成するために、本発明は、p型シリコン
基板上に第1のSiO2膜を形成したのち、前記p型シリコ
ン基板を露出する第1の開口部を形成し、この第1の開
口部のみに選択的に第1のエピタキシャル成長Si膜の成
長を行い、第1のSiO2膜上には多結晶Si膜を、第1のエ
ピタキシャル成長Si膜上へは単結晶Si膜を分子線エピタ
キシャル成長法により同時に形成し、第1のSiO2膜上の
多結晶Si膜に空洞領域を確保し、前記多結晶Si膜,単結
晶Si膜上に第2のSiO2膜を形成し、この第2のSiO2膜に
前記多結晶Si膜が露出するように第2の開口部を形成
し、第1,第2のSiO2膜に挟まれた前記多結晶Si膜を第2
の開口部からエッチングを行い空洞部を形成し、この空
洞部に選択的に第2のエピタキシャル成長Si膜を横方向
に成長させるようにしたものである。
In order to achieve the above object, the present invention forms a first SiO 2 film on a p-type silicon substrate and then forms a first opening exposing the p-type silicon substrate. The first epitaxially grown Si film is selectively grown only in the openings, and the polycrystalline Si film is grown on the first SiO 2 film and the single crystal Si film is grown on the first epitaxially grown Si film by molecular beam epitaxial growth. simultaneously formed by law, to ensure cavity region polycrystalline Si film on the first SiO 2 film, the polycrystalline Si film, the second SiO 2 film is formed on a single crystal Si film, the second A second opening is formed in the SiO 2 film to expose the polycrystalline Si film, and the polycrystalline Si film sandwiched between the first and second SiO 2 films is formed into a second opening.
Etching is performed from the opening to form a cavity, and the second epitaxially grown Si film is selectively grown in the cavity in the cavity.

〔作用〕[Action]

従来の半導体膜を製造する技術では、縦方向に必要以
上に成長し薄い成長膜を得ることができない。これは原
料ガス濃度分布が縦横両方ともほぼ同じ濃度の条件で成
長が行われるためで、結晶の成長速度の面方位依存性が
生じている。この結果、縦と横との成長面を異なる面と
して選んだ場合でも、各面の成長速度の比が縦横比と同
じ値となって、それ以上大きな縦横比は得られなくな
る。
With the conventional technique for manufacturing a semiconductor film, it is impossible to obtain a thin grown film by growing more than necessary in the vertical direction. This is because the growth is performed under the condition that the source gas concentration distribution is substantially the same in both the vertical and horizontal directions, and the crystal growth rate is dependent on the plane orientation. As a result, even when the vertical and horizontal growth planes are selected as different planes, the growth rate ratio of each plane becomes the same value as the aspect ratio, and a larger aspect ratio cannot be obtained.

これに対し本発明では、あらかじめ設定した縦横比を
有する空洞部分を形成することによって、その空洞部分
にのみ選択的にエピタキシャル成長を行うことにより、
必要な縦横比の膜厚の半導体膜の成長を行うことを可能
にしている。
On the other hand, in the present invention, by forming a cavity portion having a preset aspect ratio, by selectively performing epitaxial growth only in the cavity portion,
This makes it possible to grow a semiconductor film having a required aspect ratio.

〔実施例〕〔Example〕

以下、この発明の実施例を模式図を用いて説明する。
第1図は実施例の工程段階を示す断面模式図である。
Embodiments of the present invention will be described below with reference to schematic diagrams.
FIG. 1 is a schematic sectional view showing a process step of an example.

第1図(a)に示すように、p型シリコン基板12の表
面に第1のSiO2膜14を酸化温度950℃,ウェット酸化に
よって〜5000Å形成する。
As shown in FIG. 1 (a), a first SiO 2 film 14 is formed on the surface of the p-type silicon substrate 12 by wet oxidation at an oxidation temperature of 950 ° C. up to 5000 Å.

つぎに第1図(b)に示すように、リソグラフィ技術
によって第1のSiO2膜14に第1の開口部15を形成し、p
型シリコン基板12を露出させ、第1の開口部15にのみ選
択的に第1のエピタキシャル成長Si膜13を、成長温度85
0℃,SiH2Cl2流量300cc/min,HCl流量500cc/min,圧力30T
orrで成長させる。
Next, as shown in FIG. 1 (b), a first opening 15 is formed in the first SiO 2 film 14 by a lithography technique, and p
The type silicon substrate 12 is exposed, and the first epitaxially grown Si film 13 is selectively formed only at the first opening 15 at a growth temperature of 85.
0 ℃, SiH 2 Cl 2 flow rate 300cc / min, HCl flow rate 500cc / min, pressure 30T
Grow with orr.

つぎに第1図(c)に示すように、Si分子線エピタキ
シャル成長法によって成長温度650℃,成長中の真空度
2×10-10で成長を行うと、単結晶である第1のエピタ
キシャル成長Si膜13上には単結晶Si膜18を、第1のSiO2
膜14上へは多結晶Si膜17を堆積することができる。この
方法によって多結晶Si膜17,単結晶Si膜18を〜3000Å堆
積する。
Then, as shown in FIG. 1 (c), when the growth is performed at a growth temperature of 650 ° C. and a vacuum degree of 2 × 10 −10 during the growth by the Si molecular beam epitaxial growth method, the first epitaxially grown Si film which is a single crystal is obtained. A single crystal Si film 18 is formed on the first SiO 2 film 13.
A polycrystalline Si film 17 can be deposited on the film 14. By this method, the polycrystalline Si film 17 and the single crystal Si film 18 are deposited up to 3000 Å.

つぎに第1図(d)に示すように、リングラフィ技術
によって必要とする横方向の大きさに多結晶Si膜17を島
状に形成する。
Next, as shown in FIG. 1 (d), a polycrystalline Si film 17 is formed in an island shape in a required lateral size by the linography technique.

つぎに第1図(e)に示すように、多結晶Si膜17,単
結晶Si膜18を含む基板全面に第2のSiO2膜19を堆積し、
リソグラフィ技術によって第2のSiO2膜19に第2の開口
部21を形成し、基板温度850℃,HCl流量500cc/min,圧力3
0Torrで多結晶Si膜17のみ選択的にガスエッチングを行
いあらかじめ設定した縦横比の空洞部分23を形成する。
Next, as shown in FIG. 1 (e), a second SiO 2 film 19 is deposited on the entire surface of the substrate including the polycrystalline Si film 17 and the single crystal Si film 18,
The second opening 21 is formed in the second SiO 2 film 19 by the lithography technique, the substrate temperature is 850 ° C., the HCl flow rate is 500 cc / min, and the pressure is 3
Gas etching is selectively performed only on the polycrystalline Si film 17 at 0 Torr to form a cavity portion 23 having a preset aspect ratio.

つぎに第1図(f)に示すように、空洞部分23に選択
的に横方向の第2のエピタキシャル成長Si膜25を成長温
度850℃,SiH2Cl2流量300cc/min,HCl流量500cc/min,圧
力30Torrで成長させる。
Next, as shown in FIG. 1 (f), a second epitaxial growth Si film 25 in the lateral direction is selectively formed in the cavity 23 at a growth temperature of 850 ° C., a SiH 2 Cl 2 flow rate of 300 cc / min, and an HCl flow rate of 500 cc / min. Grow at a pressure of 30 Torr.

最後に第1図(g)に示すように、第2のSiO2膜19を
剥離すると薄くて所望の面積を有する半導体膜を形成す
ることができる。
Finally, as shown in FIG. 1 (g), by peeling off the second SiO 2 film 19, a thin semiconductor film having a desired area can be formed.

以上の実施例において空洞部を形成する方法として、
ガスエッチングを利用したが、多結晶膜のみ選択的にエ
ッチングすることができるような他の方法(たとえばウ
ェットエッチング等)によっても形成することが可能な
ことはいうまでもない。
As a method of forming the cavity in the above embodiment,
Although gas etching is used, it goes without saying that it can also be formed by another method capable of selectively etching only a polycrystalline film (for example, wet etching).

〔発明の効果〕〔The invention's effect〕

本発明を適用するならば、酸化膜上へ必要な膜厚の単
結晶半導体膜を形成することが可能となる。
If the present invention is applied, it becomes possible to form a single crystal semiconductor film having a required film thickness on an oxide film.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例による半導体膜の作成工程を
示した断面模式図である。 12……p型シリコン基板 13……第1のエピタキシャル成長Si膜 14……第1のSiO2膜 15……第1の開口部 17……多結晶Si膜 18……単結晶Si膜 19……第2のSiO2膜 21……第2の開口部 23……空洞部分 25……第2のエピタキシャル成長Si膜
FIG. 1 is a schematic sectional view showing a process of forming a semiconductor film according to an embodiment of the present invention. 12 …… p-type silicon substrate 13 …… first epitaxially grown Si film 14 …… first SiO 2 film 15 …… first opening 17 …… polycrystalline Si film 18 …… single crystal Si film 19 …… Second SiO 2 film 21 …… Second opening 23 …… Cavity 25 …… Second epitaxially grown Si film

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】p型シリコン基板上に第1のSiO2膜を形成
したのち、前記p型シリコン基板を露出する第1の開口
部を形成し、この第1の開口部のみに選択的に第1のエ
ピタキシャル成長Si膜の成長を行い、第1のSiO2膜上に
は多結晶Si膜を、第1のエピタキシャル成長Si膜上へは
単結晶Si膜を分子線エピタキシャル成長法により同時に
形成し、第1のSiO2膜上の多結晶Si膜に空洞領域を確保
し、前記多結晶Si膜,単結晶Si膜上に第2のSiO2膜を形
成し、この第2のSiO2膜に前記多結晶Si膜が露出するよ
うに第2の開口部を形成し、第1,第2のSiO2膜に挟まれ
た前記多結晶Si膜を第2の開口部からエッチングを行い
空洞部を形成し、この空洞部に選択的に第2のエピタキ
シャル成長Si膜を横方向に成長させることを特徴とする
半導体膜の製造方法。
1. A first SiO 2 film is formed on a p-type silicon substrate, and then a first opening is formed to expose the p-type silicon substrate, and only the first opening is selectively formed. A first epitaxially grown Si film is grown, a polycrystalline Si film is simultaneously formed on the first SiO 2 film, and a single crystalline Si film is simultaneously formed on the first epitaxially grown Si film by the molecular beam epitaxial growth method. securing a cavity region polycrystalline Si film on the first SiO 2 film, the polycrystalline Si film, the second SiO 2 film is formed on a single crystal Si film, the multi this second SiO 2 film A second opening is formed so that the crystalline Si film is exposed, and the polycrystalline Si film sandwiched between the first and second SiO 2 films is etched from the second opening to form a cavity. A method of manufacturing a semiconductor film, wherein a second epitaxially grown Si film is selectively grown laterally in the cavity.
JP63285419A 1988-11-11 1988-11-11 Method for manufacturing semiconductor film Expired - Lifetime JP2527015B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63285419A JP2527015B2 (en) 1988-11-11 1988-11-11 Method for manufacturing semiconductor film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63285419A JP2527015B2 (en) 1988-11-11 1988-11-11 Method for manufacturing semiconductor film

Publications (2)

Publication Number Publication Date
JPH02130916A JPH02130916A (en) 1990-05-18
JP2527015B2 true JP2527015B2 (en) 1996-08-21

Family

ID=17691277

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63285419A Expired - Lifetime JP2527015B2 (en) 1988-11-11 1988-11-11 Method for manufacturing semiconductor film

Country Status (1)

Country Link
JP (1) JP2527015B2 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0666257B2 (en) * 1986-08-20 1994-08-24 日本電気株式会社 Method for manufacturing semiconductor film
FR2629637B1 (en) * 1988-04-05 1990-11-16 Thomson Csf METHOD FOR PRODUCING AN ALTERNATION OF LAYERS OF SINGLE-CRYSTAL SEMICONDUCTOR MATERIAL AND LAYERS OF INSULATING MATERIAL

Also Published As

Publication number Publication date
JPH02130916A (en) 1990-05-18

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