JP2516964B2 - Strain sensor - Google Patents
Strain sensorInfo
- Publication number
- JP2516964B2 JP2516964B2 JP62080547A JP8054787A JP2516964B2 JP 2516964 B2 JP2516964 B2 JP 2516964B2 JP 62080547 A JP62080547 A JP 62080547A JP 8054787 A JP8054787 A JP 8054787A JP 2516964 B2 JP2516964 B2 JP 2516964B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- strain sensor
- less
- mev
- strain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L1/00—Measuring force or stress, in general
- G01L1/20—Measuring force or stress, in general by measuring variations in ohmic resistance of solid materials or of electrically-conductive fluids; by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress
- G01L1/22—Measuring force or stress, in general by measuring variations in ohmic resistance of solid materials or of electrically-conductive fluids; by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress using resistance strain gauges
- G01L1/2287—Measuring force or stress, in general by measuring variations in ohmic resistance of solid materials or of electrically-conductive fluids; by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress using resistance strain gauges constructional details of the strain gauges
- G01L1/2293—Measuring force or stress, in general by measuring variations in ohmic resistance of solid materials or of electrically-conductive fluids; by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress using resistance strain gauges constructional details of the strain gauges of the semi-conductor type
Description
【発明の詳細な説明】 ［産業上の利用分野］ 本発明は歪センサーに関する。さらに詳しくは、Siを
含む非単結晶系半導体の電気抵抗値と歪との相関関係を
利用して歪を検出する歪センサーに関する。TECHNICAL FIELD The present invention relates to a strain sensor. More specifically, the present invention relates to a strain sensor that detects strain by utilizing the correlation between the electrical resistance value of non-single crystal semiconductor containing Si and strain.
［従来の技術］ 従来の歪センサーとして、Cu−Ni合金、Cu−Ni−Al合
金などの箔や細線を用いたもの、結晶半導体を用いたも
の、非晶質Siを用いたものなどがある。[Prior Art] Conventional strain sensors include those using foils and thin wires such as Cu-Ni alloys and Cu-Ni-Al alloys, those using crystalline semiconductors, and those using amorphous Si. .
［発明が解決しようとする問題点］ しかし、前記Cu−Ni合金、Cu−Ni−Al合金などの箔や
細線を用いた歪センサーにおいては、歪に対する抵抗変
化率、すなわちゲージ率Ｇが２〜４と小さく、増幅のた
めにアンプを必要とすること、さらにある程度大きな磁
場下、たとえば１〜10テズラー程度の磁場下で使用した
ばあいにノイズが大きくなることなどの欠点がある。[Problems to be Solved by the Invention] However, in a strain sensor using a foil or a thin wire such as the Cu-Ni alloy or Cu-Ni-Al alloy, the resistance change rate with respect to strain, that is, the gauge rate G is 2 to It is as small as 4 and requires an amplifier for amplification, and further has a drawback in that noise increases when used in a magnetic field having a relatively large magnetic field, for example, in a magnetic field of about 1 to 10 Tezlar.
一方、前記結晶半導体を用いた歪センサーにおいて
は、ゲージ率Ｇは100程度と大きいという利点がある反
面、温度変化による抵抗値の変化が大きく、しかもその
変化が非直線性であるために複雑な温度補償回路を必要
とするうえ、ある程度大きな磁場下、たとえば１〜10テ
ズラー程度の磁場下では使用できないなどの欠点があ
る。On the other hand, the strain sensor using the crystalline semiconductor has an advantage that the gauge factor G is as large as about 100, but has a large change in resistance value due to a temperature change, and the change is non-linear, which is complicated. In addition to the need for a temperature compensation circuit, it has the drawback that it cannot be used under a magnetic field of a relatively large size, for example, under a magnetic field of about 1 to 10 Tezler.
また、非晶質Siを用いた歪センサーは、ゲージ率Ｇの
絶対値が20〜40と比較的大きいという利点がある反面、
活性化エネルギーが20meV程度あるいはそれ以上と大き
いため、温度変化により抵抗値が変化しやすく、そのう
え磁場による影響が大きく、ある程度大きな磁場下、た
とえば１〜10テズラー程度の磁場下では使用できないな
どの欠点がある。Further, while the strain sensor using amorphous Si has an advantage that the absolute value of the gauge factor G is relatively large at 20 to 40,
Since the activation energy is as large as about 20 meV or more, the resistance value is likely to change due to temperature changes, and the magnetic field has a large effect, and it cannot be used under a relatively large magnetic field, for example, under a magnetic field of 1-10 Tezler. There is.
本発明者らは、前記のごとき従来の歪センサーの欠点
を解消するべく種々検討を重ねた結果、Siを含む非単結
晶系半導体にGeやSnを添加したばあいに、高磁場下にお
いてもノイズが少なくなり、さらにその本質は活性化エ
ネルギーが15meV以下であることを見出し、本発明を完
成するに至った。The present inventors have conducted various studies to eliminate the drawbacks of the conventional strain sensor as described above, and when Ge or Sn is added to the non-single crystal semiconductor containing Si, even in a high magnetic field. The present invention has been completed by finding that the noise is reduced and the essence is that the activation energy is 15 meV or less.
［問題を解決するための手段］ 本発明の歪センサーは、Siと、GeおよびSnの少なくと
も１種とを含み、暗導電率の活性化エネルギーが15meV
以下であることを特徴としている。[Means for Solving the Problem] A strain sensor of the present invention contains Si and at least one of Ge and Sn, and has an activation energy of dark conductivity of 15 meV.
It is characterized by the following.
［実施例］ 本明細書において、Siを含む半導体とは、Siを99.5〜
1atm％、好ましくは95〜50atm％程度含む半導体であ
る。[Examples] In the present specification, a semiconductor containing Si means Si from 99.5 to
It is a semiconductor containing about 1 atm%, preferably about 95 to 50 atm%.
前記Si含量が1atm％未満になるとホッピング伝導しや
すく、また99.5atm％をこえると温度変化が大きくなり
やすくなり、いずれも好ましくない。If the Si content is less than 1 atm%, hopping conduction is likely to occur, and if it exceeds 99.5 atm%, the temperature change tends to be large, which is not preferable.
前記半導体を構成するSi以外の成分としては、たとえ
ばGe、Snなどがあげられ、これらは単独で含有されてい
てもよく、２種以上含有されていてもよい。Examples of components other than Si constituting the semiconductor include Ge and Sn. These may be contained alone or in combination of two or more.
本発明の半導体は、このうちGeおよびSnの少なくとも
１種が必須成分として含まれており、これにより温度補
償回路が不要になる程度に温度変化による抵抗値の変化
が少なくなり、かつゲージ率が大きくなる。これらのメ
カニズムについては、未だ充分には解明されていない
が、非晶質半導体の短距離秩序がGeやSnによって乱され
さらに小さくなったことと、四族の元素のためにフェル
ミレベルが添加によって影響を受けないことによるもの
と推認される。In the semiconductor of the present invention, at least one of Ge and Sn is contained as an essential component, so that the change of the resistance value due to the temperature change is reduced to the extent that the temperature compensation circuit becomes unnecessary, and the gauge factor is growing. Although these mechanisms have not been fully clarified yet, the short-range order of amorphous semiconductors was disturbed by Ge and Sn and further reduced, and due to the addition of the Fermi level due to the Group 4 element. It is presumed that it was not affected.
前記GeやSnなどの含有率は、半導体中に好ましくは0.
5〜99atm％、さらに好ましくは５〜50atm％であり、こ
のような範囲のばありには−100〜＋100℃のように広い
温度域において温度補正なしに歪を測定することができ
るとともに、ゲージ率が大きくなるため好ましい。The content of Ge or Sn is preferably 0 in the semiconductor.
It is 5 to 99 atm%, more preferably 5 to 50 atm%. In such a range, strain can be measured without temperature correction in a wide temperature range such as −100 to + 100 ° C. It is preferable because the rate increases.
本発明に用いる半導体には、前記成分以外に通常のSi
系半導体に含有されているＨ、Ｆ、Cl、Br、Ｉなどの１
種以上が構成成分として含有されていてもよい。これら
ＨやＦなどのうちではＨやＦが含有されていることが低
抵抗になりやすいなどの点から好ましい。In the semiconductor used in the present invention, in addition to the above components, ordinary Si
H, F, Cl, Br, I, etc. contained in semiconductors 1
One or more species may be contained as a constituent component. Among these H and F, it is preferable that H and F are contained because the resistance tends to be low.
前記ＨやＦなどの含量としては半導体中に好ましくは
３〜20atm％含有されているのが、III族あるいはＶ族の
ドーパントでドーピングしたときに活性化エネルギーが
小さくなりやすく、好ましい。The content of H, F, etc. is preferably 3 to 20 atm% in the semiconductor, and the activation energy tends to be small when doped with a Group III or V group dopant, which is preferable.
本発明に用いるSiを含む半導体は暗導電率の活性化エ
ネルギーが15meV以下、好ましくは8meV以下の非単結晶
系半導体である。The semiconductor containing Si used in the present invention is a non-single-crystal semiconductor having an activation energy of dark conductivity of 15 meV or less, preferably 8 meV or less.
前記半導体の暗導電率の活性化エネルギーが15meVを
こえるとゲージ率Ｇの温度補正が必要となり好ましくな
い。とくに8meV以下のばあいには、温度補正が全く不要
となるため好ましい。If the activation energy of the dark conductivity of the semiconductor exceeds 15 meV, the gauge factor G needs to be corrected for temperature, which is not preferable. Especially, when it is 8 meV or less, temperature correction is not necessary at all, which is preferable.
15meVを選定する他の理由として製膜の安定性をあげ
ることができる。製膜に際し、活性化エネルギーが20me
V付近で膜の電気伝導性が急変するため、この影響を受
けずに安定的な工程に取り込める範囲として15meV以下
としている。Another reason for choosing 15 meV is the stability of film formation. Activation energy of 20me during film formation
Since the electric conductivity of the film changes rapidly near V, the range is set to 15 meV or less as a range that can be incorporated into a stable process without being affected by this.
前記暗導電率の活性化エネルギーとは、半導体の暗導
電率σ＝σ0exp（−ΔE/kT）から求められるΔＥで、温
度と導電率との関係から求められる。ここでは室温から
100℃の測定で求めている。The activation energy of dark conductivity is ΔE obtained from the dark conductivity σ = σ 0 exp (−ΔE / kT) of the semiconductor, and is obtained from the relationship between temperature and conductivity. Here from room temperature
It is calculated by measuring at 100 ℃.
本明細書における非単結晶系半導体とは、非晶質半導
体、微細結晶（たとえば50Å〜1000Åの結晶）の集合か
らなる非単結晶のものと非晶質のものとを含む半導体、
非単結晶半導体を包括する概念である。The non-single-crystal semiconductor in the present specification includes an amorphous semiconductor, a semiconductor including a non-single-crystal semiconductor composed of a set of fine crystals (for example, a crystal of 50Å to 1000Å) and an amorphous semiconductor,
It is a concept that includes non-single-crystal semiconductors.
本発明に用いる半導体が非単結晶のものと非晶質のも
のとを含む半導体のばあいには半導体に含まれる結晶相
の割合が５〜90vol％であるのが、ゲージ率Ｇが磁場か
ら受ける影響を使用にさしつかえない程度に小さくする
ために好ましく、とくに５〜25vol％の範囲であるばあ
いには、２〜12テズラー程度の磁場下でもその影響によ
る測定値の変動巾が10％以下と小さくなるため好まし
い。たとえば、活性化エネルギーΔＥが180meVのｎ型マ
イクロクリスタルシリコン膜のばあい、かかる高磁場下
においては変動巾が50％以上もあるが、本発明のばあい
は、変動巾が10％以下と小さくなる。前記結晶相の割合
はＸ線回折分析から求めることができる。When the semiconductor used in the present invention is a semiconductor including a non-single-crystal semiconductor and an amorphous semiconductor, the ratio of the crystal phase contained in the semiconductor is 5 to 90 vol%. It is preferable to reduce the effect to the extent that it can be used, and especially when it is in the range of 5 to 25 vol%, the fluctuation range of the measured value due to the effect is 10% or less even under a magnetic field of about 2 to 12 Tezler. It is preferable because it becomes smaller. For example, in the case of an n-type microcrystalline silicon film having an activation energy ΔE of 180 meV, the fluctuation range is 50% or more under such a high magnetic field, but in the case of the present invention, the fluctuation range is as small as 10% or less. Become. The ratio of the crystal phase can be determined by X-ray diffraction analysis.
前記のごとき結晶相を形成する結晶の大きさとして
は、好ましくは50〜1000Åであり、さらに好ましくは15
0〜400Åである。The size of the crystal forming the crystal phase as described above is preferably 50 to 1000Å, more preferably 15
It is 0 to 400Å.
前記結晶部分の大きさが50Å未満になると活性化エネ
ルギーが大きくなりやすくなり、1000Åを超えると、磁
場の影響を受けやすくなる傾向にある。If the size of the crystal part is less than 50Å, the activation energy tends to increase, and if it exceeds 1000Å, it tends to be easily affected by the magnetic field.
前記半導体のタイプとしては、周期表第III族または
Ｖ族の化合物でドーピングしてｐ型またはｎ型半導体に
したものが活性化エネルギーを小さくするのに好まし
い。As the type of the semiconductor, a p-type or n-type semiconductor doped with a compound of Group III or Group V of the periodic table is preferable for reducing activation energy.
なお、本発明に用いる半導体層の厚さは通常0.3〜５
μｍであり、0.5〜２μｍであるのがピンホールが少な
く均一な膜質なりやすいために好ましい。The thickness of the semiconductor layer used in the present invention is usually 0.3 to 5
μm, and 0.5 to 2 μm is preferable because pinholes are few and uniform film quality is likely to occur.
本発明に用いる半導体を形成する基板材料としては、
作製時および熱処理時の基板温度に耐えうる程度の耐熱
性を有するもので、被測定物の歪に応じて変形するもの
であればとくに限定はなく、たとえばポリイミド製のフ
ィルム、ポリパラバン酸製のフィルム、Ｑフィルムなど
の耐熱性高分子フィルムや、表面を絶縁化した金属箔な
どがあげられるが、これらに限定されるものではない。
これら基板材料のうちではポリイミドなどの耐熱性高分
子製のフィルムが、表面性がすぐれ、曲げ弾性が小さい
ために好ましく、さらにポリイミドフィルムが好まし
い。As the substrate material for forming the semiconductor used in the present invention,
There is no particular limitation as long as it has heat resistance that can withstand the substrate temperature during manufacturing and heat treatment, and is deformable depending on the strain of the measured object, for example, a film made of polyimide, a film made of polyparabanic acid. Examples thereof include heat-resistant polymer films such as Q film and Q film, and metal foils whose surfaces are insulated, but are not limited thereto.
Among these substrate materials, a film made of a heat resistant polymer such as polyimide is preferable because it has excellent surface properties and a small bending elasticity, and a polyimide film is more preferable.
前記基板の厚さについては、被測定物の歪を半導体に
つたえうるかぎりとくに限定はないが、可撓性などの点
から200μｍ以下が好ましく、75〜５μｍがさらに好ま
しい。The thickness of the substrate is not particularly limited as long as the strain of the object to be measured can be retained in the semiconductor, but is preferably 200 μm or less, more preferably 75 to 5 μm from the viewpoint of flexibility.
また、基板の表面粗さＲについてもとくに限定はない
が、Rmaxが好ましくは200Å以下、さらに好ましくは150
Å以下であるのが均質な半導体をえやすいという点から
好ましい。The surface roughness R of the substrate is not particularly limited, but Rmax is preferably 200 Å or less, more preferably 150.
It is preferably Å or less since it is easy to obtain a homogeneous semiconductor.
なお、基板の粗さを小さくし、基板の平滑性を高める
と、本発明の歪センサーの特性のばらつきが小さくなる
ため好ましい。Note that it is preferable to reduce the roughness of the substrate and increase the smoothness of the substrate because variations in characteristics of the strain sensor of the present invention are reduced.
前記のごとき本発明に用いる半導体は、たとえばSiの
Ｈ化合物やＦ化合物とGeのＨ化合物やＦ化合物およびSn
のＨ化合物やアルキル化合物の少なくとも１種とIII族
またはＶ族のドーパントを用い、通常5Torr以下の真空
下でグロー放電、マイクロ波放電、DC放電などの方法に
よって150〜300℃程度の基板上に形成される。えられる
半導体はＨやＦが通常３〜20atm％程度含有されたSiを
含む非単結晶系半導体であり、暗導電率の活性化エネル
ギーが15meV以下のものである。The semiconductor used in the present invention as described above is, for example, H compound or F compound of Si and H compound or F compound of Ge or Sn.
Of at least one H compound or alkyl compound and a Group III or V dopant, and is usually applied to a substrate at a temperature of about 150 to 300 ° C by a method such as glow discharge, microwave discharge or DC discharge under a vacuum of 5 Torr or less. It is formed. The obtained semiconductor is a non-single-crystal semiconductor containing Si in which H and F are usually contained in an amount of about 3 to 20 atm%, and the activation energy of dark conductivity is 15 meV or less.
つぎに、本発明の歪センサーを一実施例に基づいて説
明する。Next, the strain sensor of the present invention will be described based on an embodiment.
前記半導体上に少なくとも２個の電極を形成して作製
した歪センサーを測定点に取り付ける。歪の測定は抵抗
変化または定電流を流したばあいの電圧変化を測定する
ことによって行なわれる。A strain sensor manufactured by forming at least two electrodes on the semiconductor is attached to a measurement point. The strain is measured by measuring the resistance change or the voltage change when a constant current is applied.
第１図は本発明の歪センサーの一例を示す説明図であ
る。FIG. 1 is an explanatory view showing an example of the strain sensor of the present invention.
第１図において、厚さ25μのベースフィルムからなる
基板（１）上に非単結晶系半導体（２）が形成されてお
り、さらにその上に１対の電極（３）および（４）と、
もう１対の電極（５）および（６）とが互いに直交する
ように配置されている。電極（３）および（４）によ
り、矢印Ｙで示した方向の歪を測定でき、同様に電極
（５）および（６）により、矢印でＸで示した方向の歪
を測定することができる。したがって、第１図に示した
歪センサーを用いるとＸおよびＹ両方向の歪を同時に測
定することもできる。In FIG. 1, a non-single crystal semiconductor (2) is formed on a substrate (1) made of a base film having a thickness of 25 μ, and a pair of electrodes (3) and (4) is further formed thereon.
Another pair of electrodes (5) and (6) are arranged so as to be orthogonal to each other. The electrodes (3) and (4) can measure the strain in the direction indicated by the arrow Y, and similarly, the electrodes (5) and (6) can measure the strain in the direction indicated by the arrow X. Therefore, by using the strain sensor shown in FIG. 1, it is possible to simultaneously measure strains in both X and Y directions.
つぎに本発明の歪センサーを実施例に基づき具体的に
説明するが、本発明はもとよりかかる実施例にのみ限定
されるものではない。Next, the strain sensor of the present invention will be specifically described based on Examples, but the present invention is not limited to such Examples as a matter of course.
実施例１ 厚さ25μｍのポリイミド製ベースフィルム上にRFグロ
ー放電分解法によりｎ型マイクロクリスタルシリコンを
堆積させた。用いたガスはSiH410SCCM、GeH45SCCMおよ
び１％PH3/H2200SCCMの混合ガスであった。Example 1 N-type microcrystalline silicon was deposited on a 25 μm-thick polyimide base film by the RF glow discharge decomposition method. The gas used was a mixed gas of SiH 4 10 SCCM, GeH 4 5 SCCM and 1% PH 3 / H 2 200 SCCM.
えられたｎ型マイクロクリスタルシリコン上に２対の
コプラナー型電極を設けた。Two pairs of coplanar electrodes were provided on the obtained n-type microcrystalline silicon.
電極は1mm×1cmのものを1mmの間隔で対向させた。１
対はＸ方向、他の１対はこれに垂直なＹ方向の歪を検出
するものである。The electrodes were 1 mm × 1 cm and faced each other at an interval of 1 mm. 1
The pair detects the distortion in the X direction, and the other pair detects the distortion in the Y direction perpendicular to the pair.
えられたシリコン膜の活性化エネルギーΔＥは7meVで
あり、暗導電率σはσ＝6.1×10-1Ω-1cm-1であった。
また室温における抵抗値は約１×103Ωであった。えら
れた素子のゲージ率 は35を示した。The activation energy ΔE of the obtained silicon film was 7 meV, and the dark conductivity σ was σ = 6.1 × 10 -1 Ω -1 cm -1 .
The resistance value at room temperature was about 1 × 10 3 Ω. Gauge factor of the obtained element Showed 35.
実施例２ 原料ガスとしてSiH410SCCM、１％PH3/H2200SCCMおよ
びAr50SCCMからなる混合ガスを用い、厚さ25μｍのポリ
イミドからなるベースフィルム上に、対向する電極上に
Snを置きスパッターを行いながらｎ型SiSn:H合金を作製
した。Example 2 Using a mixed gas consisting of SiH 4 10SCCM, 1% PH 3 / H 2 200SCCM and Ar50SCCM as a source gas, on a base film made of polyimide having a thickness of 25 μm, on a facing electrode.
An n-type SiSn: H alloy was prepared while placing Sn and performing sputtering.
ついで実施例１と同様にして電極を設けた。えられた
合金の活性化エネルギーΔＥは5meVであり、暗導電率σ
はσ＝5.5×10-1Ω-1cm-1であった。また室温における
抵抗値は約２×103Ωであった。えられた素子のゲージ
率Ｇは32を示した。Then, an electrode was provided in the same manner as in Example 1. The activation energy ΔE of the obtained alloy is 5 meV, and the dark conductivity σ
Was σ = 5.5 × 10 −1 Ω −1 cm −1 . The resistance value at room temperature was about 2 × 10 3 Ω. The gauge factor G of the obtained element was 32.
［効 果］ 本発明の歪センサーは、ゲージ率Ｇの絶対値が大きい
ために増幅用のアンプが不要であり、温度変化による抵
抗値への影響が小さいために温度補正が不要であり、磁
場による影響をうけにくいためにある程度大きな磁場下
での歪測定にも使用可能であるという利点を有する。[Effect] The strain sensor of the present invention does not require an amplifier for amplification because the absolute value of the gauge factor G is large, and does not require temperature correction because the influence of the temperature change on the resistance value is small. Since it is less susceptible to the influence of, it has an advantage that it can be used for strain measurement under a magnetic field having a relatively large magnetic field.
第１図は本発明の歪センサーの一実施態様を示す説明図
である。 （図面の主要符号） （１）：基板 （２）：非単結晶系半導体FIG. 1 is an explanatory view showing one embodiment of the strain sensor of the present invention. (Main reference numerals in the drawing) (1): Substrate (2): Non-single crystal semiconductor
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭58−139475（ＪＰ，Ａ) 特開 昭61−63064（ＪＰ，Ａ) 特開 昭60−195402（ＪＰ，Ａ) ─────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-58-139475 (JP, A) JP-A-61-63064 (JP, A) JP-A-60-195402 (JP, A)
Claims (7)
み、暗導電率の活性化エネルギーが15meV以下である非
単結晶系半導体を用いた歪センサー。1. A strain sensor comprising a non-single crystal semiconductor containing Si and at least one of Ge and Sn and having an activation energy of dark conductivity of 15 meV or less.
が8meV以下である特許請求の範囲第１項記載の歪センサ
ー。2. The strain sensor according to claim 1, wherein the activation energy of dark conductivity of the semiconductor is 8 meV or less.
を含む特許請求の範囲第１項または第２項記載の歪セン
サー。3. The strain sensor according to claim 1 or 2, wherein the semiconductor contains at least one of H and F.
求の範囲第１項、第２項または第３項記載の歪センサ
ー。4. The strain sensor according to claim 1, 2, or 3, wherein the semiconductor is p-type or n-type.
Å以下の平滑なポリイミドフィルムである特許請求の範
囲第１項、第２項、第３項または第４項記載の歪センサ
ー。5. The surface roughness Rmax of the semiconductor substrate is 200.
The strain sensor according to claim 1, 2, 3, or 4, which is a smooth polyimide film having a thickness of Å or less.
特許請求の範囲第１項、第２項、第３項、第４項または
第５項記載の歪センサー。6. The strain sensor according to claim 1, claim 2, claim 3, claim 4, claim 5 or claim 5, wherein 5 to 90 vol% of the semiconductor is a crystalline phase.
特許請求の範囲第６項記載の歪センサー。7. The strain sensor according to claim 6, wherein 5 to 25 vol% of the semiconductor is a crystalline phase.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62080547A JP2516964B2 (en) | 1987-03-31 | 1987-03-31 | Strain sensor |
| US07/295,969 US4937550A (en) | 1987-03-31 | 1988-03-30 | Strain sensor |
| PCT/JP1988/000320 WO1992005585A1 (en) | 1987-03-31 | 1988-03-30 | Distortion sensor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62080547A JP2516964B2 (en) | 1987-03-31 | 1987-03-31 | Strain sensor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63245962A JPS63245962A (en) | 1988-10-13 |
| JP2516964B2 true JP2516964B2 (en) | 1996-07-24 |
Family
ID=13721371
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62080547A Expired - Lifetime JP2516964B2 (en) | 1987-03-31 | 1987-03-31 | Strain sensor |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP2516964B2 (en) |
| WO (1) | WO1992005585A1 (en) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019065752A1 (en) * | 2017-09-29 | 2019-04-04 | ミネベアミツミ株式会社 | Strain gauge and sensor module |
| JP2019066454A (en) * | 2017-09-29 | 2019-04-25 | ミネベアミツミ株式会社 | Strain gauge and sensor module |
| JP2019066312A (en) | 2017-09-29 | 2019-04-25 | ミネベアミツミ株式会社 | Strain gauge |
| JP2019066453A (en) | 2017-09-29 | 2019-04-25 | ミネベアミツミ株式会社 | Strain gauge |
| JP6793103B2 (en) | 2017-09-29 | 2020-12-02 | ミネベアミツミ株式会社 | Strain gauge |
| JP2019066313A (en) | 2017-09-29 | 2019-04-25 | ミネベアミツミ株式会社 | Strain gauge |
| JP2019113411A (en) * | 2017-12-22 | 2019-07-11 | ミネベアミツミ株式会社 | Strain gauge and sensor module |
| JP2019184344A (en) | 2018-04-05 | 2019-10-24 | ミネベアミツミ株式会社 | Strain gauge and manufacturing method therefor |
| JPWO2020085247A1 (en) | 2018-10-23 | 2021-09-16 | ミネベアミツミ株式会社 | Accelerator pedal, steering, door, door opening and closing system |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5721813A (en) * | 1980-07-15 | 1982-02-04 | Semiconductor Energy Lab Co Ltd | Forming method for film |
| JPS5767020A (en) * | 1980-10-15 | 1982-04-23 | Agency Of Ind Science & Technol | Thin silicon film and its manufacture |
| JPS58139475A (en) * | 1982-02-15 | 1983-08-18 | Anritsu Corp | Strain gauge |
| JPS60195402A (en) * | 1984-03-16 | 1985-10-03 | Fuji Electric Corp Res & Dev Ltd | Strain gauge |
| JPS6163064A (en) * | 1984-09-03 | 1986-04-01 | Matsushita Electric Ind Co Ltd | Thin film strain sensor |
-
1987
- 1987-03-31 JP JP62080547A patent/JP2516964B2/en not_active Expired - Lifetime
-
1988
- 1988-03-30 WO PCT/JP1988/000320 patent/WO1992005585A1/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| WO1992005585A1 (en) | 1992-04-02 |
| JPS63245962A (en) | 1988-10-13 |
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