JP2022136831A - Electronic component mounting board and printed circuit board - Google Patents

Electronic component mounting board and printed circuit board Download PDF

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JP2022136831A
JP2022136831A JP2021036628A JP2021036628A JP2022136831A JP 2022136831 A JP2022136831 A JP 2022136831A JP 2021036628 A JP2021036628 A JP 2021036628A JP 2021036628 A JP2021036628 A JP 2021036628A JP 2022136831 A JP2022136831 A JP 2022136831A
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wiring
conductive pad
thickness
electronic component
printed circuit
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徹 立石
Toru Tateishi
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Mitsubishi Electric Corp
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
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    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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Abstract

To provide an electronic component mounting board and a printed circuit board capable of suppressing mechanical breakage of an electronic component and performance deterioration of the electronic component even when bending stress is applied to the printed circuit board.SOLUTION: An electronic component mounting board 1 includes a printed circuit board 2 and an electronic component 20. The printed circuit board 2 includes a first conductive pad 11a, a first wiring 12a, a second conductive pad 11b, and a second wiring 12b. The thickness t11 of a first mounting portion 16a of the first conductive pad 11a is smaller than the thickness t12 of the first wiring 12a. The thickness t21 of a second mounting portion 16b of the second conductive pad 11b is smaller than the thickness t22 of the second wiring 12b.SELECTED DRAWING: Figure 3

Description

本開示は、電子部品実装基板及びプリント回路基板に関する。 The present disclosure relates to electronic component mounting boards and printed circuit boards.

特開平９－１３５０７０号公報（特許文献１）は、ランドパターンと、ランドパターンから引き出されている配線パターンとを備えるプリント基板が開示されている。コンデンサまたは抵抗のようなチップ部品がランドパターンにはんだ付けされている。 Japanese Patent Laying-Open No. 9-135070 (Patent Document 1) discloses a printed circuit board including a land pattern and a wiring pattern drawn out from the land pattern. Chip components such as capacitors or resistors are soldered to the land pattern.

特開平９－１３５０７０号公報JP-A-9-135070

特許文献１に開示されたプリント基板では、プリント基板に曲げ応力が印加されたときに、電子部品にクラックが発生する等のために、電子部品が機械的に破壊される、または、電子部品の性能が劣化する。本開示は、上記の課題を鑑みてなされたものであり、その目的は、プリント回路基板に曲げ応力が印加されても電子部品の機械的な破壊及び電子部品の性能の劣化が抑制され得る電子部品実装基板及びプリント回路基板を提供することである。 In the printed circuit board disclosed in Patent Document 1, when a bending stress is applied to the printed circuit board, cracks occur in the electronic components, and the electronic components are mechanically destroyed or damaged. Performance degrades. The present disclosure has been made in view of the above problems, and an object of the present disclosure is to provide an electronic device capable of suppressing mechanical destruction of electronic components and performance deterioration of electronic components even when bending stress is applied to a printed circuit board. It is to provide a component mounting board and a printed circuit board.

本開示の電子部品実装基板は、プリント回路基板と、第１電極と第２電極とを含む電子部品と、第１導電接合部材と、第２導電接合部材とを備える。プリント回路基板は、絶縁基材と、第１導電パッドと、第１配線と、第２導電パッドと、第２配線とを含む。絶縁基材は、主面を含む。第１導電パッドと第１配線と第２導電パッドと第２配線とは、絶縁基材の主面上に設けられている。第１配線は、第１導電パッドから引き出されている。第２導電パッドは、第１導電パッドから離間されている。第２配線は、第２導電パッドから引き出されている。第１導電パッドは、電子部品の第１電極がマウントされ得る第１マウント部を含む。第２導電パッドは、電子部品の第２電極がマウントされ得る第２マウント部を含む。電子部品の第１電極は、第１導電接合部材を用いて、第１マウント部に固定されている。電子部品の第２電極は、第２導電接合部材を用いて、第２マウント部に固定されている。第１マウント部の厚さは、第１配線の厚さより小さい。第２マウント部の厚さは、第２配線の厚さより小さい。 An electronic component mounting board of the present disclosure includes a printed circuit board, an electronic component including a first electrode and a second electrode, a first conductive joint member, and a second conductive joint member. The printed circuit board includes an insulating substrate, a first conductive pad, a first trace, a second conductive pad and a second trace. The insulating substrate includes a major surface. The first conductive pad, the first wiring, the second conductive pad, and the second wiring are provided on the main surface of the insulating substrate. The first wiring is drawn out from the first conductive pad. The second conductive pad is spaced from the first conductive pad. The second wiring is drawn out from the second conductive pad. The first conductive pad includes a first mount on which a first electrode of the electronic component can be mounted. The second conductive pad includes a second mount on which a second electrode of the electronic component can be mounted. A first electrode of the electronic component is fixed to the first mount portion using a first conductive joining member. A second electrode of the electronic component is fixed to the second mount portion using a second conductive joining member. The thickness of the first mount portion is smaller than the thickness of the first wiring. The thickness of the second mount portion is smaller than the thickness of the second wiring.

本開示のプリント回路基板は、絶縁基材と、第１導電パッドと、第１配線と、第２導電パッドと、第２配線とを備える。絶縁基材は、主面を含む。第１導電パッドと第１配線と第２導電パッドと第２配線とは、絶縁基材の主面上に設けられている。第１配線は、第１導電パッドから引き出されている。第２導電パッドは、第１導電パッドから離間されている。第２配線は、第２導電パッドから引き出されている。第１導電パッドは、電子部品の第１電極がマウントされ得る第１マウント部を含む。第２導電パッドは、電子部品の第２電極がマウントされ得る第２マウント部を含む。第１マウント部の厚さは、第１配線の厚さより小さい。第２マウント部の厚さは、第２配線の厚さより小さい。 A printed circuit board of the present disclosure includes an insulating substrate, a first conductive pad, a first trace, a second conductive pad, and a second trace. The insulating substrate includes a major surface. The first conductive pad, the first wiring, the second conductive pad, and the second wiring are provided on the main surface of the insulating substrate. The first wiring is drawn out from the first conductive pad. The second conductive pad is spaced from the first conductive pad. The second wiring is drawn out from the second conductive pad. The first conductive pad includes a first mount on which a first electrode of the electronic component can be mounted. The second conductive pad includes a second mount on which a second electrode of the electronic component can be mounted. The thickness of the first mount portion is smaller than the thickness of the first wiring. The thickness of the second mount portion is smaller than the thickness of the second wiring.

そのため、プリント回路基板に曲げ応力が印加されたときに電子部品に印加される応力が減少する。本開示の電子部品実装基板及びプリント回路基板によれば、プリント回路基板に曲げ応力が印加されても、電子部品の機械的な破壊及び電子部品の性能の劣化が抑制され得る。 Therefore, the stress applied to the electronic component is reduced when bending stress is applied to the printed circuit board. According to the electronic component mounting board and the printed circuit board of the present disclosure, even if bending stress is applied to the printed circuit board, mechanical breakage of the electronic component and deterioration of the performance of the electronic component can be suppressed.

実施の形態１の電子部品実装基板及びプリント回路基板の概略斜視図である。1 is a schematic perspective view of an electronic component mounting board and a printed circuit board according to Embodiment 1; FIG. 実施の形態１のプリント回路基板の概略斜視図である。1 is a schematic perspective view of a printed circuit board according to Embodiment 1; FIG. 実施の形態１の電子部品実装基板及びプリント回路基板の概略断面図である。1 is a schematic cross-sectional view of an electronic component mounting board and a printed circuit board according to Embodiment 1; FIG. 曲げ応力が印加されている実施例１、実施例２及び比較例の電子部品実装基板及びプリント回路基板の概略平面図である。1 is a schematic plan view of an electronic component mounting board and a printed circuit board of Examples 1, 2 and Comparative Example to which a bending stress is applied; FIG. 曲げ応力が印加されている実施例１、実施例２及び比較例の電子部品実装基板及びプリント回路基板の概略断面図である。1 is a schematic cross-sectional view of an electronic component mounting board and a printed circuit board of Examples 1, 2, and Comparative Example to which a bending stress is applied; FIG. 実施の形態２の電子部品実装基板及びプリント回路基板の概略断面図である。FIG. 10 is a schematic cross-sectional view of an electronic component mounting board and a printed circuit board according to Embodiment 2; 実施の形態２のプリント回路基板の概略平面図である。FIG. 5 is a schematic plan view of a printed circuit board according to Embodiment 2; 実施の形態２の第１変形例のプリント回路基板の概略平面図である。FIG. 11 is a schematic plan view of a printed circuit board of a first modified example of the second embodiment; 実施の形態２の第２変形例のプリント回路基板の概略平面図である。FIG. 11 is a schematic plan view of a printed circuit board of a second modification of the second embodiment; 実施の形態２の第３変形例のプリント回路基板の概略平面図である。FIG. 11 is a schematic plan view of a printed circuit board of a third modified example of the second embodiment; 実施の形態２の第４変形例のプリント回路基板の概略平面図である。FIG. 11 is a schematic plan view of a printed circuit board of a fourth modification of the second embodiment;

以下、本開示の実施の形態を説明する。なお、同一の構成には同一の参照番号を付し、その説明は繰り返さない。 Embodiments of the present disclosure will be described below. In addition, the same reference numerals are given to the same configurations, and the description thereof will not be repeated.

実施の形態１．
図１から図３を参照して、本実施の形態の電子部品実装基板１を説明する。電子部品実装基板１は、プリント回路基板２と、電子部品２０と、第１導電接合部材３１ａと、第２導電接合部材３１ｂとを主に備える。 Embodiment 1.
An electronic component mounting board 1 according to the present embodiment will be described with reference to FIGS. 1 to 3. FIG. The electronic component mounting board 1 mainly includes a printed circuit board 2, an electronic component 20, a first conductive joint member 31a, and a second conductive joint member 31b.

図１及び図３に示されるように、電子部品２０は、本体部２２と、第１電極２１ａと、第２電極２１ｂとを含む。電子部品２０は、例えば、チップ部品である。電子部品２０は、例えば、セラミックコンデンサ、抵抗素子または半導体素子である。 As shown in FIGS. 1 and 3, the electronic component 20 includes a body portion 22, a first electrode 21a, and a second electrode 21b. The electronic component 20 is, for example, a chip component. Electronic component 20 is, for example, a ceramic capacitor, a resistive element, or a semiconductor element.

プリント回路基板２は、絶縁基材３と、第１導電パッド１１ａと、第１配線１２ａと、第２導電パッド１１ｂと、第２配線１２ｂとを含む。 The printed circuit board 2 includes an insulating substrate 3, a first conductive pad 11a, a first wiring 12a, a second conductive pad 11b, and a second wiring 12b.

図１から図３を参照して、絶縁基材３は、主面３ａを含む。絶縁基材３の主面３ａは、ｘ方向と、ｘ方向に垂直なｙ方向とに沿って延在している。絶縁基材３の厚さ方向は、ｘ方向及びｙ方向に垂直なｚ方向である。絶縁基材３は、例えば、ＣＥＭ－３基材のようなガラスコンポジット基材であってもよい。ガラスコンポジット基材は、例えば、ガラス不織布にエポキシ樹脂を含浸させて、エポキシ樹脂を熱硬化させることによって形成される。絶縁基材３は、例えば、ＦＲ－４基材のようなガラスエポキシ基材であってもよい。ガラスエポキシ基材は、例えば、ガラス織布にエポキシ樹脂を含浸させて、エポキシ樹脂を熱硬化させることによって形成される。 Referring to FIGS. 1 to 3, insulating base material 3 includes main surface 3a. The main surface 3a of the insulating base material 3 extends along the x-direction and the y-direction perpendicular to the x-direction. The thickness direction of the insulating base material 3 is the z-direction perpendicular to the x-direction and the y-direction. The insulating substrate 3 may be, for example, a glass composite substrate such as a CEM-3 substrate. The glass composite substrate is formed, for example, by impregnating a glass nonwoven fabric with an epoxy resin and thermally curing the epoxy resin. The insulating substrate 3 may be, for example, a glass epoxy substrate such as an FR-4 substrate. The glass epoxy substrate is formed, for example, by impregnating a woven glass fabric with an epoxy resin and thermally curing the epoxy resin.

第１導電パッド１１ａは、絶縁基材３の主面３ａ上に設けられている。第１導電パッド１１ａは、例えば、銅またはアルミニウムのような金属材料で形成されている金属層である。第１導電パッド１１ａは、電子部品２０の第１電極２１ａがマウントされ得る第１マウント部１６ａを含む。電子部品２０の第１電極２１ａは、第１導電接合部材３１ａを用いて、第１マウント部１６ａに固定されている。第１導電接合部材３１ａは、特に限定されないが、例えば、はんだである。第１マウント部１６ａは、第１導電パッド１１ａの全体にわたって延在してもよい。すなわち、第１導電パッド１１ａの全体が第１マウント部１６ａであってもよい。 The first conductive pad 11 a is provided on the main surface 3 a of the insulating base material 3 . The first conductive pad 11a is, for example, a metal layer made of a metal material such as copper or aluminum. The first conductive pad 11a includes a first mount portion 16a on which the first electrode 21a of the electronic component 20 can be mounted. A first electrode 21a of the electronic component 20 is fixed to the first mount portion 16a using a first conductive joint member 31a. The first conductive joining member 31a is not particularly limited, but is solder, for example. The first mount portion 16a may extend over the entire first conductive pad 11a. That is, the entire first conductive pad 11a may be the first mount portion 16a.

第１マウント部１６ａの厚さｔ11は、第１配線１２ａの厚さｔ12より小さい。そのため、プリント回路基板２に曲げ応力が印加されたときに電子部品２０に印加される応力が減少する。プリント回路基板２に曲げ応力が印加されても、電子部品２０の機械的な破壊及び電子部品２０の性能の劣化が抑制され得る。第１マウント部１６ａの厚さｔ11は、例えば、第１配線１２ａの厚さｔ12の７５％以下であってもよく、第１配線１２ａの厚さｔ12の６０％以下であってもよく、第１配線１２ａの厚さｔ12の５０％以下であってもよく、第１配線１２ａの厚さｔ12の４０％以下であってもよく、第１配線１２ａの厚さｔ12の３０％以下であってもよい。第１マウント部１６ａの厚さｔ11は、例えば、９μｍ以上であってもよい。そのため、第１マウント部１６ａは、安定的に形成され得る。 The thickness t 11 of the first mount portion 16a is smaller than the thickness t 12 of the first wiring 12a. Therefore, when bending stress is applied to the printed circuit board 2, the stress applied to the electronic component 20 is reduced. Even if bending stress is applied to the printed circuit board 2 , mechanical breakage of the electronic component 20 and deterioration of the performance of the electronic component 20 can be suppressed. The thickness t 11 of the first mount portion 16a may be, for example, 75% or less of the thickness t 12 of the first wiring 12a, or may be 60% or less of the thickness t 12 of the first wiring 12a. It may be 50% or less of the thickness t 12 of the first wiring 12a, or 40% or less of the thickness t 12 of the first wiring 12a . It may be 30% or less. The thickness t 11 of the first mount portion 16a may be, for example, 9 μm or more. Therefore, the first mount portion 16a can be stably formed.

第１配線１２ａより薄い第１マウント部１６ａは、例えば、第１配線１２ａと同じ厚さを有する導電層を形成した後に、当該導電層の一部をエッチングすることよって形成されてもよい。第１マウント部１６ａより厚い第１配線１２ａは、第１マウント部１６ａと同じ厚さを有する導電層を形成した後に、当該導電層の一部上に別の導電層を追加することによって形成されてもよい。 The first mount portion 16a thinner than the first wiring 12a may be formed, for example, by forming a conductive layer having the same thickness as the first wiring 12a and then partially etching the conductive layer. The first wiring 12a thicker than the first mount portion 16a is formed by forming a conductive layer having the same thickness as the first mount portion 16a and then adding another conductive layer on part of the conductive layer. may

第１配線１２ａは、絶縁基材３の主面３ａ上に設けられている。第１配線１２ａは、第１導電パッド１１ａから引き出されている。第１配線１２ａは、特に限定されないが、例えば、第２導電パッド１１ｂから最も離れている第１導電パッド１１ａの縁に接続されてもよい。第１配線１２ａは、例えば、銅またはアルミニウムのような金属材料で形成されている金属層である。 The first wiring 12 a is provided on the main surface 3 a of the insulating base material 3 . The first wiring 12a is drawn out from the first conductive pad 11a. The first wiring 12a is not particularly limited, but may be connected to the edge of the first conductive pad 11a farthest from the second conductive pad 11b, for example. The first wiring 12a is, for example, a metal layer made of a metal material such as copper or aluminum.

第２導電パッド１１ｂは、絶縁基材３の主面３ａ上に設けられている。第２導電パッド１１ｂは、例えば、銅またはアルミニウムのような金属材料で形成されている金属層である。第２導電パッド１１ｂは、第１導電パッド１１ａから離間されている。第２導電パッド１１ｂは、電子部品２０の第２電極２１ｂがマウントされ得る第２マウント部１６ｂを含む。電子部品２０の第２電極２１ｂは、第２導電接合部材３１ｂを用いて、第２マウント部１６ｂに固定されている。第２導電接合部材３１ｂは、特に限定されないが、例えば、はんだである。第２マウント部１６ｂは、第２導電パッド１１ｂの全体にわたって延在してもよい。すなわち、第２導電パッド１１ｂの全体が第２マウント部１６ｂであってもよい。 The second conductive pad 11b is provided on the main surface 3a of the insulating base material 3. As shown in FIG. The second conductive pad 11b is, for example, a metal layer made of a metal material such as copper or aluminum. The second conductive pad 11b is separated from the first conductive pad 11a. The second conductive pad 11b includes a second mount portion 16b on which the second electrode 21b of the electronic component 20 can be mounted. A second electrode 21b of the electronic component 20 is fixed to the second mount portion 16b using a second conductive joint member 31b. The second conductive joining member 31b is, for example, solder, although not particularly limited. The second mount portion 16b may extend over the entire second conductive pad 11b. That is, the entire second conductive pad 11b may be the second mount portion 16b.

第２マウント部１６ｂの厚さｔ21は、第２配線１２ｂの厚さｔ22より小さい。そのため、プリント回路基板２に曲げ応力が印加されたときに電子部品２０に印加される応力が減少する。プリント回路基板２に曲げ応力が印加されても、電子部品２０の機械的な破壊及び電子部品２０の性能の劣化が抑制され得る。第２マウント部１６ｂの厚さｔ21は、例えば、第２配線１２ｂの厚さｔ22の７５％以下であってもよく、第２配線１２ｂの厚さｔ22の６０％以下であってもよく、第２配線１２ｂの厚さｔ22の５０％以下であってもよく、第２配線１２ｂの厚さｔ22の４０％以下であってもよく、第２配線１２ｂの厚さｔ22の３０％以下であってもよい。第２マウント部１６ｂの厚さｔ21は、例えば、９μｍ以上であってもよい。そのため、第２マウント部１６ｂは、安定的に形成され得る。 The thickness t 21 of the second mount portion 16b is smaller than the thickness t 22 of the second wiring 12b. Therefore, when bending stress is applied to the printed circuit board 2, the stress applied to the electronic component 20 is reduced. Even if bending stress is applied to the printed circuit board 2 , mechanical breakage of the electronic component 20 and deterioration of the performance of the electronic component 20 can be suppressed. The thickness t 21 of the second mount portion 16b may be, for example, 75% or less of the thickness t 22 of the second wiring 12b, or may be 60% or less of the thickness t 22 of the second wiring 12b. It may be 50% or less of the thickness t 22 of the second wiring 12b, or 40% or less of the thickness t 22 of the second wiring 12b . It may be 30% or less. The thickness t 21 of the second mount portion 16b may be, for example, 9 μm or more. Therefore, the second mount portion 16b can be stably formed.

第２配線１２ｂより薄い第２マウント部１６ｂは、例えば、第２配線１２ｂと同じ厚さを有する導電層を形成した後に、当該導電層の一部をエッチングすることよって形成されてもよい。第２マウント部１６ｂより厚い第２配線１２ｂは、第２マウント部１６ｂと同じ厚さを有する導電層を形成した後に、当該導電層の一部上に別の導電層を追加することによって形成されてもよい。 The second mount portion 16b thinner than the second wiring 12b may be formed, for example, by forming a conductive layer having the same thickness as the second wiring 12b and then partially etching the conductive layer. The second wiring 12b thicker than the second mounting portion 16b is formed by forming a conductive layer having the same thickness as the second mounting portion 16b and then adding another conductive layer on part of the conductive layer. may

第２配線１２ｂは、絶縁基材３の主面３ａ上に設けられている。第２配線１２ｂは、第２導電パッド１１ｂから引き出されている。第２配線１２ｂは、例えば、銅またはアルミニウムのような金属材料で形成されている金属層である。第２配線１２ｂは、特に限定されないが、例えば、第１導電パッド１１ａから最も離れている第２導電パッド１１ｂの縁に接続されてもよい。 The second wiring 12 b is provided on the main surface 3 a of the insulating base material 3 . The second wiring 12b is drawn out from the second conductive pad 11b. The second wiring 12b is, for example, a metal layer made of a metal material such as copper or aluminum. The second wiring 12b is not particularly limited, but may be connected to the edge of the second conductive pad 11b farthest from the first conductive pad 11a, for example.

本実施の形態の一例である実施例１，２の電子部品実装基板１及びプリント回路基板２と比較例の電子部品実装基板及びプリント回路基板と比べながら、本実施の形態の電子部品実装基板１及びプリント回路基板２の作用を説明する。 While comparing the electronic component mounting board 1 and the printed circuit board 2 of Examples 1 and 2, which are examples of the present embodiment, with the electronic component mounting board and the printed circuit board of the comparative example, the electronic component mounting board 1 of the present embodiment is compared. and the operation of the printed circuit board 2 will be described.

図４及び図５を参照して、実施例１，２及び比較例では、絶縁基材３の長さＬは１００ｍｍであり、絶縁基材３の幅Ｗは４０ｍｍであり、絶縁基材３の厚さＴは１．６ｍｍである。絶縁基材３は、ガラスエポキシ基材である。絶縁基材３のヤング率は、２１ＧＰａである。絶縁基材３の主面３ａの平面視において、第１導電パッド１１ａ及び第２導電パッド１１ｂは、正方形の形状を有している。第１導電パッド１１ａ及び第２導電パッド１１ｂの各々の一辺の長さは、０．３ｍｍである。第１導電パッド１１ａと第２導電パッド１１ｂとの間の間隔は、０．３ｍｍである。第１配線１２ａの幅及び第２配線１２ｂの幅は、各々、０．１ｍｍである。第１導電パッド１１ａ、第２導電パッド１１ｂ、第１配線１２ａ及び第２配線１２ｂは銅で形成されており、第１導電パッド１１ａのヤング率、第２導電パッド１１ｂのヤング率、第１配線１２ａのヤング率及び第２配線１２ｂのヤング率のヤング率は、各々、１２０ＧＰａである。 4 and 5, in Examples 1 and 2 and Comparative Example, the length L of the insulating base material 3 was 100 mm, the width W of the insulating base material 3 was 40 mm, and the width W of the insulating base material 3 was 40 mm. Thickness T is 1.6 mm. The insulating base material 3 is a glass epoxy base material. The Young's modulus of the insulating base material 3 is 21 GPa. In a plan view of the main surface 3a of the insulating base material 3, the first conductive pads 11a and the second conductive pads 11b have a square shape. The length of one side of each of the first conductive pad 11a and the second conductive pad 11b is 0.3 mm. The distance between the first conductive pad 11a and the second conductive pad 11b is 0.3 mm. The width of the first wiring 12a and the width of the second wiring 12b are each 0.1 mm. The first conductive pad 11a, the second conductive pad 11b, the first wiring 12a and the second wiring 12b are made of copper. The Young's modulus of 12a and the Young's modulus of the second wiring 12b are each 120 GPa.

電子部品２０の長さは０．６ｍｍであり、電子部品２０の幅は０．３ｍｍである。電子部品２０の長さ方向（ｘ方向）は、絶縁基材３の長さ方向（ｘ方向）に沿っている。電子部品２０の幅方向（ｙ方向）は、絶縁基材３の幅方向（ｙ方向）に沿っている。電子部品２０は積層セラミックコンデンサであり、電子部品２０のヤング率は、１００ＧＰａである。電子部品２０は、絶縁基材３の主面３ａの中心にマウントされる。第１導電接合部材３１ａ及び第２導電接合部材３１ｂははんだであり、第１導電接合部材３１ａのヤング率及び第２導電接合部材３１ｂのヤング率は、各々、３７．４ＧＰａである。 The electronic component 20 has a length of 0.6 mm and a width of 0.3 mm. The length direction (x direction) of the electronic component 20 is along the length direction (x direction) of the insulating base material 3 . The width direction (y direction) of the electronic component 20 is along the width direction (y direction) of the insulating base material 3 . Electronic component 20 is a laminated ceramic capacitor, and Young's modulus of electronic component 20 is 100 GPa. Electronic component 20 is mounted at the center of main surface 3 a of insulating base material 3 . The first conductive joint member 31a and the second conductive joint member 31b are solder, and the Young's modulus of the first conductive joint member 31a and the Young's modulus of the second conductive joint member 31b are respectively 37.4 GPa.

以下の表１に示されるように、実施例１，２及び比較例の間では、第１マウント部１６ａ（第１導電パッド１１ａ）の厚さｔ11及び第２マウント部１６ｂ（第２導電パッド１１ｂ）の厚さｔ21が異なっている。具体的には、比較例では、第１マウント部１６ａ（第１導電パッド１１ａ）の厚さｔ11は第１配線１２ａの厚さｔ12に等しく、第２マウント部１６ｂ（第２導電パッド１１ｂ）の厚さｔ21は第１配線１２ａの厚さｔ22に等しい。これに対し、実施例１では、第１マウント部１６ａ（第１導電パッド１１ａ）の厚さｔ11は第１配線１２ａの厚さｔ12より小さく、第２マウント部１６ｂ（第２導電パッド１１ｂ）の厚さｔ21は第１配線１２ａの厚さｔ22より小さい。実施例２では、実施例１と比べて、第１マウント部１６ａ（第１導電パッド１１ａ）の厚さｔ11は第１配線１２ａの厚さｔ12よりさらに小さく、第２マウント部１６ｂ（第２導電パッド１１ｂ）の厚さｔ21は第１配線１２ａの厚さｔ22よりさらに小さい。 As shown in Table 1 below, between Examples 1 and 2 and the comparative example, the thickness t 11 of the first mount portion 16a (first conductive pad 11a) and the thickness t 11 of the second mount portion 16b (second conductive pad 11b) the thickness t 21 is different. Specifically, in the comparative example, the thickness t 11 of the first mount portion 16a (first conductive pad 11a) is equal to the thickness t 12 of the first wiring 12a, and the second mount portion 16b (second conductive pad 11b ) is equal to the thickness t 22 of the first wiring 12a. In contrast, in Example 1, the thickness t 11 of the first mount portion 16a (first conductive pad 11a) is smaller than the thickness t 12 of the first wiring 12a, and the second mount portion 16b (second conductive pad 11b) is smaller than the thickness t 12 of the first wiring 12a. ) is smaller than the thickness t 22 of the first wiring 12a. In Example 2, as compared with Example 1, the thickness t 11 of the first mount portion 16a (first conductive pad 11a) is smaller than the thickness t 12 of the first wiring 12a, and the second mount portion 16b (second The thickness t 21 of the two conductive pads 11b) is smaller than the thickness t 22 of the first wiring 12a.

Figure 2022136831000002
Figure 2022136831000002

絶縁基材３の長さ方向（ｘ方向）における絶縁基材３の表面３ｂの中心線３ｃを治具４１によって支持する。絶縁基材３の表面３ｂは、絶縁基材３の主面３ａと反対側の表面である。そして、絶縁基材３の線３ｄを治具４２を用いて押圧して、絶縁基材３の線３ｄを絶縁基材３の厚さ方向（ｚ方向）に２ｍｍ変位させる。絶縁基材３の線３ｄは、絶縁基材３の長さ方向における絶縁基材３の主面３ａの両端から、絶縁基材３の長さ方向に５ｍｍ離れた線である。このように絶縁基材３に曲げ応力を印加したときに、電子部品２０に印加される応力をコンピュータシミュレーションによって算出した。 A jig 41 supports the center line 3 c of the surface 3 b of the insulating base material 3 in the length direction (x direction) of the insulating base material 3 . The surface 3b of the insulating base material 3 is the surface opposite to the main surface 3a of the insulating base material 3. As shown in FIG. Then, the wire 3d of the insulating base material 3 is pressed using the jig 42 to displace the wire 3d of the insulating base material 3 by 2 mm in the thickness direction (z direction) of the insulating base material 3. FIG. The line 3d of the insulating base material 3 is a line separated by 5 mm in the length direction of the insulating base material 3 from both ends of the main surface 3a of the insulating base material 3 in the length direction of the insulating base material 3 . The stress applied to the electronic component 20 when the bending stress was applied to the insulating base material 3 in this manner was calculated by computer simulation.

表１を参照して、実施例１，２において電子部品２０に印加される応力は、比較例において電子部品２０に印加される応力より小さい。第１マウント部１６ａ（第１導電パッド１１ａ）の厚さｔ11及び第２マウント部１６ｂ（第２導電パッド１１ｂ）の厚さｔ21が減少するにつれて、電子部品２０に印加される応力は減少する。その結果、プリント回路基板２に曲げ応力が印加されても、電子部品２０の機械的な破壊及び電子部品２０の性能の劣化が抑制され得る。 Referring to Table 1, the stress applied to electronic component 20 in Examples 1 and 2 is smaller than the stress applied to electronic component 20 in the comparative example. As the thickness t 11 of the first mounting portion 16a (first conductive pad 11a) and the thickness t 21 of the second mounting portion 16b (second conductive pad 11b) decrease, the stress applied to the electronic component 20 decreases. do. As a result, even if a bending stress is applied to the printed circuit board 2, mechanical breakage of the electronic component 20 and deterioration of the performance of the electronic component 20 can be suppressed.

本実施の形態の電子部品実装基板１及びプリント回路基板２の効果を説明する。 Effects of the electronic component mounting board 1 and the printed circuit board 2 of the present embodiment will be described.

本実施の形態の電子部品実装基板１は、プリント回路基板２と、第１電極２１ａと第２電極２１ｂとを含む電子部品２０と、第１導電接合部材３１ａと、第２導電接合部材３１ｂとを備える。プリント回路基板２は、絶縁基材３と、第１導電パッド１１ａと、第１配線１２ａと、第２導電パッド１１ｂと、第２配線１２ｂとを含む。絶縁基材３は、主面３ａを含む。第１導電パッド１１ａと第１配線１２ａと第２導電パッド１１ｂと第２配線１２ｂとは、絶縁基材３の主面３ａ上に設けられている。第１配線１２ａは、第１導電パッド１１ａから引き出されている。第２導電パッド１１ｂは、第１導電パッド１１ａから離間されている。第２配線１２ｂは、第２導電パッド１１ｂから引き出されている。第１導電パッド１１ａは、電子部品２０の第１電極２１ａがマウントされ得る第１マウント部１６ａを含む。第２導電パッド１１ｂは、電子部品２０の第２電極２１ｂがマウントされ得る第２マウント部１６ｂを含む。電子部品２０の第１電極２１ａは、第１導電接合部材３１ａを用いて、第１マウント部１６ａに固定されている。電子部品２０の第２電極２１ｂは、第２導電接合部材３１ｂを用いて、第２マウント部１６ｂに固定されている。第１マウント部１６ａの厚さｔ11は、第１配線１２ａの厚さｔ12より小さい。第２マウント部１６ｂの厚さｔ21は、第２配線１２ｂの厚さｔ22より小さい。 Electronic component mounting board 1 of the present embodiment includes printed circuit board 2, electronic component 20 including first electrode 21a and second electrode 21b, first conductive bonding member 31a, and second conductive bonding member 31b. Prepare. The printed circuit board 2 includes an insulating substrate 3, a first conductive pad 11a, a first wiring 12a, a second conductive pad 11b, and a second wiring 12b. The insulating base material 3 includes a main surface 3a. The first conductive pad 11 a , the first wiring 12 a , the second conductive pad 11 b and the second wiring 12 b are provided on the main surface 3 a of the insulating base material 3 . The first wiring 12a is drawn out from the first conductive pad 11a. The second conductive pad 11b is separated from the first conductive pad 11a. The second wiring 12b is drawn out from the second conductive pad 11b. The first conductive pad 11a includes a first mount portion 16a on which the first electrode 21a of the electronic component 20 can be mounted. The second conductive pad 11b includes a second mount portion 16b on which the second electrode 21b of the electronic component 20 can be mounted. A first electrode 21a of the electronic component 20 is fixed to the first mount portion 16a using a first conductive joint member 31a. A second electrode 21b of the electronic component 20 is fixed to the second mount portion 16b using a second conductive joint member 31b. The thickness t 11 of the first mount portion 16a is smaller than the thickness t 12 of the first wiring 12a. The thickness t 21 of the second mount portion 16b is smaller than the thickness t 22 of the second wiring 12b.

本実施の形態のプリント回路基板２は、絶縁基材３と、第１導電パッド１１ａと、第１配線１２ａと、第２導電パッド１１ｂと、第２配線１２ｂとを備える。絶縁基材３は、主面３ａを含む。第１導電パッド１１ａと第１配線１２ａと第２導電パッド１１ｂと第２配線１２ｂとは、絶縁基材３の主面３ａ上に設けられている。第１配線１２ａは、第１導電パッド１１ａから引き出されている。第２導電パッド１１ｂは、第１導電パッド１１ａから離間されている。第２配線１２ｂは、第２導電パッド１１ｂから引き出されている。第１導電パッド１１ａは、電子部品２０の第１電極２１ａがマウントされ得る第１マウント部１６ａを含む。第２導電パッド１１ｂは、電子部品２０の第２電極２１ｂがマウントされ得る第２マウント部１６ｂを含む。第１マウント部１６ａの厚さｔ11は、第１配線１２ａの厚さｔ12より小さい。第２マウント部１６ｂの厚さｔ21は、第２配線１２ｂの厚さｔ22より小さい。 The printed circuit board 2 of the present embodiment includes an insulating base material 3, first conductive pads 11a, first wirings 12a, second conductive pads 11b, and second wirings 12b. The insulating base material 3 includes a main surface 3a. The first conductive pad 11 a , the first wiring 12 a , the second conductive pad 11 b and the second wiring 12 b are provided on the main surface 3 a of the insulating base material 3 . The first wiring 12a is drawn out from the first conductive pad 11a. The second conductive pad 11b is separated from the first conductive pad 11a. The second wiring 12b is drawn out from the second conductive pad 11b. The first conductive pad 11a includes a first mount portion 16a on which the first electrode 21a of the electronic component 20 can be mounted. The second conductive pad 11b includes a second mount portion 16b on which the second electrode 21b of the electronic component 20 can be mounted. The thickness t 11 of the first mount portion 16a is smaller than the thickness t 12 of the first wiring 12a. The thickness t 21 of the second mount portion 16b is smaller than the thickness t 22 of the second wiring 12b.

そのため、プリント回路基板２に曲げ応力が印加されたときに電子部品２０に印加される応力が減少する。本実施の形態の電子部品実装基板１及びプリント回路基板２によれば、プリント回路基板２に曲げ応力が印加されても、電子部品２０の機械的な破壊及び電子部品２０の性能の劣化が抑制され得る。 Therefore, when bending stress is applied to the printed circuit board 2, the stress applied to the electronic component 20 is reduced. According to the electronic component mounting board 1 and the printed circuit board 2 of the present embodiment, even if a bending stress is applied to the printed circuit board 2, mechanical breakage of the electronic component 20 and deterioration of the performance of the electronic component 20 are suppressed. can be

また、第１配線１２ａは第１マウント部１６ａより厚く、かつ、第２配線１２ｂは第２マウント部１６ｂより厚いため、第１配線１２ａの電気抵抗及び第２配線１２ｂの電気抵抗の増加が抑制される。電気信号が第１配線１２ａ及び第２配線１２ｂを伝搬する際に、電気信号が劣化することが抑制され得る。 Further, since the first wiring 12a is thicker than the first mounting portion 16a and the second wiring 12b is thicker than the second mounting portion 16b, an increase in the electric resistance of the first wiring 12a and the electric resistance of the second wiring 12b is suppressed. be done. Degradation of the electrical signal can be suppressed when the electrical signal propagates through the first wiring 12a and the second wiring 12b.

さらに、第１配線１２ａの厚さｔ22及び第２配線１２ｂの厚さｔ22は、回路設計時の第１配線１２ａの厚さｔ22及び第２配線１２ｂの厚さｔ22に維持され得る。第１導電パッド１１ａに第１マウント部１６ａを形成し、かつ、第２導電パッド１１ｂに第２マウント部１６ｂを形成しても、電子部品実装基板１及びプリント回路基板２が回路設計のとおりに機能するかどうかを確認する必要がなくなる。 Furthermore, the thickness t 22 of the first wiring 12a and the thickness t 22 of the second wiring 12b can be maintained at the thickness t 22 of the first wiring 12a and the thickness t 22 of the second wiring 12b at the time of circuit design. . Even if the first mounting portion 16a is formed on the first conductive pad 11a and the second mounting portion 16b is formed on the second conductive pad 11b, the electronic component mounting board 1 and the printed circuit board 2 are formed according to the circuit design. No need to check if it works.

本実施の形態の電子部品実装基板１及びプリント回路基板２では、第１マウント部１６ａは、第１導電パッド１１ａの全体にわたって延在している。第２マウント部１６ｂは、第２導電パッド１１ｂの全体にわたって延在している。 In the electronic component mounting board 1 and the printed circuit board 2 of the present embodiment, the first mount portion 16a extends over the entire first conductive pad 11a. The second mount portion 16b extends over the entire second conductive pad 11b.

そのため、プリント回路基板２に曲げ応力が印加されたときに電子部品２０に印加される応力が最も減少する。本実施の形態の電子部品実装基板１及びプリント回路基板２によれば、プリント回路基板２に曲げ応力が印加されても、電子部品２０の機械的な破壊及び電子部品２０の性能の劣化が抑制され得る。 Therefore, when bending stress is applied to the printed circuit board 2, the stress applied to the electronic component 20 is minimized. According to the electronic component mounting board 1 and the printed circuit board 2 of the present embodiment, even if a bending stress is applied to the printed circuit board 2, mechanical breakage of the electronic component 20 and deterioration of the performance of the electronic component 20 are suppressed. can be

実施の形態２．
図６及び図７を参照して、実施の形態２の電子部品実装基板１及びプリント回路基板２を説明する。本実施の形態の電子部品実装基板１及びプリント回路基板２は、実施の形態１の電子部品実装基板１及びプリント回路基板２と同様の構成を備えるが、主に以下の点で異なる。 Embodiment 2.
An electronic component mounting board 1 and a printed circuit board 2 according to the second embodiment will be described with reference to FIGS. 6 and 7. FIG. The electronic component mounting board 1 and the printed circuit board 2 of the present embodiment have the same configuration as the electronic component mounting board 1 and the printed circuit board 2 of the first embodiment, but differ mainly in the following points.

本実施の形態では、第１導電パッド１１ａは、第１厚肉部１７ａをさらに含む。第１厚肉部１７ａは、第１マウント部１６ａと第１配線１２ａとに接続されている。第１マウント部１６ａの厚さｔ11は、第１厚肉部１７ａの厚さｔ13より小さい。第１厚肉部１７ａの厚さｔ13は、第１配線１２ａの厚さｔ12に等しくてもよい。すなわち、第１厚肉部１７ａと第１配線１２ａとの間に段差が形成されていなくてもよい。第１導電パッド１１ａと第１配線１２ａとの間の第１接続部４６において、第１厚肉部１７ａの幅ｗ11は、第１配線１２ａの幅ｗ12以上である。第１接続部４６では、第１配線１２ａの全幅にわたって、第１配線１２ａは、第１厚肉部１７ａに接続されている。第１厚肉部１７ａの幅ｗ11は、第１配線１２ａが接続される第１導電パッド１１ａの縁の長さに等しくてもよい。 In the present embodiment, first conductive pad 11a further includes first thick portion 17a. The first thick portion 17a is connected to the first mount portion 16a and the first wiring 12a. The thickness t 11 of the first mount portion 16a is smaller than the thickness t 13 of the first thick portion 17a. The thickness t 13 of the first thick portion 17a may be equal to the thickness t 12 of the first wiring 12a. That is, a step need not be formed between the first thick portion 17a and the first wiring 12a. In the first connecting portion 46 between the first conductive pad 11a and the first wiring 12a, the width w 11 of the first thick portion 17a is equal to or greater than the width w 12 of the first wiring 12a. At the first connection portion 46, the first wiring 12a is connected to the first thick portion 17a over the entire width of the first wiring 12a. The width w 11 of the first thick portion 17a may be equal to the edge length of the first conductive pad 11a to which the first wiring 12a is connected.

第２導電パッド１１ｂは、第２厚肉部１７ｂをさらに含む。第２厚肉部１７ｂは、第２マウント部１６ｂと第２配線１２ｂとに接続されている。第２マウント部１６ｂの厚さｔ21は、第２厚肉部１７ｂの厚さｔ23より小さい。第２厚肉部１７ｂの厚さｔ23は、第２配線１２ｂの厚さｔ22に等しくてもよい。すなわち、第２厚肉部１７ｂと第２配線１２ｂとの間に段差が形成されていなくてもよい。第２導電パッド１１ｂと第２配線１２ｂとの間の第２接続部４７において、第２厚肉部１７ｂの幅ｗ21は、第２配線１２ｂの幅ｗ22以上である。第２接続部４７では、第２配線１２ｂの全幅にわたって、第２配線１２ｂは、第２厚肉部１７ｂに接続されている。第２厚肉部１７ｂの幅ｗ21は、第２配線１２ｂが接続される第２導電パッド１１ｂの縁の長さに等しくてもよい。 The second conductive pad 11b further includes a second thick portion 17b. The second thick portion 17b is connected to the second mount portion 16b and the second wiring 12b. The thickness t 21 of the second mount portion 16b is smaller than the thickness t 23 of the second thick portion 17b. The thickness t 23 of the second thick portion 17b may be equal to the thickness t 22 of the second wiring 12b. That is, a step need not be formed between the second thick portion 17b and the second wiring 12b. In the second connection portion 47 between the second conductive pad 11b and the second wiring 12b, the width w21 of the second thick portion 17b is equal to or greater than the width w22 of the second wiring 12b. At the second connection portion 47, the second wiring 12b is connected to the second thick portion 17b over the entire width of the second wiring 12b. The width w 21 of the second thick portion 17b may be equal to the edge length of the second conductive pad 11b to which the second wiring 12b is connected.

図８に示される本実施の形態の第１変形例及び図９に示される本実施の形態の第２変形例では、第１接続部４６における第１厚肉部１７ａの幅ｗ11は、第１配線１２ａの幅ｗ12以上であるが、第１配線１２ａが接続される第１導電パッド１１ａの縁の長さより小さい。第１マウント部１６ａは、第１配線１２ａが接続される第１導電パッド１１ａの縁まで延在している。第１厚肉部１７ａの幅ｗ11は、第１配線１２ａの幅ｗ12に等しくてもよい。 In the first modified example of the present embodiment shown in FIG. 8 and the second modified example of the present embodiment shown in FIG. It is equal to or greater than the width w 12 of one wiring 12a, but smaller than the length of the edge of the first conductive pad 11a to which the first wiring 12a is connected. The first mount portion 16a extends to the edge of the first conductive pad 11a to which the first wiring 12a is connected. The width w 11 of the first thick portion 17a may be equal to the width w 12 of the first wiring 12a.

第２接続部４７における第２厚肉部１７ｂの幅ｗ21は、第２配線１２ｂの幅ｗ22以上であるが、第２配線１２ｂが接続される第２導電パッド１１ｂの縁の長さより小さい。第２マウント部１６ｂは、第２配線１２ｂが接続される第２導電パッド１１ｂの縁まで延在している。第２厚肉部１７ｂの幅ｗ21は、第２配線１２ｂの幅ｗ22に等しくてもよい。 The width w21 of the second thick portion 17b in the second connection portion 47 is equal to or greater than the width w22 of the second wiring 12b, but smaller than the edge length of the second conductive pad 11b to which the second wiring 12b is connected. . The second mount portion 16b extends to the edge of the second conductive pad 11b to which the second wiring 12b is connected. The width w 21 of the second thick portion 17b may be equal to the width w 22 of the second wiring 12b.

図１０に示される本実施の形態の第３変形例及び図１１に示される本実施の形態の第４変形例では、絶縁基材３の主面３ａの平面視において、第１厚肉部１７ａは、第１配線１２ａに向けて後退する形状を有している。絶縁基材３の主面３ａの平面視において、第２厚肉部１７ｂは、第２配線１２ｂに向けて後退する形状を有している。 In the third modified example of the present embodiment shown in FIG. 10 and the fourth modified example of the present embodiment shown in FIG. 11, the first thick portion 17a has a shape that recedes toward the first wiring 12a. In a plan view of the main surface 3a of the insulating base material 3, the second thick portion 17b has a shape that recedes toward the second wiring 12b.

電子部品２０の幅方向（ｙ方向）における電子部品２０の中心と配線（第１配線１２ａ、第２配線１２ｂ）の幅方向（ｙ方向）における配線（第１配線１２ａ、第２配線１２ｂ）の中心とを結ぶ線上にある導電パッド（第１導電パッド１１ａ、第２導電パッド１１ｂ）が、プリント回路基板２に曲げ応力が印加されたときに電子部品２０に印加される応力に、最も強く影響する。第１配線１２ａに向けて後退する形状を有する第１厚肉部１７ａと、第２配線１２ｂに向けて後退する形状を有する第２厚肉部１７ｂとは、プリント回路基板２に曲げ応力が印加されたときに電子部品２０に印加される応力を、効果的に低減させることができる。 The center of the electronic component 20 in the width direction (y direction) of the electronic component 20 and the wiring (first wiring 12a, second wiring 12b) in the width direction (y direction) of the wiring (first wiring 12a, second wiring 12b) The conductive pads (first conductive pad 11a, second conductive pad 11b) on the line connecting the center have the strongest effect on the stress applied to electronic component 20 when bending stress is applied to printed circuit board 2. do. Bending stress is applied to the printed circuit board 2 by the first thick portion 17a having a shape receding toward the first wiring 12a and the second thick portion 17b having a shape receding toward the second wiring 12b. The stress applied to the electronic component 20 when it is pressed can be effectively reduced.

本実施の形態の電子部品実装基板１及びプリント回路基板２は、実施の形態１の電子部品実装基板１及びプリント回路基板２の効果に加えて、以下の効果を奏する。 The electronic component mounting board 1 and the printed circuit board 2 of the present embodiment have the following effects in addition to the effects of the electronic component mounting board 1 and the printed circuit board 2 of the first embodiment.

本実施の形態の電子部品実装基板１及びプリント回路基板２では、第１導電パッド１１ａは、第１マウント部１６ａと第１配線１２ａとに接続されている第１厚肉部１７ａをさらに含む。第２導電パッド１１ｂは、第２マウント部１６ｂと第２配線１２ｂとに接続されている第２厚肉部１７ｂをさらに含む。第１マウント部１６ａの厚さｔ11は、第１厚肉部１７ａの厚さｔ13より小さい。第２マウント部１６ｂの厚さｔ21は、第２厚肉部１７ｂの厚さｔ23より小さい。 In electronic component mounting board 1 and printed circuit board 2 of the present embodiment, first conductive pad 11a further includes first thick portion 17a connected to first mount portion 16a and first wiring 12a. The second conductive pad 11b further includes a second thick portion 17b connected to the second mount portion 16b and the second wiring 12b. The thickness t 11 of the first mount portion 16a is smaller than the thickness t 13 of the first thick portion 17a. The thickness t 21 of the second mount portion 16b is smaller than the thickness t 23 of the second thick portion 17b.

そのため、エッチング等によって第１マウント部１６ａを形成する際に、第１厚肉部１７ａは第１配線１２ａの厚さの減少を軽減または防止し得る。エッチング等によって第２マウント部１６ｂを形成する際に、第２厚肉部１７ｂは第２配線１２ｂの厚さの減少を軽減または防止し得る。第１配線１２ａの電気抵抗及び第２配線１２ｂの電気抵抗の増加が抑制される。電気信号が第１配線１２ａ及び第２配線１２ｂを伝搬する際に、電気信号が劣化することがより確実に抑制され得る。 Therefore, when the first mount portion 16a is formed by etching or the like, the first thick portion 17a can reduce or prevent reduction in the thickness of the first wiring 12a. When the second mount portion 16b is formed by etching or the like, the second thick portion 17b can reduce or prevent reduction in thickness of the second wiring 12b. An increase in the electrical resistance of the first wiring 12a and the electrical resistance of the second wiring 12b is suppressed. When the electrical signal propagates through the first wiring 12a and the second wiring 12b, deterioration of the electrical signal can be suppressed more reliably.

また、第１配線１２ａの厚さｔ22及び第２配線１２ｂの厚さｔ22は、回路設計時の第１配線１２ａの厚さｔ22及び第２配線１２ｂの厚さｔ22により確実に維持され得る。第１導電パッド１１ａに第１マウント部１６ａを形成し、かつ、第２導電パッド１１ｂに第２マウント部１６ｂを形成しても、電子部品実装基板１及びプリント回路基板２が回路設計のとおりに機能するかどうかを確認する必要がなくなる。 Further, the thickness t 22 of the first wiring 12a and the thickness t 22 of the second wiring 12b are reliably maintained by the thickness t 22 of the first wiring 12a and the thickness t 22 of the second wiring 12b at the time of circuit design. can be Even if the first mounting portion 16a is formed on the first conductive pad 11a and the second mounting portion 16b is formed on the second conductive pad 11b, the electronic component mounting board 1 and the printed circuit board 2 are formed according to the circuit design. No need to check if it works.

本実施の形態の電子部品実装基板１及びプリント回路基板２では、絶縁基材３の主面３ａの平面視において、第１厚肉部１７ａは、第１配線１２ａに向けて後退する形状を有しており、かつ、第２厚肉部１７ｂは、第２配線１２ｂに向けて後退する形状を有している。 In the electronic component mounting board 1 and the printed circuit board 2 of the present embodiment, when the main surface 3a of the insulating base 3 is viewed from above, the first thick portion 17a has a shape that recedes toward the first wiring 12a. Moreover, the second thick portion 17b has a shape that recedes toward the second wiring 12b.

第１配線１２ａに向けて後退する形状を有する第１厚肉部１７ａと、第２配線１２ｂに向けて後退する形状を有する第２厚肉部１７ｂとは、プリント回路基板２に曲げ応力が印加されたときに電子部品２０に印加される応力を、効果的に低減させることができる。プリント回路基板２に曲げ応力が印加されても、電子部品２０の機械的な破壊及び電子部品２０の性能の劣化が抑制され得る。 Bending stress is applied to the printed circuit board 2 by the first thick portion 17a having a shape receding toward the first wiring 12a and the second thick portion 17b having a shape receding toward the second wiring 12b. The stress applied to the electronic component 20 when it is pressed can be effectively reduced. Even if bending stress is applied to the printed circuit board 2 , mechanical breakage of the electronic component 20 and deterioration of the performance of the electronic component 20 can be suppressed.

本実施の形態の電子部品実装基板１及びプリント回路基板２では、第１導電パッド１１ａと第１配線１２ａとの間の第１接続部４６において、第１厚肉部１７ａの幅ｗ11は、第１配線１２ａの幅ｗ12以上である。第２導電パッド１１ｂと第２配線１２ｂとの間の第２接続部４７において、第２厚肉部１７ｂの幅ｗ21は、第２配線１２ｂの幅ｗ22以上である。 In the electronic component mounting board 1 and the printed circuit board 2 of the present embodiment, the width w 11 of the first thick portion 17a in the first connecting portion 46 between the first conductive pad 11a and the first wiring 12a is It is equal to or greater than the width w12 of the first wiring 12a. In the second connection portion 47 between the second conductive pad 11b and the second wiring 12b, the width w21 of the second thick portion 17b is equal to or greater than the width w22 of the second wiring 12b.

そのため、エッチング等によって第１マウント部１６ａを形成する際に、第１厚肉部１７ａは第１配線１２ａの厚さの減少を防止し得る。エッチング等によって第２マウント部１６ｂを形成する際に、第２厚肉部１７ｂは第２配線１２ｂの厚さの減少を防止し得る。第１配線１２ａの電気抵抗及び第２配線１２ｂの電気抵抗の増加が抑制される。電気信号が第１配線１２ａ及び第２配線１２ｂを伝搬する際に、電気信号が劣化することがより確実に抑制され得る。 Therefore, when the first mount portion 16a is formed by etching or the like, the first thick portion 17a can prevent the thickness of the first wiring 12a from being reduced. When the second mount portion 16b is formed by etching or the like, the second thick portion 17b can prevent the thickness of the second wiring 12b from being reduced. An increase in the electrical resistance of the first wiring 12a and the electrical resistance of the second wiring 12b is suppressed. When the electrical signal propagates through the first wiring 12a and the second wiring 12b, deterioration of the electrical signal can be suppressed more reliably.

また、第１配線１２ａの厚さｔ22及び第２配線１２ｂの厚さｔ22は、回路設計時の第１配線１２ａの厚さｔ22及び第２配線１２ｂの厚さｔ22により確実に維持され得る。第１導電パッド１１ａに第１マウント部１６ａを形成し、かつ、第２導電パッド１１ｂに第２マウント部１６ｂを形成しても、電子部品実装基板１及びプリント回路基板２が回路設計のとおりに機能するかどうかを確認する必要がなくなる。 Further, the thickness t 22 of the first wiring 12a and the thickness t 22 of the second wiring 12b are reliably maintained by the thickness t 22 of the first wiring 12a and the thickness t 22 of the second wiring 12b at the time of circuit design. can be Even if the first mounting portion 16a is formed on the first conductive pad 11a and the second mounting portion 16b is formed on the second conductive pad 11b, the electronic component mounting board 1 and the printed circuit board 2 are formed according to the circuit design. No need to check if it works.

本実施の形態の電子部品実装基板１及びプリント回路基板２では、第１厚肉部１７ａの厚さｔ13は、第１配線１２ａの厚さｔ12に等しい。第２厚肉部１７ｂの厚さｔ23は、第２配線１２ｂの厚さｔ22に等しい。 In the electronic component mounting board 1 and the printed circuit board 2 of this embodiment, the thickness t 13 of the first thick portion 17a is equal to the thickness t 12 of the first wiring 12a. The thickness t 23 of the second thick portion 17b is equal to the thickness t 22 of the second wiring 12b.

そのため、第１配線１２ａの厚さの減少と第２配線１２ｂの厚さの減少とが防止され得る。第１配線１２ａの電気抵抗及び第２配線１２ｂの電気抵抗の増加が抑制される。電気信号が第１配線１２ａ及び第２配線１２ｂを伝搬する際に、電気信号が劣化することがより確実に抑制され得る。 Therefore, reduction in thickness of the first wiring 12a and reduction in thickness of the second wiring 12b can be prevented. An increase in the electrical resistance of the first wiring 12a and the electrical resistance of the second wiring 12b is suppressed. When the electrical signal propagates through the first wiring 12a and the second wiring 12b, deterioration of the electrical signal can be suppressed more reliably.

また、第１配線１２ａの厚さｔ22及び第２配線１２ｂの厚さｔ22は、回路設計時の第１配線１２ａの厚さｔ22及び第２配線１２ｂの厚さｔ22により確実に維持され得る。第１導電パッド１１ａに第１マウント部１６ａを形成し、かつ、第２導電パッド１１ｂに第２マウント部１６ｂを形成しても、電子部品実装基板１及びプリント回路基板２が回路設計のとおりに機能するかどうかを確認する必要がなくなる。 Further, the thickness t 22 of the first wiring 12a and the thickness t 22 of the second wiring 12b are reliably maintained by the thickness t 22 of the first wiring 12a and the thickness t 22 of the second wiring 12b at the time of circuit design. can be Even if the first mounting portion 16a is formed on the first conductive pad 11a and the second mounting portion 16b is formed on the second conductive pad 11b, the electronic component mounting board 1 and the printed circuit board 2 are formed according to the circuit design. No need to check if it works.

さらに、第１厚肉部１７ａと第１配線１２ａとは、同一工程で形成され得る。第２厚肉部１７ｂと第２配線１２ｂとは、同一工程で形成され得る。電子部品実装基板１及びプリント回路基板２のコストが低減され得る。 Furthermore, the first thick portion 17a and the first wiring 12a can be formed in the same process. The second thick portion 17b and the second wiring 12b can be formed in the same process. The cost of the electronic component mounting board 1 and the printed circuit board 2 can be reduced.

今回開示された実施の形態１－２及びそれらの変形例はすべての点で例示であって制限的なものではないと考えられるべきである。矛盾のない限り、今回開示された実施の形態１－２及びそれらの変形例の少なくとも２つを組み合わせてもよい。本開示の範囲は、上記した説明ではなく特許請求の範囲によって示され、特許請求の範囲と均等の意味および範囲内でのすべての変更が含まれることを意図される。 Embodiments 1 and 2 disclosed this time and their modifications should be considered as examples in all respects and not restrictive. As long as there is no contradiction, at least two of Embodiments 1-2 disclosed this time and their modifications may be combined. The scope of the present disclosure is indicated by the scope of the claims rather than the above description, and is intended to include all modifications within the meaning and scope of equivalents of the scope of the claims.

１ 電子部品実装基板、２ プリント回路基板、３ 絶縁基材、３ａ 主面、３ｂ 表面、３ｃ 中心線、３ｄ 線、１１ａ 第１導電パッド、１１ｂ 第２導電パッド、１２ａ 第１配線、１２ｂ 第２配線、１６ａ 第１マウント部、１６ｂ 第２マウント部、１７ａ 第１厚肉部、１７ｂ 第２厚肉部、２０ 電子部品、２１ａ 第１電極、２１ｂ 第２電極、２２ 本体部、３１ａ 第１導電接合部材、３１ｂ 第２導電接合部材、４１，４２ 治具、４６ 第１接続部、４７ 第２接続部。 REFERENCE SIGNS LIST 1 electronic component mounting board 2 printed circuit board 3 insulating substrate 3a main surface 3b surface 3c center line 3d line 11a first conductive pad 11b second conductive pad 12a first wiring 12b second second Wiring 16a first mount portion 16b second mount portion 17a first thick portion 17b second thick portion 20 electronic component 21a first electrode 21b second electrode 22 main body portion 31a first conductor joining member 31b second conductive joining member 41, 42 jig 46 first connecting portion 47 second connecting portion;

Claims (8)

絶縁基材と、第１導電パッドと、第１配線と、第２導電パッドと、第２配線とを含むプリント回路基板と、
第１電極と第２電極とを含む電子部品と、
第１導電接合部材と、
第２導電接合部材とを備え、
前記絶縁基材は、主面を含み、
前記第１導電パッドと前記第１配線と前記第２導電パッドと前記第２配線とは、前記主面上に設けられており、
前記第１配線は、前記第１導電パッドから引き出されており、
前記第２導電パッドは、前記第１導電パッドから離間されており、
前記第２配線は、前記第２導電パッドから引き出されており、
前記第１導電パッドは、前記電子部品の前記第１電極がマウントされ得る第１マウント部を含み、
前記第２導電パッドは、前記電子部品の前記第２電極がマウントされ得る第２マウント部を含み、
前記電子部品の前記第１電極は、前記第１導電接合部材を用いて、前記第１マウント部に固定されており、
前記電子部品の前記第２電極は、前記第２導電接合部材を用いて、前記第２マウント部に固定されており、
前記第１マウント部の厚さは、前記第１配線の厚さより小さく、
前記第２マウント部の厚さは、前記第２配線の厚さより小さい、電子部品実装基板。 a printed circuit board including an insulating substrate, a first conductive pad, a first trace, a second conductive pad, and a second trace;
an electronic component including a first electrode and a second electrode;
a first conductive joining member;
a second conductive joining member;
The insulating base includes a main surface,
The first conductive pad, the first wiring, the second conductive pad, and the second wiring are provided on the main surface,
The first wiring is drawn out from the first conductive pad,
the second conductive pad is spaced apart from the first conductive pad;
The second wiring is drawn out from the second conductive pad,
the first conductive pad includes a first mounting portion on which the first electrode of the electronic component can be mounted;
the second conductive pad includes a second mounting portion on which the second electrode of the electronic component can be mounted;
the first electrode of the electronic component is fixed to the first mount portion using the first conductive joint member;
the second electrode of the electronic component is fixed to the second mount section using the second conductive joint member;
the thickness of the first mounting portion is smaller than the thickness of the first wiring;
The electronic component mounting board, wherein the thickness of the second mount section is smaller than the thickness of the second wiring. 前記第１マウント部は、前記第１導電パッドの全体にわたって延在しており、
前記第２マウント部は、前記第２導電パッドの全体にわたって延在している、請求項１に記載の電子部品実装基板。 The first mount portion extends over the entire first conductive pad,
2. The electronic component mounting board according to claim 1, wherein said second mount section extends over said second conductive pad. 前記第１導電パッドは、前記第１マウント部と前記第１配線とに接続されている第１厚肉部をさらに含み、
前記第２導電パッドは、前記第２マウント部と前記第２配線とに接続されている第２厚肉部をさらに含み、
前記第１マウント部の前記厚さは、前記第１厚肉部の厚さより小さく、
前記第２マウント部の前記厚さは、前記第２厚肉部の厚さより小さい、請求項１に記載の電子部品実装基板。 the first conductive pad further includes a first thick portion connected to the first mount portion and the first wiring;
the second conductive pad further includes a second thick portion connected to the second mounting portion and the second wiring;
the thickness of the first mount portion is smaller than the thickness of the first thick portion;
2. The electronic component mounting board according to claim 1, wherein said thickness of said second mount portion is smaller than the thickness of said second thick portion. 前記主面の平面視において、前記第１厚肉部は、前記第１配線に向けて後退する形状を有しており、かつ、前記第２厚肉部は、前記第２配線に向けて後退する形状を有している、請求項３に記載の電子部品実装基板。 In a plan view of the main surface, the first thick portion has a shape that recedes toward the first wiring, and the second thick portion recedes toward the second wiring. 4. The electronic component mounting board according to claim 3, which has a shape that 前記第１導電パッドと前記第１配線との間の第１接続部において、前記第１厚肉部の幅は、前記第１配線の幅以上であり、
前記第２導電パッドと前記第２配線との間の第２接続部において、前記第２厚肉部の幅は、前記第２配線の幅以上である、請求項３または請求項４に記載の電子部品実装基板。 In a first connecting portion between the first conductive pad and the first wiring, the width of the first thick portion is equal to or greater than the width of the first wiring,
5. The second connection part between the second conductive pad and the second wiring according to claim 3, wherein the width of the second thick part is equal to or greater than the width of the second wiring. Electronic component mounting board. 前記第１厚肉部の前記厚さは、前記第１配線の前記厚さに等しく、
前記第２厚肉部の前記厚さは、前記第２配線の前記厚さに等しい、請求項３から請求項５のいずれか一項に記載の電子部品実装基板。 The thickness of the first thick portion is equal to the thickness of the first wiring,
6. The electronic component mounting board according to claim 3, wherein said thickness of said second thick portion is equal to said thickness of said second wiring. 主面を含む絶縁基材と、
第１導電パッドと、
第１配線と、
第２導電パッドと、
第２配線とを備え、
前記第１導電パッドと前記第１配線と前記第２導電パッドと前記第２配線とは、前記主面上に設けられており、
前記第１配線は、前記第１導電パッドから引き出されており、
前記第２導電パッドは、前記第１導電パッドから離間されており、
前記第２配線は、前記第２導電パッドから引き出されており、
前記第１導電パッドは、電子部品の第１電極がマウントされ得る第１マウント部を含み、
前記第２導電パッドは、前記電子部品の第２電極がマウントされ得る第２マウント部を含み、
前記第１マウント部の厚さは、前記第１配線の厚さより小さく、
前記第２マウント部の厚さは、前記第２配線の厚さより小さい、プリント回路基板。 an insulating substrate including a major surface;
a first conductive pad;
a first wiring;
a second conductive pad;
and a second wiring,
The first conductive pad, the first wiring, the second conductive pad, and the second wiring are provided on the main surface,
The first wiring is drawn out from the first conductive pad,
the second conductive pad is spaced apart from the first conductive pad;
The second wiring is drawn out from the second conductive pad,
the first conductive pad includes a first mounting portion on which a first electrode of an electronic component can be mounted;
the second conductive pad includes a second mounting portion on which a second electrode of the electronic component can be mounted;
the thickness of the first mounting portion is smaller than the thickness of the first wiring;
The printed circuit board, wherein the thickness of the second mounting portion is smaller than the thickness of the second wiring. 前記第１導電パッドは、前記第１マウント部と前記第１配線とに接続されている第１厚肉部をさらに含み、
前記第２導電パッドは、前記第２マウント部と前記第２配線とに接続されている第２厚肉部をさらに含み、
前記第１マウント部の前記厚さは、前記第１厚肉部の厚さより小さく、
前記第２マウント部の前記厚さは、前記第２厚肉部の厚さより小さい、請求項７に記載のプリント回路基板。
the first conductive pad further includes a first thick portion connected to the first mount portion and the first wiring;
the second conductive pad further includes a second thick portion connected to the second mounting portion and the second wiring;
the thickness of the first mount portion is smaller than the thickness of the first thick portion;
8. The printed circuit board of claim 7, wherein the thickness of the second mounting portion is less than the thickness of the second thick portion.
JP2021036628A 2021-03-08 2021-03-08 Electronic component mounting board and printed circuit board Pending JP2022136831A (en)

Priority Applications (1)

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Application Number Priority Date Filing Date Title
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