JP2020150117A - Electronic device and manufacturing method thereof - Google Patents

Electronic device and manufacturing method thereof Download PDF

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Publication number
JP2020150117A
JP2020150117A JP2019045843A JP2019045843A JP2020150117A JP 2020150117 A JP2020150117 A JP 2020150117A JP 2019045843 A JP2019045843 A JP 2019045843A JP 2019045843 A JP2019045843 A JP 2019045843A JP 2020150117 A JP2020150117 A JP 2020150117A
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Japan
Prior art keywords
electrode
wiring board
electronic device
conductive
bump
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JP2019045843A
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Japanese (ja)
Inventor
峻 後藤
shun Goto
峻 後藤
岩田　和志
Kazuyuki Iwata
和志 岩田
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DIC Corp
Ricoh Co Ltd
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DIC Corp
Ricoh Co Ltd
Dainippon Ink and Chemicals Co Ltd
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Application filed by DIC Corp, Ricoh Co Ltd, Dainippon Ink and Chemicals Co Ltd filed Critical DIC Corp
Priority to JP2019045843A priority Critical patent/JP2020150117A/en
Publication of JP2020150117A publication Critical patent/JP2020150117A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector

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  • Wire Bonding (AREA)

Abstract

To provide an electronic device and a manufacturing method thereof capable of obtaining good conductivity between a conductive bump and the other electrode.SOLUTION: An electronic device such as a semiconductor device 1 includes a wiring board 5, a surface mount component such as a surface mount IC2 surface-mounted on the wiring board 5, a conductive bump 7 formed on one of an electrode such as a wiring 4A of the wiring board 5 and a connection electrode 2A of the surface mount component and contacting the other electrode to connect the electrodes, and an insulating resin that fixes the surface mount component and the wiring board to each other, and a part of the conductive bump 7 breaks an oxide film on the surface of the other electrode and is in contact with the other electrode.SELECTED DRAWING: Figure 1

Description

本発明は、電子装置、および電子装置の製造方法に関するものである。 The present invention relates to an electronic device and a method for manufacturing the electronic device.

従来から、配線基板と、配線基板上に表面実装される表面実装部品と、前記配線基板の電極および前記表面実装部品の電極のいずれか一方の電極上に形成され他方の電極に接触して電極間を接続する導電バンプと、表面実装部品と配線基板とを互いに固定する絶縁性樹脂とを備えた電子装置が知られている。 Conventionally, an electrode formed on one of a wiring board, a surface mount component surface-mounted on the wiring board, an electrode of the wiring board, and an electrode of the surface mount component, and in contact with the other electrode. There are known electronic devices including conductive bumps that connect the electrodes and insulating resins that fix the surface mount components and the wiring board to each other.

特許文献１には、次のようにして上記電子装置を製造するものが記載されている。すなわち、導電性ペーストをスクリーン印刷により配線基板の電極上に塗布して導電バンプを形成した後、配線基板の電極が形成された面に熱硬化性の絶縁性樹脂を塗布する。次に、表面実装部品を配線基板に向けて加圧しながら加熱することで、電子装置が製造されるものである。表面実装部品を配線基板に向けて加圧することで、液状の絶縁性樹脂を掻き分けて導電バンプが表面実装部品の電極に圧接する。その状態で絶縁性樹脂が熱硬化し、導電バンプが表面実装部品の電極に圧接した状態で、表面実装部品と配線基板とが互いに固定され電子装置が得られる。 Patent Document 1 describes a device that manufactures the above electronic device as follows. That is, the conductive paste is applied on the electrodes of the wiring substrate by screen printing to form conductive bumps, and then the thermosetting insulating resin is applied to the surface on which the electrodes of the wiring substrate are formed. Next, an electronic device is manufactured by heating the surface mount component while pressurizing it toward the wiring board. By pressurizing the surface mount component toward the wiring board, the liquid insulating resin is scraped off and the conductive bumps are pressed against the electrodes of the surface mount component. In that state, the insulating resin is thermoset, and the surface mount component and the wiring board are fixed to each other in a state where the conductive bumps are pressed against the electrodes of the surface mount component to obtain an electronic device.

しかしながら、導電バンプと他方の電極との導通性に改善の余地があった。 However, there is room for improvement in the conductivity between the conductive bump and the other electrode.

上記課題を解決するために、本発明は、配線基板と、配線基板上に表面実装される表面実装部品と、前記配線基板の電極および前記表面実装部品の電極のいずれか一方の電極上に形成され他方の電極に接触して電極間を接続する導電バンプと、表面実装部品と配線基板とを互いに固定する絶縁性樹脂とを備えた電子装置において、前記導電バンプの一部が他方の電極の表面の酸化被膜を破って他方の電極と接触していることを特徴とするものである。 In order to solve the above problems, the present invention is formed on one of a wiring board, a surface-mounted component surface-mounted on the wiring board, an electrode of the wiring board, and an electrode of the surface-mounted component. In an electronic device provided with a conductive bump that contacts the other electrode and connects the electrodes, and an insulating resin that fixes the surface-mounted component and the wiring substrate to each other, a part of the conductive bump is of the other electrode. It is characterized in that it breaks the oxide film on the surface and is in contact with the other electrode.

本発明によれば、導電バンプと他方の電極との間で良好な導通性を得ることができる。 According to the present invention, good conductivity can be obtained between the conductive bump and the other electrode.

電子装置としての第１実施形態の半導体装置の構成の一例を示す断面模式図。FIG. 6 is a schematic cross-sectional view showing an example of the configuration of the semiconductor device of the first embodiment as an electronic device. 表面実装ＩＣの接続電極に、複数の導電バンプを形成する一例を示す図。The figure which shows an example of forming a plurality of conductive bumps on the connection electrode of a surface mount IC. 一つの接続電極に複数の導電バンプを形成する際の他の配置パターンを示す図。The figure which shows the other arrangement pattern when forming a plurality of conductive bumps in one connection electrode. 配線を形成する様子を示す模式図。The schematic diagram which shows the state of forming a wiring. バンプ前駆体を形成する様子を示す模式図。The schematic diagram which shows the appearance of forming a bump precursor. 配線上にバンプ前駆体が形成された様子を示す模式図。The schematic diagram which shows the appearance that the bump precursor was formed on the wiring. 絶縁性樹脂を、配線基板のバンプ前駆体が形成された表面に塗布する様子を示す模式図。The schematic diagram which shows how the insulating resin is applied to the surface where the bump precursor of a wiring board is formed. 部品熱圧着工程について説明する図。The figure explaining the part thermocompression bonding process. 圧着後の導電バンプと接続電極と示す断面図。FIG. 5 is a cross-sectional view showing a conductive bump and a connection electrode after crimping.

＜第１の実施形態＞
先ず、本発明の半導体装置を適用した第１実施形態について説明する。
図１は、電子装置としての第１実施形態の半導体装置１の構成の一例を示す断面模式図である。
図１に示すように半導体装置１は、表面実装部品たる表面実装ＩＣ２と、配線基板５と、導電性粒子６を含む複数の導電バンプ７と、絶縁層８とを備える。また、本実施形態の半導体装置１は、ダミーバンプ９も有している。 <First Embodiment>
First, a first embodiment to which the semiconductor device of the present invention is applied will be described.
FIG. 1 is a schematic cross-sectional view showing an example of the configuration of the semiconductor device 1 of the first embodiment as an electronic device.
As shown in FIG. 1, the semiconductor device 1 includes a surface mount IC 2 which is a surface mount component, a wiring board 5, a plurality of conductive bumps 7 including conductive particles 6, and an insulating layer 8. Further, the semiconductor device 1 of the present embodiment also has a dummy bump 9.

表面実装ＩＣ２の配線基板５と対向する対向面に形成された複数の接続電極２Ａは、導電バンプ７の含まれる導電性粒子６を介して、配線基板５の導電層４に形成された電極としての配線４Ａに電気的に接続されている。絶縁層８は、表面実装ＩＣ２と配線基板５との間に充填されており、表面実装ＩＣ２と配線基板５とを接着する絶縁性樹脂からなる接着剤の硬化物である。ダミーバンプ９は、一端が表面実装ＩＣ２に接触し、他端がと配線基板５に接触して、表面実装ＩＣ２と配線基板との距離（クリアランス）を確保している。 The plurality of connection electrodes 2A formed on the facing surfaces of the surface mount IC 2 facing the wiring substrate 5 serve as electrodes formed on the conductive layer 4 of the wiring substrate 5 via the conductive particles 6 including the conductive bumps 7. It is electrically connected to the wiring 4A of. The insulating layer 8 is filled between the surface mount IC 2 and the wiring board 5, and is a cured product of an adhesive made of an insulating resin that adheres the surface mount IC 2 and the wiring board 5. One end of the dummy bump 9 comes into contact with the surface mount IC 2, and the other end contacts the wiring board 5, ensuring a distance (clearance) between the surface mount IC 2 and the wiring board.

［表面実装ＩＣ２］
表面実装ＩＣ２は、配線基板５に実装可能なものであれば、特に限定されるものではなく、ウエハレベルチップサイズパッケージ（ＷＬ−ＣＳＰ）を含むものである。
表面実装ＩＣ２の配線基板５と対向する対向面に形成された複数の接続電極２Ａは、外部と電気的な接続を行うものである。接続電極２Ａの材質としては、例えば、銅、金、ニッケル、銀、錫、アルミ、若しくははんだ、又はこれらのうち少なくとも１種を含む合金層を含む積層体が挙げられる。これらの中でも、金、ニッケル、アルミ等がより好ましい。なお、接続電極２Ａの材質は、これらに限定されるものではなく、導電性であればよい。 [Surface mount IC2]
The surface mount IC 2 is not particularly limited as long as it can be mounted on the wiring board 5, and includes a wafer level chip size package (WL-CSP).
The plurality of connection electrodes 2A formed on the facing surfaces of the surface mount IC 2 facing the wiring board 5 are electrically connected to the outside. Examples of the material of the connection electrode 2A include copper, gold, nickel, silver, tin, aluminum, or solder, or a laminate containing an alloy layer containing at least one of these. Among these, gold, nickel, aluminum and the like are more preferable. The material of the connection electrode 2A is not limited to these, and may be conductive.

［配線基板５］
配線基板５は、基材３と、複数の配線４Ａを含む導電層４とを少なくとも有し、基材３と導電層４との積層部分を含む層が一層の単層の配線基板であってもよいし、基材３と導電層４との積層部分を含む層が複数積み重なった多層配線基板であってもよい。また、配線基板５は、可撓性を有するプリント配線基板（ＦＰＣ）でもよい。さらに、配線基板５は、基材３と導電層４との積層部分以外に、他の機能を付与するための積層部分を有してもよい。 [Wiring board 5]
The wiring substrate 5 is a single-layer wiring substrate having at least a base material 3 and a conductive layer 4 including a plurality of wirings 4A, and the layer including the laminated portion of the base material 3 and the conductive layer 4 is one layer. Alternatively, it may be a multilayer wiring substrate in which a plurality of layers including a laminated portion of the base material 3 and the conductive layer 4 are stacked. Further, the wiring board 5 may be a printed wiring board (FPC) having flexibility. Further, the wiring board 5 may have a laminated portion for imparting other functions in addition to the laminated portion between the base material 3 and the conductive layer 4.

本実施形態においては、基材３として、ガラス転移温度が１６０℃以下、低いものでは７０℃未満のものであって、基材３の耐熱温度が低い材質のものを用いている。このような材質としては、市販のプラスチックフィルムを用いることができ、例えば、ポリエチレンテレフタレート、熱可塑性ポリウレタン（ＴＰＵ，Ｔｈｅｒｍｏｐｌａｓｔｉｃ Ｐｏｌｙｕｒｅｔｈａｎｅ）及びポリエチレンナフタレート等が挙げられる。もちろん、ポリイミド等が好ましい。基材３は、これらの材料のうち１つのみ含んでいてもよいし、２以上を含んでいてもよい。 In the present embodiment, as the base material 3, a material having a glass transition temperature of 160 ° C. or lower and a low temperature of less than 70 ° C. and a material having a low heat resistant temperature of the base material 3 is used. As such a material, a commercially available plastic film can be used, and examples thereof include polyethylene terephthalate, thermoplastic polyurethane (TPU, Thermoplastic Polyurethane), and polyethylene naphthalate. Of course, polyimide or the like is preferable. The base material 3 may contain only one of these materials, or may contain two or more of these materials.

導電層４は、基材３の表面実装ＩＣ２と対向する面に形成され、電複数の配線４Ａを有している。配線４Ａは、例えば、銅（Ｃｕ）箔を貼り付けてエッチング・めっきして形成したり、スクリーン印刷等により基材３上に所望のパターンで形成したりする。配線の途中又は端部が、表面実装ＩＣ２を実装する際の電極となる。 The conductive layer 4 is formed on the surface of the base material 3 facing the surface mount IC2, and has a plurality of electrical wirings 4A. The wiring 4A is formed by, for example, pasting a copper (Cu) foil, etching and plating, or forming a desired pattern on the base material 3 by screen printing or the like. The middle or end of the wiring serves as an electrode when mounting the surface mount IC2.

配線４Ａの材質としては、銅、金、ニッケル、銀、錫、アルミ、若しくは鉛、又はこれらのうち少なくとも１種を含む合金を用いることをできる。また、配線４Ａは、配線上に他の導電層が形成されている多層構造であってもよい。例えば、配線４Ａは、銅配線上に、金めっき、ニッケルめっき、錫めっき、鉛めっきのうち少なくとも一つが施されている多層構造であってもよい。 As the material of the wiring 4A, copper, gold, nickel, silver, tin, aluminum, lead, or an alloy containing at least one of these can be used. Further, the wiring 4A may have a multilayer structure in which another conductive layer is formed on the wiring. For example, the wiring 4A may have a multilayer structure in which at least one of gold plating, nickel plating, tin plating, and lead plating is applied on the copper wiring.

また、配線４Ａ間のピッチは、上述した接続電極２Ａ間のピッチｄと同じ値であることが好ましい。また、後述する配線４Ａに形成される表面実装ＩＣ２の接続電極２Ａに接触前のバンプ前駆体１２（図４参照）に銀などの耐湿性の弱い材料を使い、かつ基材３が水分を透過しやすいプラスチックフィルムなどを使用する場合は、配線基板５に透過対策を施す必要がある。透過対策として、１．カバーコート基材を用いる、２．銅箔配線の場合などで必要箇所の裏面に大きな電極を形成する、３．単層配線基板の場合は接着剤付銅箔を切り取り貼りつける、の３つがある。 Further, the pitch between the wirings 4A is preferably the same value as the pitch d between the connection electrodes 2A described above. Further, a material having weak moisture resistance such as silver is used for the bump precursor 12 (see FIG. 4) before contact with the connection electrode 2A of the surface mount IC2 formed on the wiring 4A described later, and the base material 3 permeates moisture. When using an easy-to-use plastic film or the like, it is necessary to take a transmission measure on the wiring board 5. As a transparency measure, 1. Use a cover coat substrate 2. 2. Form a large electrode on the back surface of the required part in the case of copper foil wiring. In the case of a single-layer wiring board, there are three methods: cutting and pasting copper foil with adhesive.

［導電バンプ７］
導電バンプ７は、導電層４の配線４Ａと表面実装ＩＣ２の接続電極２Ａとの間に位置しており、導電層４の複数の配線４Ａの一本と、表面実装ＩＣ２の接続電極２Ａの一つとの間に、一つの導電バンプ７がそれぞれ配置されている。 [Conductive bump 7]
The conductive bump 7 is located between the wiring 4A of the conductive layer 4 and the connection electrode 2A of the surface mount IC2, and is one of the plurality of wirings 4A of the conductive layer 4 and one of the connection electrodes 2A of the surface mount IC2. One conductive bump 7 is arranged between the electrodes.

導電バンプ７は、少なくとも導電性粒子６とバインダー樹脂とからなる所謂導電ペーストであり、導電性粒子６としては、銀、銅、アルミ、錫、鉛、アンチモン、ビスマス、インジウムケイ素若しくはゲルマニウム、それらの少なくとも１種以上を含む合金、又は、それらの１種以上を含む化合物を用いることができる。 The conductive bump 7 is a so-called conductive paste composed of at least conductive particles 6 and a binder resin, and the conductive particles 6 include silver, copper, aluminum, tin, lead, antimony, bismuth, indium silicon or germanium, and the like. Alloys containing at least one or more, or compounds containing one or more of them can be used.

また、後述する部品熱圧着工程において、導電バンプに均等に圧力がかかるように、表面実装ＩＣ２の重心を基準にして、導電バンプ７が点対称に配置されるように、接続電極２Ａや、配線４Ａを配置するのが好ましい。なお、電極をそのように配置できないときは、絶縁性バンプなどを用いて、表面実装ＩＣ２の重心を基準にして、導電バンプに均一に均等に圧力がかかるようにするのが好ましい。これにより、ひとつの接続電極２Ａに過剰な圧力がかかって接続電極が破損したり、ある導電バンプにかかる圧力が小さく、接続不良が生じたりするのを抑制することができる。 Further, in the component thermocompression bonding step described later, the connection electrode 2A and the wiring so that the conductive bumps 7 are arranged point-symmetrically with respect to the center of gravity of the surface mount IC 2 so that the pressure is evenly applied to the conductive bumps. It is preferable to arrange 4A. When the electrodes cannot be arranged in such a manner, it is preferable to use an insulating bump or the like so that the conductive bumps are uniformly and evenly pressured with reference to the center of gravity of the surface mount IC2. As a result, it is possible to prevent the connection electrode from being damaged due to excessive pressure applied to one connection electrode 2A, or the pressure applied to a certain conductive bump to be small, resulting in poor connection.

また、導電バンプ７を、一つの電極（配線４Ａまたは接続電極２Ａ）に複数形成してもよい。
図２は、表面実装ＩＣ２の接続電極２Ａに、複数の導電バンプ７を形成する一例を示す図である。
図２（ａ）に示すように、表面実装ＩＣ２の重心Ｄ１を基準に、導電バンプ７が点対称となるように、接続電極２Ａを配置している。また、図２（ｂ）に示すように、接続電極２Ａに形成される２つの導電バンプ７は、接続電極２Ａの重心Ｄ２を基準にして点対称に配置されている。これにより、後述する部品熱圧着工程において、接続電極２Ａに形成される２つの導電バンプ７に均等に圧力をかけることができる。 Further, a plurality of conductive bumps 7 may be formed on one electrode (wiring 4A or connection electrode 2A).
FIG. 2 is a diagram showing an example of forming a plurality of conductive bumps 7 on the connection electrode 2A of the surface mount IC2.
As shown in FIG. 2A, the connection electrodes 2A are arranged so that the conductive bumps 7 are point-symmetrical with respect to the center of gravity D1 of the surface mount IC2. Further, as shown in FIG. 2B, the two conductive bumps 7 formed on the connection electrode 2A are arranged point-symmetrically with respect to the center of gravity D2 of the connection electrode 2A. As a result, pressure can be evenly applied to the two conductive bumps 7 formed on the connection electrode 2A in the component thermocompression bonding step described later.

図３は、一つの接続電極に複数の導電バンプを形成する際の他の配置パターンを示している。図３（ａ）に示すように、２つの導電バンプ７を、対角線上に配置したり、図３（ｂ）に示すように、接続電極２Ａの重心Ｄ２を基準にして点対称に４つの導電バンプ７を配置したりしてもよい。また、図３（ｃ）に示すように、図中左右方向に２つの導電バンプを配置したり、図３（ｄ）に示すように図中上下方向に２つの導電バンプ７を配置したりしてもよい。
ひとつの接続電極内に接続電極２Ａの重心Ｄ２を基準にしてどのように複数の導電バンプを配置するかは、全体の導電バンプが、表面実装ＩＣ２の重心Ｄ１を基準にして、点対称となるように配慮して決めるのが好ましい。 FIG. 3 shows another arrangement pattern when forming a plurality of conductive bumps on one connection electrode. As shown in FIG. 3A, the two conductive bumps 7 are arranged diagonally, and as shown in FIG. 3B, the four conductive bumps are point-symmetrically relative to the center of gravity D2 of the connection electrode 2A. The bump 7 may be arranged. Further, as shown in FIG. 3 (c), two conductive bumps are arranged in the left-right direction in the figure, and two conductive bumps 7 are arranged in the vertical direction in the figure as shown in FIG. 3 (d). You may.
How to arrange a plurality of conductive bumps in one connection electrode with reference to the center of gravity D2 of the connection electrode 2A is that the entire conductive bumps are point-symmetrical with respect to the center of gravity D1 of the surface mount IC2. It is preferable to make a decision in consideration of such factors.

［絶縁層８］
絶縁層８は、各導電バンプ７を覆うように表面実装ＩＣ２と配線基板５との間に絶縁性樹脂を充填して形成され、表面実装ＩＣ２を配線基板５に固定する。絶縁層８を構成する絶縁性樹脂としては、熱可塑性樹脂、紫外線硬化性樹脂、及び熱硬化樹脂等の硬化物を適用できる。中でも熱硬化性樹脂を用いることが、十分な剥離強度が得られる点で好ましい。熱硬化性樹脂としては、エポキシ樹脂、フェノール樹脂、ウレタン樹脂、アクリル樹脂、メラミン樹脂、フッ素樹脂、シリコーン等の熱硬化性樹脂を挙げることができる。 [Insulation layer 8]
The insulating layer 8 is formed by filling an insulating resin between the surface mount IC 2 and the wiring board 5 so as to cover each conductive bump 7, and fixes the surface mount IC 2 to the wiring board 5. As the insulating resin constituting the insulating layer 8, a cured product such as a thermoplastic resin, an ultraviolet curable resin, and a thermosetting resin can be applied. Above all, it is preferable to use a thermosetting resin because sufficient peel strength can be obtained. Examples of the thermosetting resin include thermosetting resins such as epoxy resin, phenol resin, urethane resin, acrylic resin, melamine resin, fluororesin, and silicone.

絶縁層８と配線基板５との剥離強度は、１［Ｎ／ｃｍ］以上２０［Ｎ／ｃｍ］以下が好ましく、３［Ｎ／ｃｍ］以上２０［Ｎ／ｃｍ］以下であることがより好ましい。上記剥離強度が上述した好ましい範囲内であると、半導体装置１を湾曲させる等、曲げ応力を加えても絶縁層８と配線基板５との界面にて剥離が生じ難い。なお、絶縁層８と配線基板５との剥離強度は、ピール試験機（例えばＡＩＫＯＨ社製、型番：ＦＴＮ４−１５Ａ）を用いて、９０°剥離試験をすることで測定できる。 The peel strength between the insulating layer 8 and the wiring board 5 is preferably 1 [N / cm] or more and 20 [N / cm] or less, and more preferably 3 [N / cm] or more and 20 [N / cm] or less. .. When the peel strength is within the above-mentioned preferable range, peeling is unlikely to occur at the interface between the insulating layer 8 and the wiring board 5 even if bending stress is applied such as bending the semiconductor device 1. The peel strength between the insulating layer 8 and the wiring board 5 can be measured by performing a 90 ° peel test using a peel tester (for example, manufactured by AIKOH, model number: FTN4-15A).

［ダミーバンプ９］
表面実装ＩＣ２と配線基板との距離（クリアランス）を確保するダミーバンプ９は、表面実装ＩＣ２と配線基板５との間の、導電バンプ７がない空間に配置されている。本実施形態では、導電バンプ７は導電ペーストによって形成されるため、弾性率が低く変形しやすい。そのため、導電バンプ７では、後述する熱圧着工程において、表面実装ＩＣ２と配線基板５との間のクリアランスを所定のクリアランスに保つことが難しい。そのため、本実施形態では、表面実装ＩＣ２と配線基板５との間の、導電バンプ７がない空間に１つ以上のダミーバンプ９を配置し、熱圧着工程において、このダミーバンプにより表面実装ＩＣ２が相対的に配線基板５側へ移動するのを規制する。これにより、表面実装ＩＣ２と配線基板５との間の距離を所定のクリアランスに保つことができる。 [Dummy bump 9]
The dummy bump 9 for ensuring the distance (clearance) between the surface mount IC 2 and the wiring board is arranged in a space between the surface mount IC 2 and the wiring board 5 where there is no conductive bump 7. In the present embodiment, since the conductive bump 7 is formed of the conductive paste, it has a low elastic modulus and is easily deformed. Therefore, in the conductive bump 7, it is difficult to maintain the clearance between the surface mount IC 2 and the wiring board 5 at a predetermined clearance in the thermocompression bonding step described later. Therefore, in the present embodiment, one or more dummy bumps 9 are arranged in a space between the surface mount IC 2 and the wiring board 5 where there is no conductive bump 7, and in the thermocompression bonding step, the surface mount IC 2 is relative to the surface mount IC 2. It is restricted to move to the wiring board 5 side. As a result, the distance between the surface mount IC 2 and the wiring board 5 can be maintained at a predetermined clearance.

ダミーバンプ９の材料としては、エポキシ樹脂、スチレン樹脂、シリコーン樹脂、アクリル樹脂、アクリル／スチレン樹脂（アクリレートとスチレンとの共重合体）、ポリオレフィン樹脂、メラミン樹脂、ベンゾグアナミン樹脂、自ビニルベンゼン架橋体等が挙げることができる。ダミーバンプ９の形状は特に限定されるものではなく、球形及び柱状等であってもよい。ダミーバンプ９の最大寸法は、熱圧着工程において、圧縮されることを考慮して、上記所定のクリアランスよりも大きくするのがこのましい。例えば、上記所定のクリアランスに対して、１０［μｍ］以上２００［μｍ］以下大きくするのが好ましく、５０［μｍ］以上１５０［μｍ］以下大きくするのがより好ましい。ダミーバンプ９の数は、配線基板５の１［ｍｍ］四方当たり２個以上２０個以下であることが好ましい。 Examples of the material of the dummy bump 9 include epoxy resin, styrene resin, silicone resin, acrylic resin, acrylic / styrene resin (copolymer of acrylate and styrene), polyolefin resin, melamine resin, benzoguanamine resin, self-vinylbenzene crosslinked product, and the like. Can be mentioned. The shape of the dummy bump 9 is not particularly limited, and may be spherical, columnar, or the like. The maximum size of the dummy bump 9 is preferably made larger than the above-mentioned predetermined clearance in consideration of being compressed in the thermocompression bonding step. For example, it is preferable to increase the clearance by 10 [μm] or more and 200 [μm] or less, and more preferably 50 [μm] or more and 150 [μm] or less. The number of dummy bumps 9 is preferably 2 or more and 20 or less per 1 [mm] square of the wiring board 5.

＜製造方法＞
次に、図１に示した半導体装置１の製造方法について説明する。
本実施形態の半導体装置１は、上述したように耐熱性が低い配線基板５を用いており、このような耐熱性が低い配線基板５を用いても、配線基板５に表面実装ＩＣ２を実装可能であり、導電バンプ７によって接続する表面実装ＩＣの電極間の狭ピッチ化が可能となっている。以下、製造方法について、図４〜図８に基づき、具体的に説明する。 <Manufacturing method>
Next, a method of manufacturing the semiconductor device 1 shown in FIG. 1 will be described.
As described above, the semiconductor device 1 of the present embodiment uses the wiring board 5 having low heat resistance, and even if such a wiring board 5 having low heat resistance is used, the surface mount IC2 can be mounted on the wiring board 5. Therefore, it is possible to narrow the pitch between the electrodes of the surface mount ICs connected by the conductive bumps 7. Hereinafter, the manufacturing method will be specifically described with reference to FIGS. 4 to 8.

［配線４Ａ（電極）の形成］
図４は、配線４Ａを形成する様子を示す模式図である。
図４に示すように、スクリーン印刷法で液状導電ペースト４０を基材３の表面実装ＩＣ２の対向面に塗布することで、配線４Ａを含む導電層４を形成する。具体的には、配線４Ａを含む導電層４に対応する貫通孔が形成されたスクリーンマスクを基材３の表面実装ＩＣ２の対向面に設置し、スキージ２２により導電ペースト４０をスキージングしてスクリーンマスク２１の貫通孔に導電ペースト４０を充填する。スキージングが完了したら、スクリーンマスク２１と基材とを離間させることにより、基材上に配線４Ａを含む導電層４を形成する。その後、導電層４を加熱乾燥して、導電層４に含まれる溶媒成分を除去する。
なお、配線４Ａを形成する方法としては、例えば、基材３上に銅箔層を形成し、配線４Ａを含む導電層４（回路）以外の銅箔をエッチングで除去して形成することもできる。また、メッキ処理により基材上に配線４Ａを形成してもよい。 [Formation of wiring 4A (electrode)]
FIG. 4 is a schematic view showing how the wiring 4A is formed.
As shown in FIG. 4, the liquid conductive paste 40 is applied to the facing surface of the surface mount IC 2 of the base material 3 by a screen printing method to form the conductive layer 4 including the wiring 4A. Specifically, a screen mask having through holes corresponding to the conductive layer 4 including the wiring 4A is installed on the facing surface of the surface mount IC 2 of the base material 3, and the conductive paste 40 is squeezed by the squeegee 22 to screen the screen. The through hole of the mask 21 is filled with the conductive paste 40. When the squeezing is completed, the screen mask 21 and the base material are separated from each other to form the conductive layer 4 including the wiring 4A on the base material. Then, the conductive layer 4 is heated and dried to remove the solvent component contained in the conductive layer 4.
As a method of forming the wiring 4A, for example, a copper foil layer may be formed on the base material 3 and the copper foil other than the conductive layer 4 (circuit) including the wiring 4A may be removed by etching to form the wiring 4A. .. Further, the wiring 4A may be formed on the base material by the plating treatment.

［バンプ前駆体１２の形成］
図５は、バンプ前駆体１２を形成する様子を示す模式図であり、図６は、配線上にバンプ前駆体１２が形成された様子を示す模式図である。
基材３上に導電層４を形成したら、導電層４の電極となる配線４Ａ上に、導電ペーストを用いて、椀型もしくは円錐型（図６では、円錐型）の先端部を有するバンプ前駆体１２を形成する。具体的には、図５示すように、ディスペンサ３０による導電ペースト３１の吐出によって配線４Ａの電極となる部分にバンプ前駆体１２を形成する。 [Formation of bump precursor 12]
FIG. 5 is a schematic view showing how the bump precursor 12 is formed, and FIG. 6 is a schematic view showing how the bump precursor 12 is formed on the wiring.
After forming the conductive layer 4 on the base material 3, a bump precursor having a bowl-shaped or conical (conical in FIG. 6) tip on the wiring 4A which is the electrode of the conductive layer 4 by using the conductive paste. Form the body 12. Specifically, as shown in FIG. 5, the bump precursor 12 is formed in the portion to be the electrode of the wiring 4A by discharging the conductive paste 31 by the dispenser 30.

ディスペンサ３０としては、例えば、エンジニアリングシステム社製「Ｒ−ｊｅｔ」を挙げることができるが、導電ペーストの吐出が可能なものであれば、特に限定されるものではない。ディスペンサ３０から導電ペースト３１を吐出する際の条件としては、シリンジ背圧（空圧）を０．２５［ＭＰａ］、Ｒ−ｕｎｉｔの空圧を０．１２５［ＭＰａ］、塗布時間を０．２〜０．３［秒］、ディスペンサーノズル内径を４０〜７０［μｍ］が好ましい。ギャップＧは、５［μｍ］〜３０［μｍ］が望ましい。ディスペンサ３０からの１回の吐出によって、１つのバンプ前駆体１２を形成することが好ましいが、ディスペンサからの２回以上の吐出によって、１つのバンプ前駆体１２を形成しても構わない。
また、本実施形態では、配線４Ａにバンプ前駆体１２を形成しているが、表面実装ＩＣ２の接続電極２Ａにバンプ前駆体１２を形成してもよい。 Examples of the dispenser 30 include “R-jet” manufactured by Engineering Systems Co., Ltd., but the dispenser 30 is not particularly limited as long as it can discharge the conductive paste. The conditions for discharging the conductive paste 31 from the dispenser 30 are a syringe back pressure (pneumatic pressure) of 0.25 [MPa], a R-unit pneumatic pressure of 0.125 [MPa], and a coating time of 0.2. It is preferably ~ 0.3 [sec] and the inner diameter of the dispenser nozzle is 40 to 70 [μm]. The gap G is preferably 5 [μm] to 30 [μm]. It is preferable to form one bump precursor 12 by one discharge from the dispenser 30, but one bump precursor 12 may be formed by two or more discharges from the dispenser.
Further, in the present embodiment, the bump precursor 12 is formed on the wiring 4A, but the bump precursor 12 may be formed on the connection electrode 2A of the surface mount IC2.

バンプ前駆体１２の先端部１２Ａの曲率半径は小さく、図６に示すように尖塔型にするのが好ましい。バンプ前駆体１２の先端部１２Ａの曲率半径が小さく、図６に示すように尖塔型であれば、表面実装ＩＣ２の接続電極２Ａ表面との接触面積が小さくなるため、後述する部品熱圧着工程において、低圧条件でもバンプ前駆体１２と接続電極２Ａの接触圧を高めることができる。これにより、接続電極２Ａ表面の酸化被膜を破って接続電極２Ａに侵入させることができ、接続の信頼性を高めることができる。さらに、接続電極２Ａが、はんだめっきなどで厚く柔らかくある程度の弾性を持っている場合は、接続電極２Ａを弾性変形させて導電バンプ７の一部を接続電極２Ａに食い込ませることができ、接続電極２Ａと導電バンプ７との間で信頼性の高い電気的接続を得ることができる。 The radius of curvature of the tip portion 12A of the bump precursor 12 is small, and it is preferable to have a spire shape as shown in FIG. The radius of curvature of the tip portion 12A of the bump precursor 12 is small, and if it is a spire type as shown in FIG. 6, the contact area of the surface mount IC2 with the connection electrode 2A surface is small, so that in the component thermocompression bonding step described later. The contact pressure between the bump precursor 12 and the connection electrode 2A can be increased even under low pressure conditions. As a result, the oxide film on the surface of the connection electrode 2A can be broken and penetrated into the connection electrode 2A, and the reliability of the connection can be improved. Further, when the connection electrode 2A is thick and soft due to solder plating or the like and has a certain degree of elasticity, the connection electrode 2A can be elastically deformed so that a part of the conductive bump 7 bites into the connection electrode 2A. A highly reliable electrical connection can be obtained between the 2A and the conductive bump 7.

なお、バンプ前駆体１２の先端部の曲率半径が大きく、椀型であっても、表面実装ＩＣ２の接続電極２Ａとの圧着（部品熱圧着工程）時に絶縁層８となる液状の絶縁性樹脂を押しのけて接続電極２Ａに到達し、バンプ前駆体１２内の導電性粒子６の微小曲率が接続電極２Ａと接触する際に、微視的に大きな接触圧力が生じ、接続電極２Ａの酸化被膜を破って接続電極２Ａに侵入させることができ、接続電極２Ａと導電バンプ７との間で信頼性の高い電気的接続が得られる。また、バンプ前駆体１２の先端部１２Ａが椀型の方が、バンプ前駆体１２が接続電極２Ａに押しつぶされて導電バンプ７となる際、破壊されにくく（形状が維持されやすく）、隣接する導電バンプ７との接触（短絡）が発生し難いというメリットもある。 Even if the tip of the bump precursor 12 has a large radius of curvature and is bowl-shaped, a liquid insulating resin that becomes the insulating layer 8 during crimping with the connection electrode 2A of the surface mounting IC2 (part thermal crimping step) is used. When it is pushed away and reaches the connection electrode 2A and the minute curvature of the conductive particles 6 in the bump precursor 12 comes into contact with the connection electrode 2A, a microscopically large contact pressure is generated and breaks the oxide film of the connection electrode 2A. It can be penetrated into the connection electrode 2A, and a highly reliable electrical connection can be obtained between the connection electrode 2A and the conductive bump 7. Further, when the tip portion 12A of the bump precursor 12 is bowl-shaped, it is less likely to be destroyed (the shape is easily maintained) when the bump precursor 12 is crushed by the connection electrode 2A to become a conductive bump 7, and the adjacent conductive is easily maintained. There is also an advantage that contact (short circuit) with the bump 7 is unlikely to occur.

バンプ前駆体１２の先端部１２Ａの曲率半径は、１［μｍ］以上４０［μｍ］以下が好ましい。曲率半径が４０［μｍ］を越えると、後述する部品熱圧着工程において、バンプ前駆体１２と接続電極２Ａの接触面積が大きくなり、低圧条件では、バンプ前駆体１２を酸化被膜を破って接続電極２Ａに侵入させることができないおそれがある。その結果、信頼性の高い電気的接続が得られないおそれがある。また、曲率半径が１［μｍ］未満であると、後述する部品熱圧着工程において、接続電極２Ａに対する接触圧が高くなりすぎ、接続電極２Ａが破損するおそれがある。また、バンプ前駆体１２の先端部１２Ａの曲率半径は、５［μｍ］以上２０［μｍ］以下がより好ましい。バンプ前駆体１２の先端部１２Ａの曲率半径を、この範囲にすることで、接続電極２Ａの破損を良好に抑制でき、かつ、低圧条件で導電バンプ７の一部を接続電極２Ａに侵入させることができ、接続電極２Ａと導電バンプ７との間で信頼性の高い電気的接続を得ることができる。 The radius of curvature of the tip portion 12A of the bump precursor 12 is preferably 1 [μm] or more and 40 [μm] or less. When the radius of curvature exceeds 40 [μm], the contact area between the bump precursor 12 and the connection electrode 2A becomes large in the component thermocompression bonding step described later, and under low pressure conditions, the bump precursor 12 breaks the oxide film and the connection electrode It may not be possible to invade 2A. As a result, a reliable electrical connection may not be obtained. If the radius of curvature is less than 1 [μm], the contact pressure with respect to the connection electrode 2A may become too high in the component thermocompression bonding step described later, and the connection electrode 2A may be damaged. Further, the radius of curvature of the tip portion 12A of the bump precursor 12 is more preferably 5 [μm] or more and 20 [μm] or less. By setting the radius of curvature of the tip portion 12A of the bump precursor 12 within this range, damage to the connection electrode 2A can be satisfactorily suppressed, and a part of the conductive bump 7 can penetrate into the connection electrode 2A under low voltage conditions. It is possible to obtain a highly reliable electrical connection between the connection electrode 2A and the conductive bump 7.

また、バンプ前駆体１２の底面の直径ｊは、３００［μｍ］以下であることが好ましく、６０［μｍ］以上１５０［μｍ］以下であることがより好ましい。バンプ前駆体１２の底面の直径ｊが６０［μｍ］以上１５０［μｍ］以下であると、適用されるデバイスの小型化や高集積化に寄与できる。 The diameter j of the bottom surface of the bump precursor 12 is preferably 300 [μm] or less, and more preferably 60 [μm] or more and 150 [μm] or less. When the diameter j of the bottom surface of the bump precursor 12 is 60 [μm] or more and 150 [μm] or less, it can contribute to miniaturization and high integration of the applied device.

また、バンプ前駆体１２の高さｈは、バンプ前駆体１２の底面の直径ｊに応じて設定し、例えば、バンプ前駆体１２の底面の直径ｊの２．０倍以上０．８倍以下である。つまり、バンプ前駆体１２のアスペクト比（高さｈ／底面の直径ｊ）を、０．２以上０．８以下にすることが好ましい。具体的には、バンプ前駆体１２の高さは、１０［μｍ］以上２００［μｍ］以下であることが好ましく、２０［μｍ］以上８０［μｍ］以下であることがより好ましい。 The height h of the bump precursor 12 is set according to the diameter j of the bottom surface of the bump precursor 12, and is, for example, 2.0 times or more and 0.8 times or less the diameter j of the bottom surface of the bump precursor 12. is there. That is, it is preferable that the aspect ratio (height h / bottom diameter j) of the bump precursor 12 is 0.2 or more and 0.8 or less. Specifically, the height of the bump precursor 12 is preferably 10 [μm] or more and 200 [μm] or less, and more preferably 20 [μm] or more and 80 [μm] or less.

次に、配線４Ａ上に形成したバンプ前駆体１２を加熱乾燥して、バンプ前駆体１２に含まれる溶媒成分を除去する。具体的には、図６に示すバンプ前駆体１２を形成した配線基板５をホットプレート等で８０℃以上１２０℃以下、１５分間〜６０分間乾燥させ、バンプ前駆体１２の先端を尖塔状態で硬化させる。 Next, the bump precursor 12 formed on the wiring 4A is heated and dried to remove the solvent component contained in the bump precursor 12. Specifically, the wiring board 5 on which the bump precursor 12 shown in FIG. 6 is formed is dried on a hot plate or the like at 80 ° C. or higher and 120 ° C. or lower for 15 to 60 minutes, and the tip of the bump precursor 12 is cured in a spire state. Let me.

［プラズマ処理］
バンプ前駆体１２を形成した配線基板５について、加熱乾燥処理を行なったら、配線基板５の導電層４の配線４Ａを含む表面に表面処理としてプラズマ処理を実施する。配線基板５の導電層４の配線４Ａを含む表面にプラズマを照射することで、表面の分子鎖が切断され、表面に官能基が出現する。これにより、配線基板５の導電層４の配線４Ａを含む表面の官能基と、この表面に積層される絶縁層８の官能基とを化学結合させ、層間の界面における密着力を増加させ、密着強度を上げることができる。このような密着強度を上げるプラズマとしてはＮ２大気圧プラズマがある。Ｎ２大気圧プラズマを発生させるプラズマ処理装置としては、例えば、魁半導体社製「Ｐ５００−ＳＭ」等が挙げられる。プラズマ処理の条件としては、窒素、圧力０．１５［ＭＰａ］、照射時間５秒、ギャップ４［ｍｍ］が好ましい。 [Plasma processing]
After the wiring board 5 on which the bump precursor 12 is formed is heat-dried, plasma treatment is performed as a surface treatment on the surface of the wiring board 5 including the wiring 4A of the conductive layer 4. By irradiating the surface of the conductive layer 4 of the wiring board 5 including the wiring 4A with plasma, the molecular chains on the surface are cut and functional groups appear on the surface. As a result, the functional groups on the surface of the conductive layer 4 of the wiring board 5 including the wiring 4A and the functional groups of the insulating layer 8 laminated on the surface are chemically bonded to increase the adhesive force at the interface between the layers and adhere. The strength can be increased. As a plasma for increasing the adhesion strength, there is N2 atmospheric pressure plasma. Examples of the plasma processing apparatus for generating N2 atmospheric pressure plasma include "P500-SM" manufactured by Kaoru Semiconductor Co., Ltd. The conditions for plasma treatment are preferably nitrogen, a pressure of 0.15 [MPa], an irradiation time of 5 seconds, and a gap of 4 [mm].

また、表面処理として、薬品やブラストなどを用いて物理的に配線基板５の導電層４の配線４Ａを含む表面を変化させ（粗して）、表面積を増やす事で物理的な接着効果（アンカー効果）を高めて、配線基板表面と絶縁層との密着強度を高めてもよい。 Further, as a surface treatment, the surface of the conductive layer 4 of the wiring board 5 including the wiring 4A is physically changed (roughened) by using chemicals or blasting to increase the surface area, thereby increasing the physical adhesion effect (anchor). The effect) may be increased to increase the adhesion strength between the surface of the wiring board and the insulating layer.

［ダミーバンプ前駆体９ａの形成］
次に、図６に示すように、配線基板５のバンプ前駆体１２を形成した表面側に、ダミーバンプ前駆体９ａを形成する。ダミーバンプ前駆体９ａは、バンプ前駆体１２と同様に、ディスペンサから樹脂ペーストを吐出することで形成され、バンプ前駆体１２の先端が尖塔形状となっている。 [Formation of dummy bump precursor 9a]
Next, as shown in FIG. 6, a dummy bump precursor 9a is formed on the surface side of the wiring board 5 on which the bump precursor 12 is formed. Like the bump precursor 12, the dummy bump precursor 9a is formed by ejecting the resin paste from the dispenser, and the tip of the bump precursor 12 has a spire shape.

［絶縁性樹脂塗布］
図７は、絶縁性樹脂を、配線基板５のバンプ前駆体１２が形成された表面に塗布する様子を示す模式図である。
ダミーバンプ前駆体９ａを配線基板５に形成したら、図７に示すように液状絶縁性樹脂８ａをディスペンサ８０（例えば武蔵エンジニアリング社製、型番：ＭＬ−５０００ＸＩＩ）を用いて、バンプ前駆体１２及びダミーバンプ前駆体９ａの周囲を覆うように塗布する。液状絶縁性樹脂８ａは、後述する部品熱圧着工程において、バンプ前駆体１２の先端に容易に押しのけられて、バンプ前駆体１２の先端が容易に接続電極２Ａに接触するように、低粘度のものがよく、例えば、粘度としては、２０〜５０［Ｐａ・ｓ］が好ましい。また、絶縁性樹脂は、硬化温度は低い熱硬化性樹脂であり、熱膨張係数は、導電バンプ７の膨張係数より大きい方が好ましい。 [Insulating resin coating]
FIG. 7 is a schematic view showing how the insulating resin is applied to the surface of the wiring board 5 on which the bump precursor 12 is formed.
After the dummy bump precursor 9a is formed on the wiring board 5, the liquid insulating resin 8a is used as a dispenser 80 (for example, manufactured by Musashi Engineering Co., Ltd., model number: ML-5000XII) as shown in FIG. 7, and the bump precursor 12 and the dummy bump precursor are used. Apply so as to cover the circumference of the body 9a. The liquid insulating resin 8a has a low viscosity so that it is easily pushed away by the tip of the bump precursor 12 and the tip of the bump precursor 12 easily contacts the connection electrode 2A in the component thermocompression bonding step described later. For example, the viscosity is preferably 20 to 50 [Pa · s]. Further, the insulating resin is a thermosetting resin having a low curing temperature, and the coefficient of thermal expansion is preferably larger than the coefficient of expansion of the conductive bump 7.

［部品熱圧着］
図８は、部品熱圧着工程について説明する図である。
バンプ前駆体１２を表面実装ＩＣ２の接続電極２Ａに圧着させる工程と、液体絶縁性樹脂を熱硬化させる工程とを同時に行なう。
まず、図８（ａ）に示すように、表面実装ＩＣ２をヒータ付きコレット９０で吸着し、接続電極２Ａと配線４Ａ（基板側電極）とを位置合わせする。次に、コレット９０を下降させて、図８（ｂ）に示すように、表面実装ＩＣ２を配線基板５に向けて加圧する。また、これと同時にコレット９０に設けられたヒータを加熱しバンプ前駆体１２を表面実装ＩＣ２の接続電極２Ａに圧着させるとともに、液状の絶縁性樹脂を硬化させ、表面実装ＩＣ２を配線基板５に固定する。所定時間加熱したら、コレット内のヒータをＯＦＦにして冷却する。その後、半導体装置１が所定温度にまで低下したら、除圧し、部品熱圧着工程が完了する。 [Parts thermocompression bonding]
FIG. 8 is a diagram illustrating a component thermocompression bonding process.
The step of crimping the bump precursor 12 to the connection electrode 2A of the surface mount IC2 and the step of thermosetting the liquid insulating resin are simultaneously performed.
First, as shown in FIG. 8A, the surface mount IC 2 is attracted by the collet 90 with a heater, and the connection electrode 2A and the wiring 4A (board side electrode) are aligned. Next, the collet 90 is lowered to pressurize the surface mount IC 2 toward the wiring board 5 as shown in FIG. 8 (b). At the same time, the heater provided in the collet 90 is heated to crimp the bump precursor 12 to the connection electrode 2A of the surface mount IC 2, and the liquid insulating resin is cured to fix the surface mount IC 2 to the wiring board 5. To do. After heating for a predetermined time, the heater in the collet is turned off to cool. After that, when the semiconductor device 1 drops to a predetermined temperature, the pressure is depressurized and the component thermocompression bonding step is completed.

使用装置はパナソニック社ＦＣＢ−３で、加圧条件は、１バンプあたり０．０１［Ｎ］〜０．１８［Ｎ］が好ましい。加圧加熱時間は、塗布絶縁性樹脂の仕様で設定し、今回使用樹脂では、６０−９０℃、加熱時間は、６０−９０ＳＥＣである。 The device used is Panasonic FCB-3, and the pressurizing condition is preferably 0.01 [N] to 0.18 [N] per bump. The pressurizing heating time is set according to the specifications of the coated insulating resin, and the resin used this time is 60-90 ° C., and the heating time is 60-90SEC.

表面実装ＩＣ２を配線基板５に向けて加圧することで、低粘度の液状の絶縁性樹脂８ａを円錐状（先端が尖塔状）のバンプ前駆体１２が掻き分けて、液状樹脂下の接続電極２Ａに接触する。すると、バンプ前駆体１２の先端により接続電極２Ａの酸化被膜を破って接続電極に侵入する。また、接続電極２Ａを凹状に弾性変形させながら、自らも変形することで、バンプの導電性粒子６が接続電極２Ａの表面に最接近し導通がなされ導電バンプ７となる。そして、その圧力状態で、周辺の絶縁性樹脂が硬化し絶縁層８が形成される。熱硬化完了後、冷却しても、導電バンプ７と接続電極２Ａとの間で接触圧が残るよう、次の２つの条件を設定する。すなわち、１．冷却後除圧する、２．導電バンプ７の膨張係数より膨張係数が大きい（導電バンプ７の熱収縮率よりも熱収縮率の大きい）絶縁性樹脂を用いる。 By pressurizing the surface mount IC 2 toward the wiring substrate 5, the low-viscosity liquid insulating resin 8a is scraped by the conical (tip spire-shaped) bump precursor 12 and becomes the connection electrode 2A under the liquid resin. Contact. Then, the tip of the bump precursor 12 breaks the oxide film of the connection electrode 2A and invades the connection electrode. Further, by elastically deforming the connection electrode 2A in a concave shape and deforming itself, the conductive particles 6 of the bump come closest to the surface of the connection electrode 2A and become conductive to become the conductive bump 7. Then, in that pressure state, the surrounding insulating resin is cured to form the insulating layer 8. The following two conditions are set so that the contact pressure remains between the conductive bump 7 and the connection electrode 2A even when cooled after the completion of thermosetting. That is, 1. Depressurize after cooling 2. An insulating resin having an expansion coefficient larger than the expansion coefficient of the conductive bump 7 (the coefficient of thermal expansion is larger than the coefficient of thermal expansion of the conductive bump 7) is used.

また、部品圧着工程は、表面実装ＩＣ２を配線基板５に向けて加圧してバンプ前駆体１２を接続電極に圧着させた後に、加熱して液状の絶縁性樹脂を硬化させてもよい。例えば、接続電極２Ａと配線基板の配線４Ａとを位置合わせした後、表面実装ＩＣ２を配線基板５に加圧搭載して、バンプ前駆体１２を接続電極２Ａに食い込ませて（侵入させて）圧着させる。その後、加圧搭載した状態で、オーブンで加熱し、絶縁性樹脂を熱硬化させるやり方である。装置としては奥原電機社 ＳＭＴ−６４ＲＨ、精度は自動画像処理：±０．０４［ｍｍ］ （０４０２・０６０３は別オプション）ステージアライメント：±０．０５［ｍｍ］を用いることができる。 Further, in the component crimping step, the surface mount IC 2 may be pressed toward the wiring board 5 to crimp the bump precursor 12 to the connection electrode, and then heated to cure the liquid insulating resin. For example, after aligning the connection electrode 2A and the wiring 4A of the wiring board, the surface mount IC 2 is pressure-mounted on the wiring board 5, and the bump precursor 12 is made to bite (penetrate) into the connection electrode 2A and crimped. Let me. After that, it is a method of thermosetting the insulating resin by heating it in an oven while it is mounted under pressure. Okuhara Electric Co., Ltd. SMT-64RH can be used as the apparatus, and automatic image processing: ± 0.04 [mm] (0402, 0603 is an optional option), stage alignment: ± 0.05 [mm] can be used.

また、パナソニック社ＦＣＢ−３で、表面実装ＩＣ２を配線基板５に向けて加圧してバンプ前駆体１２を接続電極に圧着すると同時に加熱し、絶縁性樹脂のゲル化する時間まで、加圧加熱した後に、オーブンで所定の硬化時間、加熱して絶縁性樹脂を硬化させてもよい。 Further, with Panasonic FCB-3, the surface mount IC2 was pressed toward the wiring board 5 and the bump precursor 12 was pressed against the connection electrode and heated at the same time, and the insulating resin was pressurized and heated until the gelling time. Later, the insulating resin may be cured by heating in an oven for a predetermined curing time.

図９は、圧着後の導電バンプ７と接続電極２Ａと示す断面図である。
図中実線は、圧着前の導電バンプ７であるバンプ前駆体１２を示している。
図９に示すように、本実施形態においては、接続電極２Ａを凹形状に弾性変形させて、導電バンプ７が接続電極２Ａに食い込んでいる。 FIG. 9 is a cross-sectional view showing the conductive bump 7 and the connection electrode 2A after crimping.
The solid line in the figure shows the bump precursor 12 which is the conductive bump 7 before crimping.
As shown in FIG. 9, in the present embodiment, the connection electrode 2A is elastically deformed into a concave shape, and the conductive bump 7 bites into the connection electrode 2A.

このように、導電バンプ７が接続電極２Ａに食い込むことで、以下の利点を得ることができる。すなわち、導電バンプ７が接続電極２Ａに食い込まないものにおいては、導電バンプ７と接続電極２Ａとの圧着を確実に維持するために、絶縁性樹脂として、導電バンプよりも硬化収縮率の高い樹脂を用いる必要があり、絶縁性樹脂の適用範囲が狭くなってしまう。また、硬化収縮率は熱硬化温度が高いものほど大きいため、部品熱圧着工程における加熱温度が高くなり、表面実装ＩＣ２や配線基板５にかかる熱的ダメージが大きくなってしまう。
このように、従来においては、導電バンプよりも硬化収縮率の高い樹脂を用いるという制約があり、絶縁性樹脂として、硬化収縮率が高いエポキシ系の硬い樹脂に絞られてしまっていた。また、このような硬いエポキシ樹脂に絞られるため、硬化後には材料内部残留応力や残留歪が生じ、これが半導体装置の強度低下や反り変形などの不良原因となるおそれがあった。 By biting the conductive bump 7 into the connection electrode 2A in this way, the following advantages can be obtained. That is, in the case where the conductive bump 7 does not bite into the connection electrode 2A, in order to reliably maintain the pressure bonding between the conductive bump 7 and the connection electrode 2A, a resin having a higher curing shrinkage rate than the conductive bump is used as the insulating resin. It is necessary to use it, and the applicable range of the insulating resin is narrowed. Further, since the curing shrinkage rate is higher as the thermosetting temperature is higher, the heating temperature in the component thermocompression bonding step becomes higher, and the thermal damage applied to the surface mount IC 2 and the wiring substrate 5 becomes larger.
As described above, conventionally, there is a restriction that a resin having a higher curing shrinkage rate than the conductive bump is used, and the insulating resin has been narrowed down to an epoxy-based hard resin having a higher curing shrinkage rate. Further, since the epoxy resin is squeezed to such a hard epoxy resin, residual stress and residual strain inside the material are generated after curing, which may cause defects such as a decrease in strength and warpage deformation of the semiconductor device.

これに対し、本実施形態では、接続電極２Ａを凹形状に弾性変形させて、導電バンプ７が接続電極２Ａに食い込むような形で接触している。これにより、導電バンプの収縮率の方が絶縁性樹脂の収縮率よりも大きく、導電バンプ７の収縮によって導電バンプ７が接続電極２Ａから離れようとしたときに、凹形状に弾性変形した接続電極２Ａの復元力で導電バンプ７の収縮に追随し、導電バンプ７との接触を維持することができる。これにより、従来の構成に比べて、絶縁性樹脂として、硬化収縮率の低い樹脂を用いることが可能となり、絶縁性樹脂の適用範囲を広げることができる。これにより、絶縁性樹脂として、熱硬化温度が低い樹脂を用いることが可能となり、表面実装ＩＣ２や配線基板５にかかる熱的ダメージを低減することができる。また、絶縁性樹脂として柔らかい樹脂や植物由来系樹脂を用いることが可能となる。絶縁性樹脂として柔らかい樹脂を用いることで、曲げ性のよい半導体装置を得ることができ、内部残留応力や残留歪が生じるのを抑制することができ、半導体装置の強度低下や反り変形などの不良原因が発生するのを抑制することができる。また、絶縁性樹脂として植物由来系樹脂を用いることで環境にやさしい半導体装置を提供することが可能となる。 On the other hand, in the present embodiment, the connection electrode 2A is elastically deformed into a concave shape, and the conductive bump 7 is in contact with the connection electrode 2A so as to bite into the connection electrode 2A. As a result, the shrinkage rate of the conductive bump is larger than the shrinkage rate of the insulating resin, and when the conductive bump 7 tries to separate from the connection electrode 2A due to the shrinkage of the conductive bump 7, the connection electrode is elastically deformed into a concave shape. With the restoring force of 2A, it is possible to follow the contraction of the conductive bump 7 and maintain the contact with the conductive bump 7. As a result, it becomes possible to use a resin having a low curing shrinkage rate as the insulating resin as compared with the conventional configuration, and the applicable range of the insulating resin can be expanded. This makes it possible to use a resin having a low thermosetting temperature as the insulating resin, and it is possible to reduce thermal damage to the surface mount IC 2 and the wiring board 5. Further, it becomes possible to use a soft resin or a plant-derived resin as the insulating resin. By using a soft resin as the insulating resin, a semiconductor device with good bendability can be obtained, internal residual stress and residual strain can be suppressed, and defects such as strength reduction and warpage deformation of the semiconductor device can be suppressed. It is possible to suppress the occurrence of the cause. Further, by using a plant-derived resin as the insulating resin, it becomes possible to provide an environment-friendly semiconductor device.

また、接続電極２Ａが硬いものでほとんど弾性変形しないものでも、本実施形態では、接続電極２Ａの酸化被膜を破って、導電バンプ７の一部が直接、接続電極２Ａに接触して導電性を良好にしている。従って、多少、接続電極２Ａと導電バンプ７のとの圧着力が弱くても、良好な導通状態を維持することができる。よって、絶縁性樹脂の収縮によって接続電極２Ａと導電バンプ７のとの圧着力を大きく高めずと、良好な接続状態を維持することができる。これにより、接続電極２Ａの酸化被膜を介して導電バンプ７が接続電極２Ａと接触するものに比べて、硬化収縮率が小さい絶縁性樹脂が選択可能となり、絶縁性樹脂の適用範囲を広げることができる。 Further, even if the connection electrode 2A is hard and hardly elastically deformed, in the present embodiment, the oxide film of the connection electrode 2A is broken, and a part of the conductive bump 7 directly contacts the connection electrode 2A to make it conductive. It is in good condition. Therefore, even if the crimping force between the connection electrode 2A and the conductive bump 7 is weak, a good conductive state can be maintained. Therefore, a good connection state can be maintained without significantly increasing the crimping force between the connection electrode 2A and the conductive bump 7 due to the shrinkage of the insulating resin. As a result, an insulating resin having a smaller curing shrinkage rate than that of the conductive bump 7 in contact with the connecting electrode 2A via the oxide film of the connecting electrode 2A can be selected, and the applicable range of the insulating resin can be expanded. it can.

また、図中鎖線で示すように、円錐状で先端が尖塔状のバンプ前駆体１２が、大きく変形し圧着前に比べて、曲率半径が大きくなっている。このように、圧着後、バンプ先端の曲率半径が大きく（曲率が小さく）なることで、接続電極２Ａとの接触面積が増え、接続信頼性を高めることができる。また、圧着前の導電バンプ７であるバンプ前駆体の高さをｈ、圧着前の導電バンプ７の高さをｈ２とする、（ｈ２／ｈ）×１００≦９０％となっており、高さが１０％以上減少していた。このように、圧着によりバンプ前駆体１２が高さ方向に大きく変形する（圧縮される）ことで、高さ方向において、導電バンプ７に含まれる導電性粒子６を密にすることができ、良好に接続電極２Ａと配線４Ａとの間を電気的に接続することができる。 Further, as shown by the chain line in the figure, the bump precursor 12 having a conical shape and a spire-shaped tip is greatly deformed and has a larger radius of curvature than before crimping. In this way, after crimping, the radius of curvature of the tip of the bump becomes large (the curvature is small), so that the contact area with the connection electrode 2A increases, and the connection reliability can be improved. Further, the height of the bump precursor which is the conductive bump 7 before crimping is h, and the height of the conductive bump 7 before crimping is h2, which is (h2 / h) × 100 ≦ 90%. Was reduced by 10% or more. In this way, the bump precursor 12 is greatly deformed (compressed) in the height direction by crimping, so that the conductive particles 6 contained in the conductive bump 7 can be made dense in the height direction, which is good. The connection electrode 2A and the wiring 4A can be electrically connected to each other.

本実施形態においては、導電バンプ７として、導電性粒子６を含む導電ペーストを用いることで、導電バンプ７を例えば、配線４Ａまたは接続電極２Ａにワイヤーボンディングで形成した金属とした場合に比べて、容易に変形し圧着の際に、接続電極２Ａに大きな接触圧がかかり続けることがなく、接続電極の破損を抑制することができる。また、バンプ前駆体１２先端を尖塔状とすることで、例えば、スクリーン印刷で導電ペーストを塗布してバンプ前駆体を配線４Ａに形成し、バンプ前駆体１２の接続電極に圧着する面がほぼ平面なものに比べて、表面実装ＩＣ２の配線基板５に対する加圧力が低圧でも１０％以上バンプ前駆体１２を圧縮することができる。これにより、高さ方向において、導電バンプ７に含まれる導電性粒子６を密にすることができ、良好に接続電極２Ａと配線４Ａとの間を電気的に接続することができる。これにより、圧着時にかかる接続電極の接触圧を低減（接触圧：０．０１［Ｎ／バンプの数］以上０．１８［Ｎ／バンプ］以下に）することができ、接続電極２Ａの破損を抑制することができる。また、バンプ前駆体１２の接続電極に圧着する面がほぼ平面なものに比べて、低圧状態でも、高い接触圧を得ることができ、接続電極の酸化被膜を破くことができ、導電バンプ７を接続電極に侵入させることができ信頼性の高い接続を行なうことができる。また、接続電極を凹状に弾性変形させて、食い込ませることができ、絶縁性樹脂の使用範囲を広げることができる。 In the present embodiment, by using the conductive paste containing the conductive particles 6 as the conductive bump 7, the conductive bump 7 is made of a metal formed by wire bonding to the wiring 4A or the connection electrode 2A, for example, as compared with the case where the conductive bump 7 is made of a metal formed by wire bonding. When it is easily deformed and crimped, a large contact pressure does not continue to be applied to the connecting electrode 2A, and damage to the connecting electrode can be suppressed. Further, by forming the tip of the bump precursor 12 into a spire shape, for example, a conductive paste is applied by screen printing to form the bump precursor in the wiring 4A, and the surface to be pressure-bonded to the connection electrode of the bump precursor 12 is substantially flat. The bump precursor 12 can be compressed by 10% or more even when the pressing force applied to the wiring substrate 5 of the surface mount IC 2 is low. As a result, the conductive particles 6 contained in the conductive bumps 7 can be made dense in the height direction, and the connection electrode 2A and the wiring 4A can be satisfactorily connected electrically. As a result, the contact pressure of the connection electrode applied during crimping can be reduced (contact pressure: 0.01 [N / number of bumps] or more and 0.18 [N / bumps] or less), and the connection electrode 2A is damaged. It can be suppressed. Further, as compared with the case where the surface of the bump precursor 12 to be crimped to the connection electrode is substantially flat, a high contact pressure can be obtained even in a low pressure state, the oxide film of the connection electrode can be broken, and the conductive bump 7 can be formed. It can penetrate the connection electrode and make a highly reliable connection. Further, the connection electrode can be elastically deformed in a concave shape so as to bite into the connection electrode, and the range of use of the insulating resin can be expanded.

また、本実施形態の半導体装置１によれば、接合対象となる表面実装ＩＣ２と配線基板５とを電気的に接続する際、バンプ前駆体１２の周囲に配置したダミーバンプ９が、表面実装ＩＣ２の移動を規制し、バンプ前駆体１２の潰れ量を規制できる。これにより、バンプ前駆体１２が変形しすぎて、隣のバンプ前駆体と接触して短絡してしまうのを防止することができる。 Further, according to the semiconductor device 1 of the present embodiment, when the surface mount IC 2 to be bonded and the wiring board 5 are electrically connected, the dummy bumps 9 arranged around the bump precursor 12 are the surface mount IC 2. The movement can be regulated, and the amount of crushing of the bump precursor 12 can be regulated. As a result, it is possible to prevent the bump precursor 12 from being deformed too much and coming into contact with the adjacent bump precursor 12 to cause a short circuit.

次に、本出願人が行なった検証試験について説明する。
検証試験は、実施例１〜４、比較例１〜２の半導体装置１を作成し、導通性、短絡の有無などを評価した。 Next, the verification test conducted by the applicant will be described.
In the verification test, the semiconductor devices 1 of Examples 1 to 4 and Comparative Examples 1 and 2 were prepared, and the continuity, the presence or absence of a short circuit, and the like were evaluated.

［実施例１］
実施例１は、次のようにして作成した。基材３としてのポリエチレンナフタレート（材料）のフィルム基材上にグラビアオフセット印刷法により導電ペースト（ＤＮＰファインケミカル社製、型番：ＦＡＩＮＡＰ）を印刷することで電極を有する引き出し電極パターン（配線４Ａ）を形成し、印刷電極シート（配線基板５）を作製した。引き出し電極パターンは、０．５［ｍｍ］サイズ、電極のピッチが０．６［ｍｍ］、隣接電極間スペースが０．１［ｍｍ］、電極数が２×２列とした。 [Example 1]
Example 1 was created as follows. By printing a conductive paste (manufactured by DNP Fine Chemical Co., Ltd., model number: FAINAP) on a film base material of polyethylene naphthalate (material) as the base material 3 by a gravure offset printing method, a lead-out electrode pattern (wiring 4A) having an electrode is formed. It was formed and a printed electrode sheet (wiring substrate 5) was produced. The extraction electrode pattern had a size of 0.5 [mm], an electrode pitch of 0.6 [mm], a space between adjacent electrodes of 0.1 [mm], and a number of electrodes of 2 × 2 rows.

表面実装ＩＣ２として、ＲＧＢフルカラーＬＥＤパッケージ（ＯｐｔｏＳｕｐｐｌｙ社製、型番：ＯＳＴＢ０６０３Ｃ１Ｃ−Ａ）を用いた。用いたＲＧＢフルカラーＬＥＤパッケージは、長さＬ：１．６［ｍｍ］×幅Ｗ：１．５［ｍｍ］×厚みＴ：０．５［ｍｍ］サイズで、その４端子の電極は銅表面にはニッケル及び金めっきが施され、各接続電極２Ａは０．３５［ｍｍ］ピッチで２×２列である。 As the surface mount IC2, an RGB full-color LED package (manufactured by OptoSupply, model number: OSTB0603C1C-A) was used. The RGB full-color LED package used has a size of length L: 1.6 [mm] x width W: 1.5 [mm] x thickness T: 0.5 [mm], and its four-terminal electrodes are on the copper surface. Is nickel and gold plated, and each connecting electrode 2A has a pitch of 0.35 [mm] in 2 × 2 rows.

バンプ前駆体１２を次のように作成した。導電ペーストは、太陽インクのＨＣＭ−１００ ＡＦ６１００Ｈ２０（導電粒子の平均粒径２［μｍ］、最大粒径１５［μｍ］、粘度６００［Ｐａ・ｓ］以上）を希釈液で粘度５８０［Ｐａ・ｓ］に希釈したものを用いた。粘度計測は、栄弘精機ＨＢモデル回転数５ｒｐｍを用いた。 The bump precursor 12 was prepared as follows. The conductive paste is made by diluting HCM-100 AF6100H20 of solar ink (average particle size of conductive particles 2 [μm], maximum particle size 15 [μm], viscosity 600 [Pa · s] or more) with a viscosity of 580 [Pa · s]. ] Was diluted. For the viscosity measurement, Eiko Seiki HB model rotation speed of 5 rpm was used.

上記導電ペースト（太陽インキ社製、型番：ＡＦ６１００ Ｈ２０を希釈したもの）を、ディスペンサ（エンジニアリングシステム社製、Ｒ−ｊｅｔ）で塗布し、ＬＥＤパッケージの電極上に３段重ね塗りを行なってバンプ前駆体１２を形成した。１段塗りの塗布条件は、シリンジ背圧（空圧）を０．２５［Ｐａ］、Ｒ−ｕｎｉｔの空圧を０．１２５［Ｐａ］、ディスペンサのノズル内径を７０［μｍ］とし、バンプ径１２８［μｍ］、バンプ高さ２０［μｍ］のバンプを形成した。 The above conductive paste (manufactured by Taiyo Ink Co., Ltd., model number: AF6100 H20 diluted) is applied with a dispenser (manufactured by Engineering System Co., Ltd., R-jet), and the bump precursor is coated in three steps on the electrodes of the LED package. The body 12 was formed. The application conditions for the one-step coating are that the syringe back pressure (pneumatic pressure) is 0.25 [Pa], the R-unit air pressure is 0.125 [Pa], the nozzle inner diameter of the dispenser is 70 [μm], and the bump diameter. A bump having a bump height of 128 [μm] and a bump height of 20 [μm] was formed.

また、２段、３段重ね塗りの塗布条件は、同様の空気圧条件とし、２段塗りで、バンプ径１００［μｍ］、バンプ高さ４３［μｍ］のバンプとし、３段塗りで、バンプ径１１８［μｍ］、バンプ高さ８４［μｍ］のバンプ前駆体１２を得た。また、断面プロファイルから見積もられたバンプ前駆体１２の先端部の曲率半径は２０［μｍ］であった。また、微細バンプ用として、４０ミクロン径ノゾルを用い、２段塗りで、バンプ径６８［μｍ、］、高さ２５［μｍ］の微細バンプを得た。 The application conditions for the two-stage and three-stage coating are the same air pressure conditions, the bump diameter is 100 [μm] and the bump height is 43 [μm] for the two-stage coating, and the bump diameter is set for the three-stage coating. A bump precursor 12 having a bump height of 118 [μm] and a bump height of 84 [μm] was obtained. The radius of curvature of the tip of the bump precursor 12 estimated from the cross-sectional profile was 20 [μm]. Further, for fine bumps, a 40 micron diameter nosol was used, and fine bumps having a bump diameter of 68 [μm,] and a height of 25 [μm] were obtained by two-step coating.

次に、バンプ前駆体１２を形成したＬＥＤパッケージをホットプレート上で１００℃３０分間乾燥させた。白色干渉顕微鏡（日立ハイテクノロジーズ社製、型番：ＶＳ１３３０）を用いて観察したバンプ前駆体１２の底面直径は１６０［μｍ］、高さは８０［μｍ］（アスペクト比：０．５）であった。また、断面プロファイルから見積もられたバンプ前駆体の先端部の曲率半径は２０［μｍ］であった。 Next, the LED package on which the bump precursor 12 was formed was dried on a hot plate at 100 ° C. for 30 minutes. The bottom surface diameter of the bump precursor 12 observed using a white interference microscope (manufactured by Hitachi High-Technologies Corporation, model number: VS1330) was 160 [μm], and the height was 80 [μm] (aspect ratio: 0.5). .. The radius of curvature of the tip of the bump precursor estimated from the cross-sectional profile was 20 [μm].

次に、配線基板５としての印刷電極シート上に、ディスペンサ（武蔵エンジニアリング社製、型番：ＭＬ−５０００ＸＩＩ）を用いて接着剤（協立化学産業社製、型番：９１３５）を塗布した。 Next, an adhesive (manufactured by Kyoritsu Kagaku Sangyo Co., Ltd., model number: 9135) was applied onto the printed electrode sheet as the wiring board 5 using a dispenser (manufactured by Musashi Engineering Co., Ltd., model number: ML-5000XII).

次に、表面実装ＩＣ２としてのＬＥＤパッケージと配線基板５としての印刷電極シートとを、ＬＥＤパッケージの接続電極２Ａとしての導電部と印刷電極シートの配線４Ａとしての電極との位置が整合するよう固定した。そして、１００℃に温度調節された半田ごて（大洋電機産業社製ＲＸー８０２ＡＳ）に先端がφ４ｍｍの平面となった圧着ツールを装着し、ＬＥＤパッケージの上から６０秒間、圧力：０．２[Ｎ/バンプ数]で当てて硬化し、実施例１の半導体装置を得た。 Next, the LED package as the surface mount IC 2 and the printed electrode sheet as the wiring substrate 5 are fixed so that the positions of the conductive portion as the connection electrode 2A of the LED package and the electrode as the wiring 4A of the printed electrode sheet are aligned. did. Then, a crimping tool with a flat tip of φ4 mm was attached to a soldering iron (RX-802AS manufactured by Taiyo Denki Sangyo Co., Ltd.) whose temperature was adjusted to 100 ° C., and pressure: 0.2 for 60 seconds from the top of the LED package. The semiconductor device of Example 1 was obtained by applying and curing at [N / number of bumps].

（実施例２）
バンプ前駆体１２をＬＥＤパッケージではなく印刷電極シートの電極上に形成した以外は、実施例１と同様に作成し、実施例２の半導体装置を得た。 (Example 2)
The bump precursor 12 was produced in the same manner as in Example 1 except that the bump precursor 12 was formed on the electrode of the printed electrode sheet instead of the LED package, and the semiconductor device of Example 2 was obtained.

（実施例３）
実施例３は、次のようにして作成した。ポリエチレンナフタレート（材料）のフィルム基材上にグラビアオフセット印刷法により導電ペースト（ＤＮＰファインケミカル社製、型番：ＦＡＩＮＡＰ）を印刷することで電極を有する配線４Ａとしての引き出し電極パターン形成し、配線基板５としての印刷電極シートを作製した。引き出し電極パターンの電極間のピッチｄは、９０［μｍ］で、電極の幅は６０［μｍ］で、電極間の最小スペースは、３０［μｍ］とした。さらに大気圧プラズマ装置（魁半導体社製、型番：Ｐ５００−ＳＭ）を用いて、窒素雰囲気下、圧力：０．１５［ＭＰａ］の条件で５秒間プラズマ処理を行った。 (Example 3)
Example 3 was created as follows. By printing a conductive paste (manufactured by DNP Fine Chemical Co., Ltd., model number: FAINAP) on a film substrate of polyethylene naphthalate (material) by a gravure offset printing method, a lead-out electrode pattern as a wiring 4A having an electrode is formed, and a wiring substrate 5 is formed. A printed electrode sheet was prepared as a product. The pitch d between the electrodes of the extraction electrode pattern was 90 [μm], the width of the electrodes was 60 [μm], and the minimum space between the electrodes was 30 [μm]. Further, using an atmospheric pressure plasma apparatus (manufactured by Kai Semiconductor Co., Ltd., model number: P500-SM), plasma treatment was performed for 5 seconds under the condition of a pressure of 0.15 [MPa] under a nitrogen atmosphere.

表面実装ＩＣ２としては、長さＬ：８［ｍｍ］×幅Ｗ：６［ｍｍ］×厚さＴ：０．８［ｍｍ］サイズで、接続電極２Ａ間のピッチｄは、９０［μｍ］で、接続電極２Ａの幅は６０［μｍ］で、接続電極２Ａ間の最小スペースは、３０［μｍ］のものを用いた。 The surface-mounted IC2 has a size of length L: 8 [mm] x width W: 6 [mm] x thickness T: 0.8 [mm], and a pitch d between the connection electrodes 2A is 90 [μm]. The width of the connection electrode 2A was 60 [μm], and the minimum space between the connection electrodes 2A was 30 [μm].

バンプ前駆体１２は、次のようにして得た。平均粒子径が１［μｍ］の導電性粒子としての銀粉、市販のエポキシ樹脂、硬化剤、および有機溶剤を公知の割合で混合した導電ペーストを用い、ディスペンサ（エンジニアリングシステム社製、Ｒ−ｊｅｔ）で塗布し、表面実装ＩＣ２の電極上にバンプ前駆体１２を形成した。塗布条件は、シリンジ背圧（空圧）を０．２［Ｐａ］、Ｒ−ｕｎｉｔの空圧を０．２［Ｐａ］、ディスペンサのノズル内径を４０［μｍ］として、３回重ねとした。 The bump precursor 12 was obtained as follows. Dispenser (R-jet, manufactured by Engineering System Co., Ltd.) using a conductive paste in which silver powder as conductive particles having an average particle diameter of 1 [μm], a commercially available epoxy resin, a curing agent, and an organic solvent are mixed in a known ratio. The bump precursor 12 was formed on the electrode of the surface mount IC2. The coating conditions were as follows: the syringe back pressure (pneumatic pressure) was 0.2 [Pa], the R-unit air pressure was 0.2 [Pa], and the nozzle inner diameter of the dispenser was 40 [μm].

次に、バンプ前駆体１２を形成した表面実装ＩＣ２をホットプレート上で１００℃３０分間乾燥させた。白色干渉顕微鏡（日立ハイテクノロジーズ社製、型番：ＶＳ１３３０）を用いて観察したバンプの底面直径は１００［μｍ］、高さは５０［μｍ］（アスペクト比：０．５）であった。また、断面プロファイルから見積もられたバンプ前駆体１２の先端部の曲率半径は８［μｍ］であった。 Next, the surface mount IC2 on which the bump precursor 12 was formed was dried on a hot plate at 100 ° C. for 30 minutes. The bottom surface diameter of the bump observed using a white interference microscope (manufactured by Hitachi High-Technologies Corporation, model number: VS1330) was 100 [μm], and the height was 50 [μm] (aspect ratio: 0.5). The radius of curvature of the tip of the bump precursor 12 estimated from the cross-sectional profile was 8 [μm].

配線基板５としての印刷電極シート上に、ディスペンサ（武蔵エンジニアリング社製、型番：ＭＬ−５０００ＸＩＩ）を用いて絶縁性樹脂接着剤ＡＦＴ：ＤＪ−２１（粘度：１０［Ｐａ・ｓ］、ガラス転移温度Ｔｇ：２９［℃］、ヤング率：８０［ＭＰａ］、ＣＴＥ α１（＜Ｔｇ）：５８［ｐｐｍ／℃］、ＣＴＥ α２（＞Ｔｇ）：２８０［ｐｐｍ／℃］）を膜厚３０［μｍ］となるよう塗布した。 Insulating resin adhesive AFT: DJ-21 (viscosity: 10 [Pa · s], glass transition temperature) using a dispenser (manufactured by Musashi Engineering Co., Ltd., model number: ML-5000XII) on a printed electrode sheet as the wiring substrate 5. Tg: 29 [° C.], Young's modulus: 80 [MPa], CTE α1 (<Tg): 58 [ppm / ° C], CTE α2 (> Tg): 280 [ppm / ° C]) with a thickness of 30 [μm] It was applied so as to be.

次に、表面実装ＩＣ２と配線基板５としての印刷電極シートとを、表面実装ＩＣチップの接続電極２Ａと印刷電極シートの配線４Ａとしての電極との位置が整合するよう固定し、（温度：１００［℃］、圧力：０．１５［Ｎ／バンプ数］、処理時間：９０秒、使用装置：パナソニック社製ＦＣＢ−３）加熱圧着し、実施例３の半導体装置を得た。圧着ツールは２［ｍｍ］×４０［ｍｍ］の長方形のものを用いた。 Next, the surface mount IC 2 and the printed electrode sheet as the wiring substrate 5 are fixed so that the positions of the connection electrode 2A of the surface mount IC chip and the electrode as the wiring 4A of the printed electrode sheet are aligned (temperature: 100). [° C.], pressure: 0.15 [N / number of bumps], processing time: 90 seconds, apparatus used: FCB-3 manufactured by Panasonic Corporation) Heat crimping was performed to obtain the semiconductor apparatus of Example 3. The crimping tool used was a rectangle of 2 [mm] × 40 [mm].

（実施例４）
複数組の表面実装ＩＣ２としてのＬＥＤパッケージと配線基板５としての印刷電極シートをマウンター（奥原電機社 ＳＭＴ−６４Ｒ、精度は自動画像処理：±０．０４［ｍｍ］（０４０２・０６０３は別オプション））ステージアライメント：±０．０５［ｍｍ］を用いて位置が整合するよう固定し、その後ホットプレートで１００℃、６０秒加熱して一括で硬化した以外は、実施例１と同じ方法で実施例４の半導体装置を得た。 (Example 4)
Mounted LED package as multiple sets of surface mount IC2 and printed electrode sheet as wiring board 5 (Okuhara Electric Co., Ltd. SMT-64R, accuracy is automatic image processing: ± 0.04 [mm] (0402 and 0603 are separate options) ) Stage alignment: The same method as in Example 1 except that the positions were fixed using ± 0.05 [mm] and then heated at 100 ° C. for 60 seconds on a hot plate to cure all at once. 4 semiconductor devices were obtained.

（比較例１）
実施例１におけるバンプの形成及び接着剤の塗布のかわりに、配線基板５としての印刷電極シートの各電極上に導電接着剤（セメダイン製、ＸＸＥＣ０５）を塗布した。ＬＥＤパッケージの導電部と印刷電極シートの電極との位置が整合するよう固定し、その後ホットプレートで１００℃、６０秒加熱して硬化させて比較例１の半導体装置を得た。 (Comparative Example 1)
Instead of forming the bumps and applying the adhesive in Example 1, a conductive adhesive (manufactured by Cemedine, XXEC05) was applied onto each electrode of the printed electrode sheet as the wiring board 5. The conductive portion of the LED package and the electrode of the printed electrode sheet were fixed so as to be aligned with each other, and then heated on a hot plate at 100 ° C. for 60 seconds to cure the semiconductor device of Comparative Example 1.

（比較例２）
実施例２におけるバンプの形成及び接着剤の塗布のかわりに、印刷電極シート上に異方導電ペースト（京セラ社製、ＸＡＰ−９００）を厚さ５０［μｍ］となるよう塗布した。ＬＥＤパッケージと印刷電極シートをＬＥＤパッケージの導電部と印刷電極シートの電極の位置が整合するよう固定し、熱圧着機（大橋製作所社製、型番：ＢＤ−０３）で１５０［℃］、圧力０．１［ＭＰａ］下で１０秒間加熱圧着し、電子装置を得た。圧着ツールは２［ｍｍ］×４０［ｍｍ］の長方形のものを用いた。 (Comparative Example 2)
Instead of forming the bumps and applying the adhesive in Example 2, an anisotropic conductive paste (XAP-900 manufactured by Kyocera Corporation) was applied on the printed electrode sheet so as to have a thickness of 50 [μm]. Fix the LED package and the printed electrode sheet so that the conductive parts of the LED package and the electrodes of the printed electrode sheet are aligned, and use a thermocompression bonding machine (manufactured by Ohashi Seisakusho Co., Ltd., model number: BD-03) at 150 [° C.] and pressure 0. Thermocompression bonding was performed under 1 [MPa] for 10 seconds to obtain an electronic device. The crimping tool used was a rectangle of 2 [mm] × 40 [mm].

［評価方法］
（バンプ導通評価）
各実施例、比較例の半導体装置について、表面実装ＩＣ２の電極と、印刷電極シートの導体部とをそれぞれ評価ボードに接続させて、テスター（ＳＡＮＷＡ社製、型番：ＰＣ７００）を用いてバンプによる接続部の導通の有無を確認した。１００箇所の接続部について導通の有無を確認し、導通が確認された接続部の割合を算出し、初期の接続割合とした。 [Evaluation method]
(Bump continuity evaluation)
For the semiconductor devices of each example and comparative example, the electrodes of the surface mount IC2 and the conductor portion of the printed electrode sheet are connected to the evaluation board, respectively, and are connected by bumps using a tester (manufactured by SANWA, model number: PC700). It was confirmed whether or not there was continuity in the part. The presence or absence of continuity was confirmed for 100 connection parts, and the ratio of the connection parts where continuity was confirmed was calculated and used as the initial connection ratio.

その後、気槽式温度サイクル試験機を用い、温度サイクル試験を実施した。温度サイクル試験の条件は、低温側温度：−４０℃、高温側温度：１０５℃、保持時間：各１５分、繰り返し回数：２３０サイクルとした。試験完了後に再び接続割合を算出し、温度サイクル試験後の接続割合とした。 Then, a temperature cycle test was carried out using an air tank type temperature cycle tester. The conditions of the temperature cycle test were low temperature side temperature: −40 ° C., high temperature side temperature: 105 ° C., holding time: 15 minutes each, and number of repetitions: 230 cycles. After the test was completed, the connection ratio was calculated again and used as the connection ratio after the temperature cycle test.

初期の接続割合と、試験完了後の接続割合の両方が、９０％以上の場合は、導通評価を「○」と判定し、いずれか一方が、６０％以上〜９０％未満のときは、「△」と判定し、いずれか一方が、６０％未満のときは、「×」と判定した。 If both the initial connection ratio and the connection ratio after the test is completed are 90% or more, the continuity evaluation is judged as "○", and if either one is 60% or more and less than 90%, " When one of them was less than 60%, it was judged as "x".

［温度圧力ダメージ］
温度圧力ダメージは、作成した半導体装置についての装置全体における初期導通チェックで評価した。
導通不良なしを、「○」と判定し、導通不良ありを、「×」と判定した。 [Temperature pressure damage]
The temperature and pressure damage was evaluated by the initial continuity check of the manufactured semiconductor device in the entire device.
No continuity failure was determined as "◯", and with continuity failure was determined as "x".

（短絡評価）
各実施例および各比較例の半導体装置の、実装部品上の電極と印刷電極シート上の導電部を評価ボードに接続させて、それぞれ隣り合う電極又は導電部との短絡の有無をテスター（ＳＡＮＷＡ社製、型番：ＰＣ７００）を用いて確認し、短絡が無いものを、○、短絡があったものを×評価とした。 (Short circuit evaluation)
In the semiconductor devices of each example and each comparative example, the electrodes on the mounted components and the conductive parts on the printed electrode sheet are connected to the evaluation board, and the presence or absence of a short circuit between the adjacent electrodes or the conductive parts is checked by a tester (SANWA). Manufactured by, model number: PC700), the one without a short circuit was evaluated as ◯, and the one with a short circuit was evaluated as ×.

評価結果を下記表１に示す。 The evaluation results are shown in Table 1 below.

表１に示すように、導電接着法で製造した比較例１の半導体装置は、短絡が発生した。これは、導電接着法は、導電性接着剤の回りに絶縁性樹脂が充填されていないため、表面実装ＩＣの自重で、導電性接着剤が電極からはみ出して、短絡が発生したと考えられる。 As shown in Table 1, a short circuit occurred in the semiconductor device of Comparative Example 1 manufactured by the conductive bonding method. It is considered that this is because the conductive adhesive method does not fill the insulating resin around the conductive adhesive, so that the conductive adhesive protrudes from the electrode due to the weight of the surface mount IC, and a short circuit occurs.

また、ＡＣＦ（Ａｎｉｓｏｔｒｏｐｉｃ Ｃｏｎｄｕｃｔｉｖｅ Ｆｉｌｍ：異方性導電フィルム）を用いたＡＣＦ法で製造した比較例２では、部品圧着工程における圧力が、０．１［Ｍｐａ］で、また、温度が１５０℃と、高圧・高温で行なっているため、表面実装ＩＣ２にダメージが発生し、印刷電極パターンが破損して導通不良が「×」となり、温度圧力ダメージ評価が「×」となった。 Further, in Comparative Example 2 manufactured by the ACF method using the ACF (Anisotropic Conductive Film), the pressure in the component crimping step was 0.1 [Mpa] and the temperature was 150 ° C. Since the film was performed at high pressure and high temperature, the surface mount IC2 was damaged, the printed electrode pattern was damaged, the conduction failure was "x", and the temperature-pressure damage evaluation was "x".

一方、実施例１〜４については、導通性、温度圧力ダメージ、短絡、いずれも「○」評価となった。実施例１〜４は、バンプ前駆体１２を形成した後に、絶縁性樹脂を塗布して部品圧着工程を行なうＮＣＰ（ｎｏｎ-ｃｏｎｄｕｃｔｉｖｅ ｐａｓｔｅ）法で半導体装置を製造したので、比較例２よりも、部品圧着工程における圧力や温度を抑えることができ、温度圧力ダメージが「○」評価となった。 On the other hand, in Examples 1 to 4, the conductivity, temperature and pressure damage, and short circuit were all evaluated as “◯”. In Examples 1 to 4, a semiconductor device was manufactured by an NCP (non-conductive paste) method in which an insulating resin was applied and a component crimping step was performed after the bump precursor 12 was formed. Therefore, as compared with Comparative Example 2, The pressure and temperature in the component crimping process could be suppressed, and the temperature and pressure damage was evaluated as "○".

また、圧力を低く抑えることができたので、実施例３のような電極ピッチが９０μｍと狭いピッチでも、導電バンプが隣接する導電バンプに接触することがなく短絡することがなかった。 Further, since the pressure could be suppressed low, even if the electrode pitch was as narrow as 90 μm as in Example 3, the conductive bumps did not come into contact with the adjacent conductive bumps and did not cause a short circuit.

なお、表１には、各実施例、比較例の生産性、コスト評価を載せている。実施例４や比較例１は、複数の半導体装置について、一括で実装可能であり、最も生産性が高いので、生産性評価を「○」とした。実施例３と比較例２は、部品熱圧着を専用の装置で自動で行なうため、生産性評価を「△」とした。一方、実施例１や実施例２は、部品熱圧着を手動で行なうため、生産性評価を「×」とした。 Table 1 lists the productivity and cost evaluation of each example and comparative example. In Example 4 and Comparative Example 1, a plurality of semiconductor devices can be mounted at once and have the highest productivity. Therefore, the productivity evaluation is set to “◯”. In Example 3 and Comparative Example 2, since the thermocompression bonding of parts is automatically performed by a dedicated device, the productivity evaluation is set to “Δ”. On the other hand, in Example 1 and Example 2, since the thermocompression bonding of parts is performed manually, the productivity evaluation is set to "x".

以上に説明したものは一例であり、次の態様毎に特有の効果を奏する。
（態様１）
配線基板５と、配線基板５上に表面実装される表面実装ＩＣ２などの表面実装部品と、配線基板５の配線４Ａなどの電極および表面実装部品の接続電極２Ａなどの電極のいずれか一方の電極上に形成され他方の電極に接触して電極間を接続する導電バンプ７と、表面実装部品と配線基板とを互いに固定する絶縁性樹脂とを備えた半導体装置１などの電子装置において、導電バンプ７の一部が他方の電極の表面の酸化被膜を破って他方の電極と接触している
従来においては、配線基板の電極および表面実装部品の電極のいずれか一方の電極にスクリーン印刷により形成された先端面がほぼ平面状の導電バンプが、他方の電極の表面を被膜している酸化被膜に接触していた。その結果、この酸化被膜が電気抵抗となって導電バンプと他方の電極との間の導通性を阻害するおそれがあった。
これに対して態様１では、導電バンプの一部が他方の電極の表面の酸化被膜を破って他方の電極に接触しているので、導電バンプと他方の電極との間で良好な導通性を確保することができる。 What has been described above is an example, and has a unique effect in each of the following aspects.
(Aspect 1)
One of the wiring board 5, the surface mounting component such as the surface mounting IC2 surface-mounted on the wiring board 5, the electrode such as the wiring 4A of the wiring board 5, and the electrode such as the connection electrode 2A of the surface mounting component. In an electronic device such as a semiconductor device 1 provided with a conductive bump 7 formed on the top and contacting the other electrode to connect the electrodes, and an insulating resin for fixing the surface mount component and the wiring substrate to each other, the conductive bump A part of 7 breaks the oxide film on the surface of the other electrode and is in contact with the other electrode. Conventionally, it is formed by screen printing on either the electrode of the wiring substrate or the electrode of the surface mounting component. The conductive bump having a substantially flat tip surface was in contact with the oxide film coating the surface of the other electrode. As a result, this oxide film may become an electric resistance and hinder the conductivity between the conductive bump and the other electrode.
On the other hand, in the first aspect, since a part of the conductive bump breaks the oxide film on the surface of the other electrode and is in contact with the other electrode, good conductivity is provided between the conductive bump and the other electrode. Can be secured.

（態様２）
態様１において、導電バンプ７の一部が、他方の電極の凹んだ部分に入り込んでいる。
これによれば、実施形態で説明したように、導電バンプと接続電極などの他方の電極との接触面積を、凹んでいないものようりも増やすことができ、安定的に導電バンプと他方の電極との間を導通することができる。また、導電バンプの接触圧で他方の電極が弾性変形して凹んだ場合は、実施形態で説明したように、絶縁性樹脂として硬化収縮率の小さいものを用いることが可能となり、選択可能な絶縁性樹脂の幅を広げることができる。これにより、絶縁性樹脂として低い温度で熱硬化する樹脂や、柔らかい樹脂を用いることが可能となり、表面実装部品の熱的ダメージや半導体装置などの電子装置の強度低下や反り変形を抑制することができる。 (Aspect 2)
In the first aspect, a part of the conductive bump 7 has entered the recessed portion of the other electrode.
According to this, as described in the embodiment, the contact area between the conductive bump and the other electrode such as the connection electrode can be increased even if it is not recessed, and the conductive bump and the other electrode can be stably increased. Can be conductive between and. Further, when the other electrode is elastically deformed and dented due to the contact pressure of the conductive bump, it becomes possible to use a resin having a small curing shrinkage rate as the insulating resin as described in the embodiment, and selectable insulation can be used. The width of the sex resin can be widened. This makes it possible to use a resin that heat-cures at a low temperature or a soft resin as the insulating resin, and it is possible to suppress thermal damage to surface-mounted parts, decrease in strength of electronic devices such as semiconductor devices, and warpage deformation. it can.

（態様３）
態様１または２において、導電バンプ７は、導電性粒子６とバインダー樹脂とを有し、導電バンプは、他方の電極に圧着されており、圧着後の導電バンプ先端の曲率半径が、圧着前の曲率半径よりも大きく、圧着後の導電バンプの高さは、圧着前の９０％以下になっている。
このように、圧着後の導電バンプ先端の曲率半径が圧着前よりも大きくなることで、他方の電極との接触面積が増え、接続信頼性を高めることができる。また、圧着後の導電バンプの高さが、圧着前の９０％以下になることで、導電バンプの導電性粒子を密にでき、導通性を良くでき、接続信頼性を高めることができる。 (Aspect 3)
In the first or second aspect, the conductive bump 7 has the conductive particles 6 and the binder resin, the conductive bump is crimped to the other electrode, and the radius of curvature of the tip of the conductive bump after crimping is before crimping. It is larger than the radius of curvature, and the height of the conductive bump after crimping is 90% or less of that before crimping.
As described above, since the radius of curvature of the tip of the conductive bump after crimping is larger than that before crimping, the contact area with the other electrode is increased, and the connection reliability can be improved. Further, when the height of the conductive bump after crimping is 90% or less of that before crimping, the conductive particles of the conductive bump can be made dense, the conductivity can be improved, and the connection reliability can be improved.

（態様４）
態様１乃至３いずれかにおいて、導電バンプ７は、表面実装ＩＣ２などの表面実装部品の重心もしくは各電極の重心の少なくとも一方を基準として点対称となるように、複数個所形成されている。
これによれば、図２、図３を用いて説明したように、部品圧着工程時に各導電バンプ７に均等に圧力をかけることができる。 (Aspect 4)
In any one of the first to third aspects, the conductive bumps 7 are formed at a plurality of positions so as to be point-symmetric with respect to at least one of the center of gravity of the surface mount component such as the surface mount IC 2 or the center of gravity of each electrode.
According to this, as described with reference to FIGS. 2 and 3, pressure can be evenly applied to each conductive bump 7 during the component crimping process.

（態様５）
態様１乃至４いずれかにおいて、
前記導電樹脂バンプは、導電ペーストをディスペンサーで配線基板５の電極および表面実装ＩＣ２などの表面実装部品の電極のいずれか一方に塗布することで形成されたものである。
これによれば、実施形態で説明しように、他方の電極に圧着前の導電バンプ７の先端を尖塔状にすることが可能となり、圧着時に他方の電極に対して強い接触圧で導電バンプ７に接触させることができ、他方の電極の酸化被膜を破って、導電バンプの一部を他方の電極に侵入させることが可能となる。 (Aspect 5)
In any of aspects 1 to 4,
The conductive resin bump is formed by applying a conductive paste to either the electrode of the wiring board 5 or the electrode of a surface mount component such as a surface mount IC 2 with a dispenser.
According to this, as will be described in the embodiment, the tip of the conductive bump 7 before crimping to the other electrode can be formed into a spire shape, and the conductive bump 7 is formed with a strong contact pressure with respect to the other electrode during crimping. It can be brought into contact, and it is possible to break the oxide film of the other electrode and allow a part of the conductive bump to penetrate into the other electrode.

（態様６）
態様１乃至５いずれかにおいて、配線基板５は、樹脂基材３に電極が印刷で形成されている。
これによれば、簡単に樹脂基板に配線４Ａなどの電極を形成することができる。 (Aspect 6)
In any of aspects 1 to 5, the wiring board 5 has electrodes formed on the resin base material 3 by printing.
According to this, electrodes such as wiring 4A can be easily formed on the resin substrate.

（態様７）
態様１乃至６いずれかにおいて、配線基板上の絶縁性樹脂が接する領域は、前記絶縁性樹脂との密着強度を高める表面処理がされている。
これによれば、配線基板と表面実装ＩＣ２などの表面実装部品とを強固に固定することが可能となる。 (Aspect 7)
In any of aspects 1 to 6, the region of the wiring board in contact with the insulating resin is surface-treated to increase the adhesion strength with the insulating resin.
According to this, it is possible to firmly fix the wiring board and the surface mount component such as the surface mount IC2.

（態様８）
態様１乃至７いずれかにおいて、配線基板５に絶縁性樹脂を塗布し、表面実装部品が熱圧着により配線基板に実装される。
これによれば、絶縁性樹脂が熱硬化して配線基板５と表面実装ＩＣなどの表面実装部品とが固定されるとともに、導電バンプ７が他方の電極に圧着して、電気的な接続がなされる。 (Aspect 8)
In any of aspects 1 to 7, an insulating resin is applied to the wiring board 5, and surface mount components are mounted on the wiring board by thermocompression bonding.
According to this, the insulating resin is thermoset to fix the wiring board 5 and the surface mount component such as the surface mount IC, and the conductive bump 7 is crimped to the other electrode to make an electrical connection. To.

（態様９）
態様１乃至７いずれかにおいて、配線基板５または表面実装ＩＣなどの表面実装部品に絶縁性樹脂を塗布し、加圧により表面実装部品を配線基板に仮実装した後に、加熱して本実装する。
これによれば、実施例４で説明し複数の表面実装部品を配線基板との組を一括で加圧や加熱を行なうことが可能となり、生産性を高めることができる。 (Aspect 9)
In any of aspects 1 to 7, an insulating resin is applied to a surface mount component such as a wiring board 5 or a surface mount IC, the surface mount component is temporarily mounted on the wiring board by pressurization, and then heated for main mounting.
According to this, it becomes possible to collectively pressurize or heat a set of a plurality of surface mount components with a wiring board as described in the fourth embodiment, and it is possible to improve productivity.

（態様１０）
態様８または９において、絶縁性樹脂の膨張係数は、導電バンプ７の膨張係数より大きいことを特徴とする。
これによれば、実施形態で説明したように、絶縁性樹脂を加熱硬化後の冷却において、導電バンプ７と他方の電極との間で接触圧が減少しないようにでき、接続信頼性を高めることができる。 (Aspect 10)
In aspect 8 or 9, the coefficient of expansion of the insulating resin is larger than the coefficient of expansion of the conductive bump 7.
According to this, as described in the embodiment, it is possible to prevent the contact pressure between the conductive bump 7 and the other electrode from decreasing when the insulating resin is cooled after heat curing, and the connection reliability can be improved. Can be done.

（態様１１）
配線基板の電極および表面実装部品の電極のいずれか一方の電極に導電性ペーストを塗布して導電バンプを形成する工程と、表面実装部品の電極が形成された面または配線基板の電極が形成された面に絶縁性樹脂を塗布する工程と、表面実装部品および前記配線基板のいずれか一方を他方に向けて加圧して前記導電バンプを他方の電極に圧着する工程と、圧着する工程と同時、または、圧着する工程の後に、絶縁性樹脂を硬化させて表面実装部品と配線基板とを固定する工程とを有する電子装置の製造方法であって、圧着前の導電バンプの先端が尖塔状となるように、一方の電極に導電性ペーストを塗布する。
これによれば、実施形態で説明したように、導電バンプを他方の電極に圧着する際に、尖塔状の先端が当接し、高い接触圧で他方の電極に接触する。これにより、他方の電極の酸化被膜を尖塔状の先端が破り、導電バンプの一部を他方の電極に侵入させることができる。これにより、導電バンプの少なくとも一部が直接電極に接触し、導電バンプと他方の電極との導通性を良好にすることができる。その後は、導電バンプ尖塔状の先端が潰れて、他の電極との接触面積が増える。これにより、導電バンプと他方の電極との間で安定した導通を確保することができる。
また、他方の電極が、柔らかい場合、尖塔状の先端が高い接触圧で他方の電極に接触して他方の電極を弾性変形させて凹ませ、その凹んだ箇所に導電バンプの一部を入り込ませることができる。これにより、接続信頼性を高めることができるととともに、硬化収縮率の低い絶縁性樹脂を用いても導電バンプと他方の電極との接触関係を維持することができ、使用可能な絶縁性樹脂の範囲を広げることができる。その結果、熱硬化温度の低い樹脂などを用いることが可能となり、表面実装部品の熱的ダメージの低減を図ることができる。
さらに、導電バンプの先端を尖塔状にすることで、低い加圧力でも、高い接触圧で導電バンプを他方の電極に接触させることができ、電極の酸化被膜を破ることができる。 (Aspect 11)
The process of applying a conductive paste to either the electrode of the wiring board or the electrode of the surface mount component to form a conductive bump, and the surface on which the electrode of the surface mount component is formed or the electrode of the wiring board are formed. Simultaneously with the step of applying an insulating resin to the surface, the step of pressing one of the surface mount component and the wiring board toward the other and crimping the conductive bump to the other electrode, and the step of crimping. Alternatively, it is a method of manufacturing an electronic device having a step of curing an insulating resin to fix a surface-mounted component and a wiring substrate after a step of crimping, and the tip of a conductive bump before crimping becomes a spire. As shown above, a conductive paste is applied to one of the electrodes.
According to this, as described in the embodiment, when the conductive bump is crimped to the other electrode, the spire-shaped tip comes into contact with the other electrode and comes into contact with the other electrode with a high contact pressure. As a result, the spire-shaped tip breaks through the oxide film of the other electrode, and a part of the conductive bump can penetrate into the other electrode. As a result, at least a part of the conductive bumps comes into direct contact with the electrodes, and the conductivity between the conductive bumps and the other electrode can be improved. After that, the tip of the conductive bump spire is crushed, and the contact area with other electrodes increases. As a result, stable conduction can be ensured between the conductive bump and the other electrode.
When the other electrode is soft, the spire-shaped tip contacts the other electrode with a high contact pressure to elastically deform and dent the other electrode, and a part of the conductive bump is inserted into the recessed portion. be able to. As a result, the connection reliability can be improved, and the contact relationship between the conductive bump and the other electrode can be maintained even if an insulating resin having a low curing shrinkage rate is used, so that the usable insulating resin can be used. The range can be expanded. As a result, it becomes possible to use a resin having a low thermosetting temperature, and it is possible to reduce the thermal damage of the surface mount component.
Further, by making the tip of the conductive bump into a spire shape, the conductive bump can be brought into contact with the other electrode with a high contact pressure even with a low pressing force, and the oxide film of the electrode can be broken.

１ ：半導体装置
２ ：表面実装ＩＣ
２Ａ ：接続電極
３ ：基材
４ ：導電層
４Ａ ：配線
５ ：配線基板
６ ：導電性粒子
７ ：導電バンプ
８ ：絶縁層
８ａ ：絶縁性樹脂
９ ：ダミーバンプ
９ａ ：ダミーバンプ前駆体
１２ ：バンプ前駆体
１２Ａ ：先端部
２１ ：スクリーンマスク
２２ ：スキージ
３０ ：ディスペンサ
３１ ：導電ペースト
４０ ：導電ペースト
８０ ：ディスペンサ
９０ ：コレット
Ｄ１ ：表面実装ＩＣの重心
Ｄ２ ：接続電極の重心 1: Semiconductor device 2: Surface mount IC
2A: Connection electrode 3: Substrate 4: Conductive layer 4A: Wiring 5: Wiring substrate 6: Conductive particles 7: Conductive bump 8: Insulating layer 8a: Insulating resin 9: Dummy bump 9a: Dummy bump precursor 12: Bump precursor 12A: Tip 21: Screen mask 22: Squeegee 30: Dispenser 31: Conductive paste 40: Conductive paste 80: Dispenser 90: Collet D1: Center of gravity of surface mount IC D2: Center of gravity of connection electrode

特許第５５１３４１７号公報Japanese Patent No. 5513417

Claims (11)

配線基板と、
配線基板上に表面実装される表面実装部品と、
前記配線基板の電極および前記表面実装部品の電極のいずれか一方の電極上に形成され他方の電極に接触して電極間を接続する導電バンプと、
表面実装部品と配線基板とを互いに固定する絶縁性樹脂とを備えた電子装置において、
前記導電バンプの一部が他方の電極の表面の酸化被膜を破って他方の電極と接触していることを特徴とする電子装置。 Wiring board and
Surface mount components that are surface mounted on the wiring board,
A conductive bump formed on one of the electrodes of the wiring board and the electrode of the surface mount component, which contacts the other electrode and connects the electrodes.
In an electronic device provided with an insulating resin that fixes a surface mount component and a wiring board to each other.
An electronic device characterized in that a part of the conductive bump breaks the oxide film on the surface of the other electrode and is in contact with the other electrode. 請求項１に記載の電子装置において、
前記導電バンプの一部が、前記他方の電極の凹んだ部分に入り込んでいることを特徴とする電子装置。 In the electronic device according to claim 1,
An electronic device characterized in that a part of the conductive bump has entered the recessed portion of the other electrode. 請求項１または２に記載の電子装置において、
前記導電バンプは、導電性粒子とバインダー樹脂とを有し、
前記導電バンプは、他方の電極に圧着されており、
圧着後の前記導電バンプの先端部の曲率半径が、圧着前の曲率半径よりも大きく、圧着後の導電バンプの高さは、圧着前の９０％以下になっていることを特徴とする電子装置。 In the electronic device according to claim 1 or 2.
The conductive bump has conductive particles and a binder resin, and has
The conductive bump is crimped to the other electrode and
An electronic device characterized in that the radius of curvature of the tip of the conductive bump after crimping is larger than the radius of curvature before crimping, and the height of the conductive bump after crimping is 90% or less of that before crimping. .. 請求項１乃至３いずれか一項に記載の電子装置において、
前記導電バンプは、前記表面実装部品の重心もしくは各電極の重心の少なくとも一方を基準として点対称となるように、複数個所形成されていることを特徴とする電子装置。 In the electronic device according to any one of claims 1 to 3.
An electronic device characterized in that the conductive bumps are formed at a plurality of locations so as to be point-symmetrical with respect to at least one of the center of gravity of the surface mount component or the center of gravity of each electrode. 請求項１乃至４いずれか一項に記載の電子装置において、
前記導電バンプは、導電ペーストをディスペンサーで前記配線基板の電極および前記表面実装部品の電極のいずれか一方に塗布することで形成されたものであることを特徴とする電子装置。 In the electronic device according to any one of claims 1 to 4.
The electronic device is characterized in that the conductive bump is formed by applying a conductive paste to either an electrode of the wiring board or an electrode of the surface mount component with a dispenser. 請求項１乃至５いずれか一項に記載の電子装置において、
前記配線基板は、樹脂基材に電極が印刷で形成されていることを特徴とする電子装置。 In the electronic device according to any one of claims 1 to 5.
The wiring board is an electronic device characterized in that electrodes are printed on a resin base material. 請求項１乃至６いずれか一項に記載の電子装置において、
前記配線基板上の前記絶縁性樹脂が接する領域には、前記絶縁性樹脂との密着強度を高める表面処理がされていることを特徴とする電子装置。 In the electronic device according to any one of claims 1 to 6.
An electronic device characterized in that a region of contact with the insulating resin on the wiring board is surface-treated to increase the adhesion strength with the insulating resin. 請求項１乃至７いずれか一項に記載の電子装置において、
前記配線基板に絶縁性樹脂を塗布し、前記表面実装部品が熱圧着により前記配線基板に実装されることを特徴とする電子装置。 In the electronic device according to any one of claims 1 to 7.
An electronic device characterized in that an insulating resin is applied to the wiring board, and the surface mount component is mounted on the wiring board by thermocompression bonding. 請求項１乃至７いずれか一項に記載の電子装置において、
前記配線基板または前記表面実装部品に前記絶縁性樹脂を塗布し、加圧により前記表面実装部品を前記配線基板に仮実装した後に、加熱して本実装することを特徴とする電子装置。 In the electronic device according to any one of claims 1 to 7.
An electronic device characterized in that the insulating resin is applied to the wiring board or the surface mount component, the surface mount component is temporarily mounted on the wiring board by pressurization, and then heated for main mounting. 請求項８または９に記載の電子装置において、
前記絶縁性樹脂の膨張係数は、前記導電バンプの膨張係数より大きいことを特徴とする電子装置。 In the electronic device according to claim 8 or 9.
An electronic device characterized in that the expansion coefficient of the insulating resin is larger than the expansion coefficient of the conductive bump. 配線基板の電極および表面実装部品の電極のいずれか一方の電極に導電性ペーストを塗布して導電バンプを形成する工程と、
前記表面実装部品の電極が形成された面または前記配線基板の電極が形成された面に絶縁性樹脂を塗布する工程と、
前記表面実装部品および前記配線基板のいずれか一方を他方に向けて加圧して前記導電バンプを他方の電極に圧着する工程と、
前記圧着する工程と同時、または、前記圧着する工程の後に、前記絶縁性樹脂を硬化させて前記表面実装部品と前記配線基板とを固定する工程とを有する電子装置の製造方法であって、
圧着前の前記導電バンプの先端が尖塔状となるように、前記一方の電極に導電性ペーストを塗布することを特徴とする電子装置の製造方法。 The process of applying a conductive paste to either the electrode of the wiring board or the electrode of the surface mount component to form a conductive bump, and
A step of applying an insulating resin to the surface on which the electrodes of the surface mount component are formed or the surface on which the electrodes of the wiring board are formed, and
A step of pressurizing one of the surface mount component and the wiring board toward the other to crimp the conductive bump to the other electrode.
A method for manufacturing an electronic device, which comprises a step of curing the insulating resin and fixing the surface mount component and the wiring board at the same time as the crimping step or after the crimping step.
A method for manufacturing an electronic device, which comprises applying a conductive paste to one of the electrodes so that the tip of the conductive bump before crimping has a spire shape.
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