JP2020136369A - 半導体モジュール及び半導体モジュールの製造方法 - Google Patents
半導体モジュール及び半導体モジュールの製造方法 Download PDFInfo
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- JP2020136369A JP2020136369A JP2019025184A JP2019025184A JP2020136369A JP 2020136369 A JP2020136369 A JP 2020136369A JP 2019025184 A JP2019025184 A JP 2019025184A JP 2019025184 A JP2019025184 A JP 2019025184A JP 2020136369 A JP2020136369 A JP 2020136369A
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- lead frame
- side lead
- semiconductor module
- laminated substrate
- pin portion
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Abstract
Description
上記実施の形態に記載の半導体モジュールは、放熱板の上面に絶縁層を配置し、前記絶縁層の上面に導電パターンを配置して構成される積層基板と、前記導電パターンの上面に配置される半導体素子と、前記半導体素子の駆動を制御する集積回路と、主面を有し、前記主面の上に前記集積回路が配置される制御側リードフレームと、前記積層基板、前記半導体素子、前記集積回路、及び前記制御側リードフレームをパッケージするモールド樹脂と、を備え、前記制御側リードフレームは、前記放熱板に向かって突出する棒状のピン部を有し、前記放熱板は、前記ピン部の先端が圧入される挿入孔を有することを特徴とする。
2 :積層基板
3 :パワーチップ(半導体素子)
4 :パワーチップ(半導体素子)
5 :パワーチップ(半導体素子)
6 :パワーチップ(半導体素子)
7 :制御側リードフレーム
8 :主電流側リードフレーム
9 :ICチップ(集積回路)
10 :ICチップ(集積回路)
11 :モールド樹脂
20 :放熱板
21 :絶縁層
22 :導電パターン
23 :導電パターン
24 :導電パターン
25 :導電パターン
26 :ダミーパターン
27 :円形穴(挿入孔)
28 :凹部
70 :端子部
71 :タイバー
72 :タイバー
73 :内部接続部
74 :ピン部
75 :突起部
76 :ピン部
77 :突起部
78 :かしめ部
80 :端子部
81 :タイバー
82 :タイバー
83 :ピン部
84 :突起部
85 :ピン部
86 :突起部
87 :かしめ部
S :半田
W1 :配線部材
W2 :配線部材
W3 :配線部材
W4 :配線部材
W5 :配線部材
W6 :配線部材
W7 :配線部材
Claims (13)
- 放熱板の上面に絶縁層を配置し、前記絶縁層の上面に導電パターンを配置して構成される積層基板と、
前記導電パターンの上面に配置される半導体素子と、
前記半導体素子の駆動を制御する集積回路と、
主面を有し、前記主面の上に前記集積回路が配置される制御側リードフレームと、
前記積層基板、前記半導体素子、前記集積回路、及び前記制御側リードフレームをパッケージするモールド樹脂と、を備え、
前記制御側リードフレームは、前記放熱板に向かって突出する棒状のピン部を有し、
前記放熱板は、前記ピン部の先端が圧入される挿入孔を有することを特徴とする半導体モジュール。 - 前記半導体素子を挟んで前記制御側リードフレームの反対側に配置される主電流側リードフレームを更に備え、
前記挿入孔は複数設けられ、
前記主電流側リードフレームは、前記放熱板に向かって突出する棒状の前記ピン部を有することを特徴とする請求項1に記載の半導体モジュール。 - 前記制御側リードフレーム及び/又は前記主電流側リードフレームに設けられた前記ピン部は、前記積層基板の外側に位置することを特徴とする請求項2に記載の半導体モジュール。
- 前記制御側リードフレームに前記ピン部が形成されている端子は、共通端子であることを特徴とする請求項3に記載の半導体モジュール。
- 前記主電流側リードフレームに前記ピン部が形成されている端子は、未接続端子であることを特徴とする請求項3又は請求項4に記載の半導体モジュール。
- 前記挿入孔は、前記絶縁層を貫通するように形成され、
前記絶縁層の上面には、前記挿入孔の周囲を囲うダミーパターンが形成されることを特徴とする請求項1から請求項5のいずれかに記載の半導体モジュール。 - 前記ピン部は、径方向外側に突出する突起部を有し、
前記挿入孔は、前記突起部の外形よりも小さい内径を有することを特徴とする請求項1から請求項6のいずれかに記載の半導体モジュール。 - 前記挿入孔は、前記放熱板の所定深さまで形成されており、
前記突起部は、前記放熱板に至るまで圧入されていることを特徴とする請求項7に記載の半導体モジュール。 - 前記挿入孔は、前記放熱板を貫通するように形成され、
前記突起部は、前記放熱板よりも上方に位置し、
前記ピン部の先端は、前記放熱板の下面側でかしめられていることを特徴とする請求項7に記載の半導体モジュール。 - 前記集積回路は、前記半導体素子よりも高い位置に配置されることを特徴とする請求項1から請求項9のいずれかに記載の半導体モジュール。
- 前記モールド樹脂は、トランスファー成形により成形されることを特徴とする請求項1から請求項10のいずれかに記載の半導体モジュール。
- 放熱板の上面に絶縁層を配置し、前記絶縁層の上面に導電パターンを配置して構成される積層基板と、前記積層基板に接合される制御側リードフレームと、を準備する準備工程と、
前記積層基板に形成される挿入孔に、前記制御側リードフレームの一部を挿入して圧入する挿入工程と、
前記積層基板に半導体素子を実装し、前記制御側リードフレームに前記半導体素子の駆動を制御する集積回路を実装するチップ実装工程と、
前記積層基板、前記半導体素子、及び前記集積回路をトランスファー成形によりモールド樹脂でパッケージする成形工程と、を実施することを特徴とする半導体モジュールの製造方法。 - 前記挿入工程において、前記制御側リードフレームの先端を前記放熱板の下面から突出するまで挿入した後、突出した前記制御側リードフレームの先端をかしめる、かしめ工程を実施することを特徴とする請求項12に記載の半導体モジュールの製造方法。
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