JP2017092211A - Circuit board and electronic apparatus - Google Patents

Circuit board and electronic apparatus Download PDF

Info

Publication number
JP2017092211A
JP2017092211A JP2015219552A JP2015219552A JP2017092211A JP 2017092211 A JP2017092211 A JP 2017092211A JP 2015219552 A JP2015219552 A JP 2015219552A JP 2015219552 A JP2015219552 A JP 2015219552A JP 2017092211 A JP2017092211 A JP 2017092211A
Authority
JP
Japan
Prior art keywords
circuit board
insulating substrate
brazing material
thickness
heat sink
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2015219552A
Other languages
Japanese (ja)
Other versions
JP6538524B2 (en
Inventor
雅史 小長井
Masashi Konagai
雅史 小長井
成敏 小川
Shigetoshi Ogawa
成敏 小川
建壮 落合
Takemasa Ochiai
建壮 落合
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2015219552A priority Critical patent/JP6538524B2/en
Publication of JP2017092211A publication Critical patent/JP2017092211A/en
Application granted granted Critical
Publication of JP6538524B2 publication Critical patent/JP6538524B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4901Structure
    • H01L2224/4903Connectors having different sizes, e.g. different diameters

Landscapes

  • Structure Of Printed Boards (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a circuit board that has a high heat dissipation property and high reliability.SOLUTION: There is provided a circuit board 1 comprising: an insulating substrate 2 that includes a top surface and an under surface; a metallic circuit board 3 that is joined to the top surface of the insulating substrate 2 with a first solder material 5; and a metallic heat sink 4 that is joined to the under surface of the insulating substrate 2 with a second solder material 6, wherein the thickness of the heat sink 4 is 3.75 times the thickness of the circuit board 3 or more, and the first solder material 5 has a coefficient of thermal expansion at least on its outer peripheral part larger than the coefficient of thermal expansion of the second solder material 6.SELECTED DRAWING: Figure 1

Description

本発明は、回路基板およびそれを用いた電子装置に関するものである。   The present invention relates to a circuit board and an electronic device using the circuit board.

従来から、たとえばパワーモジュールまたはスイッチングモジュール等のIGBT(Insulated Gate Bipolar Transistor)などの電子部品が搭載された電子装置に用いられる
回路基板として、絶縁基板の上面に、回路パターン状に形成された銅製の回路板が接合され、下面に、回路板に搭載された電子部品から発生する熱を放熱させるための銅製の放熱板が接合されたものが用いられている。回路板および放熱板は、活性金属を含むろう材等によって絶縁基板の上面または下面に接合されている(例えば、特許文献1参照)。
Conventionally, as a circuit board used for an electronic device in which electronic parts such as IGBT (Insulated Gate Bipolar Transistor) such as a power module or a switching module are mounted, a copper pattern formed in a circuit pattern on an upper surface of an insulating substrate. A circuit board is joined, and a copper heat radiating plate for radiating heat generated from electronic components mounted on the circuit board is joined to the lower surface. The circuit board and the heat sink are joined to the upper surface or the lower surface of the insulating substrate by a brazing material containing an active metal (see, for example, Patent Document 1).

一般的に、上記のような回路基板においては、放熱板の厚みは、回路板の厚みと同じ程度、または若干薄くなるように設定されている。これは、絶縁基板の上面と下面とで発生する応力を同程度にして反りを抑えるためである。   Generally, in the circuit board as described above, the thickness of the heat sink is set to be the same as or slightly thinner than the thickness of the circuit board. This is to suppress warpage by making the stress generated on the upper and lower surfaces of the insulating substrate approximately the same.

特開平8−139420号公報JP-A-8-139420

上記のような回路基板において、回路板に搭載された電子部品から発生する熱をより効果的に放熱するために、回路板および放熱板の厚みを厚く、たとえば放熱板と回路板との合計の厚みをより厚くすることが要求されている。しかしながら、回路板および放熱板の厚みを厚くすると、絶縁基板の表面部に、より大きな引張り応力が加わりやすくなり、回路板および放熱板と絶縁基板とを接合する際の加熱後の冷却過程において、あるいは、回路基板を用いた電子装置の動作に起因する発熱による温度変化によって、絶縁基板が割れてしまうという問題がある。   In the circuit board as described above, in order to dissipate the heat generated from the electronic components mounted on the circuit board more effectively, the thickness of the circuit board and the heat sink is increased, for example, the total of the heat sink and the circuit board. It is required to increase the thickness. However, when the thickness of the circuit board and the heat sink is increased, a larger tensile stress is easily applied to the surface portion of the insulating substrate, and in the cooling process after heating when joining the circuit board and the heat sink and the insulating substrate, Alternatively, there is a problem that the insulating substrate breaks due to a temperature change due to heat generated due to the operation of the electronic device using the circuit board.

本発明の1つの態様の回路基板は、上面および下面を有する絶縁基板と、前記絶縁基板の前記上面に第1ろう材を介して接合された金属製の回路板と、前記絶縁基板の前記下面に第2ろう材を介して接合された金属製の放熱板とを有し、前記放熱板の厚みが前記回路板の厚みの3.75倍以上であり、前記第1ろう材は、少なくとも該第1ろう材の外周部における熱膨張係数が前記第2ろう材の熱膨張係数よりも大きいことを特徴とする。   A circuit board according to one aspect of the present invention includes an insulating substrate having an upper surface and a lower surface, a metal circuit board bonded to the upper surface of the insulating substrate via a first brazing material, and the lower surface of the insulating substrate. And a heat sink made of metal joined via a second brazing material, and the thickness of the heat sink is at least 3.75 times the thickness of the circuit board, and the first brazing material has at least the The thermal expansion coefficient in the outer periphery of the first brazing material is larger than the thermal expansion coefficient of the second brazing material.

本発明の1つの態様の電子装置は、上記構成の回路基板と、該回路基板の前記回路板に搭載された電子部品とを含むことを特徴とする。   An electronic device according to an aspect of the present invention includes the circuit board having the above configuration and an electronic component mounted on the circuit board of the circuit board.

本発明の一つの態様による回路基板によれば、絶縁基板の上面に接合された回路板の厚みを薄くすることにより、絶縁基板の下面に接合された放熱板の温度に対する伸縮による回路基板の変形に対して、回路板が塑性変形により小さな荷重で追従するので、絶縁基板に加わる応力を抑制することができる。また、放熱板の厚みを厚くすることにより、放熱板の剛性が高くなる。   According to the circuit board according to one aspect of the present invention, the thickness of the circuit board bonded to the upper surface of the insulating substrate is reduced, whereby the deformation of the circuit board due to the expansion and contraction with respect to the temperature of the heat sink bonded to the lower surface of the insulating substrate. On the other hand, since the circuit board follows with a small load due to plastic deformation, the stress applied to the insulating substrate can be suppressed. Moreover, the rigidity of a heat sink becomes high by making the thickness of a heat sink thick.

また、回路板と絶縁基板とを接合している第1ろう材は、少なくともその外周部におけ
る熱膨張係数が、放熱板と絶縁基板とを接合している第2ろう材の熱膨張係数よりも大きいため、回路基板の外周部を反らせようとする力が生じる。この力は、放熱板と、放熱板よりも熱膨張係数が小さい絶縁基板との間に生じる熱応力と逆方向になる。そのため、これらの力が互いに打ち消し合い、回路基板全体に反りが生じる可能性が効果的に低減されている。したがって、回路基板全体の反りに起因する絶縁基板のクラック等の機械的な破壊が効果的に抑制された、長期信頼性の高い電子装置を製作することが可能な回路基板を提供することができる。
Further, the first brazing material joining the circuit board and the insulating substrate has a thermal expansion coefficient at least at the outer peripheral portion thereof that is higher than the thermal expansion coefficient of the second brazing material joining the heat radiating plate and the insulating substrate. Since it is large, a force is generated to warp the outer periphery of the circuit board. This force is in the opposite direction to the thermal stress generated between the heat sink and the insulating substrate having a smaller thermal expansion coefficient than the heat sink. Therefore, the possibility that these forces cancel each other and the entire circuit board is warped is effectively reduced. Therefore, it is possible to provide a circuit board capable of manufacturing an electronic device with high long-term reliability in which mechanical destruction such as cracks of the insulating substrate due to warpage of the entire circuit board is effectively suppressed. .

本発明の一つの態様による電子装置によれば、上述の回路基板を有することから、電子部品から発生する熱を効果的に放熱することができるとともに、信頼性の高い装置を実現することができる。   According to the electronic device according to one aspect of the present invention, since the circuit board is included, heat generated from the electronic component can be effectively radiated and a highly reliable device can be realized. .

本発明の実施形態の回路基板を示す断面図である。It is sectional drawing which shows the circuit board of embodiment of this invention. 本発明の実施形態の電子装置を示す断面図である。It is sectional drawing which shows the electronic device of embodiment of this invention. 本発明の実施形態の回路基板および電子装置を示す平面図である。It is a top view which shows the circuit board and electronic device of embodiment of this invention. (a)は図3に示す回路基板および電子装置の第1の変形例を示す平面図であり、(b)は(a)のA−A線における断面図である。(A) is a top view which shows the 1st modification of the circuit board and electronic device which are shown in FIG. 3, (b) is sectional drawing in the AA of (a). (a)は図3に示す回路基板および電子装置の第2の変形例を示す平面図であり、(b)は(a)のB−B線における断面図である。(A) is a top view which shows the 2nd modification of the circuit board and electronic device which are shown in FIG. 3, (b) is sectional drawing in the BB line of (a).

図1は本発明の実施形態における回路基板1を示す断面図である。回路基板1は、絶縁基板2、回路板3、放熱板4、第1ろう材5および第2ろう材6を備えている。また、図2は本発明の実施形態における電子装置10を示す断面図である。図2に示す例において、電子装置10は、回路基板1および電子部品7を備えている。   FIG. 1 is a cross-sectional view showing a circuit board 1 according to an embodiment of the present invention. The circuit board 1 includes an insulating substrate 2, a circuit board 3, a heat sink 4, a first brazing material 5, and a second brazing material 6. FIG. 2 is a cross-sectional view showing the electronic device 10 according to the embodiment of the present invention. In the example shown in FIG. 2, the electronic device 10 includes a circuit board 1 and an electronic component 7.

絶縁基板2は、電気絶縁材料からなり、たとえば、酸化アルミニウム質セラミックス、ムライト質セラミックス、炭化ケイ素質セラミックス、窒化アルミニウム質セラミックスまたは窒化ケイ素質セラミックス等のセラミックスからなる。これらセラミック材料の中では放熱性に影響する熱伝導性の点に関して、炭化ケイ素質セラミックス、窒化アルミニウム質セラミックスまたは窒化ケイ素質セラミックスが好ましく、強度の点に関して、窒化ケイ素質セラミックスまたは炭化ケイ素質セラミックスが好ましい。   The insulating substrate 2 is made of an electrically insulating material, and is made of, for example, ceramics such as aluminum oxide ceramics, mullite ceramics, silicon carbide ceramics, aluminum nitride ceramics, or silicon nitride ceramics. Among these ceramic materials, silicon carbide ceramics, aluminum nitride ceramics or silicon nitride ceramics are preferable in terms of thermal conductivity that affects heat dissipation, and silicon nitride ceramics or silicon carbide ceramics are preferable in terms of strength. preferable.

絶縁基板2が窒化ケイ素質セラミックスのように比較的強度の高いセラミック材料からなる場合、より厚みの厚い(厚さが大きい)回路板3を用いたとしても絶縁基板2にクラックが入る可能性が低減されるので、小型化を図りつつより大きな電流を流すことができる回路基板を実現することができる。   When the insulating substrate 2 is made of a relatively strong ceramic material such as silicon nitride ceramics, there is a possibility that the insulating substrate 2 may crack even when the thicker (larger) circuit board 3 is used. Therefore, it is possible to realize a circuit board capable of flowing a larger current while achieving downsizing.

絶縁基板2の厚みは、薄い方が熱伝導性の点ではよく、たとえば約0.1mm〜1mmで
あり、回路基板1の大きさまたは用いる材料の熱伝導率または強度に応じて選択すればよい。絶縁基板2の大きさは、平面視で、たとえば、縦が30〜50mm程度であり、横が40〜60mm程度である。
The thinner insulating substrate 2 may be from the viewpoint of thermal conductivity, for example, about 0.1 mm to 1 mm, and may be selected according to the size of the circuit board 1 or the thermal conductivity or strength of the material used. The size of the insulating substrate 2 is, for example, about 30 to 50 mm in length and about 40 to 60 mm in width in plan view.

絶縁基板2は、たとえば窒化ケイ素質セラミックスからなる場合であれば、窒化ケイ素、酸化アルミニウム、酸化マグネシウムおよび酸化イットリウム等の原料粉末に適当な有機バインダー、可塑剤および溶剤を添加混合した泥漿物に従来周知のドクターブレード法またはカレンダーロール法を採用することによってセラミックグリーンシート(セラミック生シート)を形成し、次にこのセラミックグリーンシートに適当な打ち抜き加工等を施して所定形状となすとともに、必要に応じて複数枚を積層して成形体となし、しかる後、
これを窒素雰囲気等の非酸化性雰囲気にて1600〜2000℃の温度で焼成することによって製作される。
If the insulating substrate 2 is made of, for example, silicon nitride ceramics, the insulating substrate 2 is conventionally made of a slurry obtained by adding an appropriate organic binder, plasticizer and solvent to a raw material powder such as silicon nitride, aluminum oxide, magnesium oxide and yttrium oxide. A ceramic green sheet (ceramic raw sheet) is formed by adopting the well-known doctor blade method or calendar roll method, and then the ceramic green sheet is appropriately punched to obtain a predetermined shape. Laminate multiple sheets to form a molded body, then
This is manufactured by firing at a temperature of 1600 to 2000 ° C. in a non-oxidizing atmosphere such as a nitrogen atmosphere.

回路板3は、絶縁基板2の上面に接合され、放熱板4は、絶縁基板2の下面に接合されている。回路板3および放熱板4は、例えば銅またはアルミニウム等の金属材料またはこれらの金属材料を主成分とする合金の金属材料によって形成されている。回路基板1および電子装置10において、放熱板4の厚みが回路板3の厚みの3.75倍以上に設定されている。   The circuit board 3 is bonded to the upper surface of the insulating substrate 2, and the heat sink 4 is bonded to the lower surface of the insulating substrate 2. The circuit board 3 and the heat radiating plate 4 are made of a metal material such as copper or aluminum, or an alloy metal material containing these metal materials as a main component. In the circuit board 1 and the electronic device 10, the thickness of the heat sink 4 is set to 3.75 times or more the thickness of the circuit board 3.

回路板3および放熱板4は、たとえば、銅の基板(図示せず)を金型打ち抜き加工等の所定の金属加工で成形した後に絶縁基板2に張り付けられている。回路板3および放熱板4は、絶縁基板2にろう付けして形成される。   The circuit board 3 and the heat sink 4 are attached to the insulating substrate 2 after a copper substrate (not shown) is formed by a predetermined metal processing such as die punching, for example. The circuit board 3 and the heat sink 4 are formed by brazing to the insulating substrate 2.

すなわち、実施形態の回路基板1において、回路板3は第1ろう材5によって絶縁基板2の上面に接合されている。放熱板4は第2ろう材6によって絶縁基板2の下面に接合されている。また、少なくとも第1ろう材5の外周部における熱膨張係数が、第2ろう材6の熱膨張係数よりも大きい。   That is, in the circuit board 1 of the embodiment, the circuit board 3 is bonded to the upper surface of the insulating substrate 2 by the first brazing material 5. The heat sink 4 is joined to the lower surface of the insulating substrate 2 by a second brazing material 6. Further, at least the thermal expansion coefficient in the outer peripheral portion of the first brazing material 5 is larger than the thermal expansion coefficient of the second brazing material 6.

上記のような回路基板1によれば、放熱板4の厚みは回路板3の厚みの3.75倍以上であり、絶縁基板2の上面に接合された回路板3の厚みが比較的薄いため、絶縁基板2の下面に接合された放熱板4の温度に対する伸縮による回路基板1の変形に対して、回路板3が塑性変形により小さな荷重で追従するので、絶縁基板2に加わる応力を抑制することができる。また、放熱板4の厚みが比較的厚いため、放熱板4の剛性が高くなっている。   According to the circuit board 1 as described above, the thickness of the heat sink 4 is 3.75 times the thickness of the circuit board 3 and the thickness of the circuit board 3 bonded to the upper surface of the insulating board 2 is relatively thin. Since the circuit board 3 follows the deformation of the circuit board 1 due to the expansion and contraction with respect to the temperature of the heat sink 4 bonded to the lower surface of the board 2 with a small load, the stress applied to the insulating substrate 2 can be suppressed. it can. Moreover, since the thickness of the heat sink 4 is relatively thick, the rigidity of the heat sink 4 is high.

また、回路板3と絶縁基板2とを接合している第1ろう材5は、少なくともその外周部における熱膨張係数が、放熱板4と絶縁基板2とを接合している第2ろう材6の熱膨張係数よりも大きいため、回路基板1の外周部を反らせようとする力が生じる。この力は、放熱板4と、放熱板4よりも熱膨張係数が小さい絶縁基板2との熱膨張係数の差に起因して生じる熱応力と逆方向になる。そのため、これらの力が互いに打ち消し合い、回路基板1全体に反りが生じる可能性が効果的に低減されている。したがって、回路基板1全体の反りに起因する絶縁基板2のクラック等の機械的な破壊を効果的に抑制することができる。すなわち、絶縁基板2のクラック等が抑制された、長期信頼性の高い電子装置10を製作することが可能な回路基板1を提供することができる。   The first brazing material 5 that joins the circuit board 3 and the insulating substrate 2 has a thermal expansion coefficient of at least the outer peripheral portion of the first brazing material 6 that joins the radiator plate 4 and the insulating substrate 2. Since the coefficient of thermal expansion is larger than the above, a force for warping the outer peripheral portion of the circuit board 1 is generated. This force is in the opposite direction to the thermal stress caused by the difference in thermal expansion coefficient between the heat sink 4 and the insulating substrate 2 having a smaller thermal expansion coefficient than the heat sink 4. Therefore, the possibility that these forces cancel each other and the entire circuit board 1 is warped is effectively reduced. Therefore, mechanical destruction such as cracks of the insulating substrate 2 due to warpage of the entire circuit board 1 can be effectively suppressed. That is, it is possible to provide the circuit board 1 that can manufacture the electronic device 10 with high long-term reliability, in which cracks and the like of the insulating substrate 2 are suppressed.

なお 、第1ろう材5の外周部とは、少なくとも、回路板3の外周よりも外側に位置し
ている部分(上から見たときに回路板3に隠れずに見える部分)であるが、回路板3の外周よりも多少内側に位置している部分も上記構成であってよい。
The outer peripheral portion of the first brazing material 5 is at least a portion located outside the outer periphery of the circuit board 3 (a portion that is not hidden by the circuit board 3 when viewed from above), A portion located slightly inside the outer periphery of the circuit board 3 may also have the above configuration.

具体的に一例を挙げれば次の通りである。実施形態の回路基板1に電子部品7が搭載され、電子部品7の作動による熱が生じたとき(昇温時)には、第1ろう材5の外周部において回路基板1の外周部を下方向に反らせようとする力が生じる。これに対して放熱板4と絶縁基板2との熱膨張係数の差に起因して、回路基板1の外周部を上方向に反らせようとする熱応力が生じる。すなわち、回路基板1(絶縁基板2)の上面側と下面側とで逆方向の力が生じる。そのため、これらの力が互いに打ち消し合い、回路基板1全体に反りが生じる可能性が効果的に低減されている。   A specific example is as follows. When the electronic component 7 is mounted on the circuit board 1 of the embodiment and heat is generated by the operation of the electronic component 7 (at the time of temperature rise), the outer peripheral portion of the circuit board 1 is lowered below the outer peripheral portion of the first brazing material 5. There is a force that tries to warp in the direction. On the other hand, due to the difference in thermal expansion coefficient between the heat radiating plate 4 and the insulating substrate 2, thermal stress is generated that tends to warp the outer peripheral portion of the circuit board 1 upward. That is, a force in the opposite direction is generated on the upper surface side and the lower surface side of the circuit board 1 (insulating substrate 2). Therefore, the possibility that these forces cancel each other and the entire circuit board 1 is warped is effectively reduced.

また、電子部品7の作動から停止にともなう放熱のとき(降温時)にも、回路基板1(絶縁基板2)の上面側と下面側とで逆向きに力が生じ、互いに打ち消し合う。   In addition, when heat is dissipated from the operation of the electronic component 7 to when it stops (during cooling), forces are generated in the opposite directions on the upper surface side and the lower surface side of the circuit board 1 (insulating substrate 2) and cancel each other out.

また、電子部品7の作動および停止に限らず、放熱板4と絶縁基板2との接合時(ろう
付け時)等の加熱および放熱といった熱変化が生じるときにも、同様に力の打ち消し合いが可能である。したがって、回路基板1全体の反りに起因する絶縁基板2のクラック等の機械的な破壊が効果的に抑制される。
Further, not only when the electronic component 7 is activated and stopped, but also when a heat change such as heating and heat dissipation occurs when the heat radiating plate 4 and the insulating substrate 2 are joined (at the time of brazing), the force cancels out similarly. Is possible. Therefore, mechanical destruction such as cracks of the insulating substrate 2 due to warpage of the entire circuit board 1 is effectively suppressed.

また、実施形態の電子装置10によれば、上述の回路基板1を有することから、電子部品7から発生する熱を効果的に放熱することができるとともに、信頼性の高い電子装置10を実現することができる。すなわち、上記実施形態の回路基板1によれば、信頼性の高い電子装置10を製作することができる。   In addition, according to the electronic device 10 of the embodiment, since the circuit board 1 described above is included, the heat generated from the electronic component 7 can be effectively radiated and the highly reliable electronic device 10 is realized. be able to. That is, according to the circuit board 1 of the above embodiment, the highly reliable electronic device 10 can be manufactured.

上記実施形態の回路基板1および電子装置10において、第1ろう材5および第2ろう材6は、例えば次のような成分を有している。すなわち、銅および銀の少なくとも一方を主成分として含有し、接合のための活性金属として、モリブデン、チタンおよびジルコニウム、ハフニウムおよびニオブのうち少なくとも1種の金属材料をさらに添加材として含有する。これらの金属材料について、活性金属としての有効性、ろう付けの作業性および経済性(コスト)等を考慮すれば、モリブデン、チタンおよびジルコニウムが上記用途の活性金属として特に適している。   In the circuit board 1 and the electronic device 10 of the above embodiment, the first brazing material 5 and the second brazing material 6 have the following components, for example. That is, it contains at least one of copper and silver as a main component, and further contains at least one metal material of molybdenum, titanium and zirconium, hafnium and niobium as an additive as an active metal for bonding. Of these metal materials, molybdenum, titanium, and zirconium are particularly suitable as the active metals for the above applications in view of the effectiveness as active metals, the workability of brazing, the economic efficiency (cost), and the like.

また、第1ろう材5は、少なくとも外周部においては、モリブデン、チタンおよびジルコニウムといった添加材の含有率が第2ろう材6よりも小さい。言い換えれば、第1ろう材5の少なくとも外周部は、第2ろう材6よりも主成分(銅および銀の少なくとも一方)の含有率が大きい。これによって、第1ろう材5は、少なくともその外周部における熱膨張係数が第2ろう材6よりも大きくなっている。なお、各金属の熱膨張係数は、20℃(約293K)における線膨張係数として、銅が16.5×10−61/K、銀が18.9×10−61/K
、モリブデンが3.7×10−61/K、チタンが8.6×10−61/K、ジルコニウムが5.4×10−61/Kである(理科年表、平成23年、第84刷より)。
In addition, the first brazing material 5 has a content of additive materials such as molybdenum, titanium and zirconium smaller than that of the second brazing material 6 at least in the outer periphery. In other words, at least the outer peripheral portion of the first brazing material 5 has a higher content of the main component (at least one of copper and silver) than the second brazing material 6. As a result, the first brazing material 5 has a thermal expansion coefficient at least at the outer periphery thereof larger than that of the second brazing material 6. The coefficient of thermal expansion of each metal is 16.5 × 10 −6 1 / K for copper and 18.9 × 10 −6 1 / K for silver as the coefficient of linear expansion at 20 ° C. (about 293 K).
Molybdenum is 3.7 × 10 −6 1 / K, titanium is 8.6 × 10 −6 1 / K, and zirconium is 5.4 × 10 −6 1 / K (Science Chronology, 2011, 84th printing).

第11ろう材5の外周部における組成は、例えば次のとおりである。すなわち、銅が15
〜80質量%、銀が15〜65質量%、チタンが1〜20質量%、モリブデンが0〜5質量%程度で
ある。第2ろう材6の組成は、例えば次のとおりである。すなわち、銅が15〜75質量%、銀が15〜65質量%、チタンが1〜20質量%、モリブデンが0〜5質量%程度である。
The composition of the outer periphery of the first brazing material 5 is, for example, as follows. That is, copper is 15
-80 mass%, silver is 15-65 mass%, titanium is 1-20 mass%, and molybdenum is about 0-5 mass%. The composition of the second brazing material 6 is, for example, as follows. That is, copper is 15 to 75 mass%, silver is 15 to 65 mass%, titanium is 1 to 20 mass%, and molybdenum is about 0 to 5 mass%.

より具体的な一例としては、次のようなものが挙げられる。すなわち、第1ろう材5の外周部における組成については、銅が80質量%、銀が19.3質量%、チタンが0.5質量%、
モリブデンが0.2%質量のものが挙げられる。また、第1ろう材5の外周部の組成がこの
値であるときに、第2ろう材6の組成については、銅が質量70%、銀が質量25.5%、チタンが質量4%、モリブデンが質量0.5%のものが挙げられる。
More specific examples include the following. That is, about the composition in the outer peripheral part of the 1st brazing filler metal 5, copper is 80 mass%, silver is 19.3 mass%, titanium is 0.5 mass%,
Examples include molybdenum having a mass of 0.2%. When the composition of the outer periphery of the first brazing material 5 is this value, the composition of the second brazing material 6 is as follows: copper is 70% by mass, silver is 25.5%, titanium is 4% by mass, molybdenum is One with a mass of 0.5% can be mentioned.

なお、第1ろう材5の外周部以外の部分における組成は、例えば、外周部とおなじであってもよく、第2ろう材6と同じであってもよい。   In addition, the composition in parts other than the outer peripheral part of the 1st brazing material 5 may be the same as an outer peripheral part, for example, and may be the same as the 2nd brazing material 6.

第1ろう材5のうち外周部よりも内側の中央部(例えば回路板3の下側に位置している部分)における組成は、外周部と同じであってもよく、第2ろう材6と同じであってもよい。   The composition of the first brazing material 5 in the central portion inside the outer peripheral portion (for example, the portion located below the circuit board 3) may be the same as that of the outer peripheral portion. It may be the same.

第1ろう材5について、その外周部におけるモリブデン、チタンおよびジルコニウムといった添加材の含有率を第2ろう材6よりも小さいものとするには、例えばこれらの添加材を塩化第2鉄(塩化鉄(III)、FeCl)の水溶液中に溶出させて、外周部におけ
る含有率を下げるようにすればよい。
In order to make the content of the additive such as molybdenum, titanium, and zirconium in the outer periphery of the first brazing material 5 smaller than that of the second brazing material 6, for example, these additives may be ferric chloride (iron chloride). It is sufficient to elute it in an aqueous solution of (III), FeCl 3 ) to lower the content in the outer periphery.

また、添加材の含有率が第2ろう材6よりも小さい材料を第1ろう材5として用いるよ
うにしてもよい。この場合には、第1ろう材5の全体において、第2ろう材6よりも熱膨張係数が大きくなる。
Further, a material having a content of additive material smaller than that of the second brazing material 6 may be used as the first brazing material 5. In this case, the thermal expansion coefficient of the entire first brazing material 5 is larger than that of the second brazing material 6.

回路板3の上面に対する電子部品7の搭載は、例えば接合材(図示せず)を介して電子部品7の下面を回路板3の上面に接合することによって行なわれている。この電子部品7は、例えばリード端子等の導電性接続材によって外部電気回路に電気的に接続される。この場合、回路板3に電子部品7が電気的に接続され、回路板3を介して外部電気回路に電気的に接続されてもよい。また、放熱板4は、回路板3に搭載された電子部品7から発生する熱を放熱させる機能を有している。   The electronic component 7 is mounted on the upper surface of the circuit board 3 by, for example, bonding the lower surface of the electronic component 7 to the upper surface of the circuit board 3 via a bonding material (not shown). The electronic component 7 is electrically connected to an external electric circuit by a conductive connecting material such as a lead terminal. In this case, the electronic component 7 may be electrically connected to the circuit board 3 and electrically connected to an external electric circuit via the circuit board 3. Further, the heat radiating plate 4 has a function of radiating heat generated from the electronic component 7 mounted on the circuit board 3.

また、回路板3は、上記のような電気的な接続の用途に限らず、回路基板1に搭載される電子部品7のマウント用の金属部材、接地導体用の金属部材または放熱用の部材等としても用いることができる。回路板3は、例えば数百A程度の比較的大きな電流を通電するための導電路、または放熱材として、セラミックス等からなる絶縁基板2に接合されて用いられる。   Further, the circuit board 3 is not limited to the above-described electrical connection use, but a metal member for mounting the electronic component 7 mounted on the circuit board 1, a metal member for grounding conductor, a member for heat dissipation, or the like Can also be used. The circuit board 3 is used by being bonded to an insulating substrate 2 made of ceramics or the like as a conductive path for supplying a relatively large current of about several hundreds A, for example, or as a heat dissipation material.

電子部品7は、例えば、トランジスタ、CPU(Central Processing Unit)用のLS
I(Large Scale Integrated circuit)、IGBT(Insulated Gate Bipolar Transistor)、またはMOS−FET(Metal Oxide Semiconductor - Field Effect Transistor)等の半導体素子である。
The electronic component 7 is, for example, a transistor or an LS for a CPU (Central Processing Unit).
It is a semiconductor element such as I (Large Scale Integrated circuit), IGBT (Insulated Gate Bipolar Transistor), or MOS-FET (Metal Oxide Semiconductor-Field Effect Transistor).

接合材は、例えば、金属または導電性樹脂等からなる。接合材6は、たとえば、半田、金−スズ(Au−Sn)合金、またはスズ−銀−銅(Sn−Ag−Cu)合金等である。   The bonding material is made of, for example, a metal or a conductive resin. The bonding material 6 is, for example, solder, a gold-tin (Au—Sn) alloy, a tin-silver-copper (Sn—Ag—Cu) alloy, or the like.

なお、回路板3の表面に、めっき法によってめっき膜を形成しても良い。この構成によれば、接合材との濡れ性が良好となるので電子部品7を回路板3の表面に強固に接合することができる。めっき膜は、導電性および耐食性が高い金属を用いれば良く、たとえば、ニッケル、コバルト、銅、若しくは金、またはこれらの金属材料を主成分とする合金材料が挙げられる。めっき膜の厚みは、たとえば1.5〜10μmであれば良い。   A plating film may be formed on the surface of the circuit board 3 by a plating method. According to this configuration, since the wettability with the bonding material is improved, the electronic component 7 can be firmly bonded to the surface of the circuit board 3. The plating film may be made of a metal having high conductivity and corrosion resistance, and examples thereof include nickel, cobalt, copper, gold, or an alloy material containing these metal materials as a main component. The thickness of the plating film may be 1.5 to 10 μm, for example.

また、めっき膜の材料としてニッケルが用いられた場合、たとえば、ニッケル内部にリンを8〜15質量%程度含有するニッケル−リンのアモルファス合金のめっき膜であることが好ましい。この場合、ニッケルめっき膜の表面酸化を抑制して、電子部品7の接合材等との濡れ性を長く維持することができる。さらに、ニッケルに対するリンの含有量が8〜15質量%程度であると、ニッケル−リンのアモルファス合金が形成されやすくなって、めっき膜に対する接合材等の接着強度を向上させることができる。   Further, when nickel is used as the material of the plating film, for example, a nickel-phosphorus amorphous alloy plating film containing about 8 to 15% by mass of phosphorus inside the nickel is preferable. In this case, the surface oxidation of the nickel plating film can be suppressed, and the wettability with the bonding material of the electronic component 7 can be maintained for a long time. Furthermore, when the content of phosphorus with respect to nickel is about 8 to 15% by mass, a nickel-phosphorus amorphous alloy is easily formed, and the adhesive strength of a bonding material or the like to the plating film can be improved.

図1および図2に示す回路基板1および電子装置10において、第1ろう材5の外周部の一部が回路板3の外周よりも外側に位置している。つまり、第1ろう材5は、例えば図3に示すように、その外周部の少なくとも一部が回路板3の外周よりも外側に位置していてもよい。言い換えれば、回路板3と絶縁基板2との間よりも外側に、第1ろう材5の一部がはみ出ていてもよい。なお、図3は本発明の実施形態の回路基板1および電子装置10を示す平面図である。図3において図1および図2と同様の部位には同様の符号を付している。   In the circuit board 1 and the electronic device 10 shown in FIGS. 1 and 2, a part of the outer peripheral portion of the first brazing material 5 is located outside the outer periphery of the circuit board 3. That is, for example, as shown in FIG. 3, at least a part of the outer peripheral portion of the first brazing material 5 may be located outside the outer periphery of the circuit board 3. In other words, a part of the first brazing material 5 may protrude outside between the circuit board 3 and the insulating substrate 2. FIG. 3 is a plan view showing the circuit board 1 and the electronic device 10 according to the embodiment of the present invention. In FIG. 3, the same parts as those in FIGS. 1 and 2 are denoted by the same reference numerals.

図1〜図3に示す例の回路基板1および電子装置10においては、上から見たときに(平面透視において)第1ろう材5の外周位置と第2ろう材6の外周位置とがほぼ同じである。また、回路板3の外周位置と放熱板4の外周位置とがほぼ同じである。そのため、図3では放熱板4および第2ろう材6の外周位置は、回路板3および第1ろう材5の外周位置と重なって見えなくなっている。   In the circuit board 1 and the electronic device 10 of the example shown in FIGS. 1 to 3, when viewed from above (in plan perspective), the outer peripheral position of the first brazing material 5 and the outer peripheral position of the second brazing material 6 are substantially the same. The same. Moreover, the outer peripheral position of the circuit board 3 and the outer peripheral position of the heat sink 4 are substantially the same. Therefore, in FIG. 3, the outer peripheral positions of the heat radiating plate 4 and the second brazing material 6 are not visible because they overlap the outer peripheral positions of the circuit board 3 and the first brazing material 5.

このように第1ろう材5の外周部の少なくとも一部が回路板3の外周よりも外側に位置している場合には、回路板3よりも外側、つまりは回路基板1全体の外周により近い位置まで、熱膨張係数が比較的大きい第1ろう材5が存在している。そのため、回路基板1のさらに外周に近い位置で回路基板1を、放熱板4による反りと逆方向に反らせる力が得られる。これによって、回路基板1(絶縁基板2)の上面側において、より効果的に、回路基板1(絶縁基板2)の下面側の力を打ち消す力を発生させることができる。したがって、回路基板1全体の反りがより効果的に抑制される。   Thus, when at least a part of the outer periphery of the first brazing material 5 is located outside the outer periphery of the circuit board 3, it is closer to the outer side than the circuit board 3, that is, the outer periphery of the entire circuit board 1. The first brazing material 5 having a relatively large thermal expansion coefficient exists up to the position. Therefore, the force which warps the circuit board 1 in the direction opposite to the curvature by the heat sink 4 in the position near the outer periphery of the circuit board 1 is obtained. Thereby, on the upper surface side of the circuit board 1 (insulating substrate 2), it is possible to generate a force that more effectively cancels the force on the lower surface side of the circuit board 1 (insulating substrate 2). Therefore, the warp of the entire circuit board 1 is more effectively suppressed.

図1および図2に示す回路基板1および電子装置10では、平面透視において、第1ろう材5の外周が放熱板4の外周よりも外側に位置している。この場合にも、第1ろう材5の外周部の少なくとも一部が回路板3の外周よりも外側に位置している場合と同様の効果を得ることができる。   In the circuit board 1 and the electronic device 10 shown in FIGS. 1 and 2, the outer periphery of the first brazing material 5 is located outside the outer periphery of the heat sink 4 in a plan view. Also in this case, the same effect as when at least a part of the outer peripheral portion of the first brazing material 5 is located outside the outer periphery of the circuit board 3 can be obtained.

図4(a)は図3に示す回路基板1および電子装置10の第1の変形例を示す平面図であり、図4(b)は図4(a)のA−A線における断面図である。図4において図1〜3と同様の部位には同様の符号を付している。また、図4(b)では電子部品7を回路基板1と分けて示している。電子部品7が回路基板1に矢印の方向に搭載されて電子装置10が製作される。   4A is a plan view showing a first modification of the circuit board 1 and the electronic device 10 shown in FIG. 3, and FIG. 4B is a cross-sectional view taken along the line AA in FIG. 4A. is there. 4, parts similar to those in FIGS. 1 to 3 are denoted by the same reference numerals. In FIG. 4B, the electronic component 7 is shown separately from the circuit board 1. An electronic device 10 is manufactured by mounting the electronic component 7 on the circuit board 1 in the direction of the arrow.

図4に示す例においては、平面透視において放熱板4の外周位置が第1ろう材5の外周位置よりも外側に位置している。このような場合には、放熱板4の剛性を大きくして、回路基板1全体が反る可能性を低減する上で有効である。また、このような場合には、放熱板4の露出した表面の面積(外気に接する表面積)を大きくして、放熱性を向上させる上でも有効である。   In the example shown in FIG. 4, the outer peripheral position of the heat radiating plate 4 is located outside the outer peripheral position of the first brazing filler metal 5 in plan perspective. In such a case, it is effective to increase the rigidity of the heat sink 4 and reduce the possibility of the entire circuit board 1 warping. Moreover, in such a case, it is effective also in improving the heat dissipation by increasing the exposed surface area (surface area in contact with the outside air) of the heat radiating plate 4.

ここで、回路板3および放熱板4それぞれの厚みの絶対値および厚みの比が回路基板1および電子装置10の放熱性および信頼性に与える影響の具体例を挙げて説明する。この例では、図1に示すような形態の回路基板1の回路板3上に電子部品7を搭載して図2に示すような電子装置10を作製し、それをヒートシンク(図示せず)に実装して、電子部品7を所定の発熱量で発熱させたときの電子部品7の温度(部品温度)Tjを、回路板3および放熱板4の厚みをさまざまな値に変化させて熱シミュレーションを行い、回路板3および放熱板4の厚みの放熱性への影響を調べた。   Here, a specific example of the influence of the absolute value of the thickness of each of the circuit board 3 and the heat sink 4 and the ratio of the thickness on the heat dissipation and reliability of the circuit board 1 and the electronic device 10 will be described. In this example, an electronic component 7 is mounted on a circuit board 3 of a circuit board 1 having a configuration as shown in FIG. 1 to produce an electronic device 10 as shown in FIG. 2, and this is used as a heat sink (not shown). The thermal simulation is performed by changing the thickness of the circuit board 3 and the heat radiating plate 4 to various values for the temperature (component temperature) Tj of the electronic component 7 when the electronic component 7 is heated with a predetermined calorific value after mounting. The effect of the thickness of the circuit board 3 and the heat sink 4 on the heat dissipation was examined.

熱シミュレーションは、各部材について、下記の表1で示す条件に設定して行なった。また、上記の所定のチップ発熱量としては、回路板3および放熱板4の厚みt1、t2をそれぞれ1.8mm(市場要求のサイズに相当)としたときに、チップ温度Tjが175℃になるような発熱量に調整して固定することにより行った。   The thermal simulation was performed by setting the conditions shown in Table 1 below for each member. The predetermined chip heat generation amount is such that the chip temperature Tj is 175 ° C. when the thicknesses t1 and t2 of the circuit board 3 and the heat sink 4 are 1.8 mm (corresponding to the size required by the market), respectively. It was performed by adjusting and fixing to a suitable calorific value.

Figure 2017092211
Figure 2017092211

なお、表1に示すように、電子部品7が実装される回路板3は、集積化のため電子部品7よりあまり大きくできないため、電子部品7より片側2mmだけ大きいサイズに設定している。   As shown in Table 1, the circuit board 3 on which the electronic component 7 is mounted cannot be made much larger than the electronic component 7 for integration, and is therefore set to a size 2 mm larger than the electronic component 7 on one side.

表2は、実施形態の回路基板1についての信頼性試験の結果をまとめた表である。放熱性については、回路板3および放熱板4の厚みt1、t2をそれぞれ1.8mmとしたとき
にTjが175℃になるようチップ発熱量を設定した場合に、チップ温度Tjが175℃以下という結果が得られたものを極めて良(◎)とし、Tjが205℃以下かつ175℃を超える温度となる結果が得られたものを良(○)とし、205℃を超える温度となる結果が得られたも
のを不良(×)としている。なお、上記良(○)の判定は、回路板3および放熱板4の厚みt1、t2がともに0.8mmのときのTjである。
Table 2 summarizes the results of the reliability test for the circuit board 1 of the embodiment. Regarding heat dissipation, when the chip heat generation is set so that Tj is 175 ° C. when the thicknesses t1 and t2 of the circuit board 3 and the heat sink 4 are 1.8 mm, the result that the chip temperature Tj is 175 ° C. or less. The result obtained was very good (◎), and the result that Tj was 205 ° C or less and over 175 ° C was obtained as good (○), and the result was over 205 ° C. The product is considered defective (x). The determination of good (◯) is Tj when the thicknesses t1 and t2 of the circuit board 3 and the heat sink 4 are both 0.8 mm.

また、信頼性については、絶縁基板2の破壊が生じる前のサイクル数が700サイクル以
上という結果が得られたものを極めて良(◎)とし、500サイクル以上700サイクル未満のものを良(○)とし、300サイクル以上500サイクル未満のものを可(△)とし、従来技術と同じ程度の信頼性である300サイクル未満で不良発生するものを不良(×)としている
。ここでの従来技術とは、従来技術の中で放熱性が良好な、回路板3および放熱板4の厚みt1、t2がそれぞれ0.8mmのサンプルである。
As for reliability, those with the result that the number of cycles before the breakdown of the insulating substrate 2 is 700 cycles or more are judged as very good (◎), and those with 500 cycles or more and less than 700 cycles are good (○). And those with 300 cycles or more and less than 500 cycles are acceptable (Δ), and those that are defective in less than 300 cycles with the same level of reliability as the prior art are defined as defective (x). Here, the prior art is a sample in which the thicknesses t1 and t2 of the circuit board 3 and the heat sink 4 are 0.8 mm, respectively, which have good heat dissipation in the prior art.

信頼性については、表2の各条件でサンプルを作製し、これらのサンプルについて温度サイクルによる信頼性試験を行って評価した。それぞれのサンプルは、25mm×25mm×0.32mmの平板状(薄い直方体状)の窒化ケイ素質焼結体からなる絶縁基板2の一方の主面に18mm×18mm×t1の銅製の回路板3を、もう一方の主面に18mm×18mm×t2の銅製の放熱板4を接合したものとした。回路板3および放熱板4と絶縁基板2とのそれぞれの接合は、銀、銅にチタン成分を混合した第1ろう材5および第2ろう材6を用いた活性金属接合により行なった。   About reliability, the sample was produced on each condition of Table 2, and the reliability test by a temperature cycle was done and evaluated about these samples. Each sample has a copper circuit board 3 of 18 mm × 18 mm × t1 on one main surface of an insulating substrate 2 made of a silicon nitride sintered body having a flat plate shape (thin rectangular parallelepiped shape) of 25 mm × 25 mm × 0.32 mm, The copper heat sink 4 of 18 mm × 18 mm × t 2 was joined to the other main surface. Each of the circuit board 3 and the heat sink 4 and the insulating substrate 2 was joined by active metal joining using a first brazing material 5 and a second brazing material 6 in which a titanium component was mixed in silver and copper.

第1ろう材5は、回路板3よりも外側に位置する部分における熱膨張係数が16.9×10−61/Kであり、それよりも内側の中央部(回路板3の下側に位置する部分)における熱膨張係数が16.7×10−61/Kであるものを用いた。また、第2ろう材6は熱膨張係数が16.7×10−61/Kであるものを用いた。 The first brazing material 5 has a coefficient of thermal expansion of 16.9 × 10 −6 1 / K at a portion located outside the circuit board 3, and is located at the inner center portion (located below the circuit board 3). A part having a thermal expansion coefficient of 16.7 × 10 −6 1 / K was used. The second brazing material 6 used had a thermal expansion coefficient of 16.7 × 10 −6 1 / K.

信頼性試験は、チップとして近年用いられるようになってきているIGBTチップが搭載されたときの信頼性を考慮し、チップの高温動作化に対応し温度条件を低温側−40℃、高温側175℃とした。温度サイクル100サイクルごとにサンプルを取り出し、実体顕微鏡を用いて観察し、回路板3および放熱板4の絶縁基板2からの剥がれ、および絶縁基板2の割れが認められなかったものを合格(上記の通り◎、○または△)とした。   In the reliability test, considering the reliability when an IGBT chip that has recently been used as a chip is mounted, the temperature conditions are set to a low temperature side of −40 ° C. and a high temperature side of 175 corresponding to the high temperature operation of the chip. C. A sample is taken out every 100th temperature cycle and observed with a stereomicroscope, and the circuit board 3 and the heat sink 4 are separated from the insulating substrate 2 and the insulating substrate 2 is not cracked. Street ◎, ○ or △).

さらに、表2では、回路板3および放熱板4の厚みt1、t2の各組合せについて、回路基板1の製造コストの面で評価した結果を併せて示すとともに、放熱性・信頼性・コストの3つの項目を考慮して総合判定した結果も併せて示している。コストは放熱板4の部材コストとして放熱板4の厚みt2が5mm以下を極めて良(◎)とし、回路板3の厚みt1が1mm以上で、回路を形成するためのエッチングに極端に時間がかかってしまうものを可(△)とした。総合判定としては、放熱性・信頼性・コストの3つの項目の中で最も評価が悪かった結果を採用した。   Further, Table 2 also shows the results of evaluation in terms of the manufacturing cost of the circuit board 1 for each combination of the thicknesses t1 and t2 of the circuit board 3 and the heat radiating plate 4, and 3 of heat dissipation, reliability, and cost. The results of comprehensive judgment taking into account one item are also shown. The cost of the heat sink 4 is extremely good (t) when the thickness t2 of the heat sink 4 is 5 mm or less, and the thickness t1 of the circuit board 3 is 1 mm or more, and etching for forming a circuit takes extremely long time. (△). As a comprehensive judgment, the result of the worst evaluation among the three items of heat dissipation, reliability, and cost was adopted.

また、表2について、信頼性の判定が×であるものは、総合判定も×となっている。ただし、この総合判定の結果は、実用上の回路基板1としての種々の条件も考慮したものであるため、信頼性の判定の結果(例えば、◎または○)よりも総合判定の結果が低く(例えば○または△)なったものも含まれている。言い換えれば、総合判定が◎であるものは
、信頼性が効果的に向上しているとともに、実用についてもより適した回路基板1であるとみなすことができる。
In Table 2, when the reliability judgment is x, the comprehensive judgment is also x. However, since the result of this comprehensive determination is also in consideration of various conditions as a practical circuit board 1, the result of the comprehensive determination is lower than the result of reliability determination (for example, ◎ or ○) ( For example, a circle or a circle is also included. In other words, if the overall judgment is ◎, the reliability is effectively improved, and it can be considered that the circuit board 1 is more suitable for practical use.

Figure 2017092211
Figure 2017092211

表2に示される放熱性・信頼性の各項目に基づけば、放熱板4の厚みt2が回路板3の厚みt1の3.75倍以上になるように設定することで所望の放熱性を確保しつつ、信頼性を高くすることができる。すなわち、放熱板4の厚みは回路板3の厚みの3.75倍以上に設定される。   Based on the items of heat dissipation and reliability shown in Table 2, while ensuring the desired heat dissipation by setting the thickness t2 of the heat sink 4 to be at least 3.75 times the thickness t1 of the circuit board 3 , Can increase the reliability. That is, the thickness of the heat sink 4 is set to 3.75 times or more the thickness of the circuit board 3.

また、絶縁基板2の上面に接合された回路板3の厚みt1を0.8mm以下とし、絶縁基
板2の下面に接合された金属製の放熱板4の厚みt2を3mm以上とし、回路板3の厚みt1と放熱板4の厚みt2との和を3.4mm以上とするように、回路板3および放熱板4
の厚みt1、t2を設定することで、コストを低減しつつ、放熱性をさらに高くすることができる。また、回路板3の厚みt1が0.8mm以下であり、放熱板4の厚みt2が3m
m以上であり、t1とt2との和が3.4mm以上であるものは、信頼性についても、いず
れも◎または○であり、良好な結果となっている。つまり、信頼性をさらに向上させることに関しても有効である。
Further, the thickness t1 of the circuit board 3 bonded to the upper surface of the insulating substrate 2 is set to 0.8 mm or less, the thickness t2 of the metal heat sink 4 bonded to the lower surface of the insulating substrate 2 is set to 3 mm or more, The circuit board 3 and the heat sink 4 so that the sum of the thickness t1 and the thickness t2 of the heat sink 4 is 3.4 mm or more.
By setting the thicknesses t1 and t2, the heat dissipation can be further enhanced while reducing the cost. The thickness t1 of the circuit board 3 is 0.8 mm or less, and the thickness t2 of the heat sink 4 is 3 m.
In the case of m or more and the sum of t1 and t2 being 3.4 mm or more, the reliability is either ◎ or ◯, which is a good result. In other words, it is effective for further improving the reliability.

すなわち、実施形態の回路基板1および電子装置10において、回路板3の厚みt1が0.8mm以下であり、放熱板4の厚みt2が3mm以上であり、t1とt2との和が3.4mm以上であってもよい。   That is, in the circuit board 1 and the electronic device 10 of the embodiment, the thickness t1 of the circuit board 3 is 0.8 mm or less, the thickness t2 of the heat sink 4 is 3 mm or more, and the sum of t1 and t2 is 3.4 mm or more. There may be.

この場合には、放熱性をさらに高くするとともに、信頼性をさらに向上させることに関しても有効である。   In this case, it is effective to further improve heat dissipation and further improve reliability.

この信頼性の向上については、前述したように、回路板3の塑性変形が比較的容易であることと、放熱板4の剛性が比較的高いこととによるものとして以下のように説明することができる。すなわち、絶縁基板2の上面に接合された回路板3の厚みを薄くすると、絶縁基板2の下面に接合された放熱板4の温度に対する伸縮に対して、回路板3が塑性変形により小さな荷重で追従するので、絶縁基板2に加わる応力を抑制することができる。また、放熱板4の厚みを厚くすることにより、放熱板4の剛性が高くなり、回路基板1の変形を抑制することができる。   As described above, this improvement in reliability can be explained as follows because the plastic deformation of the circuit board 3 is relatively easy and the rigidity of the heat sink 4 is relatively high. it can. That is, when the thickness of the circuit board 3 bonded to the upper surface of the insulating substrate 2 is reduced, the circuit board 3 is subjected to a small load due to plastic deformation against expansion and contraction with respect to the temperature of the heat sink 4 bonded to the lower surface of the insulating substrate 2. Since it follows, the stress added to the insulating substrate 2 can be suppressed. Further, by increasing the thickness of the heat radiating plate 4, the rigidity of the heat radiating plate 4 is increased, and deformation of the circuit board 1 can be suppressed.

回路基板1に変形が生じると、絶縁基板2には、回路板3および放熱板4による応力と、絶縁基板2の変形による応力とが重畳されるため、その信頼性が低下してしまうが、上記のように、放熱板4の厚みを厚くすると、放熱板4の剛性が高くなり、回路基板1の変形が抑制されるので、絶縁基板2への変形による応力を抑制することができる。したがって、回路基板1の信頼性を高くすることができる。   When the circuit board 1 is deformed, the stress due to the circuit board 3 and the heat radiating plate 4 and the stress due to the deformation of the insulating substrate 2 are superimposed on the insulating substrate 2. As described above, when the thickness of the heat radiating plate 4 is increased, the rigidity of the heat radiating plate 4 is increased and the deformation of the circuit board 1 is suppressed, so that the stress due to the deformation to the insulating substrate 2 can be suppressed. Therefore, the reliability of the circuit board 1 can be increased.

また、回路板3および放熱板4に銅を用いると、銅の高熱伝導性により回路基板1としての放熱性向上に有利である。   In addition, when copper is used for the circuit board 3 and the heat radiating plate 4, it is advantageous for improving the heat dissipation as the circuit board 1 due to the high thermal conductivity of copper.

また、電子装置10を構成する場合に、回路板3および放熱板4の厚みt1、t2が上記の条件を満たしている回路基板1を用いることによって、電子部品7から発生する熱を効果的に放熱することができるとともに、信頼性の高い電子装置10を製作することができる。   Further, when the electronic device 10 is configured, by using the circuit board 1 in which the thicknesses t1 and t2 of the circuit board 3 and the heat radiating plate 4 satisfy the above conditions, heat generated from the electronic component 7 can be effectively reduced. It is possible to produce a highly reliable electronic device 10 that can dissipate heat.

また、実施形態の回路基板1および電子装置10において、放熱板4の厚みが5mm以下であってもよい。すなわち、回路板3および放熱板4の厚みt1、t2に関しては、上記の条件に加えて、さらに、放熱板4の厚みt2を5mm以下としてもよい。この場合には、表2に示すように、高い放熱性および高い信頼性を有するとともに、製造コストの面で有利な回路基板1を実現することができる。   In the circuit board 1 and the electronic device 10 of the embodiment, the thickness of the heat sink 4 may be 5 mm or less. That is, regarding the thicknesses t1 and t2 of the circuit board 3 and the heat sink 4, in addition to the above conditions, the thickness t2 of the heat sink 4 may be 5 mm or less. In this case, as shown in Table 2, it is possible to realize a circuit board 1 that has high heat dissipation and high reliability and is advantageous in terms of manufacturing cost.

回路板3および放熱板4の厚みt1、t2に関しては、上記の条件に加えて、さらに、回路板3の厚みt1を0.4mm以上とすることが好ましい。これにより、表2に示すよう
に、高い放熱性および高い信頼性を有するとともに、大電流に確実に対応し得る回路基板1を実現することができる。
Regarding the thicknesses t1 and t2 of the circuit board 3 and the heat radiating plate 4, in addition to the above conditions, the thickness t1 of the circuit board 3 is preferably set to 0.4 mm or more. As a result, as shown in Table 2, it is possible to realize a circuit board 1 that has high heat dissipation and high reliability and can reliably cope with a large current.

なお、本発明の回路基板および電子装置は、上記実施の形態に限定されるものではなく、本発明の要旨の範囲内であれば種々の変更は可能である。例えば図5に示す例のように、複数の回路板3を有するものであってもよい。図5(a)は、図3に示す回路基板1および電子装置10の第2の変形例を示す平面図であり、図5(b)は図5(a)のB−B線における断面図である。図5において図1〜3と同様の部位には同様の符号を付している。   The circuit board and the electronic device of the present invention are not limited to the above-described embodiments, and various modifications can be made within the scope of the gist of the present invention. For example, like the example shown in FIG. 5, you may have a plurality of circuit boards 3. 5A is a plan view showing a second modification of the circuit board 1 and the electronic device 10 shown in FIG. 3, and FIG. 5B is a cross-sectional view taken along the line BB of FIG. 5A. It is. In FIG. 5, parts similar to those in FIGS.

複数の回路板3は、例えば電子部品7の実装(接合搭載)用のものと、電子部品7と電気的に接続される接続回路用のものとを含んでいる。電子部品7と接続回路用の回路板3とは、ボンディングワイヤ等の導電性接続材8を介して互いに電気的に接続されている。接続導体用の回路板3がさらに複数に分かれていてもよい。   The plurality of circuit boards 3 include, for example, one for mounting (joining mounting) the electronic component 7 and one for a connection circuit that is electrically connected to the electronic component 7. The electronic component 7 and the circuit board 3 for connection circuit are electrically connected to each other through a conductive connection material 8 such as a bonding wire. The circuit board 3 for connecting conductors may be further divided into a plurality.

この場合の第1ろう材5の外周部とは、複数の回路板3を絶縁基板2にそれぞれ接合している第1ろう材5のそれぞれの外周部である。ただし、この場合には、複数の回路板3と絶縁基板2とをそれぞれに接合している第1ろう材5の外周部のうち少なくとも絶縁基板2の上面の外周に近い部分のみ(2点鎖線で示す仮想線よりも外側の部分)において、第2ろう材6よりも熱膨張係数が大きければ、前述したような応力打ち消しの効果を有効に得ることができる。   In this case, the outer peripheral portion of the first brazing material 5 is the outer peripheral portion of each of the first brazing materials 5 joining the plurality of circuit boards 3 to the insulating substrate 2. However, in this case, at least a portion close to the outer periphery of the upper surface of the insulating substrate 2 among the outer peripheral portions of the first brazing material 5 joining the plurality of circuit boards 3 and the insulating substrate 2 to each other (two-dot chain line) If the thermal expansion coefficient is larger than that of the second brazing material 6 in the portion outside the imaginary line indicated by (2), the effect of canceling the stress as described above can be obtained effectively.

また、第1ろう材5は、その全体において、第2ろう材6よりも高い熱膨張係数を有するものであってもよい。この場合にも、前述したような応力打ち消しの効果を有効に得ることができる。   Further, the first brazing material 5 may have a higher thermal expansion coefficient than the second brazing material 6 in its entirety. Also in this case, the effect of stress cancellation as described above can be obtained effectively.

1・・回路基板
2・・絶縁基板
3・・回路板
4・・放熱板
5・・第1ろう材
6・・第2ろう材
7・・電子部品
8・・導電性接続材
10・・電子装置
1..Circuit board 2..Insulating board 3..Circuit board 4..Heat sink 5..First brazing material 6 ... Second brazing material 7 ... Electronic component 8 ... Conductive connecting material
10. ・ Electronic equipment

Claims (5)

上面および下面を有する絶縁基板と、
前記絶縁基板の前記上面に第1ろう材を介して接合された金属製の回路板と、
前記絶縁基板の前記下面に第2ろう材を介して接合された金属製の放熱板とを有し、
前記放熱板の厚みが前記回路板の厚みの3.75倍以上であり、
前記第1ろう材は、少なくとも該第1ろう材の外周部における熱膨張係数が前記第2ろう材の熱膨張係数よりも大きいことを特徴とする回路基板。
An insulating substrate having an upper surface and a lower surface;
A metal circuit board joined to the upper surface of the insulating substrate via a first brazing material;
A metal heat dissipating plate joined to the lower surface of the insulating substrate via a second brazing material,
The thickness of the heat sink is at least 3.75 times the thickness of the circuit board;
The circuit board, wherein the first brazing material has a coefficient of thermal expansion at least at an outer peripheral portion of the first brazing material larger than that of the second brazing material.
前記第1ろう材の外周部の少なくとも一部が前記回路板の外周よりも外側に位置していることを特徴とする請求項1に記載の回路基板。 2. The circuit board according to claim 1, wherein at least a part of an outer peripheral portion of the first brazing material is located outside an outer periphery of the circuit board. 前記回路板の厚みが0.8mm以下であり、前記放熱板の厚みが3mm以上であり、前記回路板の厚みと前記放熱板の厚みとの和が3.4mm以上であることを特徴とする請求項1または請求項2に記載の回路基板。 The thickness of the circuit board is 0.8 mm or less, the thickness of the heat sink is 3 mm or more, and the sum of the thickness of the circuit board and the thickness of the heat sink is 3.4 mm or more. The circuit board according to claim 1 or 2. 前記放熱板の厚みが5mm以下であることを特徴とする請求項3に記載の回路基板。 The circuit board according to claim 3, wherein a thickness of the heat radiating plate is 5 mm or less. 請求項1〜4のいずれかに記載の回路基板と、
該回路基板の前記回路板に搭載された電子部品とを含むことを特徴とする電子装置。
A circuit board according to any one of claims 1 to 4,
And an electronic component mounted on the circuit board of the circuit board.
JP2015219552A 2015-11-09 2015-11-09 Circuit board and electronic device Active JP6538524B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2015219552A JP6538524B2 (en) 2015-11-09 2015-11-09 Circuit board and electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2015219552A JP6538524B2 (en) 2015-11-09 2015-11-09 Circuit board and electronic device

Publications (2)

Publication Number Publication Date
JP2017092211A true JP2017092211A (en) 2017-05-25
JP6538524B2 JP6538524B2 (en) 2019-07-03

Family

ID=58768319

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015219552A Active JP6538524B2 (en) 2015-11-09 2015-11-09 Circuit board and electronic device

Country Status (1)

Country Link
JP (1) JP6538524B2 (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0936540A (en) * 1995-07-21 1997-02-07 Toshiba Corp Ceramic circuit board
JP2008306134A (en) * 2007-06-11 2008-12-18 Toyota Motor Corp Semiconductor module
JP2013211546A (en) * 2012-02-29 2013-10-10 Hitachi Metals Ltd Ceramic-copper assembly and manufacturing method of the same
JP2014053619A (en) * 2013-09-30 2014-03-20 Dowa Holdings Co Ltd Method for manufacturing metal-ceramic bonded circuit board
JP2014222788A (en) * 2012-03-30 2014-11-27 三菱マテリアル株式会社 Method for manufacturing substrate for power module, method for manufacturing substrate for power module with heat sink, and method for manufacturing power module
JP2015065313A (en) * 2013-08-28 2015-04-09 京セラ株式会社 Circuit board and electronic apparatus

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0936540A (en) * 1995-07-21 1997-02-07 Toshiba Corp Ceramic circuit board
JP2008306134A (en) * 2007-06-11 2008-12-18 Toyota Motor Corp Semiconductor module
JP2013211546A (en) * 2012-02-29 2013-10-10 Hitachi Metals Ltd Ceramic-copper assembly and manufacturing method of the same
JP2014222788A (en) * 2012-03-30 2014-11-27 三菱マテリアル株式会社 Method for manufacturing substrate for power module, method for manufacturing substrate for power module with heat sink, and method for manufacturing power module
JP2015065313A (en) * 2013-08-28 2015-04-09 京セラ株式会社 Circuit board and electronic apparatus
JP2014053619A (en) * 2013-09-30 2014-03-20 Dowa Holdings Co Ltd Method for manufacturing metal-ceramic bonded circuit board

Also Published As

Publication number Publication date
JP6538524B2 (en) 2019-07-03

Similar Documents

Publication Publication Date Title
JP6276424B2 (en) Circuit board and electronic device
JP2008041752A (en) Semiconductor module, and radiation board for it
CN107305875B (en) Bidirectional semiconductor packaging part
JP2013179374A (en) Power module substrate
JP4893096B2 (en) Circuit board and semiconductor module using the same
JP4893095B2 (en) Circuit board and semiconductor module using the same
CN102593081A (en) Semiconductor device including a heat spreader
JP6462730B2 (en) Circuit board and electronic device
JP4683043B2 (en) Manufacturing method of semiconductor device
JP5370460B2 (en) Semiconductor module
JP2006269966A (en) Wiring substrate and its manufacturing method
JP5218621B2 (en) Circuit board and semiconductor module using the same
JP2012074591A (en) Circuit board and electronic divice
JP5902557B2 (en) Multilayer wiring board and electronic device
JP5812882B2 (en) Wiring board and electronic device
JP6702813B2 (en) Composite substrate, electronic device and electronic module
JP6538524B2 (en) Circuit board and electronic device
JP6983119B2 (en) Heat dissipation plate, semiconductor package and semiconductor device
JP4635977B2 (en) Heat dissipation wiring board
JP6603098B2 (en) Circuit board and electronic device
JP2012094697A (en) Circuit board and electronic device
JP2013229377A (en) Circuit board and electronic apparatus using the same
JPH10223809A (en) Power module
JP2016032032A (en) Circuit board and electronic device
JP2023040689A (en) Substrate and semiconductor module

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20180827

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20190424

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20190507

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20190606

R150 Certificate of patent or registration of utility model

Ref document number: 6538524

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150