JP2015105908A - Conduction inspection method of printed wiring board - Google Patents
Conduction inspection method of printed wiring board Download PDFInfo
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- 238000007689 inspection Methods 0.000 title claims abstract description 90
- 238000000034 method Methods 0.000 title claims abstract description 30
- 238000012360 testing method Methods 0.000 claims description 26
- 238000010438 heat treatment Methods 0.000 claims description 5
- 239000000523 sample Substances 0.000 claims description 5
- 230000009477 glass transition Effects 0.000 claims description 3
- 239000004568 cement Substances 0.000 claims 1
- 238000001514 detection method Methods 0.000 abstract description 13
- 230000007547 defect Effects 0.000 abstract description 10
- 238000007747 plating Methods 0.000 description 26
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- 238000010586 diagram Methods 0.000 description 7
- 238000005530 etching Methods 0.000 description 4
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- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000004299 exfoliation Methods 0.000 description 1
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Abstract
Description
本発明は、プリント配線板の導通検査方法に関し、特に、高密度配線化が図られたプリント配線板の導通検査方法に関する。 The present invention relates to a printed wiring board continuity inspection method, and more particularly to a printed wiring board continuity inspection method in which high-density wiring is achieved.
プリント配線板に形成される配線パターンの導通検査方法としては、従来は、２端子法による検査が主流であったが、高密度配線化（例えば、ブラインドビアホール径：φ１２５μｍ以下、配線パターン幅／配線パターン間隙：７０μｍ／７０μｍ以下）が進んだ現在のプリント配線板においては、２端子法による導通検査では対応できなくなってきた。 Conventionally, as a method for inspecting the continuity of the wiring pattern formed on the printed wiring board, the inspection by the two-terminal method has been the mainstream, but high-density wiring (for example, blind via hole diameter: φ125 μm or less, wiring pattern width / wiring) In the current printed wiring board in which the pattern gap is 70 μm / 70 μm or less), it has become impossible to cope with the continuity test by the two-terminal method.
その理由は、２端子法による導通検査では、検査用の端子とプリント配線板のランドとの間の接触抵抗および検査端子と検査機器とを結ぶリード線の抵抗、更にはプローブピンの抵抗が導通検査時の抵抗値分として含まれてしまうため、これらの抵抗が無視できるような完全な断線状態を検出するというのには有効であるのだが、高密度配線化が進んだ現在のプリント配線板の導通検査で要求される、数十〜数百ｍΩオーダーの微小な抵抗値の上昇、例えば、配線パターンの半断線（断線しかかり部）や細り・太り、ブラインドビアホールやスルーホールのめっきクラックやめっき膜薄、めっき異常（無電解めっき未着、物性の変動）による微小な抵抗値の上昇については検出できないからである。 The reason for this is that in the continuity test using the two-terminal method, the contact resistance between the test terminal and the land of the printed wiring board, the resistance of the lead wire connecting the test terminal and the test equipment, and further the resistance of the probe pin are conducted. Since it is included as a resistance value at the time of inspection, it is effective to detect a complete disconnection state in which these resistances can be ignored, but the current printed wiring board with advanced high-density wiring A small increase in resistance value on the order of several tens to several hundreds of mΩ required for continuity inspection, such as semi-breaking (breaking part) or thinning / thickening of wiring patterns, plating cracks in blind via holes and through holes, This is because a slight increase in resistance value due to plating film thinness, plating abnormality (electroless plating not deposited, change in physical properties) cannot be detected.
そこで最近では、上記リード線やプローブピン等の抵抗の影響を受けない（即ち、微小な抵抗値上昇の検出が可能な）４端子法による導通検査が行われるようになってきたわけであるが、従来のプリント配線板の導通検査は、特許文献１にも開示されているように、電気的に接続された配線パターン網（以降これを「検査ネットＫＮ」と呼ぶことにする）を所定数選択し、各検査ネットＫＮ毎に、決められた基準検査点と当該検査ネットＫＮ内で接続されている各検査点との間に位置するネット（以降これを「重複ネット」と呼ぶことにする）のネット抵抗値を順次測定して（例えば、図４（ａ）に示した「基準検査点ａと検査点ｂ間に位置する重複ネットａｂ」、「基準検査点ａと検査点ｃ間に位置する重複ネットａｃ」など）、このネット抵抗値が予め各検査点間で設定した閾値以下であるか否かで合否判定するという方法で行なわれていた。
これは、重複したパターン部分を繰返し検査することで、検査確度を向上させるためである。
Therefore, recently, a continuity test by the four-terminal method that is not affected by the resistance of the lead wire, the probe pin, etc. (that is, can detect a minute increase in resistance value) has been performed. In the conventional continuity inspection of the printed wiring board, as disclosed in Patent Document 1, a predetermined number of electrically connected wiring pattern networks (hereinafter referred to as “inspection net KN”) is selected. For each inspection net KN, a net located between a predetermined reference inspection point and each inspection point connected in the inspection net KN (hereinafter referred to as “overlapping net”). Are sequentially measured (for example, “overlapping net ab located between reference inspection point a and inspection point b” and “position between reference inspection point a and inspection point c shown in FIG. 4A). Duplicate net ac ") Resistance has been carried out in a way that determines acceptance at or less than the predetermined threshold value among the test points.
This is to improve inspection accuracy by repeatedly inspecting overlapping pattern portions.
また、検査時間を短くするために、選択する検査ネットＫＮとして、なるべくネット長（配線長）が長いものを選択するということも一般的に行なわれていた（ネット長の長い検査ネットＫＮを選択することにより、検査ネットＫＮの数と検査点数を少なく設定できるため、検査時間の短縮化が図れる）。 Further, in order to shorten the inspection time, it has been generally performed to select an inspection net KN having a long net length (wiring length) as much as possible (selecting an inspection net KN having a long net length). By doing so, the number of inspection nets KN and the number of inspection points can be set small, so that the inspection time can be shortened).
そのため、検査ネットＫＮ中の各検査点間の中に、ネット抵抗値が１０００ｍΩを超えるような長い重複ネットが含まれていた場合に（例えば、図４（ａ）に示した「基準検査点ａと検査点ｄ間に位置する重複ネットａｄ」、「基準検査点ａと検査点ｅ間に位置する重複ネットａｅ」）、実際には不良品として判定されるべきものが、良品として判定されてしまうという懸念があった。 Therefore, when a long overlapping net having a net resistance value exceeding 1000 mΩ is included between the inspection points in the inspection net KN (for example, “reference inspection point a shown in FIG. 4A). And “overlapping net ad located between inspection point d” and “overlapping net ae located between reference inspection point a and inspection point e”), what should actually be determined as defective is determined as good. There was concern that it would end up.
具体的に説明すると、４端子法の導通検査で設定される不良判別閾値は、通常、プリント配線板の加工バラツキ（めっき厚みや配線パターン幅などのバラツキ）を考慮して、ネット抵抗値の平均値に、例えば、標準偏差の３倍の値を加えた値としている。 Specifically, the defect determination threshold set in the continuity test of the four-terminal method is usually an average of net resistance values in consideration of processing variations of the printed wiring board (variations such as plating thickness and wiring pattern width). For example, a value obtained by adding three times the standard deviation to the value is used.
従って、上記のようにネット抵抗値が１０００ｍΩ程度となる長い重複ネットの場合では、標準偏差が約４０〜１００ｍΩ程度になり、また、閾値は、１０００ｍΩに対して１１２０〜１３００ｍΩとなるため、例えば、基準点（１０００ｍΩ）から２００ｍΩ程度の微小な抵抗値上昇があったとしても、不良判別閾値を１３００ｍΩと設定した場合には、不良品を検出できない場合が出てくるというわけである（図４（ｂ）参照）。 Therefore, in the case of a long overlapping net in which the net resistance value is about 1000 mΩ as described above, the standard deviation is about 40 to 100 mΩ, and the threshold value is 1120 to 1300 mΩ with respect to 1000 mΩ. Even if there is a slight increase in the resistance value of about 200 mΩ from the reference point (1000 mΩ), if the defect determination threshold is set to 1300 mΩ, there may be cases where a defective product cannot be detected (FIG. 4 ( b)).
本発明は、微小な抵抗値上昇の検出能力を、非常に簡単な手段で向上させることができる、４端子法によるプリント配線板の導通検査方法を提供することを課題とする。 An object of the present invention is to provide a printed wiring board continuity inspection method by a four-terminal method, which can improve the detection capability of a minute increase in resistance value by a very simple means.
本発明は、電気的に接続された配線パターン網からなる検査ネットを選択するステップと、当該検査ネット中に複数の検査点を設定するステップと、当該複数の検査点を２点づつ組み合わせて当該検査ネットを分岐ネット化するステップと、当該分岐ネットの２点の検査点に４端子導通検査用のプローブピンを接触させて、各分岐ネットの抵抗値測定を行うステップと、当該抵抗値測定により得られた各分岐ネットのネット抵抗値と予め設定した各分岐ネットの不良判別閾値とを比較して、当該プリント配線板の合否判定を行うステップとを有してなり、かつ、当該分岐ネット化する際の２点の検査点の組み合わせを、各分岐ネットが最小のネット抵抗値となるように組み合わせることを特徴とするプリント配線板の導通検査方法により上記課題を解決したものである。 The present invention includes a step of selecting an inspection net composed of an electrically connected wiring pattern network, a step of setting a plurality of inspection points in the inspection net, and combining the plurality of inspection points two by two. A step of making the inspection net into a branch net, a step of bringing a probe pin for four-terminal continuity inspection into contact with two inspection points of the branch net, measuring the resistance value of each branch net, and the resistance value measurement Comparing the obtained net resistance value of each branch net with a preset failure determination threshold value of each branch net, and determining whether the printed wiring board is acceptable or not. The printed wiring board continuity inspection method described above is characterized in that a combination of two inspection points is combined so that each branch net has a minimum net resistance value. It is obtained by solving the problem.
本発明によれば、抵抗値測定を行う検査ネットの各ネット長（分岐ネット長）を全て短く設定できるため（即ち、不良判別閾値を低く設定できる）、検査ネットの中にネット長の長いネットが含まれる従来の導通検査方法と比較して、半断線のような微小な抵抗値上昇の検出能力を容易に向上させることができる。 According to the present invention, all the net lengths (branch net lengths) of the inspection net that performs resistance value measurement can be set to be short (that is, the failure determination threshold can be set low). As compared with the conventional continuity inspection method including the above, it is possible to easily improve the detection capability of a minute increase in resistance value such as a half-break.
本発明の実施の形態を、図１に示した概念図を用いて説明する。
まず、製造されるプリント配線板の中に、図１（ａ）に示したような検査ネットＫＮを複数選択した後、各検査ネットの中に複数の検査点Ａ〜Ｅを設定し、次いで、当該検査点Ａ〜Ｅを２点づつ組み合わせることによって、当該検査ネットＫＮを分岐ネット化する。
An embodiment of the present invention will be described with reference to the conceptual diagram shown in FIG.
First, after selecting a plurality of inspection nets KN as shown in FIG. 1A in the printed wiring board to be manufactured, a plurality of inspection points A to E are set in each inspection net, By combining the inspection points A to E two by two, the inspection net KN is made into a branch net.
ここで、上記「分岐ネット化」とは、従来技術のように基準検査点を決めずに、単純に２点の検査点を組み合わせることを意味するものであるのだが、ただ２点の検査点を組み合わせるだけでは、分岐ネットのネット長が長くなる（即ち、ネット抵抗値が高くなる）場合がでてきてしまうため（例えば、図１（ａ）でいうと「検査点ＡとＣの組み合わせ」「検査点ＢとＤの組み合わせ」など）、２点の検査点の組み合わせとしては、分岐ネットが最小のネット抵抗値となるように組み合わせることが、不良判別閾値を低く設定する上で、即ち、不良品の検出能力を向上させる上で必須となる（図１(ａ)に示した「分岐ネットＡＢ」「分岐ネットＢＣ」「分岐ネットＣＤ」「分岐ネットＤＥ」参照）。 Here, “branch network” means simply combining two inspection points without determining a reference inspection point as in the prior art, but only two inspection points. Since the net length of the branch net becomes long (that is, the net resistance value becomes high) only by combining the two (for example, in FIG. 1A, “the combination of inspection points A and C”). As a combination of two inspection points, combining the branch net so as to have the minimum net resistance value is necessary for setting the failure determination threshold low, that is, This is indispensable for improving the defect detection capability (see “branch net AB”, “branch net BC”, “branch net CD”, and “branch net DE” shown in FIG. 1A).
また、各分岐ネットのネット抵抗値設定としては、２００ｍΩ以下を目安に設定するのが、微小な抵抗値上昇の検出能力をより向上させる上で好ましい。 Further, the net resistance value of each branch net is preferably set to 200 mΩ or less as a guideline in order to further improve the detection capability of a minute resistance value increase.
その理由は、ブラインドビアホールのめっき剥離や配線パターン欠損などによる抵抗値上昇は、状態により２００ｍΩ〜１０Ω程度となるため、少なくとも、ネット抵抗値を２００ｍΩ以下に設定すれば、標準偏差が１０〜３０ｍΩ（ネット抵抗値を２００ｍΩ設定とした場合）と小さくなり、また、これに合わせて不良判別閾値も２３０〜２９０ｍΩと小さく設定できるため、抵抗値上昇が２００ｍΩと低い場合においても、不良品として漏れなく検出することができるからである（図１（ｂ）参照）。 The reason is that the increase in resistance value due to the peeling of the blind via hole plating or the wiring pattern defect is about 200 mΩ to 10Ω depending on the state. Therefore, if the net resistance value is set to 200 mΩ or less, the standard deviation is 10 to 30 mΩ ( (When the net resistance value is set to 200 mΩ), the defect determination threshold can be set to a small value of 230 to 290 mΩ accordingly. Even when the resistance value rise is as low as 200 mΩ, it is detected as a defective product without omission. It is because it can do (refer FIG.1 (b)).
さらに、各分岐ネットとしては、少なくとも１つのブラインドビアホールやスルーホール、あるいは両者が形成されていることが、微小な抵抗値上昇の検出率を向上させる上で好ましい。 Furthermore, it is preferable that at least one blind via hole, through hole, or both be formed as each branch net in order to improve the detection rate of a minute increase in resistance value.
その理由は、ブラインドビアホールやスルーホールには、めっき未着不良や微細なクラックなどを原因とする半断線が発生しやすく、これらが各分岐ネットに形成されていれば、より不良品の検出率を向上できるからである。 The reason for this is that blind via holes and through-holes are prone to half-breaks due to non-plating defects and fine cracks. If these are formed in each branch net, the detection rate of defective products will be higher. It is because it can improve.
しかし、４端子法による導通検査の中で、最も厄介な不良として挙げられるのも、ブラインドビアホールやスルーホールに発生する不良であり、これらの中には、上記で説明した検査ネットを分岐ネット化する、即ち、各ネット長を短くしてネット抵抗値を低く設定するというだけでは検出できない場合があった。 However, among the continuity tests using the 4-terminal method, the most troublesome defects are those that occur in blind via holes and through holes. In other words, there are cases where detection is not possible simply by shortening each net length and setting the net resistance value low.
例えば、ブラインドビアホール１では、図２（ａ）に示したような、元々、ビア底部ランド２とビアホールめっき３との間で、ごく僅かな剥離部５が発生しているような場合であり、また、スルーホール６では、図３（ａ）に示したような、スルーホールめっき７に、めっき膜薄部８が発生しているような場合である（これらの異常部が発生する理由は、高密度配線化が進み、穴径が非常に小さくなってきたことが原因として挙げられる）。
これらの異常部は、４端子法による導通検査だけでは不良品として検出されにくく、部品実装メーカーで部品を実装した後に、初めて顕在化するというものである。
For example, in the blind via hole 1, as shown in FIG. 2A, there is originally a case where a very slight peeling portion 5 is generated between the via bottom land 2 and the via hole plating 3. Further, in the through hole 6, as shown in FIG. 3A, the plated film thin portion 8 is generated in the through hole plating 7 (the reason why these abnormal portions occur) This is because the hole diameter has become very small due to the progress of high-density wiring).
These abnormal parts are hard to be detected as defective products only by the continuity test by the four-terminal method, and become apparent only after the components are mounted by a component mounting manufacturer.
そこで、例えば、φ１００μｍ以下というような、穴径が非常に小さいブラインドビアホールやスルーホールを有するプリント配線板の場合には、導通検査を行う前に、プリント配線板を当該プリント配線板を構成する絶縁層のガラス転移点以上の温度で加熱処理（例えば「半田リフロー処理」など）することによって、ブラインドビアホール１のビア底部ランド２とビアホールめっき３との間で発生しているごく僅かな剥離部５（図２（ａ）参照）の剥離状態をより大きくする[絶縁層４の熱膨張により、ビアホールめっき３が引き上げられている状態を示した図２（ｂ）と、加熱処理後に、剥離部５の状態がより大きくなった「剥離拡張部５ａ」を示した図２（ｃ）参照]、また、導通検査前に、プリント配線板をソフトエッチング処理（例えば、プリフラックス処理の工程内に含まれるソフトエッチング処理など）することによって、スルーホール６内で発生しているめっき膜薄部８の膜薄状態をより大きくする｛めっき膜薄部８がさらに薄くなった「めっき膜薄増長部８ａ」を示した図３（ｂ）参照｝｝というステップを追加するのが、不良品の流出をより抑制する上で好ましい（ただし、上記追加処理によって抵抗値上昇を際立たせるという手段は、不良品検出率をより向上できるという点で有効な手段であるため、よりラフな仕様の製品であっても、状況に応じて追加するというのが好ましい利用方法といえる）。 Therefore, for example, in the case of a printed wiring board having a blind via hole or a through hole having a very small hole diameter, such as φ100 μm or less, before performing a continuity test, the printed wiring board is insulated from the printed wiring board. By performing a heat treatment (for example, “solder reflow process”) at a temperature equal to or higher than the glass transition point of the layer, a very small peeled portion 5 generated between the via bottom land 2 and the via hole plating 3 of the blind via hole 1. (See FIG. 2 (a)) The peeling state is further increased [FIG. 2 (b) showing a state in which the via-hole plating 3 is pulled up by the thermal expansion of the insulating layer 4, and the peeling portion 5 after the heat treatment. 2 (c) showing the “exfoliation extended portion 5a” in which the state of the substrate becomes larger], and before the continuity test, the printed wiring board is soft-etched (example For example, by performing a soft etching process included in the preflux process, the film thin state of the plating film thin part 8 generated in the through hole 6 is further increased {the plating film thin part 8 further It is preferable to add a step “see FIG. 3 (b) showing the thinned plating film thinned portion 8a” in order to further suppress the outflow of defective products (however, the resistance value is increased by the additional processing described above). The means to make the rise stand out is an effective means in that the defective product detection rate can be further improved, so it is preferable to add even rougher specifications depending on the situation. I can say).
次に、上記で組み合わされた各分岐ネットの２点の検査点に４端子導通検査用のプローブピンを接触させて、各分岐ネットの抵抗値測定を行った後、当該抵抗値測定により得られた各分岐ネットのネット抵抗値と、予め設定した各分岐ネットの不良判別閾値とを比較して、当該プリント配線板の合否判定を行うというものである。 Next, a probe pin for 4-terminal continuity inspection is brought into contact with the two inspection points of each branch net combined as described above, and the resistance value of each branch net is measured, and then obtained by the resistance value measurement. The net resistance value of each branch net is compared with a preset failure determination threshold value of each branch net, and pass / fail determination of the printed wiring board is performed.
本発明の注目すべき点は、抵抗値測定を行う検査ネットを分岐ネット化し、当該分岐ネット化する際の２点の検査点の組み合わせを、各分岐ネットが最小のネット抵抗値となるように組み合わせた点にある。 The remarkable point of the present invention is that the inspection net for measuring the resistance value is made into a branching net, and the combination of two inspection points at the time of making the branching net is set so that each branching net has the minimum net resistance value. It is in the combined point.
これにより、抵抗値測定を行うネット（本発明でいう「分岐ネット」に相当）の長さが全て短く設定できるため（即ち、不良判別閾値を低く設定できる）、半断線のような微小な抵抗値上昇の検出能力を容易に向上させることができる。 As a result, the length of the net for measuring the resistance value (corresponding to the “branch net” in the present invention) can be set to be short (that is, the failure determination threshold can be set low), so that a minute resistance such as a half-break is formed. It is possible to easily improve the detection capability of the value increase.
本発明を説明するに当たって、導通検査を行う前に、プリント配線板を当該プリント配線板を構成する絶縁層のガラス転移点以上の温度で加熱処理するのが好ましいとしたが、当該加熱処理で一旦剥離したビア底部ランドとブラインドビアホールのビアホールめっきが、プリント配線板が冷えることによって再接触し、導通検査をパスしてしまうという懸念も考えられるため、可能であれば、当該加熱処理をしながら導通検査を行うのが、不良品の流出をより確実に防止するという点で好ましいといえる。 In explaining the present invention, it is preferable to heat-treat the printed wiring board at a temperature equal to or higher than the glass transition point of the insulating layer constituting the printed wiring board before conducting the continuity test. There is a possibility that via hole plating of the peeled via bottom land and blind via hole will re-contact the printed wiring board due to cooling and pass the continuity test. It can be said that the inspection is preferable in terms of more reliably preventing the outflow of defective products.
また、本発明を説明するに当たって、検査ネット中に設定する検査点の数として５点の例を用いて説明したが、もちろん、これ以上の数を設定することも可能であり、さらに、微小な抵抗値上昇の検出能力をより向上させるために、分岐ネットのネット抵抗値設定として、２００ｍΩ以下を目安に設定するのが好ましいとしたが、実際の製品仕様を検討した際に、最適なネット抵抗値と判断できれば、２００ｍΩ以上に設定できることはいうまでもない。 In the description of the present invention, the number of inspection points set in the inspection net has been described using the example of five points. Of course, it is possible to set a number larger than this, In order to further improve the resistance value detection capability, it is preferable to set the net resistance value of the branch net to 200 mΩ or less as a guideline. However, when examining the actual product specifications, the optimum net resistance Needless to say, if it can be determined as a value, it can be set to 200 mΩ or more.
１：ブラインドビアホール
２：ビア底部ランド
３：ビアホールめっき
４：絶縁層
５：剥離部
５ａ：剥離拡張部
６：スルーホール
７：スルーホールめっき
８：めっき膜薄部
８ａ：めっき膜薄増長部
Ａ、Ｂ、Ｃ、Ｄ、Ｅ：検査点
ＡＢ、ＢＣ、ＣＤ、ＤＥ：分岐ネット
ａ：基準検査点
ｂ、ｃ，ｄ、ｅ：検査点
ａｂ、ａｃ、ａｄ、ａｅ：重複ネット
ＫＮ：検査ネット
1: Blind via hole 2: Via bottom land 3: Via hole plating 4: Insulating layer 5: Peeling part 5a: Peeling extension part 6: Through hole 7: Through hole plating 8: Plating film thin part 8a: Plating film thinned part A, B, C, D, E: Inspection points AB, BC, CD, DE: Branch net a: Reference inspection points b, c, d, e: Inspection points ab, ac, ad, ae: Overlapping net KN: Inspection net
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| JP2020107662A (en) * | 2018-12-26 | 2020-07-09 | 日本シイエムケイ株式会社 | Printed wiring board and conduction inspection method thereof |
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| JP7257785B2 (en) | 2018-12-26 | 2023-04-14 | 日本シイエムケイ株式会社 | Printed wiring board and its conduction inspection method |
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