JP2015041762A

JP2015041762A - Optical semiconductor device

Info

Publication number: JP2015041762A
Application number: JP2013183440A
Authority: JP
Inventors: 正幸安部; Masayuki Abe
Original assignee: CHIKAGAMI SHINYA
Current assignee: CHIKAGAMI SHINYA
Priority date: 2013-08-20
Filing date: 2013-08-20
Publication date: 2015-03-02

Abstract

PROBLEM TO BE SOLVED: To provide an optical semiconductor device which has a design structure that has a p-type electrode having a p-type semiconductor and an n-type electrode having an n-type semiconductor on a substrate to reduce leak current in an area other than a light-emitting section area for emitted optical output, and can establish high output, high reliability and high efficiency.SOLUTION: An optical semiconductor device which has a p-type electrode having a p-type semiconductor and an n-type electrode having an n-type semiconductor on a substrate, has a structure that a crystal bonding edge exposed to a side wall surface between chips is covered with an insulation film or an electrical insulation isolation area is formed between a plurality of bordering light-emitting sections.

Description

本発明は、基板上にｐ型半導体を備えてなるｐ型電極とｎ型半導体を備えてなるｎ電極を夫々設けてある光半導体装置の高効率化・高信頼化技術に関する。 The present invention relates to a technology for improving the efficiency and reliability of an optical semiconductor device in which a p-type electrode including a p-type semiconductor and an n-electrode including an n-type semiconductor are provided on a substrate.

この種の光半導体装置は、基板上にｐ型半導体を備えてなるｐ型電極とｎ型半導体を備えてなるｎ電極を夫々設けて発光した光出力を取り出す光半導体装置にあって、光出力を取り出す構成となっている。 This type of optical semiconductor device is an optical semiconductor device for taking out light output by providing a p-type electrode comprising a p-type semiconductor and an n-electrode comprising an n-type semiconductor on a substrate, respectively. Is configured to take out.

上記した光半導体装置を光源として利用する場合において、以下に説明するように、発光効率を高めて光出力を高く取り出す必要がある。 When the above-described optical semiconductor device is used as a light source, as described below, it is necessary to increase the light emission efficiency and extract a high light output.

この目的のためには、発光に寄与しない漏洩電流を極力抑えるための高抵抗領域、もしくは、絶縁領域を実現して、非発光再結合確率を減少させ光半導体装置を構成することが必要である。 For this purpose, it is necessary to realize a high resistance region or an insulating region for suppressing leakage current that does not contribute to light emission as much as possible, and to reduce the probability of non-light emitting recombination and to configure an optical semiconductor device. .

更に、上記した光半導体装置においては、結晶接合の側壁端が露出しておりデバイス動作不安定さにより信頼性の向上が困難である。 Further, in the above-described optical semiconductor device, the side wall end of the crystal junction is exposed, and it is difficult to improve the reliability due to the unstable operation of the device.

本発明は、上記の問題に鑑みてなされたものであり、その目的は、基板上にｐ型半導体を備えてなるｐ型電極とｎ型半導体を備えてなるｎ電極を夫々設けて発光した光出力の発光部領域以外の漏洩電流を低減した設計構造の光半導体装置であって、高効率化・高光出力化・高信頼化が可能なものを提供する点にある。 The present invention has been made in view of the above problems, and an object thereof is to provide light emitted by providing a p-type electrode including a p-type semiconductor and an n-electrode including an n-type semiconductor on a substrate, respectively. An optical semiconductor device having a design structure with reduced leakage current outside the light emitting region of the output, which is capable of achieving high efficiency, high light output, and high reliability.

この目的を達成するための本発明に係る光半導体装置の第一の特徴構成は、特許請求の範囲の欄の請求項１に記載した如く、基板上にｐ型半導体を備えてなるｐ型電極とｎ型半導体を備えてなるｎ型電極を夫々設けてある光半導体装置にあって、チップ間側壁面に露出している結晶接合端を絶縁膜で被覆してなる構造を有する点にある。 In order to achieve this object, a first characteristic configuration of the optical semiconductor device according to the present invention is a p-type electrode comprising a p-type semiconductor on a substrate as described in claim 1 of the claims. And an n-type electrode provided with an n-type semiconductor, respectively, and has a structure in which a crystal junction end exposed on the inter-chip side wall surface is covered with an insulating film.

同第二の特徴構成は、特許請求の範囲の欄の請求項２に記載した如く、基板上にｐ型半導体を備えてなるｐ型電極とｎ型半導体を備えてなるｎ型電極を夫々設けてある光半導体装置にあって、複数の隣接する発光部間に電気的絶縁分離領域を形成してなる構造を有する点にある。 In the second characteristic configuration, as described in claim 2 of the column of claims, a p-type electrode including a p-type semiconductor and an n-type electrode including an n-type semiconductor are provided on a substrate, respectively. The optical semiconductor device has a structure in which an electrically insulating isolation region is formed between a plurality of adjacent light emitting portions.

同第三から六の特徴構成は、特許請求の範囲の欄の請求項３、４、５、６に記載した如く、可視光線又は紫外光線を発光可能なＩＩＩ族窒化物半導体、もしくは、ＩＩ−ＶＩ族化合物半導体、もしくは、可視光線又は赤外光線を発光可能なＩＩＩ−Ｖ族化合物半導体を基板上に形成し、光取り出し構造を有する点にある。 The third to sixth characteristic configurations are the group III nitride semiconductor capable of emitting visible light or ultraviolet light as described in claims 3, 4, 5, and 6 of the claims, or II- A group VI compound semiconductor or a group III-V compound semiconductor capable of emitting visible light or infrared light is formed on a substrate and has a light extraction structure.

同第七の特徴構成は、特許請求の範囲の欄の請求項２に記載した如く、基板上にｐ型半導体を備えてなるｐ型電極とｎ型半導体を備えてなるｎ型電極を夫々設けてある光半導体装置にあって、複数の隣接する発光部間にイオン注入、もしくは、エッチング溝による電気的絶縁分離領域を設けてある構造を有する点にある。 In the seventh characteristic configuration, a p-type electrode comprising a p-type semiconductor and an n-type electrode comprising an n-type semiconductor are provided on a substrate, respectively, as described in claim 2 of the claims. An optical semiconductor device has a structure in which an electrically insulating isolation region by ion implantation or etching grooves is provided between a plurality of adjacent light emitting portions.

図１は本発明の係る光半導体装置の構成を表すものである（（ａ）エピタキシャル結晶構造と（ｂ）デバイス構造）。 FIG. 1 shows a configuration of an optical semiconductor device according to the present invention ((a) epitaxial crystal structure and (b) device structure).

第１の実施の形態は、ＳｉＣ基板に、ＭＯＣＶＤエピタキシャル結晶成長法により、バッファ層として、ｎ−ＧａＮ低温堆積層（膜厚０．１μｍ、ドーピング濃度Ｓｉ：５Ｅ１８／ｃｍ^３）、ｎ−Ａｌ_ｘＧａ_１−ｘＮバッファ層（ｘ＝０．０９，膜厚５０ｎｍ、ドーピング濃度Ｓｉ：５Ｅ１８／ｃｍ^３）に引続き、ｎ−ＧａＮ（膜厚０．２μｍ、ドーピング濃度Ｓｉ：５Ｅ１８／ｃｍ^３）、ｎ−Ｉｎ_０．０９Ａｌ_０．３２Ｇａ_０．５９Ｎ（膜厚５０ｎｍ，ドーピング濃度Ｓｉ：５Ｅ１８／ｃｍ^３），ｎ−ＧａＮ（膜厚０．２μｍ、ドーピング濃度Ｓｉ：５Ｅ１８／ｃｍ^３）を順次成長した。In the first embodiment, an n-GaN low-temperature deposition layer (thickness 0.1 μm, doping concentration Si: 5E18 / cm ³ ), n-Al _{x is used} as a buffer layer on a SiC substrate by MOCVD epitaxial crystal growth. Following the Ga _1-x N buffer layer (x = 0.09, film thickness 50 nm, doping concentration Si: 5E18 / cm ³ ), n-GaN (film thickness 0.2 μm, doping concentration Si: 5E18 / cm ³ ), n-In _0.09 Al _0.32 Ga _0.59 N (film thickness 50 nm, doping concentration Si: 5E18 / cm ³ ), n-GaN (film thickness 0.2 μm, doping concentration Si: 5E18 / cm ³ ) It grew gradually.

第２の実施の形態は、前記バッファ層に引続き、ｎ−Ａｌ_ｘＧａ_１−ｘＮクラッド層（Ｘ＝０．１５，膜厚０．５μｍ、ドーピング濃度Ｓｉ：５Ｅ１８／ｃｍ^３）、ｉ−Ｉｎ_ｙＧａ_１−ｙＮ活性層（ｙ＝０．２，膜厚０．２μｍ、アンドープ濃度＜１Ｅ１６／ｃｍ^３）、ｐ−Ａｌ_ｘＧａ_１−ｘＮクラッド層（ｘ＝０．１５，膜厚０．５μｍ、ドーピング濃度Ｍｇ：１Ｅ１９／ｃｍ^３）、ｐ−ＧａＮコンタクト層（膜厚０．１μｍ、ドーピング濃度Ｍｇ：１Ｅ１９／ｃｍ^３）を順次成長した。In the second embodiment, following the buffer layer, an n-Al _x Ga _1-x N cladding layer (X = 0.15, film thickness 0.5 μm, doping concentration Si: 5E18 / cm ³ ), i- In _y Ga _1-y N active layer (y = 0.2, film thickness 0.2 μm, undoped concentration <1E16 / cm ³ ), p-Al _x Ga _1-x N cladding layer (x = 0.15, film) A thickness of 0.5 μm and a doping concentration of Mg: 1E19 / cm ³ ) and a p-GaN contact layer (film thickness of 0.1 μm and a doping concentration of Mg: 1E19 / cm ³ ) were sequentially grown.

第３の実施の形態は、デバイス構造作製に関しては、エピ層表面上のｐ−コンタクト層にｐ電極、ヒートシンクバンプ、次いで、基板裏面側に、ｎ−コンタクトのｎ−電極を形成した。 In the third embodiment, with respect to the fabrication of the device structure, a p-electrode and a heat sink bump were formed on the p-contact layer on the epilayer surface, and then an n-contact n-electrode was formed on the back side of the substrate.

図１（ｂ）は本発明の係る光半導体装置の断面構造を表すものである FIG. 1B shows a cross-sectional structure of the optical semiconductor device according to the present invention.

第４の実施の形態は、デバイス構造作製に関しては、まず、結晶ウエハにおけるチップ間ダイシングのためのグリッドライン溝をエッチングで形成し、次いで結晶接合端をＳｉＯ_２，ＳｉＯＮ，ＳｉＮ４等の絶縁パッシベーション膜で被覆した。引続き、エピ層表面上のｐ−コンタクト層にｐ電極、ヒートシンクバンプ、次いで、基板裏面側に、ｎ−コンタクトのｎ−電極を形成した。In the fourth embodiment, with respect to the fabrication of the device structure, first, a grid line groove for inter-chip dicing in a crystal wafer is formed by etching, and then the crystal bonding end is an insulating passivation film such as SiO ₂ , SiON, SiN 4 or the like. Coated with. Subsequently, a p-electrode and a heat sink bump were formed on the p-contact layer on the epilayer surface, and an n-contact n-electrode was formed on the back side of the substrate.

図２は本発明の係る光半導体装置のチップ間側壁パッシベーション断面構造を表すものである。 FIG. 2 shows a cross-sectional structure of the inter-chip sidewall passivation of the optical semiconductor device according to the present invention.

第５の実施の形態は、デバイス構造作製に関しては、基板上にｐ型半導体を備えてなるｐ型電極とｎ型半導体を備えてなるｎ型電極を夫々設けてある光半導体装置にあって、標準的なフォトリソグラフィにて複数の隣接する発光部間パターンニング、イオン注入防止のフォトレジスト膜を形成後、Ｂイオン、もしくはＯ_２イオンを加速電圧１００ｋＶにて注入して、高抵抗領域を形成した。The fifth embodiment is an optical semiconductor device in which a p-type electrode comprising a p-type semiconductor and an n-type electrode comprising an n-type semiconductor are provided on a substrate, respectively, with respect to the device structure fabrication. After patterning a plurality of adjacent light emitting parts by standard photolithography and forming a photoresist film for preventing ion implantation, B ions or O ₂ ions are implanted at an acceleration voltage of 100 kV to form a high resistance region. did.

図２は本発明の係る複数の隣接する発光部間に発光分離領域を表すものである。 FIG. 2 shows a light emission separation region between a plurality of adjacent light emitting portions according to the present invention.

本発明に係る光半導体装置：（ａ）エピタキシャル結晶構造と（ｂ）デバイス構造Optical semiconductor device according to the present invention: (a) epitaxial crystal structure and (b) device structure 本発明に係る光半導体装置のチップ間側壁パッシベーション断面構造Cross-sectional structure of inter-chip sidewall passivation of optical semiconductor device according to the present invention 本発明に係る光半導体装置の複数の隣接発光部の断面構造Sectional structure of a plurality of adjacent light emitting portions of an optical semiconductor device according to the present invention

Claims

基板上にｐ型半導体を備えてなるｐ型電極とｎ型半導体を備えてなるｎ型電極を夫々設けてある光半導体装置にあって、チップ間側壁面に露出している結晶接合端を絶縁膜で被覆して形成してなる光半導体装置。 An optical semiconductor device in which a p-type electrode comprising a p-type semiconductor and an n-type electrode comprising an n-type semiconductor are provided on a substrate, respectively, and insulates the crystal junction end exposed on the inter-chip side wall surface An optical semiconductor device formed by covering with a film.

基板上にｐ型半導体を備えてなるｐ型電極とｎ型半導体を備えてなるｎ型電極を夫々設けてある光半導体装置にあって、複数の隣接する発光部間に電気的絶縁分離領域を形成してなる光半導体装置。 An optical semiconductor device in which a p-type electrode including a p-type semiconductor and an n-type electrode including an n-type semiconductor are provided on a substrate, respectively, and an electrically insulating isolation region is provided between a plurality of adjacent light emitting portions. An optical semiconductor device formed.

前記基板として、サファイア（Ａｌ_２Ｏ_３）、ＳｉＣ、ＧａＮ、Ｇａ_２Ｏ_３、ＺｎＯ、ＧａＡｓ、ＩｎＰ、Ｓｉ等の種々の単結晶材料を使用する、もしくは、前記単結晶材料を種々の前記単結晶材料の多結晶材料の上に接合形成・一体化した材料を使用する、もしくは、前記単結晶材料を種々の前記単結晶材料の非結晶材料の上に接合形成・一体化した材料を使用する請求項１、または２記載の光半導体装置。As the substrate, various single crystal materials such as sapphire (Al ₂ O ₃ ), SiC, GaN, Ga ₂ O ₃ , ZnO, GaAs, InP, Si, etc. are used, or the single crystal material is used as the various single crystals. Use a material that is bonded and integrated on a polycrystalline material of crystalline material, or use a material that is formed by bonding and integrating the single crystal material on various amorphous materials of the single crystal material. The optical semiconductor device according to claim 1 or 2.

基板上にｐ型半導体を備えてなるｐ型電極とｎ型半導体を備えてなるｎ型電極を夫々設けてある光半導体装置にあって、発光層と基板との間に結晶欠陥低減のための緩衝層（バッファ層）を形成してなる光半導体装置にあって、請求項１、２、または３記載の光半導体装置。 An optical semiconductor device in which a p-type electrode comprising a p-type semiconductor and an n-type electrode comprising an n-type semiconductor are provided on a substrate, respectively, for reducing crystal defects between the light emitting layer and the substrate. The optical semiconductor device according to claim 1, wherein the optical semiconductor device comprises a buffer layer (buffer layer).

可視光線又は紫外光線を発光可能な前記ＩＩＩ族窒化物半導体の内、ＧａＮ，ＩｎＮ，もしくはＡｌＮからなる混晶化合物半導体、もしくは、前記ＩＩ−ＶＩ族化合物半導体の内、ＺｎＯ、ＺｎＳ、ＺｎＳｅ、ＣｄＯ，ＭｇＯ、ＭｇＺｎＯ、ＭｇＳ、ＭｇＳｅ、もしくはＣｄＳからなる混晶化合物半導体を前記基板上に形成し、ｐ型半導体を備えてなるｐ型電極とｎ型半導体を備えてなるｎ電極を夫々設けてある光半導体装置にあって、請求項１、２、３、または４記載の光半導体装置。 Among the group III nitride semiconductors capable of emitting visible light or ultraviolet light, mixed crystal compound semiconductors composed of GaN, InN, or AlN, or group II-VI compound semiconductors, ZnO, ZnS, ZnSe, CdO , MgO, MgZnO, MgS, MgSe, or CdS is formed on the substrate, and a p-type electrode including a p-type semiconductor and an n-electrode including an n-type semiconductor are provided. The optical semiconductor device according to claim 1, wherein the optical semiconductor device is an optical semiconductor device.

可視光線又は赤外光線を発光可能な前記ＩＩＩ−Ｖ族化合物半導体の内、ＧａＡｓ、ＩｎＡｓ、ＡｌＡｓ、もしくはＩｎＰからなる混晶化合物半導体可視光線又は赤外光線を発光可能なＩＩＩ−Ｖ族化合物半導体を基板上に形成し、ｐ型半導体を備えてなるｐ型電極とｎ型半導体を備えてなるｎ電極を夫々設けてある光半導体装置にあって、請求項１、２、３、または４記載の光半導体装置。 Among the III-V group compound semiconductors capable of emitting visible light or infrared light, mixed crystal compound semiconductors composed of GaAs, InAs, AlAs, or InP. III-V group compound semiconductor capable of emitting visible light or infrared light. 5. An optical semiconductor device comprising: a p-type electrode comprising a p-type semiconductor; and an n-electrode comprising an n-type semiconductor. Optical semiconductor device.

基板上にｐ型半導体を備えてなるｐ型電極とｎ型半導体を備えてなるｎ型電極を夫々設けてある光半導体装置にあって、複数の隣接する発光部間にイオン注入、もしくは、エッチング溝による電気的絶縁分離領域を設けてある、請求項１、２、３、４、５、または６記載の光半導体装置。 An optical semiconductor device in which a p-type electrode including a p-type semiconductor and an n-type electrode including an n-type semiconductor are provided on a substrate, respectively, and ion implantation or etching is performed between a plurality of adjacent light emitting portions. The optical semiconductor device according to claim 1, wherein an electrically insulating isolation region is provided by a groove.