JP2014056916A - Semiconductor device and semiconductor device manufacturing method - Google Patents

Semiconductor device and semiconductor device manufacturing method Download PDF

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JP2014056916A
JP2014056916A JP2012200236A JP2012200236A JP2014056916A JP 2014056916 A JP2014056916 A JP 2014056916A JP 2012200236 A JP2012200236 A JP 2012200236A JP 2012200236 A JP2012200236 A JP 2012200236A JP 2014056916 A JP2014056916 A JP 2014056916A
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semiconductor device
external terminal
electrode member
semiconductor element
electrode
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Sho Kumada
翔 熊田
Susumu Kimura
享 木村
Kei Yamamoto
圭 山本
Nobuyoshi Kimoto
信義 木本
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Mitsubishi Electric Corp
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor device which enables stable junction with external wiring and has high productivity by stably exposing an electrode on a principal surface of an encapsulation body at low cost.SOLUTION: A semiconductor device comprises: a tabular circuit board; a semiconductor element having a rear face joined to a circuit face of the circuit board; a tabular electrode member joined to a surface electrode of the semiconductor element; and an encapsulation body for encapsulating the circuit face including the semiconductor element and the electrode member and lateral faces of the circuit board. The electrode member includes an internal junction part joined to the surface electrode of the semiconductor element, an external terminal part having an exposed surface exposed from a principal surface of the encapsulation body and a deformed part for connecting the internal junction part and the external terminal part in a folded manner. The exposed surface is formed by shaping the electrode member into a convex shape.

Description

本発明は、主に電力用の半導体装置における、トランスファーモールドによるモールド構造において、封止体内部の半導体素子から封止体外部へ電気接続するための構造およびその製造方法に関する。   The present invention relates to a structure for electrically connecting a semiconductor element inside a sealing body to the outside of the sealing body and a manufacturing method thereof in a mold structure by transfer molding mainly in a power semiconductor device.

半導体装置の中でも電力用半導体装置（パワーモジュール）は、産業用機器から家電・情報端末まで幅広い機器の主電力（パワー）の制御に用いられ、特に輸送機器等においては高い信頼性が求められている。近年、とくに大電流を流すことができ、高温動作も可能なワイドバンドギャップ半導体材料である炭化珪素（ＳｉＣ）がシリコン（Ｓｉ）に代わる半導体材料として開発が進められている。一方、上述した幅広い用途に対応できるよう、複数の電力用半導体装置を配置して所望の回路を形成できる形態も求められている。   Among semiconductor devices, power semiconductor devices (power modules) are used to control the main power (power) of a wide range of equipment, from industrial equipment to home appliances and information terminals. High reliability is especially required for transportation equipment. Yes. In recent years, silicon carbide (SiC), which is a wide band gap semiconductor material capable of flowing a particularly large current and capable of high-temperature operation, has been developed as a semiconductor material replacing silicon (Si). On the other hand, there is also a demand for a configuration in which a desired circuit can be formed by arranging a plurality of power semiconductor devices so as to be compatible with the wide range of applications described above.

その場合、従来のように封止体の両面側から端子を取り出す形態（例えば、特許文献１〜３参照。）では、近接した半導体装置間の絶縁を確保するために、小型化が困難となる。そこで、封止体の主面に導体部材を露出させる半導体装置（例えば、特許文献４または５参照。）の構造を採用することが考えられる。   In that case, in the conventional configuration in which the terminals are taken out from both sides of the sealing body (for example, refer to Patent Documents 1 to 3), it is difficult to reduce the size in order to ensure insulation between adjacent semiconductor devices. . Therefore, it is conceivable to employ a structure of a semiconductor device (see, for example, Patent Document 4 or 5) in which the conductor member is exposed on the main surface of the sealing body.

特開２００２−２７０７３６号公報JP 2002-270736 A 特開２００２−０３３４４５号公報Japanese Patent Laid-Open No. 2002-033445 特開２００７−２７２６１号公報JP 2007-27261 A 特開平９−２８３６８１号公報Japanese Patent Laid-Open No. 9-283681 特開２００５−５０９６１号公報JP 2005-50961 A

トランスファーモールドタイプのパワーモジュールの場合、封止体の主面に導体部材を露出させる方法として特許文献４に示されるように、導体部材の一部をモールド金型の上型に接触させた状態で樹脂封止を行い、導体部材と上型の接触面への樹脂被りを抑制する方法が提案されている。また、別の方法としては特許文献５に示されるように、弾力性に富む部材（クッション材）を導体部材と上型の両方に接触させた状態で樹脂封止を行い、導体部材とクッション材の接触面への樹脂被りを抑制する方法が提案されている。   In the case of a transfer mold type power module, as disclosed in Patent Document 4 as a method of exposing the conductor member to the main surface of the sealing body, a part of the conductor member is in contact with the upper mold of the mold. A method has been proposed in which resin sealing is performed to suppress resin covering on the contact surface between the conductor member and the upper mold. As another method, as disclosed in Patent Document 5, resin sealing is performed in a state where a highly elastic member (cushion material) is in contact with both the conductor member and the upper mold, and the conductor member and the cushion material are used. There has been proposed a method for suppressing the resin cover on the contact surface.

しかしながら、特許文献４に記載された方法では、導体部材の上型との接触面にわずかなうねりや溝があると、容易に導体部材と上型間に樹脂が流入し、封止体の主面に露出させることができる導体部材の面積（電極面積）が十分に確保できない可能性がある。また、特許文献５西際された方法では、導体部材とクッション材が密着するため、密着部への樹脂被りの可能性は小さいと考えられるが、繰り返しクッション材を使用することで、弾性率などの特性が変化する可能性があり、安定して半導体装置を製造するには定期的なクッション材の交換が必須であると考えられる。したがって、コストが増大する可能性がある。   However, in the method described in Patent Document 4, if there are slight undulations or grooves on the contact surface with the upper die of the conductor member, the resin easily flows between the conductor member and the upper die, and the main body of the sealing body There is a possibility that a sufficient area (electrode area) of the conductor member that can be exposed to the surface cannot be secured. In addition, in the method disclosed in Patent Document 5, since the conductor member and the cushion material are in close contact with each other, it is considered that the possibility of resin covering the contact portion is small, but by repeatedly using the cushion material, the elastic modulus, etc. It is considered that periodic replacement of the cushioning material is indispensable in order to stably manufacture a semiconductor device. Therefore, the cost may increase.

本発明は、上記のような課題を解決するためになされたもので、封止体の主面に電極を低コストで安定的に露出させることで、外部配線との接合が安定にできるとともに生産性の高い半導体装置を得ることを目的とする。   The present invention has been made to solve the above-described problems, and can stably produce a joint with external wiring by stably exposing the electrode to the main surface of the sealing body at a low cost. An object is to obtain a highly reliable semiconductor device.

本発明の半導体装置は、板状の回路基板と、裏面が回路基板の回路面に接合された半導体素子と、半導体素子の表面電極に接合された板状の電極部材と、半導体素子と電極部材を含んで回路基板の回路面および側面を封止する封止体と、を備えた半導体装置において、電極部材は、半導体素子の表面電極に接合される内部接合部と、封止体の主面から露出する露出面を有する外部端子部と、内部接合部と外部端子部とを、折り返して連結する変形部とを含み、露出面は電極部材を凸形状に成形して設けられたものである。   A semiconductor device of the present invention includes a plate-shaped circuit board, a semiconductor element whose back surface is bonded to the circuit surface of the circuit board, a plate-shaped electrode member bonded to the surface electrode of the semiconductor element, and the semiconductor element and the electrode member And a sealing body that seals the circuit surface and the side surface of the circuit board, and the electrode member includes an internal joint portion that is bonded to the surface electrode of the semiconductor element, and a main surface of the sealing body Including an external terminal portion having an exposed surface exposed from and a deformed portion that folds and connects the internal joint portion and the external terminal portion, and the exposed surface is formed by forming the electrode member into a convex shape. .

また、本発明の半導体装置の製造方法は、板状の回路基板の回路面への半導体素子の接合工程と、内部接合部と外部端子部と変形部とを有する電極部材の内部接合部を半導体素子の表面電極へ接合する工程とを含み、回路面に半導体素子が実装された回路体を形成する工程と、回路体を、内面に凹部が設けられたモールド金型に、電極部材の外部端子部の部分が凹部に対向する位置となるよう設置する工程と、モールド金型を型締めする工程と、型締めしたモールド金型内に樹脂を注入し、回路基板の回路面および側面をまとめて樹脂で覆うとともに、外部端子部が前記モールド金型に設けられた凹部に樹脂注入圧によって押し当てられることで、外部端子部が変形し、電極部材の露出面が回路面を覆う主面から露出するように封止体を形成する工程と、を含むものである。   The method for manufacturing a semiconductor device according to the present invention includes a step of bonding a semiconductor element to a circuit surface of a plate-shaped circuit board, and an internal bonding portion of an electrode member having an internal bonding portion, an external terminal portion, and a deformation portion as a semiconductor A step of forming a circuit body in which a semiconductor element is mounted on a circuit surface, and a step of forming a circuit body on a mold die having a recess on the inner surface, and an external terminal of an electrode member. The step of installing the part so that the portion is opposed to the recess, the step of clamping the mold, and injecting resin into the clamped mold, the circuit surface and the side surface of the circuit board are put together The external terminal portion is pressed by a resin injection pressure against the concave portion provided in the mold die, and the external terminal portion is deformed and the exposed surface of the electrode member is exposed from the main surface covering the circuit surface. Form a sealing body to And that step, is intended to include.

本発明の半導体装置は、板状の電極部材を凸状に成形して設けた露出面を封止体の主面から露出させるようにしたので、外部配線との接合が安定にできる半導体装置を得ることができる。   In the semiconductor device of the present invention, the exposed surface provided by projecting the plate-like electrode member into the convex shape is exposed from the main surface of the sealing body. Can be obtained.

また、本発明の半導体装置の製造方法によれば、モールド金型に凹部を設けたので、一定面積以上の電極部材を低コストで確実に封止体の主面から露出させることができる。したがって、生産性の高い半導体装置を得ることができる。   Moreover, according to the method for manufacturing a semiconductor device of the present invention, since the recess is provided in the mold, the electrode member having a certain area or more can be reliably exposed from the main surface of the sealing body at a low cost. Therefore, a highly productive semiconductor device can be obtained.

本発明の実施の形態１による半導体装置を示す模式的な断面図である。1 is a schematic cross-sectional view showing a semiconductor device according to a first embodiment of the present invention. 本発明の実施の形態１による別の半導体装置を示す模式的な断面図である。It is typical sectional drawing which shows another semiconductor device by Embodiment 1 of this invention. 本発明の実施の形態２による半導体装置製造方法を示す工程図である。It is process drawing which shows the semiconductor device manufacturing method by Embodiment 2 of this invention. 本発明の実施の形態２による半導体装置製造方法を説明するフロー図である。It is a flowchart explaining the semiconductor device manufacturing method by Embodiment 2 of this invention. 本発明の実施の形態２による半導体装置製造方法の一部を示す、図３（ｅ）のＡ−Ａ位置での断面図である。It is sectional drawing in the AA position of FIG.3 (e) which shows a part of semiconductor device manufacturing method by Embodiment 2 of this invention. 本発明の実施の形態２による別の半導体装置製造方法の一部を示す断面図である。It is sectional drawing which shows a part of another semiconductor device manufacturing method by Embodiment 2 of this invention. 本発明の実施の形態３による半導体装置を示す模式的な断面図である。It is typical sectional drawing which shows the semiconductor device by Embodiment 3 of this invention. 本発明の実施の形態３による半導体装置を適用する例としてのインバータの回路図である。It is a circuit diagram of the inverter as an example to which the semiconductor device according to the third embodiment of the present invention is applied. 本発明の実施の形態４による半導体装置を示す模式的な断面図である。It is typical sectional drawing which shows the semiconductor device by Embodiment 4 of this invention. 電極部材の形状に関する比較例の半導体装置を示す模式的な断面図である。It is typical sectional drawing which shows the semiconductor device of the comparative example regarding the shape of an electrode member. 本発明の実施の形態５による半導体装置を示す模式的な断面図である。It is typical sectional drawing which shows the semiconductor device by Embodiment 5 of this invention.

実施の形態１．
図１は、本発明の実施の形態１による半導体装置を示す模式的な断面図である。半導体装置６は、全体を樹脂の封止体５で封止し、矩形板状に形成（パッケージ化）したものである。矩形板状をした回路基板４の回路面４ｆに、板状の半導体素子１の裏面電極が接合され、さらに半導体素子１の表面電極に、板状の電極部材２が接合されている。全体は、封止体５により、回路基板４の回路面４ｆの裏面となる放熱面４ｒおよび電極部材２を凸形状に成形して設けられた露出面２ｓｅが露出するように封止されている。そして、特徴的な構成は、電極部材２が折り返されて設けられた中空部２ｔに封止体５が充填されていることである。 Embodiment 1 FIG.
FIG. 1 is a schematic cross-sectional view showing a semiconductor device according to Embodiment 1 of the present invention. The semiconductor device 6 is entirely sealed with a resin sealing body 5 and formed into a rectangular plate (packaged). The back electrode of the plate-like semiconductor element 1 is joined to the circuit surface 4 f of the circuit board 4 having a rectangular plate shape, and the plate-like electrode member 2 is joined to the surface electrode of the semiconductor element 1. The whole is sealed by the sealing body 5 so that the heat radiating surface 4r which is the back surface of the circuit surface 4f of the circuit board 4 and the exposed surface 2se provided by forming the electrode member 2 into a convex shape are exposed. . And the characteristic structure is that the sealing body 5 is filled in the hollow part 2t provided by the electrode member 2 being folded back.

半導体素子１は、厚み０．１〜０．４ｍｍ程度の矩形板状をなしており、例えば、スイッチング素子としてＩＧＢＴ（Insulated Gate Bipolar Transistor）を用いた場合、裏面には裏面電極としてコレクタ電極が形成され、表面には主電力電極であるエミッタ電極と、制御電極であるゲート電極が形成されている。すなわち、裏面の電極であるコレクタ電極を銅の回路基板４の回路面４ｆの所定の位置にはんだ３を介して接合している。図１では、表面側のゲート電極等の制御に必要な回路部材については、簡略化するため図示を省略している。   The semiconductor element 1 has a rectangular plate shape with a thickness of about 0.1 to 0.4 mm. For example, when an IGBT (Insulated Gate Bipolar Transistor) is used as a switching element, a collector electrode is formed as a back electrode on the back surface. On the surface, an emitter electrode as a main power electrode and a gate electrode as a control electrode are formed. That is, the collector electrode, which is the back electrode, is joined to the predetermined position on the circuit surface 4 f of the copper circuit board 4 via the solder 3. In FIG. 1, circuit members necessary for controlling the gate electrode and the like on the surface side are not shown for the sake of simplicity.

電極部材２は、半導体素子１の表面電極と接合するための平坦な素子接合面２ｓｉを有する内部接合部２ｊｃと、露出面２ｓｅを有する外部端子部２ｊｅとが変形部２ｆを介して連なるように、１枚の銅板を折り曲げてＵ字状に形成したものである。つまり、半導体素子１に接合された電極部材２は、内部接合部２ｊｃから変形部２ｆがエミッタ電極に対して斜め上方向に伸びており、変形部２ｆの上端からは外部端子部２ｊｅが折り返すように伸び、封止体５で封止される前までは、外部端子部２ｊｅの先端は自由端となっている。   The electrode member 2 is formed such that an internal joint portion 2jc having a flat element joint surface 2si for joining to a surface electrode of the semiconductor element 1 and an external terminal portion 2je having an exposed surface 2se are connected via a deformed portion 2f. One copper plate is bent and formed into a U shape. That is, in the electrode member 2 joined to the semiconductor element 1, the deformed portion 2f extends obliquely upward with respect to the emitter electrode from the internal joint portion 2jc, and the external terminal portion 2je is folded back from the upper end of the deformed portion 2f. Until the end of the external terminal 2je is sealed with the sealing body 5, the tip of the external terminal portion 2je is a free end.

この構成は、外部端子部２ｊｅをモールド金型によって押圧することにより、外部端子部２ｊｅが、モールド金型に押し当てられる方向に変位するため、露出面２ｓｅをモールド金型に密着させたまま、電極部材２を押圧、変形させて製造することができる。この製造方法については、実施の形態２で詳しく説明する。   In this configuration, by pressing the external terminal portion 2je with a mold, the external terminal portion 2je is displaced in a direction in which the external terminal portion 2je is pressed against the mold, so that the exposed surface 2se is kept in close contact with the mold die. The electrode member 2 can be manufactured by pressing and deforming. This manufacturing method will be described in detail in Embodiment 2.

一方、外部端子部２ｊｅに外部配線を接続する方法として、超音波接合やはんだ接合など、様々な接合方法が想定される。超音波接合が採用される場合には、外部端子部２ｊｅに超音波振動が印加されるため、外部端子部２ｊｅと封止体５を構成する樹脂との界面で剥離が生じやすくなることが考えられる。その場合、外部端子部２ｊｅに設けられた中空部２ｔに樹脂を充填することによって、封止体５内へのマクロ形状でのアンカー効果によって、外部端子部２ｊｅと封止体５との界面剥離を抑制することができる。   On the other hand, as a method of connecting the external wiring to the external terminal portion 2je, various bonding methods such as ultrasonic bonding and solder bonding are assumed. When ultrasonic bonding is adopted, since ultrasonic vibration is applied to the external terminal portion 2je, peeling is likely to occur at the interface between the external terminal portion 2je and the resin constituting the sealing body 5. It is done. In that case, interfacial delamination between the external terminal portion 2je and the sealing body 5 is achieved by filling the hollow portion 2t provided in the external terminal portion 2je with a resin, thereby anchoring the sealing body 5 in a macro shape. Can be suppressed.

さらに、図２に示すように、露出面２ｓｅの中央部に平坦部２ｊｈを設けれた半導体装置６０とすれば、はんだ接合を採用する場合には、はんだが接合領域から流出するのを防ぐ。また、超音波接合を採用する場合には露出面２ｓｅと外部配線との接合面積を増やすことができる。したがって、平坦部２ｊｈを設けた場合、平坦部がない場合に比べてより安定した外部配線の接続が行える。   Furthermore, as shown in FIG. 2, if the semiconductor device 60 is provided with a flat portion 2jh at the central portion of the exposed surface 2se, the solder is prevented from flowing out from the bonding region when the solder bonding is employed. Moreover, when ultrasonic bonding is employed, the bonding area between the exposed surface 2se and the external wiring can be increased. Therefore, when the flat portion 2jh is provided, it is possible to connect the external wiring more stably than when there is no flat portion.

封止体５は、例えば、エポキシ系の熱硬化樹脂を用い、トランスファーモールドによって形成される。トランスファーモールドの工程において、上述したように放熱面４ｒおよび電極部材２の露出面２ｓｅのほか、電極部材２と同様の変形が可能で、図示しないゲート電極に接合した電極部材の露出面も封止体５の主面５ｆから露出するようにしている。   The sealing body 5 is formed by transfer molding using, for example, an epoxy-based thermosetting resin. In the transfer molding process, in addition to the heat radiation surface 4r and the exposed surface 2se of the electrode member 2 as described above, the same deformation as the electrode member 2 is possible, and the exposed surface of the electrode member joined to the gate electrode (not shown) is also sealed. The main surface 5f of the body 5 is exposed.

以上の構成により、半導体素子１からの発熱を熱伝導性にも優れたはんだ３を介して回路基板４に伝え、放熱面４ｒから放熱を行うことができるようになっている。また、回路基板４の放熱面４ｒに冷却部材等を当接させて、更に放熱を促すようにすることができる。また、回路基板４と電極部材２は半導体素子１と外部との間の電気的な経路となっている。つまり、半導体装置６の主面（広い面、図１および図２の上面（表面）と下面（裏面））のうち、裏側の主面から露出する回路基板４（放熱面４ｒ）を介して半導体素子１の裏面電極（コレクタ電極）との導通を図り、表側の主面５ｆから露出する電極部材２（露出面２ｓｅ）、および図示しない電極部材を介して半導体素子１の表面電極（エミッタ電極、ゲート電極）との導通を図るようにしている。   With the above configuration, heat generated from the semiconductor element 1 can be transmitted to the circuit board 4 via the solder 3 having excellent thermal conductivity, and heat can be radiated from the heat radiating surface 4r. Further, a cooling member or the like can be brought into contact with the heat radiating surface 4r of the circuit board 4 to further promote heat dissipation. Further, the circuit board 4 and the electrode member 2 form an electrical path between the semiconductor element 1 and the outside. In other words, the semiconductor device 6 has a main surface (wide surface, upper surface (front surface) and lower surface (rear surface) in FIGS. 1 and 2) and the semiconductor through the circuit board 4 (heat radiation surface 4 r) exposed from the main surface on the back side. Conduction with the back surface electrode (collector electrode) of the element 1 is performed, and the surface member (emitter electrode, emitter electrode, A gate electrode).

なお、半導体素子１の表面には、ＩＧＢＴの場合、ガードリング等のエミッタ電極と同電位にすると不具合を生じる部位が存在し、この部位が電極部材２と接触すると電極部材２を介してエミッタ電極と同電位になってしまう。したがって、電極部材２の内部接合部２ｊｃの素子接合面２ｓｉは、ＩＧＢＴのエミッタ電極のみと接合する構成としており、図示しない電極部材もゲート電極に対して同様の構成としている。回路基板４および電極部材２としてはＣｕまたはＣｕ合金に限ることなく、導電性のある金属（例えばアルミニウム）等を用いることができる。しかし、少なくとも電極部材２の材料としては、実施の形態２で説明する型締め工程において、半導体素子に損傷を与えない程度に変形し、樹脂注入工程において、樹脂注入圧によって変形可能な材料が好ましい。   In addition, in the case of IGBT, there exists a part which causes a problem when the same potential as that of the emitter electrode such as a guard ring is present on the surface of the semiconductor element 1, and when this part comes into contact with the electrode member 2, the emitter electrode is interposed via the electrode member 2. And become the same potential. Therefore, the element joint surface 2si of the internal joint portion 2jc of the electrode member 2 is configured to be bonded only to the emitter electrode of the IGBT, and the electrode member (not shown) is configured similarly to the gate electrode. The circuit board 4 and the electrode member 2 are not limited to Cu or Cu alloy, and conductive metal (for example, aluminum) can be used. However, at least the material of the electrode member 2 is preferably a material that is deformed to such an extent that the semiconductor element is not damaged in the mold clamping process described in the second embodiment and can be deformed by the resin injection pressure in the resin injection process. .

以上のような構成からなる半導体装置は、特許文献１〜３に記載された封止体の側面から端子を取り出す形態の半導体装置に比べて、半導体装置自体の小型化が可能になる。   The semiconductor device configured as described above can be downsized as compared with the semiconductor device in which the terminal is taken out from the side surface of the sealing body described in Patent Documents 1 to 3.

また、放熱面４ｒを金属性のヒートシンクに当接させて、半導体装置の冷却を促す場合には、側面から端子を取り出す形態に比べて、エミッタ電極とコレクタ電極のヒートシンクに対する沿面絶縁距離の確保が容易である。したがって、半導体装置を大型化することなく沿面絶縁距離を確保できるため、半導体装置の小型化が可能になる。   Also, when the semiconductor device is urged to cool by bringing the heat radiating surface 4r into contact with a metallic heat sink, it is possible to secure a creeping insulation distance between the emitter electrode and the collector electrode with respect to the heat sink, as compared with the case where the terminal is taken out from the side surface. Easy. Therefore, the creeping insulation distance can be secured without increasing the size of the semiconductor device, and thus the size of the semiconductor device can be reduced.

また、電極部材を折り返すことにより中空部を設け、そこに樹脂を充填することで、電極部材へ外部配線を超音波接合する際の超音波振動による、電極部材と樹脂との界面剥離を抑制することができる。   In addition, a hollow portion is provided by folding the electrode member, and filling the resin with the hollow portion suppresses interface peeling between the electrode member and the resin due to ultrasonic vibration when the external wiring is ultrasonically bonded to the electrode member. be able to.

実施の形態２．
実施の形態２では、実施の形態１で説明した図１および図２の半導体装置を製造する方法を、図３の工程を示す断面図と図４のフローチャートを用いて説明する。まず、図３（ａ）に示すように、回路基板４の半導体素子１を接合する領域に、はんだペレット３１を介して半導体素子１を設置するとともに、はんだペレット３２を介して電極部材２を設置する。そして、図示しない治具を用いて各部材の位置を固定しながら、還元雰囲気中で一括加熱することによりはんだペレット３１およびはんだペレット３２を溶融させ、これを冷却して各部材を接合する。そして、図示しないワイヤボンド等のその他の回路部材を接合し、回路面４ｆに半導体回路が形成された回路体６Ｍが形成される（ステップＳＴ１）。次に、形成した回路体６Ｍを、図３（ｂ）に示すように、モールド金型７を開いた状態で、下モールド金型７２内に設置する（ステップＳＴ２）。 Embodiment 2. FIG.
In the second embodiment, a method for manufacturing the semiconductor device shown in FIGS. 1 and 2 described in the first embodiment will be described with reference to cross-sectional views illustrating steps in FIG. 3 and a flowchart in FIG. First, as shown in FIG. 3A, the semiconductor element 1 is installed via the solder pellet 31 and the electrode member 2 is installed via the solder pellet 32 in the region where the semiconductor element 1 of the circuit board 4 is joined. To do. And while fixing the position of each member using the jig | tool which is not shown in figure, the solder pellet 31 and the solder pellet 32 are fuse | melted by heating in a reducing atmosphere, this is cooled, and each member is joined. Then, other circuit members such as wire bonds (not shown) are joined to form a circuit body 6M in which a semiconductor circuit is formed on the circuit surface 4f (step ST1). Next, as shown in FIG. 3B, the formed circuit body 6M is placed in the lower mold 72 with the mold 7 opened (step ST2).

この状態で、図３（ｃ）に示すように上モールド金型７１を下していく。上モールド金型７１の内上面には、電極部材２の露出面２ｓｅとなる部分に凹部７１０が設けられている。上モールド金型７１を下していくと、はじめに上モールド金型７１の内上面に電極部材２の露出面２ｓｅが当たる。この時点では上モールド金型７１と下モールド金型７２で構成されるモールド金型７は完全には閉じておらず、わずかに隙間がある状態になっている。この状態で、さらにモールド金型７を閉じていくと、上モールド金型７１が電極部材２の外部端子部２ｊｅの露出面２ｓｅを押圧し、電極部材２の変形部２ｆは片持ち梁のように撓んで変形し、その上端である外部端子部２ｊｅとのコーナー部分が半導体素子１に近づく方向に変位する。この際、変形部２ｆと外部端子部２ｊｅの成す角が変化しなければ、外部端子部２ｊｅの自由端は変形部２ｆ側の部分よりも半導体素子１から離れる方向に変位するはずである。しかし、自由端側は上モールド金型７１に当たっているために、その方向に変位できない。その結果、外部端子部２ｊｅの表面である露出面２ｓｅはその全面にわたって上モールド金型７１に押し付けられ、間隔Ｄを面内で一定に保ちながら、つまり内部接合部２ｊｃとの平行を保ちながら狭めることになる。   In this state, the upper mold 71 is moved down as shown in FIG. On the inner upper surface of the upper mold 71, a recess 710 is provided in a portion that becomes the exposed surface 2se of the electrode member 2. When the upper mold 71 is lowered, the exposed surface 2se of the electrode member 2 first hits the inner upper surface of the upper mold 71. At this time, the mold 7 constituted by the upper mold 71 and the lower mold 72 is not completely closed, and there is a slight gap. When the mold die 7 is further closed in this state, the upper mold die 71 presses the exposed surface 2se of the external terminal portion 2je of the electrode member 2, and the deformed portion 2f of the electrode member 2 looks like a cantilever. The corner portion with the external terminal portion 2je which is the upper end thereof is displaced in a direction approaching the semiconductor element 1. At this time, if the angle formed by the deformed portion 2f and the external terminal portion 2je does not change, the free end of the external terminal portion 2je should be displaced away from the semiconductor element 1 relative to the portion on the deformed portion 2f side. However, since the free end side is in contact with the upper mold 71, it cannot be displaced in that direction. As a result, the exposed surface 2se, which is the surface of the external terminal portion 2je, is pressed against the upper mold 71 over the entire surface, and is narrowed while keeping the distance D constant within the surface, that is, keeping parallel to the internal joint portion 2jc. It will be.

したがって、図３（ｄ）に示すようにモールド金型７が完全に閉じて型締めが完了（ステップＳＴ３）したときには、電極部材２全体の反発力により、電極部材２の露出面２ｓｅおよび回路基板４の裏面である放熱面４ｒは、それぞれ上モールド金型７１および下モールド金型７２によって所定の面圧で挟みつけられることになる。このとき、電極部材２の変形にともなって、内部接合部２ｊｃと外部端子部２ｊｅとの面内位置に変位が生じても、回路体６Ｍがモールド金型７内で面内移動することなく所望の位置に固定されるように、図示しない位置決め部材を用いて回路体６Ｍのモールド金型７内での面内位置を固定することが好ましい。   Therefore, as shown in FIG. 3D, when the mold 7 is completely closed and the clamping is completed (step ST3), the exposed surface 2se of the electrode member 2 and the circuit board are caused by the repulsive force of the entire electrode member 2. The heat radiating surface 4r which is the back surface of 4 is sandwiched between the upper mold 71 and the lower mold 72 at a predetermined surface pressure. At this time, the circuit body 6M does not move in-plane in the mold 7 even if the in-plane position between the internal joint portion 2jc and the external terminal portion 2je is displaced as the electrode member 2 is deformed. It is preferable to fix the in-plane position of the circuit body 6M in the mold 7 by using a positioning member (not shown) so as to be fixed at the position.

この状態で、モールド金型７を１８０℃程度に加熱し、モールド金型７内に、モールド樹脂を注入（ステップＳＴ４）する。その際、上モールド金型７１の露出面２ｓｅの中央部直上の位置に設けられた凹部７１０に露出面２ｓｅが樹脂注入圧Ｆ（図３（ｅ）の矢印で示す方向の力Ｆ）によって押し付けられ、外部端子部２ｊｅが変形し、露出面２ｓｅと凹部７１０のエッジが線接触することにより確実に凹部７１０が密閉される。このようにすることで、露出面２ｓｅにわずかなうねりや溝があり、モールド金型型締め後に露出面２ｓｅと上モールド金型７１間にわずかな空隙が生じた場合にも、確実に一定面積以上の露出面２ｓｅを封止体５の主面５ｆから露出させることができる。   In this state, the mold 7 is heated to about 180 ° C., and mold resin is injected into the mold 7 (step ST4). At that time, the exposed surface 2se is pressed by the resin injection pressure F (force F in the direction indicated by the arrow in FIG. 3E) against the recess 710 provided at a position directly above the center of the exposed surface 2se of the upper mold 71. Thus, the external terminal portion 2je is deformed, and the exposed surface 2se and the edge of the concave portion 710 are in line contact with each other, so that the concave portion 710 is reliably sealed. In this way, even if there are slight undulations or grooves on the exposed surface 2se, and a slight gap is generated between the exposed surface 2se and the upper mold 71 after the mold is clamped, a certain area is ensured. The exposed surface 2se can be exposed from the main surface 5f of the sealing body 5.

図３（ｅ）のＡ−Ａ位置での断面図を図５に示す。図５に示すように、この方向から見ても、上モールド金型７１の凹部７１０のエッジと電極部材２の外部端子部２ｊｅの露出面２ｓｅとなる面とが線接触している。すなわち、凹部７１０のエッジと露出面２ｓｅとが線接触することにより凹部７１０が密閉されるようになっている。この線接触する線全体の形状、すなわち凹部７１０の図３（ｅ）および図５の紙面に垂直な断面形状は、例えば円形、正方形など、どのような形状であっても良いが、線接触部で囲まれる面積（露出面２ｓｅの面積）が最大でかつ、線接触部の長さが最小になる形状、つまり円形が好ましい。また、凹部７１０のエッジと露出面２ｓｅとで凹部７１０を密閉することで、製造後の電極部材２の露出面２ｓｅの周囲には平面部が形成される。   FIG. 5 shows a cross-sectional view at the position AA in FIG. As shown in FIG. 5, even when viewed from this direction, the edge of the recess 710 of the upper mold 71 and the surface serving as the exposed surface 2se of the external terminal portion 2je of the electrode member 2 are in line contact. That is, the recess 710 is sealed by the line contact between the edge of the recess 710 and the exposed surface 2se. The shape of the entire line in contact with the line, that is, the cross-sectional shape perpendicular to the paper surface of FIG. 3E and FIG. 5 of the recess 710 may be any shape such as a circle or a square. A shape in which the area surrounded by (the area of the exposed surface 2se) is maximum and the length of the line contact portion is minimum, that is, a circle is preferable. Further, by sealing the recess 710 with the edge of the recess 710 and the exposed surface 2se, a flat portion is formed around the exposed surface 2se of the electrode member 2 after manufacture.

こうして、電極部材２の露出面２ｓｅおよび回路基板４の放熱面４ｒが露出した状態で各回路部材が封止される。この後、適当な温度に冷却後離型する（ステップＳＴ５）ことにより、図１に示すような半導体装置６が完成する。   Thus, each circuit member is sealed with the exposed surface 2se of the electrode member 2 and the heat radiating surface 4r of the circuit board 4 exposed. Thereafter, after cooling to an appropriate temperature and releasing (step ST5), the semiconductor device 6 as shown in FIG. 1 is completed.

また、図６に示すように、上モールド金型７１に設けられた凹部７１０の底部７１１を平面とし、凹部７１０の深さを、底部７１１に露出面２ｓｅを押し付ける深さの寸法とすることにより、平坦部２ｊｈを形成することができ、そのようにすることで図２に示すような、露出面２ｓｅの頂上部に平坦部２ｊｈを有する半導体装置６０が完成する。   Further, as shown in FIG. 6, the bottom 711 of the recess 710 provided in the upper mold 71 is a flat surface, and the depth of the recess 710 is set to a depth dimension that presses the exposed surface 2se against the bottom 711. The flat portion 2jh can be formed, and as a result, the semiconductor device 60 having the flat portion 2jh on the top of the exposed surface 2se as shown in FIG. 2 is completed.

このように、本発明の実施の形態１および２による半導体装置６では、電極部材２が、半導体素子１の表面にはんだ３を介して接合される素子接合面２ｓｉを有する内部接合部２ｊｃと、封止体５の主面５ｆから露出する露出面２ｓｅを有する外部端子部２ｊｅと、内部接合部２ｊｃと外部端子部２ｊｅとを連結するとともに、外力によって変形可能な変形部２ｆとを有し、外部端子部２ｊｅ側の電極部材２の端部を自由端とした。そして、内部接合部２ｊｃと外部端子部２ｊｅとが平行になるように連結するとともに、変形部２ｆの上端である外部端子部２ｊｅとのコーナー部分が内部接合部２ｊｃと接合した半導体素子１に近づく方向に変位する際に、外部端子部２ｊｅ側の自由端がコーナー部分よりも半導体素子１から離れる方向に傾くように変形部２ｆを形成（折り曲げ位置、折り曲げ角度の調整）した。そのため、回路基板４、半導体素子１、電極部材２の順にはんだで接合した回路体６Ｍをモールド金型７内に設置すると、モールド金型７の型開き方向の寸法バラツキを吸収し、半導体素子１の損傷・破壊や、電極部材２の外部端子部２ｊｅの露出面２ｓｅおよび回路基板４の放熱面４ｒが封止体５を構成する樹脂に覆われることを抑制する。   As described above, in the semiconductor device 6 according to the first and second embodiments of the present invention, the electrode member 2 has the internal joint portion 2jc having the element joint surface 2si joined to the surface of the semiconductor element 1 via the solder 3, The external terminal portion 2je having an exposed surface 2se exposed from the main surface 5f of the sealing body 5, the internal joint portion 2jc and the external terminal portion 2je are connected to each other, and the deformable portion 2f is deformable by an external force. The end portion of the electrode member 2 on the external terminal portion 2je side was defined as a free end. Then, the internal joint portion 2jc and the external terminal portion 2je are connected to be parallel to each other, and the corner portion with the external terminal portion 2je that is the upper end of the deformable portion 2f approaches the semiconductor element 1 joined to the internal joint portion 2jc. The deformed portion 2f was formed (adjustment of the bending position and the bending angle) so that the free end on the external terminal portion 2je side was inclined more in the direction away from the semiconductor element 1 than the corner portion when displaced in the direction. Therefore, when the circuit body 6M joined by soldering in the order of the circuit board 4, the semiconductor element 1, and the electrode member 2 is installed in the mold die 7, the dimensional variation in the mold opening direction of the mold die 7 is absorbed, and the semiconductor element 1 And the exposed surface 2se of the external terminal portion 2je of the electrode member 2 and the heat radiating surface 4r of the circuit board 4 are prevented from being covered with the resin constituting the sealing body 5.

このような構成とすることで、電極部材２にばね性を持たせることができる。したがって、特許文献４に見られるように、一旦別の導体部材に電極部材を接合し、その導体部材と半導体素子を電気的に接続することなく、直接電極部材を半導体素子に接合できるようになった。   By setting it as such a structure, the electrode member 2 can be given springiness. Therefore, as seen in Patent Document 4, the electrode member can be directly joined to the semiconductor element without first joining the electrode member to another conductor member and electrically connecting the conductor member and the semiconductor element. It was.

さらに、上モールド金型７１に設けられた凹部７１０に樹脂注入圧Ｆによって露出面２ｓｅを押し付け、外部端子部２ｊｅを変形させることで露出面２ｓｅが封止体５を構成する樹脂に覆われることを確実に抑制し、安定した品質での生産が可能となる。   Further, the exposed surface 2se is pressed against the concave portion 710 provided in the upper mold 71 by the resin injection pressure F, and the exposed surface 2se is covered with the resin constituting the sealing body 5 by deforming the external terminal portion 2je. Can be reliably controlled, and production with stable quality becomes possible.

実施の形態３．
図７は、本発明の実施の形態３による半導体装置の構成を示す模式的な断面素である。上記実施の形態１、２では、簡略化のため、半導体素子１が１個だけの場合について説明したが、半導体素子１が複数であってもよい。図７に示すように、例えば、半導体素子として、スイッチング素子であるＩＧＢＴ１１と整流素子であるＦｗＤｉ（Free Wheeling Diode）１２を用い、図７に示すように電極部材２を２つの半導体素子を架け渡すように接合するようにしてもよい。これにより、半導体装置６０内では、ＩＧＢＴ１１とＦｗＤｉ１２が並列接続され、典型的な半導体スイッチを構成する回路を構成できる。 Embodiment 3 FIG.
FIG. 7 is a schematic cross-sectional view showing the configuration of the semiconductor device according to the third embodiment of the present invention. In the first and second embodiments, the case where there is only one semiconductor element 1 has been described for simplification, but a plurality of semiconductor elements 1 may be provided. As shown in FIG. 7, for example, IGBT 11 as a switching element and FwDi (Free Wheeling Diode) 12 as a rectifying element are used as semiconductor elements, and the electrode member 2 is bridged between two semiconductor elements as shown in FIG. 7. You may make it join so. Thereby, in the semiconductor device 60, IGBT11 and FwDi12 are connected in parallel and the circuit which comprises a typical semiconductor switch can be comprised.

また、図７に示したＩＧＢＴ１１とＦｗＤｉ１２とを有する半導体装置６１を複数組み合わせることで、図８に示す、ＩＧＢＴ１１とＦｗＤｉ１２を逆並列接続した半導体スイッチ１０を複数備えたインバータ回路１５を容易に構成することが可能となる。図８の回路に示すＩＧＢＴとＦｗＤｉ全てを封止体で封止して、一つの半導体装置とすることもできる。   Further, by combining a plurality of semiconductor devices 61 having the IGBT 11 and the FwDi 12 shown in FIG. 7, the inverter circuit 15 including a plurality of semiconductor switches 10 in which the IGBT 11 and the FwDi 12 are connected in reverse parallel shown in FIG. It becomes possible. All the IGBTs and FwDi shown in the circuit of FIG. 8 can be sealed with a sealing body to form one semiconductor device.

なお、ＩＧＢＴ１１とＦｗＤｉ１２はその素子構成が異なり、一般にＩＧＢＴ１１の方が外力による破壊耐量が低い。そして、電極部材２を変形させる際には、変形部２ｆ側にある半導体素子１の方に力が作用する。したがって、２つの半導体素子に電極部材２を接合する際には、図７に示すように、変形部２ｆ側にＦｗＤｉ１２を配置することが望ましい。   Note that the IGBT 11 and FwDi12 have different element configurations, and the IGBT 11 generally has a lower breakdown resistance due to external force. When the electrode member 2 is deformed, a force acts on the semiconductor element 1 on the deformed portion 2f side. Therefore, when joining the electrode member 2 to two semiconductor elements, as shown in FIG. 7, it is desirable to arrange FwDi12 on the deformed portion 2f side.

実施の形態４．
図９は、本発明の実施の形態４による半導体装置を示す模式的な断面図である。図９に示す半導体装置６２にあっては、電極部材２の形状が図１に示す半導体装置６と異なる。電極部材２の形状は、電極部材２が上モールド金型７１によって押圧され、変形する際に、露出面２ｓｅとなる部分が上モールド金型７１に押し付けられるように構成されていれば、図９に示す２回折り返すような形状でもよい。一方、図１０に示す比較例の回路体６０Ｍに設けられた電極部材２０のように、内部接合部２０ｊｃの面直上の領域に外部端子部２０ｊｅが位置しない形状では、変形部２０ｆが変形すると、外部端子部２０ｊｅは、変形部２０ｆとのコーナー部分よりも自由端側の方が半導体素子１側に近づくように傾くので、露出面２０ｓｅとなる部分が上モールド金型７１から離れてしまい、封止体５を構成する樹脂に覆われる可能性が生じる。したがって、図９に示されるように、外部端子部２ｊｅの少なくとも一部が、内部接合部２ｊｃの面直上の領域、すなわち内部接合部２ｊｃを半導体素子の表面電極に垂直な方向に延ばした空間（図９の断面図では、Ｗで示す範囲）に位置する必要がある。 Embodiment 4 FIG.
FIG. 9 is a schematic sectional view showing a semiconductor device according to the fourth embodiment of the present invention. In the semiconductor device 62 shown in FIG. 9, the shape of the electrode member 2 is different from that of the semiconductor device 6 shown in FIG. The shape of the electrode member 2 is such that when the electrode member 2 is pressed by the upper mold 71 and deformed, the portion to be the exposed surface 2se is pressed against the upper mold 71 as shown in FIG. The shape may be folded twice as shown in FIG. On the other hand, when the deforming portion 20f is deformed in a shape in which the external terminal portion 20je is not located in the region immediately above the surface of the internal joint portion 20jc, like the electrode member 20 provided in the circuit body 60M of the comparative example shown in FIG. Since the external terminal portion 20je is inclined so that the free end side is closer to the semiconductor element 1 side than the corner portion with the deformable portion 20f, the portion that becomes the exposed surface 20se is separated from the upper mold 71 and sealed. There is a possibility that the resin constituting the stationary body 5 is covered. Therefore, as shown in FIG. 9, at least a part of the external terminal portion 2je is a region immediately above the surface of the internal junction portion 2jc, that is, a space (in which the internal junction portion 2jc extends in a direction perpendicular to the surface electrode of the semiconductor element). In the cross-sectional view of FIG.

また、電極部材２の表面を粗化して、封止体５を構成する樹脂との密着性を向上させるようにすれば、電極部材２と封止体５との間の剥離を抑制できる。したがって、界面からの水分浸入による回路部材の腐食や絶縁不良等を防止し、信頼性を一層向上させることができる。一方、外部端子部２ｊｅに外部配線を接続する方法として、超音波接合が採用される場合には、露出面２ｓｅは平滑であることが望ましい。したがって、超音波接合を採用する場合には、電極部材２の表面を粗化する場合でも、少なくとも露出面２ｓｅの部分を粗化しないことで、信頼性と超音波接合の安定性を両立させることができる。   Further, if the surface of the electrode member 2 is roughened to improve the adhesion with the resin constituting the sealing body 5, peeling between the electrode member 2 and the sealing body 5 can be suppressed. Therefore, it is possible to prevent circuit member corrosion or insulation failure due to moisture intrusion from the interface, and to further improve reliability. On the other hand, when ultrasonic bonding is employed as a method of connecting external wiring to the external terminal portion 2je, it is desirable that the exposed surface 2se be smooth. Therefore, when ultrasonic bonding is employed, even when the surface of the electrode member 2 is roughened, at least the portion of the exposed surface 2se is not roughened, thereby achieving both reliability and stability of ultrasonic bonding. Can do.

実施の形態５．
図１１は、本発明の実施の形態５による半導体装置６３を示す模式的な断面図である。超音波接合を採用する場合には、外部端子部２ｊｅに超音波振動が印加されるため、外部端子部２ｊｅと封止体５を構成する樹脂との界面で剥離が生じやすくなるため、例えば、外部端子部２ｊｅの自由端側を内部接合部２ｊｃ側に折り曲げ、図１１に示すように封止体５内に食い込む食い込み部２ｉを備えるように構成することで、封止体５へのマクロ形状でのアンカー効果により、外部端子部２ｊｅと封止体５との界面剥離を抑制することができる。 Embodiment 5 FIG.
FIG. 11 is a schematic cross-sectional view showing a semiconductor device 63 according to the fifth embodiment of the present invention. When ultrasonic bonding is employed, since ultrasonic vibration is applied to the external terminal portion 2je, peeling easily occurs at the interface between the external terminal portion 2je and the resin constituting the sealing body 5, for example, The macro shape to the sealing body 5 is formed by bending the free end side of the external terminal portion 2je toward the internal joint portion 2jc and including the biting portion 2i that bites into the sealing body 5 as shown in FIG. Due to the anchor effect, the interface peeling between the external terminal portion 2je and the sealing body 5 can be suppressed.

以上説明した本発明においては、半導体素子として、炭化ケイ素（ＳｉＣ）や窒化ガリウム（ＧａＮ）系材料、またはダイヤモンドといったシリコンと比べてバンドギャップが広い、いわゆるワイドバンドギャップ半導体材料の半導体素子のように、高耐圧および高温動作が可能な半導体素子を用いた場合に、特に顕著な効果が現れる。   In the present invention described above, the semiconductor element is a semiconductor element of a so-called wide band gap semiconductor material having a wider band gap than silicon carbide (SiC), gallium nitride (GaN) -based material, or silicon such as diamond. When a semiconductor element capable of high withstand voltage and high temperature operation is used, a particularly remarkable effect appears.

ワイドバンドギャップ半導体材料によって形成されたスイッチング素子や整流素子は、ケイ素で形成された素子よりも電力損失が低いため、スイッチング素子や整流素子における高効率化が可能であり、ひいては、半導体装置の高効率化が可能となる。さらに、耐電圧性が高く、許容電流密度も高いため、スイッチング素子や整流素子の小型化が可能であり、これら小型化されたスイッチング素子や整流素子を用いることにより、半導体装置も小型化が可能となる。また耐熱性が高いので、高温動作が可能であり、ヒートシンクの放熱フィンの小型化や、水冷部の空冷化も可能となるので、半導体装置の一層の小型化が可能になる。   Switching elements and rectifier elements made of wide bandgap semiconductor materials have lower power loss than elements made of silicon, so that the switching elements and rectifier elements can be made more efficient. Efficiency can be improved. In addition, since the withstand voltage is high and the allowable current density is high, the switching element and the rectifying element can be downsized. By using the downsized switching element and rectifying element, the semiconductor device can also be downsized. It becomes. In addition, since the heat resistance is high, it is possible to operate at a high temperature, and it is possible to reduce the size of the heat dissipating fins of the heat sink and the air cooling of the water cooling portion, thereby further reducing the size of the semiconductor device.

なお、スイッチング素子および整流素子の両方がワイドバンドギャップ半導体材料によって形成されていても、いずれか一方の素子がワイドバンドギャップ半導体材料によって形成されていてもよい。   Note that both the switching element and the rectifying element may be formed of a wide band gap semiconductor material, or one of the elements may be formed of a wide band gap semiconductor material.

また、本実施の形態では、回路基板４は回路基板と表現しているが、電気導電性と熱伝導性に優れたＣｕやＣｕ合金または、アルミニウム等の金属の矩形板状ブロックを想定している。しかし、回路基板４の裏面である放熱面４ｒから半導体素子１と導通を図れるのであれば、ガラスエポキシ樹脂などで構成されたプリント基板を用いても良い。   Further, in the present embodiment, the circuit board 4 is expressed as a circuit board. However, assuming a rectangular plate-like block made of metal such as Cu, Cu alloy, or aluminum excellent in electrical conductivity and thermal conductivity. Yes. However, a printed circuit board made of glass epoxy resin or the like may be used as long as it can be electrically connected to the semiconductor element 1 from the heat radiation surface 4r which is the back surface of the circuit board 4.

なお、本発明は、その発明の範囲内において、各実施の形態を適宜、変形、省略したりすることが可能である。     In the present invention, the respective embodiments can be appropriately modified or omitted within the scope of the invention.

１：半導体素子 ２：電極部材
２ｆ：変形部 ２ｉ：食い込み部
２ｊｃ：内部接合部 ２ｊｅ：外部端子部
２ｊｈ：平坦部 ２ｓｅ：露出面
２ｓｉ：素子接合面 ３：はんだ
３１、３２：はんだペレット ４：回路基板
４ｆ：回路面 ４ｒ：放熱面
５：封止体 ５ｆ：主面
６、６０、６１、６２、６３：半導体装置 ６Ｍ：回路体
７：モールド金型 ７１：上モールド金型
７２：下モールド金型 ７１０：凹部 1: Semiconductor element 2: Electrode member 2f: Deformation part 2i: Biting part 2jc: Internal joint part 2je: External terminal part 2jh: Flat part 2se: Exposed surface 2si: Element joint surface 3: Solder 31, 32: Solder pellet 4: Circuit board 4f: Circuit surface 4r: Heat radiation surface 5: Sealing body 5f: Main surfaces 6, 60, 61, 62, 63: Semiconductor device 6M: Circuit body 7: Mold die 71: Upper mold die 72: Lower mold Mold 710: recess

Claims (8)

板状の回路基板と、
裏面が前記回路基板の回路面に接合された半導体素子と、
前記半導体素子の表面電極に接合された板状の電極部材と、
前記半導体素子と前記電極部材を含んで前記回路基板の回路面および側面を封止する封止体と、
を備えた半導体装置において、
前記電極部材は、前記半導体素子の表面電極に接合される内部接合部と、前記封止体の主面から露出する露出面を有する外部端子部と、前記内部接合部と前記外部端子部とを、折り返して連結する変形部とを含み、前記露出面は前記電極部材を凸形状に成形して設けられたことを特徴とする半導体装置。 A plate-like circuit board;
A semiconductor element having a back surface bonded to the circuit surface of the circuit board;
A plate-like electrode member joined to the surface electrode of the semiconductor element;
A sealing body that includes the semiconductor element and the electrode member and seals a circuit surface and a side surface of the circuit board;
In a semiconductor device comprising:
The electrode member includes an internal joint portion joined to a surface electrode of the semiconductor element, an external terminal portion having an exposed surface exposed from a main surface of the sealing body, and the internal joint portion and the external terminal portion. A semiconductor device, wherein the exposed surface is formed by forming the electrode member into a convex shape. 前記外部端子部の少なくとも一部は、前記内部接合部を前記半導体素子の表面電極に垂直な方向に延ばした空間に位置することを特徴とする請求項１に記載の半導体装置。   2. The semiconductor device according to claim 1, wherein at least a part of the external terminal portion is located in a space in which the internal joint portion extends in a direction perpendicular to a surface electrode of the semiconductor element. 前記電極部材の凸形状に成形された前記露出面の周辺には平面部を有することを特徴とする請求項１に記載の半導体装置。   The semiconductor device according to claim 1, further comprising a flat portion around the exposed surface formed into a convex shape of the electrode member. 凸形状に成形された前記露出面の頂上部は平坦部を有することを特徴とする請求項１に記載の半導体装置。   The semiconductor device according to claim 1, wherein a top portion of the exposed surface formed into a convex shape has a flat portion. 前記半導体素子がワイドバンドギャップ半導体により形成されたことを特徴とする請求項１〜４のいずれか１項に記載の半導体装置。   The semiconductor device according to claim 1, wherein the semiconductor element is formed of a wide band gap semiconductor. 前記ワイドバンドギャップ半導体の材料は、炭化珪素、窒化ガリウム系材料、ダイヤモンドのいずれかの材料であることを特徴とする請求項５に記載の半導体装置。   6. The semiconductor device according to claim 5, wherein the material of the wide band gap semiconductor is any one of silicon carbide, a gallium nitride-based material, and diamond. 請求項１に記載の半導体装置を製造する半導体装置の製造方法であって、
前記板状の回路基板の回路面への半導体素子の接合工程と、前記内部接合部と前記外部端子部と前記変形部とを有する前記電極部材の前記内部接合部を前記半導体素子の表面電極へ接合する工程とを含み、前記回路面に前記半導体素子が実装された回路体を形成する工程と、
前記回路体を、内面に凹部が設けられたモールド金型に、前記電極部材の前記外部端子部の部分が前記凹部に対向する位置となるよう設置する工程と、
前記モールド金型を型締めする工程と、
型締めした前記モールド金型内に樹脂を注入し、前記回路基板の回路面および側面をまとめて前記樹脂で覆うとともに、前記外部端子部が前記モールド金型に設けられた凹部に樹脂注入圧によって押し当てられることで、前記外部端子部が変形し、前記電極部材の前記露出面が前記回路面を覆う主面から露出するように封止体を形成する工程と、
を含む半導体装置の製造方法。 A semiconductor device manufacturing method for manufacturing the semiconductor device according to claim 1,
A step of bonding a semiconductor element to a circuit surface of the plate-like circuit board, and the internal bonding portion of the electrode member having the internal bonding portion, the external terminal portion, and the deformation portion to a surface electrode of the semiconductor element Forming a circuit body in which the semiconductor element is mounted on the circuit surface.
Installing the circuit body in a mold having an inner surface provided with a recess so that the portion of the external terminal portion of the electrode member faces the recess;
A step of clamping the mold,
Resin is injected into the mold mold that has been clamped, and the circuit surface and side surfaces of the circuit board are collectively covered with the resin, and the external terminal portion is formed in the recess provided in the mold mold by resin injection pressure. Forming the sealing body such that the external terminal portion is deformed by being pressed and the exposed surface of the electrode member is exposed from a main surface covering the circuit surface;
A method of manufacturing a semiconductor device including: 前記モールド金型に設けられた凹部の底部は平面であり、前記外部端子部が前記凹部に樹脂注入圧によって押し当てられるときに、前記外部端子部が前記凹部の底面に押し当てられて、前記露出面の頂部に平坦部が形成されることを特徴とする請求項７に記載の半導体装置の製造方法。   The bottom of the concave portion provided in the mold is a flat surface, and when the external terminal portion is pressed against the concave portion by resin injection pressure, the external terminal portion is pressed against the bottom surface of the concave portion, The method of manufacturing a semiconductor device according to claim 7, wherein a flat portion is formed on a top portion of the exposed surface.
JP2012200236A 2012-09-12 2012-09-12 Semiconductor device and semiconductor device manufacturing method Pending JP2014056916A (en)

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JP2001267469A (en) * 2000-03-16 2001-09-28 Denso Corp Resin sealing semiconductor device
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102015216779A1 (en) 2015-03-05 2016-09-08 Mitsubishi Electric Corporation Power semiconductor device
DE102015216779B4 (en) 2015-03-05 2020-06-18 Mitsubishi Electric Corporation Power semiconductor device

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