JP2013116848A - METHOD FOR PRODUCING GaAs-BASED FILM, AND COMPOSITE SUBSTRATE USED FOR THE METHOD - Google Patents

METHOD FOR PRODUCING GaAs-BASED FILM, AND COMPOSITE SUBSTRATE USED FOR THE METHOD Download PDF

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JP2013116848A
JP2013116848A JP2012128086A JP2012128086A JP2013116848A JP 2013116848 A JP2013116848 A JP 2013116848A JP 2012128086 A JP2012128086 A JP 2012128086A JP 2012128086 A JP2012128086 A JP 2012128086A JP 2013116848 A JP2013116848 A JP 2013116848A
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gaas
film
main surface
support substrate
substrate
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Kazunari Sato
一成 佐藤
Yuki Seki
裕紀 関
Koji Uematsu
康二 上松
Yoshiyuki Yamamoto
喜之 山本
Hideki Matsubara
秀樹 松原
Shinsuke Fujiwara
伸介 藤原
Masashi Yoshimura
雅司 吉村
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Sumitomo Electric Industries Ltd
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Abstract

PROBLEM TO BE SOLVED: To provide a method for producing GaAs-based film having large area of a main surface, little warpage and excellent crystallinity obtained at low cost, and to provide a composite substrate used for the method.SOLUTION: The method for producing GaAs-based film includes the steps of: preparing a composite substrate 10 which contains a support base 11 to be dissolved into hydrofluoric acid and a single crystal film 13 arranged on a main surface 11m of the support base 11, and has a thermal expansion coefficient in the main surface 11m of the support base 11 which is greater than 0.8 time and less than 1.2 time compared with the thermal expansion coefficient of the GaAs crystal; forming GaAs-based film 20 on a main surface 13 of the single crystal film 13 arranged on the main surface 11m side of the support base 11; and removing the support base 11 by dissolving into hydrofluoric acid.

Description

本発明は、主面の面積が大きく反りの小さいGaAs系膜の製造方法およびそれに用いられる複合基板に関する。   The present invention relates to a method for producing a GaAs-based film having a large principal surface area and a small warp, and a composite substrate used therefor.

GaAs系膜は、発光デバイス、電子デバイスなどの半導体デバイスの基板および半導体層として、好適に用いられる。かかるGaAs系膜を製造するための基板としては、その基板とGaAs系膜との間で、格子定数および熱膨張係数を一致させるまたは一致に近づける観点から、GaAs基板が最も優れている。ところが、GaAs基板は、希少金属であるGaを含有しているため、Si基板などに比べて非常に高価である。   The GaAs-based film is suitably used as a substrate and a semiconductor layer of a semiconductor device such as a light emitting device or an electronic device. As a substrate for producing such a GaAs-based film, a GaAs substrate is most excellent from the viewpoint of matching or approaching the lattice constant and the thermal expansion coefficient between the substrate and the GaAs-based film. However, since the GaAs substrate contains Ga, which is a rare metal, it is very expensive compared to a Si substrate or the like.

このため、特開平07−014776号公報(特許文献1)は、シリコン基板上にGaAs層をエピタキシャル成長させたGaAs基板の製造方法を開示する。   For this reason, Japanese Patent Laid-Open No. 07-014776 (Patent Document 1) discloses a method of manufacturing a GaAs substrate in which a GaAs layer is epitaxially grown on a silicon substrate.

特開平07−014776号公報Japanese Patent Application Laid-Open No. 07-014776

特開平07−014776号公報(特許文献1)で開示される製造方法により得られるシリコン基板上にGaAs層をエピタキシャル成長させたGaAs基板は、Si基板とGaAs層との間の熱膨張係数が異なるため、反りが発生する場合があり、また主面の面積を大きくすることが難しいという問題点があった。   A GaAs substrate obtained by epitaxially growing a GaAs layer on a silicon substrate obtained by the manufacturing method disclosed in Japanese Patent Application Laid-Open No. 07-014776 (Patent Document 1) has a different thermal expansion coefficient between the Si substrate and the GaAs layer. In some cases, warpage may occur, and it is difficult to increase the area of the main surface.

本発明は、上記問題点を解決して、GaAs結晶と熱膨張係数が一致または近似しかつ除去が容易な支持基板を含む低コストの複合基板を用いて主面の面積が大きく反りが小さく結晶性が良好なGaAs系膜を成膜し、その後支持基板を除去することにより、主面の面積が大きく反りが小さく結晶性が良好なGaAs系膜を効率よく低コストで取り出すことができるGaAs系膜の製造方法およびそれに用いられる複合基板を提供することを目的とする。   The present invention solves the above-described problems by using a low-cost composite substrate including a support substrate that has a thermal expansion coefficient that is the same as or close to that of a GaAs crystal and that can be easily removed. GaAs-based film with good crystallinity can be taken out efficiently and at low cost by forming a GaAs-based film with good crystallinity and then removing the support substrate, and then having a large main surface area and low warpage and good crystallinity An object of the present invention is to provide a film manufacturing method and a composite substrate used therefor.

本発明は、フッ化水素酸に溶解する支持基板と支持基板の主面側に配置されている単結晶膜とを含み、支持基板の主面内の熱膨張係数がGaAs結晶の熱膨張係数に比べて0.8倍より大きく1.2倍より小さい複合基板である。   The present invention includes a support substrate dissolved in hydrofluoric acid and a single crystal film disposed on the main surface side of the support substrate, and the thermal expansion coefficient in the main surface of the support substrate is equal to the thermal expansion coefficient of the GaAs crystal. In comparison, the composite substrate is larger than 0.8 times and smaller than 1.2 times.

本発明にかかる複合基板において、支持基板は、ジルコニアとシリカとで形成されるZrO2−SiO2複合酸化物と、ジルコニアおよびシリカの少なくともいずれかと、を含むことができる。また、支持基板は、アルミナとシリカとで形成されるAl23−SiO2複合酸化物と、イットリア安定化ジルコニアと、を含むことができる。また、支持基板は、アルミナとシリカとで形成されるAl23−SiO2複合酸化物と、マグネシアと、を含むことができる。また、本発明にかかる複合基板における単結晶膜の主面の面積を45cm2以上とすることができる。 In the composite substrate according to the present invention, the support substrate can include a ZrO 2 —SiO 2 composite oxide formed of zirconia and silica, and at least one of zirconia and silica. Further, the support substrate can include Al 2 O 3 —SiO 2 composite oxide formed of alumina and silica and yttria-stabilized zirconia. The support substrate can contain Al 2 O 3 —SiO 2 composite oxide formed of alumina and silica, and magnesia. In addition, the area of the main surface of the single crystal film in the composite substrate according to the present invention can be 45 cm 2 or more.

また、本発明は、フッ化水素酸に溶解する支持基板と支持基板の主面側に配置されている単結晶膜とを含み、支持基板の主面内の熱膨張係数がGaAs結晶の熱膨張係数に比べて0.8倍より大きく1.2倍より小さい複合基板を準備する工程と、支持基板の主面側に配置されている単結晶膜の主面上にGaAs系膜を成膜する工程と、支持基板をフッ化水素酸に溶解することにより除去する工程と、を含むGaAs系膜の製造方法である。   The present invention also includes a support substrate that dissolves in hydrofluoric acid and a single crystal film disposed on the main surface side of the support substrate, and the thermal expansion coefficient in the main surface of the support substrate is the thermal expansion of the GaAs crystal. A step of preparing a composite substrate larger than 0.8 times and smaller than 1.2 times compared with a coefficient, and forming a GaAs-based film on the main surface of the single crystal film disposed on the main surface side of the support substrate A method for producing a GaAs-based film, which includes a step and a step of removing a supporting substrate by dissolving it in hydrofluoric acid.

本発明にかかるGaAs系膜の製造方法において、支持基板は、ジルコニアとシリカとで形成されるZrO2−SiO2複合酸化物と、ジルコニアおよびシリカの少なくともいずれかと、を含むことができる。また、支持基板は、アルミナとシリカとで形成されるAl23−SiO2複合酸化物と、イットリア安定化ジルコニアと、を含むことができる。また、支持基板は、アルミナとシリカとで形成されるAl23−SiO2複合酸化物と、マグネシアと、を含むことができる。また、本発明にかかる複合基板における単結晶膜の主面の面積を45cm2以上とすることができる。また、GaAs系膜を成膜する工程は、単結晶膜の主面上にGaAs系バッファ層を形成するサブ工程と、GaAs系バッファ層の主面上にGaAs系単結晶層を形成するサブ工程と、を含むことができる。 In the method for producing a GaAs-based film according to the present invention, the support substrate can include a ZrO 2 —SiO 2 composite oxide formed of zirconia and silica, and at least one of zirconia and silica. Further, the support substrate can include Al 2 O 3 —SiO 2 composite oxide formed of alumina and silica and yttria-stabilized zirconia. The support substrate can contain Al 2 O 3 —SiO 2 composite oxide formed of alumina and silica, and magnesia. In addition, the area of the main surface of the single crystal film in the composite substrate according to the present invention can be 45 cm 2 or more. The step of forming a GaAs-based film includes a sub-step of forming a GaAs-based buffer layer on the main surface of the single crystal film and a sub-step of forming a GaAs-based single crystal layer on the main surface of the GaAs-based buffer layer. And can be included.

本発明によれば、GaAs結晶と熱膨張係数が一致または近似しかつ除去が容易な支持基板を含む低コストの複合基板を用いて主面の面積が大きく反りが小さく結晶性が良好なGaAs系膜を成膜し、その後支持基板を除去することにより、主面の面積が大きく反りが小さく結晶性が良好なGaAs系膜を効率よく低コストで取り出すことができるGaAs系膜の製造方法およびそれに用いられる複合基板が提供される。   According to the present invention, a low cost composite substrate having a thermal expansion coefficient that is the same as or close to that of a GaAs crystal and includes a support substrate that is easy to remove is used. A method of manufacturing a GaAs-based film capable of efficiently and cost-effectively extracting a GaAs-based film having a large principal surface area, small warpage, and good crystallinity by forming a film and then removing the support substrate A composite substrate for use is provided.

本発明にかかる複合基板の一例を示す概略断面図である。It is a schematic sectional drawing which shows an example of the composite substrate concerning this invention. 本発明にかかるGaAs系膜の製造方法の一例を示す概略断面図である。ここで、(A)は複合基板を準備する工程を示し、(B)はGaAs系膜を成膜する工程を示し、(C)は支持基板を除去する工程を示す。It is a schematic sectional drawing which shows an example of the manufacturing method of the GaAs type film concerning this invention. Here, (A) shows a step of preparing a composite substrate, (B) shows a step of forming a GaAs-based film, and (C) shows a step of removing the support substrate. 本発明における複合基板を準備する工程の一例を示す概略断面図である。It is a schematic sectional drawing which shows an example of the process of preparing the composite substrate in this invention.

[複合基板]
図1を参照して、本発明の一実施形態である複合基板10は、フッ化水素酸に溶解する支持基板11と、支持基板11の主面11m側に配置されている単結晶膜13と、を含み、支持基板11の主面11m内の熱膨張係数が、GaAs結晶の熱膨張係数に比べて、0.8倍より大きく1.2倍より小さい。
[Composite substrate]
Referring to FIG. 1, a composite substrate 10 according to an embodiment of the present invention includes a support substrate 11 that is dissolved in hydrofluoric acid, and a single crystal film 13 that is disposed on the main surface 11m side of the support substrate 11. The thermal expansion coefficient in the main surface 11m of the support substrate 11 is larger than 0.8 times and smaller than 1.2 times compared to the thermal expansion coefficient of the GaAs crystal.

本実施形態の複合基板10は、支持基板11の主面11m内の熱膨張係数が、GaAs結晶の熱膨張係数に比べて0.8倍より大きく1.2倍より小さいため、支持基板11の主面11m上に形成された単結晶膜13の主面13m上に、主面13mの面積が大きくても、転位密度が低く結晶性が良好なGaAs系膜を成膜することができる。また、支持基板11がフッ化水素酸に溶解するため、複合基板10の単結晶膜13の主面13m上にGaAs系膜を成膜した後、支持基板11をフッ化水素酸により除去することにより、単結晶膜13の主面13m上に成膜された転位密度が低く結晶性が良好なGaAs系膜が効率よく低コストで得られる。   In the composite substrate 10 of the present embodiment, the thermal expansion coefficient in the main surface 11m of the support substrate 11 is larger than 0.8 times and smaller than 1.2 times the thermal expansion coefficient of the GaAs crystal. Even if the area of the main surface 13m is large, a GaAs-based film having a low dislocation density and good crystallinity can be formed on the main surface 13m of the single crystal film 13 formed on the main surface 11m. Further, since the support substrate 11 is dissolved in hydrofluoric acid, a GaAs-based film is formed on the main surface 13m of the single crystal film 13 of the composite substrate 10, and then the support substrate 11 is removed with hydrofluoric acid. Thus, a GaAs-based film having a low dislocation density and good crystallinity formed on the main surface 13m of the single crystal film 13 can be obtained efficiently and at low cost.

(支持基板)
本実施形態の複合基板10の支持基板11は、支持基板11の主面11m上に形成された単結晶膜13の主面13m上に、主面の面積が大きく転位密度が低く結晶性が良好なGaAs系膜を成膜する観点から、支持基板11の主面11m内の熱膨張係数が、GaAs結晶の熱膨張係数に比べて0.8倍より大きく1.2倍より小さいことが必要であり、0.9倍より大きく1.15倍より小さいことが好ましく、0.95倍より大きく1.1倍より小さいことがより好ましい。また、支持基板11は、成膜したGaAs系膜から支持基板を効率よく低コストで除去する観点から、フッ化水素酸に溶解する必要がある。
(Support substrate)
The support substrate 11 of the composite substrate 10 of the present embodiment has a large area of the main surface, a low dislocation density, and good crystallinity on the main surface 13m of the single crystal film 13 formed on the main surface 11m of the support substrate 11. From the viewpoint of forming a GaAs-based film, it is necessary that the thermal expansion coefficient in the main surface 11m of the support substrate 11 is larger than 0.8 times and smaller than 1.2 times as compared with the thermal expansion coefficient of the GaAs crystal. Yes, it is preferably larger than 0.9 times and smaller than 1.15 times, more preferably larger than 0.95 times and smaller than 1.1 times. The support substrate 11 needs to be dissolved in hydrofluoric acid from the viewpoint of efficiently removing the support substrate from the formed GaAs-based film at low cost.

支持基板11は、支持基板11の主面11m内の熱膨張係数が、GaAs結晶の熱膨張係数に比べて0.8倍より大きく1.2倍より小さく、かつ、フッ化水素酸で溶解するものであれば特に制限はなく、単結晶であっても、多結晶であっても、非結晶であってもよい。支持基板11は、その熱膨張係数の調整が容易で、フッ化水素酸に溶解する観点から、金属酸化物およびケイ素酸化物の少なくともいずれかを含むことが好ましい。   The support substrate 11 has a thermal expansion coefficient in the main surface 11m of the support substrate 11 that is larger than 0.8 times and smaller than 1.2 times that of the GaAs crystal, and is dissolved in hydrofluoric acid. Any material can be used as long as it is monocrystalline, polycrystalline, or amorphous. The support substrate 11 preferably contains at least one of a metal oxide and a silicon oxide from the viewpoint of easy adjustment of the thermal expansion coefficient and dissolution in hydrofluoric acid.

ここで、支持基板11は、ジルコニア(ZrO2)とシリカ(SiO2)とで形成されるZrO2−SiO2複合酸化物と、ジルコニアおよびシリカの少なくともいずれかと、を含むことが特に好ましい。ここで、ZrO2−SiO2複合酸化物とは、ZrO2とSiO2とにより形成されるジルコン(ZrSiO4)などの複合酸化物をいう。かかるZrO2−SiO2複合酸化物は、フッ化水素酸に溶解しないかまたは溶解し難い。このため、支持基板11は、ZrO2−SiO2複合酸化物に加えて、フッ化水素酸に溶解する観点から、ジルコニア(ZrO2)およびシリカ(SiO2)の少なくともいずれかを含む。ZrSiO4などの複合酸化物、ZrO2およびSiO2の存在の有無ならびにそれらの組成比率は、X線回折により測定することができる。 Here, the support substrate 11 particularly preferably includes a ZrO 2 —SiO 2 composite oxide formed of zirconia (ZrO 2 ) and silica (SiO 2 ), and at least one of zirconia and silica. Here, the ZrO 2 —SiO 2 composite oxide refers to a composite oxide such as zircon (ZrSiO 4 ) formed by ZrO 2 and SiO 2 . Such ZrO 2 —SiO 2 composite oxide does not dissolve or hardly dissolves in hydrofluoric acid. For this reason, the support substrate 11 contains at least one of zirconia (ZrO 2 ) and silica (SiO 2 ) from the viewpoint of dissolving in hydrofluoric acid in addition to the ZrO 2 —SiO 2 composite oxide. Presence / absence of composite oxides such as ZrSiO 4 , ZrO 2 and SiO 2 , and their composition ratios can be measured by X-ray diffraction.

上記のようなZrO2−SiO2複合酸化物(たとえばZrSiO4)と、ジルコニア(ZrO2)およびシリカ(SiO2)の少なくともいずれかとを含む支持基板11は、ZrO2とSiO2とを1:1以外のモル比で完全に反応させることにより、または、ZrO2とSiO2とを1:1のモル比で不完全に反応させることにより、得られる。 The support substrate 11 containing the above-described ZrO 2 —SiO 2 composite oxide (for example, ZrSiO 4 ) and at least one of zirconia (ZrO 2 ) and silica (SiO 2 ) has a ratio of ZrO 2 and SiO 2 of 1: It can be obtained by reacting completely at a molar ratio other than 1, or by incompletely reacting ZrO 2 and SiO 2 at a molar ratio of 1: 1.

また、支持基板11は、アルミナ(Al23)とシリカ(SiO2)とで形成されるAl23−SiO2複合酸化物と、イットリア安定化ジルコニア(YSZ)と、を含むことが特に好ましい。ここで、Al23−SiO2複合酸化物とは、Al23とSiO2とにより形成されるムライト(3Al23・2SiO2〜2Al23・SiO2)などの複合酸化物をいう。また、YSZ(イットリア安定化ジルコニア、以下同じ)とは、ジルコニア(ZrO2)にイットリア(Y23)を添加することによりジルコニアの結晶構造を正方晶または立方晶で安定化させたものをいう。ムライトおよびYSZの存在の有無ならびにそれらの組成比率は、X線回折により測定することができる。 The support substrate 11 may include an Al 2 O 3 —SiO 2 composite oxide formed of alumina (Al 2 O 3 ) and silica (SiO 2 ), and yttria-stabilized zirconia (YSZ). Particularly preferred. Here, the Al 2 O 3 —SiO 2 composite oxide is a composite oxide such as mullite (3Al 2 O 3 .2SiO 2 to 2Al 2 O 3 .SiO 2 ) formed by Al 2 O 3 and SiO 2. Say things. YSZ (yttria-stabilized zirconia, the same shall apply hereinafter) is a product in which the crystal structure of zirconia is stabilized with tetragonal or cubic crystals by adding yttria (Y 2 O 3 ) to zirconia (ZrO 2 ). Say. The presence or absence of mullite and YSZ and the composition ratio thereof can be measured by X-ray diffraction.

また、支持基板11は、アルミナ(Al23)とシリカ(SiO2)とで形成されるAl23−SiO2複合酸化物と、マグネシア(MgO)と、を含むことが特に好ましい。ムライトおよびMgOの存在の有無ならびにそれらの組成比率は、X線回折により測定することができる。 The support substrate 11 particularly preferably contains Al 2 O 3 —SiO 2 composite oxide formed of alumina (Al 2 O 3 ) and silica (SiO 2 ), and magnesia (MgO). The presence or absence of mullite and MgO and the composition ratio thereof can be measured by X-ray diffraction.

このとき、支持基板11およびGaAs結晶の熱膨張係数は、一般に、それらの温度により大きく変動することから、如何なる温度または温度領域における熱膨張係数によって決めるかが重要である。本発明においては、複合基板上に反りの小さいGaAs系膜を製造することを目的とするものであり、室温から昇温させてGaAs系膜の成膜温度で複合基板上にGaAs系膜を成膜した後室温まで降温させて複合基板上に成膜されたGaAs系膜を取り出すことから、室温からGaAs系膜の成膜温度までにおける支持基板およびGaAs結晶の平均熱膨張係数を、それぞれ支持基板およびGaAs結晶の熱膨張係数として取り扱うことが適正と考えられる。このため、本発明においては、支持基板およびGaAs結晶の熱膨張係数は、室温(具体的に25℃)から1000℃までにおける平均熱膨張係数により決定することにする。   At this time, since the thermal expansion coefficients of the support substrate 11 and the GaAs crystal generally vary greatly depending on their temperatures, it is important to determine the temperature expansion coefficient in any temperature or temperature range. The object of the present invention is to produce a GaAs-based film having a small warp on a composite substrate, and the GaAs-based film is formed on the composite substrate at the film-forming temperature of the GaAs-based film by raising the temperature from room temperature. After the film formation, the temperature is lowered to room temperature and the GaAs-based film formed on the composite substrate is taken out. It is considered appropriate to handle them as thermal expansion coefficients of GaAs crystals. Therefore, in the present invention, the thermal expansion coefficients of the support substrate and the GaAs crystal are determined by the average thermal expansion coefficient from room temperature (specifically 25 ° C.) to 1000 ° C.

(単結晶膜)
本実施形態の複合基板10の支持基板11の主面11m側に配置される単結晶膜13は、反りが小さく転位密度が低く結晶性の良好なGaAs系膜を成長させる観点から、GaAs結晶(正方晶系の閃亜鉛鉱型構造)と同じ正方晶系の結晶構造を有するものが好ましく、主面13mが(001)面であるSi膜(正方晶系のダイヤモンド型構造)、主面13mが(001)面であるGaAs膜(正方晶系の閃亜鉛鉱型構造)などが好ましい。
(Single crystal film)
The single crystal film 13 disposed on the main surface 11m side of the support substrate 11 of the composite substrate 10 of the present embodiment is a GaAs crystal (from the viewpoint of growing a GaAs-based film having low warpage, low dislocation density, and good crystallinity. It is preferable to have the same tetragonal crystal structure as that of the tetragonal zinc blende structure, and a Si film (tetragonal diamond type structure) whose principal surface 13m is the (001) plane, and the principal surface 13m is A GaAs film having a (001) plane (tetragonal zinc blende structure) is preferred.

また、複合基板10における単結晶膜13の主面13mの面積は、特に制限はいが、主面の面積が大きいGaAs系膜を成長させる観点から、45cm2以上であることが好ましい。 In addition, the area of the main surface 13m of the single crystal film 13 in the composite substrate 10 is not particularly limited, but is preferably 45 cm 2 or more from the viewpoint of growing a GaAs-based film having a large main surface area.

(接着層)
本実施形態の複合基板10は、支持基板11と単結晶膜13との接合強度を高める観点から、支持基板11と単結晶膜13との間に接着層12が形成されていることが好ましい。接着層12は、特に制限はないが、支持基板11と単結晶膜13との接合強度を高める効果が高い観点から、SiO2層、TiO2層などが好ましい。さらに、フッ化水素酸により除去できる観点から、SiO2層がより好ましい。
(Adhesive layer)
In the composite substrate 10 of the present embodiment, the adhesive layer 12 is preferably formed between the support substrate 11 and the single crystal film 13 from the viewpoint of increasing the bonding strength between the support substrate 11 and the single crystal film 13. The adhesive layer 12 is not particularly limited, from the effects is high in view of enhancing the bonding strength between the supporting substrate 11 and the single crystal film 13, SiO 2 layer, such as TiO 2 layer is preferable. Furthermore, a SiO 2 layer is more preferable from the viewpoint that it can be removed by hydrofluoric acid.

(複合基板の製造方法)
複合基板の製造方法は、後述するGaAs系膜の製造方法における複合基板の準備工程と同様である。
(Production method of composite substrate)
The manufacturing method of the composite substrate is the same as the preparation step of the composite substrate in the GaAs-based film manufacturing method described later.

[GaAs系膜の製造方法]
図2を参照して、本発明の別の実施形態であるGaAs系膜の製造方法は、フッ化水素酸に溶解する支持基板11と、支持基板11の主面11m側に配置されている単結晶膜13と、を含み、支持基板11の主面11m内の熱膨張係数が、GaAs結晶の熱膨張係数に比べて、0.8倍より大きく1.2倍より小さい複合基板10を準備する工程(図2(A))と、支持基板11の主面11m側に配置されている単結晶膜13の主面13m上にGaAs系膜を成膜する工程(図2(B))と、支持基板11を、フッ化水素酸に溶解することにより、除去する工程(図2(C))と、を含む。ここで、GaAs系膜とは、III族元素としてGaを含むIII族ヒ化物で形成されている膜をいい、たとえばGaxInyAl1-x-yAs膜(x>0、y≧0、x+y≦1)が挙げられる。
[Method of manufacturing GaAs film]
Referring to FIG. 2, a GaAs-based film manufacturing method according to another embodiment of the present invention includes a support substrate 11 that is dissolved in hydrofluoric acid and a single substrate disposed on the main surface 11 m side of the support substrate 11. A composite substrate 10 including a crystal film 13 and having a thermal expansion coefficient in the main surface 11m of the support substrate 11 larger than 0.8 times and smaller than 1.2 times compared to the thermal expansion coefficient of GaAs crystal is prepared. A step (FIG. 2A), a step of forming a GaAs-based film on the main surface 13m of the single crystal film 13 disposed on the main surface 11m side of the support substrate 11 (FIG. 2B), A step of removing the support substrate 11 by dissolving it in hydrofluoric acid (FIG. 2C). Here, the GaAs-based film refers to a film formed of a group III arsenide containing Ga as a group III element. For example, a Ga x In y Al 1-xy As film (x> 0, y ≧ 0, x + y ≦ 1).

本実施形態のGaAsN系膜の製造方法によれば、フッ化水素酸に溶解する支持基板11と、支持基板11の主面11m側に配置されている単結晶膜13と、を含み、支持基板11の主面11m内の熱膨張係数が、GaAs結晶の熱膨張係数に比べて、0.8倍より大きく1.2倍より小さい複合基板10を用いて、複合基板10の単結晶膜13の主面13m上にGaAs系膜20を成膜した後、複合基板10の支持基板11をフッ化水素酸に溶解して除去することにより、主面の面積が大きく反りが小さく結晶性が良好なGaAs系膜が効率よく低コストで得られる。   According to the method of manufacturing a GaAsN-based film of this embodiment, the support substrate includes the support substrate 11 that is dissolved in hydrofluoric acid and the single crystal film 13 that is disposed on the main surface 11m side of the support substrate 11. 11 using the composite substrate 10 having a thermal expansion coefficient in the main surface 11m of greater than 0.8 times and less than 1.2 times the thermal expansion coefficient of the GaAs crystal. After the GaAs-based film 20 is formed on the main surface 13m, the support substrate 11 of the composite substrate 10 is removed by dissolving in hydrofluoric acid, so that the area of the main surface is large, the warp is small, and the crystallinity is good. A GaAs-based film can be obtained efficiently and at low cost.

(複合基板の準備工程)
図2(A)を参照して、本実施形態のGaAsN系膜の製造方法は、まず、フッ化水素酸に溶解する支持基板11と、支持基板11の主面11m側に配置されている単結晶膜13と、を含み、支持基板11の主面11m内の熱膨張係数が、GaAs結晶の熱膨張係数に比べて、0.8倍より大きく1.2倍より小さい複合基板10を準備する工程を含む。
(Preparation process of composite substrate)
Referring to FIG. 2A, in the method of manufacturing a GaAsN-based film according to this embodiment, first, a support substrate 11 that is dissolved in hydrofluoric acid and a single substrate disposed on the main surface 11m side of the support substrate 11 are used. A composite substrate 10 including a crystal film 13 and having a thermal expansion coefficient in the main surface 11m of the support substrate 11 larger than 0.8 times and smaller than 1.2 times compared to the thermal expansion coefficient of GaAs crystal is prepared. Process.

上記の複合基板10は、支持基板11の主面11m内の熱膨張係数が、GaAs結晶の熱膨張係数に比べて、0.8倍より大きく1.2倍より小さい支持基板11と単結晶膜13を含んでいるため、単結晶膜13の主面13m上に主面の面積が大きく反りが小さく結晶性が良好なGaAs系膜を成膜することができる。また、上記の複合基板10は、支持基板11がフッ化水素酸に溶解するため、支持基板11を除去することにより、主面の面積が大きく反りが小さく結晶性が良好なGaAs系膜を効率よく低コストで取り出すことができる。   The composite substrate 10 has a support substrate 11 and a single crystal film having a thermal expansion coefficient in the main surface 11m of the support substrate 11 that is larger than 0.8 times and smaller than 1.2 times that of the GaAs crystal. 13 is included, a GaAs-based film having a large main surface area, a small warpage, and a good crystallinity can be formed on the main surface 13 m of the single crystal film 13. In the composite substrate 10 described above, since the support substrate 11 is dissolved in hydrofluoric acid, by removing the support substrate 11, a GaAs-based film having a large principal surface area, small warpage, and good crystallinity can be efficiently obtained. Can be taken out well at low cost.

また、複合基板10の支持基板11の主面11m側に単結晶膜13を配置する方法には、特に制限はなく、支持基板11の主面11m上に単結晶膜13を成長させる方法(第1の方法)、支持基板11の主面11mに、下地基板の主面上に成膜させた単結晶膜13を貼り合わせた後下地基板を除去する方法(第2の方法)、支持基板11の主面11mに単結晶(図示せず)を貼り合わせた後その単結晶を貼り合わせ面から所定の深さの面で分離することにより支持基板11の主面11m上に単結晶膜13を形成する方法(第3の方法)などが挙げられる。支持基板が多結晶の焼結体である場合には、上記の第1の方法が困難であるため、上記の第2および第3のいずれかの方法が好ましく用いられる。上記の第2の方法において、支持基板11に単結晶膜13を貼り合わせる方法には、特に制限はなく、支持基板11の主面11mに直接単結晶膜13を貼り合わせる方法、支持基板11の主面11mに接着層12を介在させて単結晶膜13を貼り合わせる方法などが挙げられる。上記の第3の方法において、支持基板11に単結晶を貼り合わせる方法には、特に制限はなく、支持基板11の主面11mに直接単結晶を貼り合わせる方法、支持基板11の主面11mに接着層12を介在させて単結晶を貼り合わせる方法などが挙げられる。   In addition, the method of disposing the single crystal film 13 on the main surface 11m side of the support substrate 11 of the composite substrate 10 is not particularly limited, and a method of growing the single crystal film 13 on the main surface 11m of the support substrate 11 (first step). 1), a method of removing the base substrate after bonding the single crystal film 13 formed on the main surface of the base substrate to the main surface 11m of the support substrate 11 (second method), and the support substrate 11 A single crystal (not shown) is bonded to the main surface 11m of the support substrate 11, and then the single crystal is separated from the bonded surface at a predetermined depth to form a single crystal film 13 on the main surface 11m of the support substrate 11. A forming method (third method) is exemplified. When the support substrate is a polycrystalline sintered body, the first method is difficult, and therefore any one of the second and third methods is preferably used. In the second method, the method for bonding the single crystal film 13 to the support substrate 11 is not particularly limited. The method for bonding the single crystal film 13 directly to the main surface 11m of the support substrate 11, Examples thereof include a method in which the single crystal film 13 is bonded to the main surface 11m with the adhesive layer 12 interposed. In the third method, the method for attaching the single crystal to the support substrate 11 is not particularly limited, and the method of attaching the single crystal directly to the main surface 11m of the support substrate 11 or the main surface 11m of the support substrate 11 may be used. Examples thereof include a method of bonding single crystals with the adhesive layer 12 interposed.

上記の複合基板10を準備する工程は、特に制限はないが、効率的に低コストで品質の高い複合基板10を準備する観点から、たとえば、図3を参照して、上記の第2の方法においては、支持基板11を準備するサブ工程(図3(A))と、下地基板30の主面30n上に単結晶膜13を成膜するサブ工程(図3(B))と、支持基板11と単結晶膜13とを貼り合わせるサブ工程(図3(C))と、下地基板30を除去するサブ工程(図3(D))と、含むことができる。   The step of preparing the composite substrate 10 is not particularly limited. From the viewpoint of efficiently preparing the composite substrate 10 with low cost and high quality, for example, the second method described above with reference to FIG. , A sub-process for preparing the support substrate 11 (FIG. 3A), a sub-process for forming the single crystal film 13 on the main surface 30n of the base substrate 30 (FIG. 3B), a support substrate, 11 and the single crystal film 13 (FIG. 3C) and a sub-process of removing the base substrate 30 (FIG. 3D).

図3(C)では、支持基板11と単結晶膜13とを貼り合わせるサブ工程において、支持基板11の主面11m上に接着層12aに形成し(図3(C1))、下地基板30の主面30n上に成長させられた単結晶膜13の主面13n上に接着層12bを形成した(図3(C2))後、支持基板11上に形成された接着層12aの主面12amと下地基板30上に成膜された単結晶膜13上に形成された接着層12bの主面12bnとを貼り合わせることにより、接着層12aと接着層12bとが接合して形成された接着層12を介在させて支持基板11と単結晶膜13とが貼り合わされる(図3(C3))。しかし、支持基板11と単結晶膜13とが互いに接合可能なものであれば、支持基板11と単結晶膜13とを、接着層12を介在させることなく直接貼り合わせることができる。   In FIG. 3C, in a sub-process for bonding the support substrate 11 and the single crystal film 13, an adhesive layer 12a is formed on the main surface 11m of the support substrate 11 (FIG. 3C1). After forming the adhesive layer 12b on the main surface 13n of the single crystal film 13 grown on the main surface 30n (FIG. 3C2), the main surface 12am of the adhesive layer 12a formed on the support substrate 11 The adhesive layer 12 formed by bonding the adhesive layer 12a and the adhesive layer 12b to each other by bonding the main surface 12bn of the adhesive layer 12b formed on the single crystal film 13 formed on the base substrate 30. The supporting substrate 11 and the single crystal film 13 are bonded to each other with the intervening layer (FIG. 3 (C3)). However, as long as the support substrate 11 and the single crystal film 13 can be bonded to each other, the support substrate 11 and the single crystal film 13 can be directly bonded together without the adhesive layer 12 interposed.

支持基板11と単結晶膜13とを貼り合わせる具体的な手法としては、特に制限はないが、貼り合わせ後高温でも接合強度を保持できる観点から、貼り合わせ面を洗浄しそのまま貼り合わせた後600℃〜1200℃程度に昇温して接合する直接接合法、貼り合わせ面を洗浄しプラズマやイオンなどで活性化させた後に室温(たとえば25℃)〜400℃程度の低温で接合する表面活性化法などが好ましく用いられる。   A specific method for bonding the support substrate 11 and the single crystal film 13 is not particularly limited, but from the viewpoint of maintaining the bonding strength even at a high temperature after bonding, the bonded surface is washed and bonded as it is. Direct bonding method in which bonding is performed by raising the temperature to about 1 to 1200 ° C., surface activation for bonding at a low temperature of about room temperature (for example, 25 ° C.) to about 400 ° C. after cleaning the bonded surfaces and activating them with plasma or ions. The method is preferably used.

こうして得られる複合基板10において、支持基板11、単結晶膜13および接着層12の材料および物性については、上述の通りであるため、ここでは繰り返さない。   In the composite substrate 10 thus obtained, the materials and physical properties of the support substrate 11, the single crystal film 13, and the adhesive layer 12 are as described above, and thus are not repeated here.

(GaAs系膜の成膜工程)
図2(B)を参照して、本実施形態のGaAs系膜の製造方法は、次に、複合基板10における単結晶膜13の主面13m上にGaAs系膜20を成膜する工程を含む。
(Deposition process of GaAs film)
With reference to FIG. 2B, the method for manufacturing a GaAs-based film according to this embodiment includes a step of forming a GaAs-based film 20 on the main surface 13 m of the single crystal film 13 in the composite substrate 10. .

上記の複合基板の準備工程において準備された複合基板10は、支持基板11の主面11m内の熱膨張係数が、GaAs結晶の熱膨張係数に比べて、0.8倍より大きく1.2倍より小さい支持基板11と単結晶膜13を含んでいるため、単結晶膜13の主面13m上に主面20mの面積が大きく反りが小さく結晶性が良好なGaAs系膜20を成膜することができる。   In the composite substrate 10 prepared in the composite substrate preparation step, the thermal expansion coefficient in the main surface 11m of the support substrate 11 is larger than 0.8 times and 1.2 times larger than the thermal expansion coefficient of the GaAs crystal. Since the smaller supporting substrate 11 and the single crystal film 13 are included, the GaAs-based film 20 having a large area of the main surface 20m, a small warpage, and good crystallinity is formed on the main surface 13m of the single crystal film 13. Can do.

GaAs系膜を成膜する方法には、特に制限はないが、転位密度が低く結晶性の良好なGaAs系膜を成膜する観点から、MOCVD(有機金属化学気相堆積)法、MBE(分子線エピタキシ)法などの気相法、HB(水平ブリッジマン)法、VB(垂直ブリッジマン)法、LEC(液体封止チョクラルスキー)法などの液相法などが好ましく挙げられる。   The method for forming a GaAs film is not particularly limited, but from the viewpoint of forming a GaAs film having a low dislocation density and good crystallinity, MOCVD (metal organic chemical vapor deposition), MBE (molecular Preferred examples include gas phase methods such as a line epitaxy method, liquid phase methods such as an HB (horizontal Bridgman) method, a VB (vertical Bridgman) method, and an LEC (liquid sealing Czochralski) method.

GaAs系膜を成膜する工程は、特に制限はないが、転位密度が低く結晶性が良好なGaAs系膜を成膜する観点から、複合基板10の単結晶膜13の主面13m上にGaAs系バッファ層21を形成するサブ工程と、GaAs系バッファ層21の主面21m上にGaAs系単結晶層23を形成するサブ工程と、を含むことが好ましい。ここで、GaAs系バッファ層21とは、GaAs系膜20の一部分であり、GaAs系膜20の別の一部分であるGaAs系単結晶層23の成長温度に比べて低い温度で成長させられる結晶性が低いまたは非結晶の層をいう。   The step of forming the GaAs film is not particularly limited, but from the viewpoint of forming a GaAs film having a low dislocation density and good crystallinity, GaAs is formed on the main surface 13m of the single crystal film 13 of the composite substrate 10. It is preferable to include a sub-process for forming the system buffer layer 21 and a sub-process for forming the GaAs single crystal layer 23 on the main surface 21 m of the GaAs buffer layer 21. Here, the GaAs-based buffer layer 21 is a part of the GaAs-based film 20 and has a crystallinity that can be grown at a temperature lower than the growth temperature of the GaAs-based single crystal layer 23 that is another part of the GaAs-based film 20. Refers to a low or amorphous layer.

GaAs系バッファ層21を形成することにより、GaAs系バッファ層21上に形成されるGaAs系単結晶層23と単結晶膜13との間の格子定数の不整合が緩和されるため、GaAs系単結晶層23の結晶性が向上しその転位密度が低くなる。この結果、GaAs系膜20の結晶性が向上しその転位密度が低くなる。   By forming the GaAs buffer layer 21, the lattice constant mismatch between the GaAs single crystal layer 23 and the single crystal film 13 formed on the GaAs buffer layer 21 is relaxed. The crystallinity of the crystal layer 23 is improved and the dislocation density is lowered. As a result, the crystallinity of the GaAs-based film 20 is improved and the dislocation density is lowered.

なお、単結晶膜13上にGaAs系膜20として、GaAs系バッファ層21を成長させることなく、GaAs系単結晶層23を成長させることもできる。かかる方法は、単結晶膜13とその上に成膜するGaAs系膜20との間の格子定数の不整合が小さい場合に好適である。   Note that the GaAs-based single crystal layer 23 can be grown as the GaAs-based film 20 on the single-crystal film 13 without growing the GaAs-based buffer layer 21. Such a method is suitable when the mismatch of the lattice constant between the single crystal film 13 and the GaAs-based film 20 formed thereon is small.

(支持基板の除去工程)
図2(C)を参照して、本実施形態のGaAs系膜の製造方法は、次に、支持基板11を、フッ化水素酸に溶解することにより、除去する工程を含む。
(Support substrate removal process)
Referring to FIG. 2C, the method of manufacturing a GaAs-based film according to this embodiment includes a step of removing the support substrate 11 by dissolving it in hydrofluoric acid.

上記の複合基板の準備工程において準備された複合基板10は、支持基板11がフッ化水素酸に溶解するため、フッ化水素酸に溶解させて支持基板11を除去することにより、単結晶膜13の主面13m上に成膜された主面20mの面積が大きく反りが小さく結晶性が良好なGaAs系膜20が得られる。ここで、単結晶膜13がGaAs単結晶膜などのGaAs系単結晶膜で形成されている場合には、全体がGaAs系材料で形成されているGaAs系膜が得られる。   Since the support substrate 11 is dissolved in hydrofluoric acid, the composite substrate 10 prepared in the above-described composite substrate preparation step is dissolved in hydrofluoric acid to remove the support substrate 11, thereby removing the single crystal film 13. Thus, a GaAs-based film 20 having a large area of the main surface 20m formed on the main surface 13m and a small warpage and good crystallinity is obtained. Here, when the single crystal film 13 is formed of a GaAs single crystal film such as a GaAs single crystal film, a GaAs film that is entirely formed of a GaAs material is obtained.

(実施例1)
1.GaAs結晶の熱膨張係数の測定
VB法により成長させた、転位密度が1×106cm-2、Si濃度が1×1018cm-2、酸素濃度が1×1017cm-2、炭素濃度が1×1016cm-2のGaAs単結晶から、サイズが2×2×20mmの評価用サンプルを切り出した。ここで、GaAs単結晶は熱膨張係数に関して方向特異性がないため、切り出し方向は任意とした。
Example 1
1. Measurement of thermal expansion coefficient of GaAs crystal Dislocation density 1 × 10 6 cm −2 , Si concentration 1 × 10 18 cm −2 , oxygen concentration 1 × 10 17 cm −2 , carbon concentration grown by VB method A sample for evaluation having a size of 2 × 2 × 20 mm was cut out from a GaAs single crystal having a size of 1 × 10 16 cm −2 . Here, since the GaAs single crystal has no direction specificity with respect to the thermal expansion coefficient, the cutting direction was arbitrary.

上記の評価用サンプルについて、室温(25℃)から1000℃まで昇温したときの平均熱膨張係数をTMA(熱機械分析)により測定した。具体的には、(株)リガク製TMA8310を用いて示差膨張方式により窒素ガス流通雰囲気下で評価サンプルの熱膨張係数を測定した。かかる測定により得られたGaAs結晶の25℃から1000℃までにおける平均熱膨張係数αGaAsは、5.84×10-6/℃であった。 About said sample for evaluation, the average thermal expansion coefficient when it heated up from room temperature (25 degreeC) to 1000 degreeC was measured by TMA (thermomechanical analysis). Specifically, the thermal expansion coefficient of the evaluation sample was measured in a nitrogen gas flow atmosphere by a differential expansion method using TMA8310 manufactured by Rigaku Corporation. The average thermal expansion coefficient α GaAs from 25 ° C. to 1000 ° C. of the GaAs crystal obtained by such measurement was 5.84 × 10 −6 / ° C.

2.複合基板の準備工程
(1)支持基板を準備するサブ工程
図3(A)を参照して、支持基板11の材料として、ZrO2とSiO2との所定のモル比の混合物をアルゴンガス雰囲気下一軸方向に50MPaの圧力をかけて1700℃で1時間焼結させることにより、13種類のZrO2−SiO2系焼結体A〜Mを準備した。かかる13種類のZrO2−SiO2系焼結体A〜Mには、X線回折により確認したところ、いずれについてもZrSiO4、ZrO2およびSiO2が存在していた。また、上記13種類のZrO2−SiO2系焼結体のそれぞれからサイズが2×2×20mm(長手方向は焼結体から切り出される支持基板の主面に実質的に平行な方向)の測定用サンプルを切り出した。ここで、ZrO2−SiO2系焼結体は熱膨張係数に関して方向特異性がないため、切り出し方向は任意とした。それらの測定用サンプルについて、上記と同様にして、室温(25℃)から1000℃まで昇温下時の平均熱膨張係数αSを測定した。
2. Step of preparing composite substrate (1) Sub-step of preparing support substrate Referring to FIG. 3 (A), as a material of support substrate 11, a mixture of ZrO 2 and SiO 2 in a predetermined molar ratio is placed in an argon gas atmosphere. Thirteen types of ZrO 2 —SiO 2 sintered bodies A to M were prepared by sintering at 1700 ° C. for 1 hour under a pressure of 50 MPa in a uniaxial direction. These 13 types of ZrO 2 —SiO 2 sintered bodies A to M were confirmed by X-ray diffraction. As a result, ZrSiO 4 , ZrO 2 and SiO 2 were present in all of them. Further, each of the 13 types of ZrO 2 —SiO 2 sintered bodies has a size of 2 × 2 × 20 mm (the longitudinal direction is a direction substantially parallel to the main surface of the support substrate cut out from the sintered body). A sample was cut out. Here, since the ZrO 2 —SiO 2 sintered body has no direction specificity with respect to the coefficient of thermal expansion, the cutting direction was arbitrary. With respect to these measurement samples, the average thermal expansion coefficient α S when the temperature was raised from room temperature (25 ° C.) to 1000 ° C. was measured in the same manner as described above.

ZrO2−SiO2系焼結体Aは、ZrO2とSiO2とのモル比(以下、モル比ZrO2:SiO2という)が82:18であり、25℃から1000℃までにおける平均熱膨張係数αS(以下、単に平均熱膨張係数αSという)は4.25×10-6/℃であり、GaAs結晶の平均熱膨張係数αGaAsに対する焼結体の熱膨張係数αSの比(以下、αS/αGaAs比という)は0.728であった。ZrO2−SiO2系焼結体Bは、モル比ZrO2:SiO2が77:23であり、平均熱膨張係数αSが4.75×10-6/℃であり、αS/αGaAs比が0.813であった。ZrO2−SiO2系焼結体Cは、モル比ZrO2:SiO2が71:29であり、平均熱膨張係数αSが5.00×10-6/℃であり、αS/αGaAs比が0.856であった。ZrO2−SiO2系焼結体Dは、モル比ZrO2:SiO2は69:31であり、平均熱膨張係数αSが5.20×10-6/℃であり、αS/αGaAs比が0.890であった。ZrO2−SiO2系焼結体Eは、モル比ZrO2:SiO2が66:34であり、平均熱膨張係数αSが5.40×10-6/℃であり、αS/αGaAs比が0.925であった。ZrO2−SiO2系焼結体Fは、モル比ZrO2:SiO2が63:37であり、平均熱膨張係数αSが5.60×10-6/℃であり、αS/αGaAs比が0.959であった。ZrO2−SiO2系焼結体Gは、モル比ZrO2:SiO2が58:42であり、平均熱膨張係数αSが5.80×10-6/℃であり、αS/αGaAs比が0.993であった。ZrO2−SiO2系焼結体Hは、モル比ZrO2:SiO2が57:43であり、平均熱膨張係数αSが6.00×10-6/℃であり、αS/αGaAs比が1.027であった。ZrO2−SiO2系焼結体Iは、モル比ZrO2:SiO2が53:47であり、平均熱膨張係数αSが6.33×10-6/℃であり、αS/αGaAs比が1.084であった。ZrO2−SiO2系焼結体Jは、モル比ZrO2:SiO2が46:54であり、平均熱膨張係数αSが6.67×10-6/℃であり、αS/αGaAs比が1.142であった。ZrO2−SiO2系焼結体Kは、モル比ZrO2:SiO2が42:58であり、平均熱膨張係数αSが7.00×10-6/℃であり、αS/αGaAs比が1.199であった。ZrO2−SiO2系焼結体Lは、モル比ZrO2:SiO2が38:62であり、平均熱膨張係数αSが7.25×10-6/℃であり、αS/αGaAs比が1.241であった。ZrO2−SiO2系焼結体Mは、モル比ZrO2:SiO2が35:65であり、平均熱膨張係数αSが7.50×10-6/℃であり、αS/αGaAs比が1.284であった。 The ZrO 2 —SiO 2 sintered body A has a molar ratio of ZrO 2 to SiO 2 (hereinafter referred to as a molar ratio ZrO 2 : SiO 2 ) of 82:18, and an average thermal expansion from 25 ° C. to 1000 ° C. The coefficient α S (hereinafter simply referred to as the average thermal expansion coefficient α S ) is 4.25 × 10 −6 / ° C., and the ratio of the thermal expansion coefficient α S of the sintered body to the average thermal expansion coefficient α GaAs of the GaAs crystal ( (Hereinafter referred to as α S / α GaAs ratio) was 0.728. The ZrO 2 —SiO 2 sintered body B has a molar ratio ZrO 2 : SiO 2 of 77:23, an average coefficient of thermal expansion α S of 4.75 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.813. The ZrO 2 —SiO 2 based sintered body C has a molar ratio ZrO 2 : SiO 2 of 71:29, an average thermal expansion coefficient α S of 5.00 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.856. The ZrO 2 —SiO 2 sintered body D has a molar ratio ZrO 2 : SiO 2 of 69:31, an average coefficient of thermal expansion α S of 5.20 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.890. The ZrO 2 —SiO 2 sintered body E has a molar ratio ZrO 2 : SiO 2 of 66:34, an average thermal expansion coefficient α S of 5.40 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.925. The ZrO 2 —SiO 2 based sintered body F has a molar ratio ZrO 2 : SiO 2 of 63:37, an average thermal expansion coefficient α S of 5.60 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.959. The ZrO 2 —SiO 2 based sintered body G has a molar ratio ZrO 2 : SiO 2 of 58:42, an average thermal expansion coefficient α S of 5.80 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.993. The ZrO 2 —SiO 2 based sintered body H has a molar ratio ZrO 2 : SiO 2 of 57:43, an average thermal expansion coefficient α S of 6.00 × 10 −6 / ° C., and α S / α GaAs. The ratio was 1.027. The ZrO 2 —SiO 2 sintered body I has a molar ratio ZrO 2 : SiO 2 of 53:47, an average coefficient of thermal expansion α S of 6.33 × 10 −6 / ° C., and α S / α GaAs. The ratio was 1.084. The ZrO 2 —SiO 2 based sintered body J has a molar ratio ZrO 2 : SiO 2 of 46:54, an average thermal expansion coefficient α S of 6.67 × 10 −6 / ° C., and α S / α GaAs. The ratio was 1.142. The ZrO 2 —SiO 2 based sintered body K has a molar ratio ZrO 2 : SiO 2 of 42:58, an average thermal expansion coefficient α S of 7.00 × 10 −6 / ° C., and α S / α GaAs. The ratio was 1.199. The ZrO 2 —SiO 2 sintered body L has a molar ratio ZrO 2 : SiO 2 of 38:62, an average coefficient of thermal expansion α S of 7.25 × 10 −6 / ° C., and α S / α GaAs. The ratio was 1.241. The ZrO 2 —SiO 2 based sintered body M has a molar ratio ZrO 2 : SiO 2 of 35:65, an average thermal expansion coefficient α S of 7.50 × 10 −6 / ° C., and α S / α GaAs. The ratio was 1.284.

上記のZrO2−SiO2系焼結体A〜Mから、直径4インチ(101.6mm)で厚さ1mmの支持基板をそれぞれ切り出して、それぞれの支持基板の両主面を鏡面に研磨して、支持基板A〜Mとした。すなわち、支持基板A〜Mの25℃から1000℃までにおける平均熱膨張係数は、それぞれZrO2−SiO2系焼結体A〜Mの25℃から1000℃までにおける平均熱膨張係数に等しい。結果を表1にまとめた。 From the ZrO 2 —SiO 2 based sintered bodies A to M, a support substrate having a diameter of 4 inches (101.6 mm) and a thickness of 1 mm was cut out, and both main surfaces of each support substrate were polished into mirror surfaces. The supporting substrates A to M were used. That is, the average thermal expansion coefficients of the support substrates A to M from 25 ° C. to 1000 ° C. are equal to the average thermal expansion coefficients of the ZrO 2 —SiO 2 based sintered bodies A to M from 25 ° C. to 1000 ° C., respectively. The results are summarized in Table 1.

(2)下地基板上に単結晶膜を成膜するサブ工程
図3(B)を参照して、下地基板30として、鏡面に研磨された(001)面の主面30nを有する直径5インチ(127mm)で厚さ0.5mmのSi基板を準備した。
(2) Sub-Process for Forming Single Crystal Film on Base Substrate With reference to FIG. 3B, the base substrate 30 has a main surface 30n of (001) surface polished to a mirror surface and has a diameter of 5 inches ( 127 mm) and a 0.5 mm thick Si substrate was prepared.

上記のSi基板(下地基板30)の主面30n上に、単結晶膜13として厚さ0.4μmのGaAs膜をMOCVD法により成膜した。成膜条件は、原料ガスとしてTMG(トリメチルガリウム)ガスおよびAsH3(アルシン)ガスを使用し、キャリアガスとしてH2ガスを使用し、成膜温度(基板温度)620℃、成膜圧力は1気圧とした。なお、こうして得られたGaAs膜(単結晶膜13)の主面13mは、(001)面からのオフ角が±1°以内の面方位を有し、AFM(原子間力顕微鏡)を用いて測定した10μm×10μmの正方形領域におけるRMS(二乗平均平方根)粗さ(JIS B0601:2001に規定する二乗平均平方根粗さRqをいう。以下同じ)が1nm以下の鏡面であった。 A GaAs film having a thickness of 0.4 μm was formed as the single crystal film 13 on the main surface 30n of the Si substrate (underlying substrate 30) by the MOCVD method. The film formation conditions are as follows: TMG (trimethylgallium) gas and AsH 3 (arsine) gas are used as the source gas, H 2 gas is used as the carrier gas, the film formation temperature (substrate temperature) is 620 ° C., and the film formation pressure is 1 Atmospheric pressure. The main surface 13m of the GaAs film (single crystal film 13) obtained in this way has a plane orientation whose off angle from the (001) plane is within ± 1 °, and using an AFM (atomic force microscope). The RMS (root mean square) roughness (referred to the root mean square roughness Rq defined in JIS B0601: 2001, hereinafter the same) in a 10 μm × 10 μm square area was a mirror surface of 1 nm or less.

(3)支持基板と単結晶膜とを貼り合わせるサブ工程
図3(C)中の(C1)を参照して、図3(A)の支持基板A〜M(支持基板11)のそれぞれの主面11m上に厚さ2μmのSiO2膜をCVD(化学気相堆積)法により成膜した。次いで、支持基板A〜M(支持基板11)のそれぞれの主面11m上の厚さ2μmのSiO2膜を、CeO2スラリーを用いて研磨することにより、厚さ0.2μmのSiO2層だけ残存させて、接着層12aとした。これにより、支持基板A〜M(支持基板11)のそれぞれの主面11mの空隙が埋められ、平坦な主面12amを有する厚さ0.2μmのSiO2層(接着層12a)が得られた。
(3) Sub-process for bonding support substrate and single crystal film Referring to (C1) in FIG. 3 (C), each of the main substrates A to M (support substrate 11) in FIG. 3 (A) A SiO 2 film having a thickness of 2 μm was formed on the surface 11 m by a CVD (chemical vapor deposition) method. Next, the SiO 2 film having a thickness of 2 μm on each main surface 11m of the support substrates A to M (support substrate 11) is polished by using CeO 2 slurry, so that only the SiO 2 layer having a thickness of 0.2 μm is obtained. The adhesive layer 12a was made to remain. Thus, the gap is filled in each of the main surfaces 11m of the supporting substrate A to M (support substrate 11), SiO 2 layer having a thickness of 0.2μm having a flat main surface 12am (adhesive layer 12a) was obtained .

また、図3(C)中の(C2)を参照して、図3(B)のSi基板(下地基板30)上に成膜されたGaAs膜(単結晶膜13)の主面13n上に厚さ2μmのSiO2膜をCVD法により成膜した。次いで、この厚さ2μmのSiO2膜を、CeO2スラリーを用いて研磨することにより、厚さ0.2μmのSiO2層だけ残存させて、接着層12bとした。 Further, referring to (C2) in FIG. 3C, on the main surface 13n of the GaAs film (single crystal film 13) formed on the Si substrate (underlying substrate 30) in FIG. 3B. A SiO 2 film having a thickness of 2 μm was formed by a CVD method. Next, this SiO 2 film having a thickness of 2 μm was polished using a CeO 2 slurry, so that only the SiO 2 layer having a thickness of 0.2 μm was left to form an adhesive layer 12b.

次いで、図3(C)中の(C3)を参照して、支持基板A〜M(支持基板11)のそれぞれに形成されたSiO2層(接着層12a)の主面12amおよびSi基板(下地基板30)上に成膜されたGaAs膜(単結晶膜13)上に形成されたSiO2層(接着層12b)の主面12bnをアルゴンプラズマにより清浄化および活性化させた後、SiO2層(接着層12a)の主面12amとSiO2層(接着層12b)の主面12bnとを貼り合わせて、窒素雰囲気下300℃で2時間熱処理した。 Next, referring to (C3) in FIG. 3C, the main surface 12am of the SiO 2 layer (adhesive layer 12a) and the Si substrate (underlayer) formed on each of the support substrates A to M (support substrate 11). The main surface 12bn of the SiO 2 layer (adhesive layer 12b) formed on the GaAs film (single crystal film 13) formed on the substrate 30) is cleaned and activated by argon plasma, and then the SiO 2 layer The main surface 12am of the (adhesive layer 12a) and the main surface 12bn of the SiO 2 layer (adhesive layer 12b) were bonded together and heat-treated at 300 ° C. for 2 hours in a nitrogen atmosphere.

(4)下地基板を除去するサブ工程
図3(D)を参照して、支持基板A〜M(支持基板11)の裏側(単結晶膜13が貼り合わされていない側)の主面および側面をワックス40で覆って保護した後、10質量%のフッ化水素酸および3質量%の硝酸を含む混酸水溶液を用いて、エッチングによりSi基板(下地基板30)を除去した。こうして、図2(A)に示すように、支持基板A〜M(支持基板11)のそれぞれの主面11m側にGaAs膜(単結晶膜13)が配置された複合基板A〜M(複合基板10)が得られた。
(4) Sub-process for removing base substrate Referring to FIG. 3D, the main surface and side surfaces of the back side (side on which single crystal film 13 is not bonded) of support substrates A to M (support substrate 11) are After covering and protecting with wax 40, the Si substrate (underlying substrate 30) was removed by etching using a mixed acid aqueous solution containing 10% by mass of hydrofluoric acid and 3% by mass of nitric acid. Thus, as shown in FIG. 2A, composite substrates A to M (composite substrates) in which GaAs films (single crystal films 13) are arranged on the main surfaces 11m side of the support substrates A to M (support substrate 11). 10) was obtained.

3.GaAs系膜の成膜工程
図2(B)を参照して、複合基板A〜M(複合基板10)のGaAs膜(単結晶膜13)の主面13m(かかる主面は(001)面である。)上に、それぞれMOCVD法によりGaAs膜(GaAs系膜20)を成膜した。GaAs膜(GaAs系膜20)の成膜においては、成膜条件は、原料ガスとしてTMG(トリメチルガリウム)ガスおよびAsH3(アルシン)ガスを使用し、キャリアガスとしてH2ガスを使用し、成膜温度(基板温度)680℃で厚さ5μmのGaAs単結晶層(GaAs系単結晶層23)を成長させた。ここで、GaAs単結晶層の成長速度は1μm/hrであった。その後、複合基板A〜MのそれぞれにGaAs膜が成膜されたウエハA〜Mを10℃/minの速度で室温(25℃)まで冷却した。
3. GaAs film formation process Referring to FIG. 2B, the main surface 13m of the GaAs film (single crystal film 13) of the composite substrate A to M (composite substrate 10) (the main surface is the (001) surface). A GaAs film (GaAs-based film 20) was formed on each of them by MOCVD. In the formation of a GaAs film (GaAs-based film 20), the film formation conditions are as follows: TMG (trimethylgallium) gas and AsH 3 (arsine) gas are used as the source gas, and H 2 gas is used as the carrier gas. A GaAs single crystal layer (GaAs single crystal layer 23) having a thickness of 5 μm was grown at a film temperature (substrate temperature) of 680 ° C. Here, the growth rate of the GaAs single crystal layer was 1 μm / hr. Thereafter, the wafers A to M each having a GaAs film formed on each of the composite substrates A to M were cooled to room temperature (25 ° C.) at a rate of 10 ° C./min.

室温まで冷却後に成膜装置から取り出されたウエハA〜Mについて、ウエハの反り、GaAs膜のクラック本数密度および転位密度を測定した。ここで、ウエハの反りの形状および反り量は、GaAs膜の主面をCorning Tropel社のFM200EWaferを用いて観察される光干渉縞により測定した。GaAsN膜のクラック本数密度は、ノマルスキー顕微鏡を用いて単位長さ当りのクラック本数を測定し、1本/mm未満を「極少」、1本/mm以上5本/mm未満を「少」、5本/mm以上10本/mm未満を「多」、10本/mm以上を「極多」と評価した。GaAs膜の転位密度は、L(カソードルミネッセンス)による暗点の単位面積当たりの個数を測定した。なお、本実施例においてGaAs膜に発生したクラックは、膜を貫通しない微小なものであった。   For wafers A to M taken out from the film forming apparatus after cooling to room temperature, the warpage of the wafer, the number of cracks in the GaAs film and the dislocation density were measured. Here, the shape and amount of warpage of the wafer were measured by optical interference fringes observed on the main surface of the GaAs film using a Corning Tropel FM200EWafer. The number of cracks in the GaAsN film is determined by measuring the number of cracks per unit length using a Nomarski microscope. “Less” is less than 1 / mm, “Less” is 5 or less than 5 / mm. The book / mm or more and less than 10 / mm was evaluated as “many”, and the book / mm or more was evaluated as “very many”. The dislocation density of the GaAs film was measured by the number of dark spots per unit area due to L (cathode luminescence). In this example, cracks generated in the GaAs film were minute ones that did not penetrate the film.

ウエハAは、GaAs膜側が凹状に反り、反り量が680μmであり、GaAs膜のクラック本数密度が極多であった。ウエハBは、GaAs膜側が凹状に反り、反り量が630μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が4×104cm-2であった。ウエハCは、GaAs膜側が凹状に反り、反り量が500μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が3×104cm-2であった。ウエハDは、GaAs膜側が凹状に反り、反り量が400μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が2.5×104cm-2であった。ウエハEは、GaAs膜側が凹状に反り、反り量が350μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が2×104cm-2であった。ウエハFは、GaAs膜側が凹状に反り、反り量が230μmであり、GaAs膜のクラック本数密度が極少であり、GaAs膜の転位密度が1×104cm-2であった。ウエハGは、GaAs膜側が凹状に反り、反り量が150μmであり、GaAs膜のクラック本数密度が極少であり、GaAs膜の転位密度が1×104cm-2であった。ウエハHは、GaAs膜側が凹状に反り、反り量が10μmであり、GaAs膜のクラック本数密度が極少であり、GaAs膜の転位密度が1×104cm-2であった。ウエハIは、GaAs膜側が凸状に反り、反り量が15μmであり、GaAs膜のクラック本数密度が極少であり、GaAs膜の転位密度が1×104cm-2であった。ウエハJは、GaAs膜側が凸状に反り、反り量が120μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が2×104cm-2であった。ウエハKは、GaAs膜側が凸状に反り、反り量が230μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が3×104cm-2であった。ウエハLは、GaAs膜側が凸状に反り、反り量が745μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が4×104cm-2であった。ウエハMは、支持基板に割れが発生し、十分なGaAs膜が得られなかった。これらの結果を表1にまとめた。表1において、「−」は、その物性値が未測定であることを示す。 The wafer A warped in a concave shape on the GaAs film side, the amount of warpage was 680 μm, and the number of cracks in the GaAs film was extremely large. The wafer B warped in a concave shape on the GaAs film side, the warpage amount was 630 μm, the crack number density of the GaAs film was small, and the dislocation density of the GaAs film was 4 × 10 4 cm −2 . The wafer C warped in a concave shape on the GaAs film side, the warpage amount was 500 μm, the number of cracks in the GaAs film was small, and the dislocation density of the GaAs film was 3 × 10 4 cm −2 . The wafer D was warped concavely on the GaAs film side, the warpage amount was 400 μm, the crack number density of the GaAs film was small, and the dislocation density of the GaAs film was 2.5 × 10 4 cm −2 . The wafer E warped in a concave shape on the GaAs film side, the warpage amount was 350 μm, the crack number density of the GaAs film was small, and the dislocation density of the GaAs film was 2 × 10 4 cm −2 . The wafer F warped in a concave shape on the GaAs film side, the warpage amount was 230 μm, the crack number density of the GaAs film was extremely small, and the dislocation density of the GaAs film was 1 × 10 4 cm −2 . The wafer G was warped concavely on the GaAs film side, the warpage amount was 150 μm, the crack number density of the GaAs film was extremely small, and the dislocation density of the GaAs film was 1 × 10 4 cm −2 . The wafer H warped in a concave shape on the GaAs film side, the warpage amount was 10 μm, the crack number density of the GaAs film was extremely small, and the dislocation density of the GaAs film was 1 × 10 4 cm −2 . The wafer I was warped convexly on the GaAs film side, the warpage amount was 15 μm, the crack number density of the GaAs film was extremely small, and the dislocation density of the GaAs film was 1 × 10 4 cm −2 . The wafer J warped in a convex shape on the GaAs film side, the warpage amount was 120 μm, the crack number density of the GaAs film was small, and the dislocation density of the GaAs film was 2 × 10 4 cm −2 . The wafer K was warped convexly on the GaAs film side, the warpage amount was 230 μm, the crack number density of the GaAs film was small, and the dislocation density of the GaAs film was 3 × 10 4 cm −2 . The wafer L was warped convexly on the GaAs film side, the amount of warpage was 745 μm, the number of cracks in the GaAs film was small, and the dislocation density of the GaAs film was 4 × 10 4 cm −2 . The wafer M was cracked in the support substrate, and a sufficient GaAs film could not be obtained. These results are summarized in Table 1. In Table 1, “-” indicates that the physical property value is not measured.

4.支持基板の除去工程
図2(C)を参照して、上記で得られたウエハA〜Lを、10質量%のフッ化水素酸水溶液に浸漬することにより、支持基板A〜L(支持基板11)およびSiO2層を溶解させることにより除去して、GaAs単結晶膜(単結晶膜13)の主面13m上に成膜されたGaAs膜A〜L(GaAs系膜20)が得られた。なお、ウエハA〜Lから支持基板A〜LおよびSiO2層が除去されたGaAs膜A〜L(GaAs系膜20)においても反りがCorning Tropel社のFM200EWaferを用いて観察される光干渉縞による測定により認められ、GaAs膜A〜Lの反りの大小関係には、ウエハA〜Lにおける反りの大小関係が維持されていた。
4). Step of removing support substrate Referring to FIG. 2C, wafers A to L obtained above are immersed in a 10% by mass hydrofluoric acid aqueous solution, thereby supporting substrates A to L (support substrate 11). ) And the SiO 2 layer were removed by dissolution to obtain GaAs films A to L (GaAs-based film 20) formed on the main surface 13m of the GaAs single crystal film (single crystal film 13). It should be noted that warpage is also observed in the GaAs films A to L (GaAs-based film 20) from which the supporting substrates A to L and the SiO 2 layer are removed from the wafers A to L due to optical interference fringes observed using the Corning Tropel FM200EWafer. The magnitude relation of the warpage of the GaAs films A to L was maintained by the measurement, and the magnitude relation of the warpage in the wafers A to L was maintained.

Figure 2013116848
Figure 2013116848

表1を参照して、主面内の熱膨張係数αSがGaAs結晶の熱膨張係数αGaAsの0.8倍より大きく1.2倍より小さい(すなわち、0.8<(αS/αGaAs比)<1.2)支持基板を有する複合基板を用いることにより(ウエハB〜K)、反り小さく転位密度が低く結晶性の良好なGaAs膜を成膜することができた。また、GaAs膜の反りおよび転位密度をさらに低減する観点から、複合基板の支持基板の主面内の熱膨張係数αSは、GaAs結晶の熱膨張係数αGaAsの0.9倍より大きく1.15倍より小さいこと(すなわち、0.9<(αS/αGaAs比)<1.15)(ウエハE〜J)が好ましく、GaAs結晶の熱膨張係数αGaAsの0.95倍より大きく1.1倍より小さいこと(すなわち、0.95<(αS/αGaAs比)<1.1)(ウエハF〜I)がより好ましい。 Referring to Table 1, the thermal expansion coefficient α S in the main surface is larger than 0.8 times and smaller than 1.2 times the thermal expansion coefficient α GaAs of the GaAs crystal (that is, 0.8 <(α S / α GaAs ratio) <1.2) By using a composite substrate having a supporting substrate (wafers B to K), a GaAs film having low warpage, low dislocation density, and good crystallinity could be formed. Further, from the viewpoint of further reducing the warpage and dislocation density of the GaAs film, the thermal expansion coefficient alpha S in the main surface of the supporting substrate of the composite substrate is greater than 0.9 times the thermal expansion coefficient alpha GaAs of GaAs crystal 1. It is preferably less than 15 times (that is, 0.9 <(α S / α GaAs ratio) <1.15) (wafers E to J), and the thermal expansion coefficient of GaAs crystal is larger than 0.95 times that of α GaAs and is 1 It is more preferable that the ratio is smaller than 1 time (that is, 0.95 <(α S / α GaAs ratio) <1.1) (wafers F to I).

(実施例2)
1.GaAs結晶の熱膨張係数の測定
実施例1と同様に測定したところ、GaAs結晶の25℃から1000℃までにおける平均熱膨張係数αGaAsは、5.84×10-6/℃であった。
(Example 2)
1. Measurement of Thermal Expansion Coefficient of GaAs Crystal When measured in the same manner as in Example 1, the average thermal expansion coefficient α GaAs from 25 ° C. to 1000 ° C. of the GaAs crystal was 5.84 × 10 −6 / ° C.

2.複合基板の準備工程
(1)支持基板を準備するサブ工程
図3(A)を参照して、支持基板11の材料として、ムライトとYSZ(YSZにおけるY23含有率は30モル%)との所定のモル比の混合物をアルゴンガス雰囲気下一軸方向に50MPaの圧力をかけて1700℃で1時間焼結させることにより、13種類のムライト−YSZ系焼結体A〜Mを準備した。また、上記13種類のムライト−YSZ系焼結体のそれぞれからサイズが4×4×20mm(長手方向は焼結体から切り出される支持基板の主面に実質的に平行な方向)の測定用サンプルを切り出した。ここで、ムライト−YSZ系焼結体は熱膨張係数に関して方向特異性がないため、切り出し方向は任意とした。それらの測定用サンプルについて、上記と同様にして、室温(25℃)から1000℃まで昇温下時の平均熱膨張係数αSを測定した。
2. Preparation Step of Composite Substrate (1) Sub-Step of Preparing Support Substrate Referring to FIG. 3 (A), as a material for the support substrate 11, mullite and YSZ (Y 2 O 3 content in YSZ is 30 mol%) 13 types of mullite-YSZ-based sintered bodies A to M were prepared by sintering a mixture having a predetermined molar ratio of 50 MPa in a uniaxial direction under an argon gas atmosphere at 1700 ° C. for 1 hour. Further, each of the 13 types of mullite-YSZ sintered bodies has a size of 4 × 4 × 20 mm (longitudinal direction is a direction substantially parallel to the main surface of the support substrate cut out from the sintered body). Was cut out. Here, since the mullite-YSZ sintered body has no direction specificity with respect to the thermal expansion coefficient, the cutting direction was arbitrary. With respect to these measurement samples, the average thermal expansion coefficient α S when the temperature was raised from room temperature (25 ° C.) to 1000 ° C. was measured in the same manner as described above.

ムライト−YSZ系焼結体Aは、ムライトとYSZとのモル比(以下、モル比ムライト:YSZという)が99.9:0.1であり、25℃から1000℃までにおける平均熱膨張係数αS(以下、単に平均熱膨張係数αSという)は4.25×10-6/℃であり、GaAs結晶の平均熱膨張係数αGaAsに対する焼結体の熱膨張係数αSの比(以下、αS/αGaAs比という)は0.728であった。ムライト−YSZ系焼結体Bは、モル比ムライト:YSZが99.6:0.4であり、平均熱膨張係数αSが4.75×10-6/℃であり、αS/αGaAs比が0.813であった。ムライト−YSZ系焼結体Cは、モル比ムライト:YSZが99.3:0.7であり、平均熱膨張係数αSが5.00×10-6/℃であり、αS/αGaAs比が0.856であった。ムライト−YSZ系焼結体Dは、モル比ムライト:YSZは99:1であり、平均熱膨張係数αSが5.20×10-6/℃であり、αS/αGaAs比が0.890であった。ムライト−YSZ系焼結体Eは、モル比ムライト:YSZが98.7:1.3であり、平均熱膨張係数αSが5.40×10-6/℃であり、αS/αGaAs比が0.925であった。ムライト−YSZ系焼結体Fは、モル比ムライト:YSZが98.4:1.6であり、平均熱膨張係数αSが5.60×10-6/℃であり、αS/αGaAs比が0.959であった。ムライト−YSZ系焼結体Gは、モル比ムライト:YSZが98.2:1.8であり、平均熱膨張係数αSが5.80×10-6/℃であり、αS/αGaAs比が0.993であった。ムライト−YSZ系焼結体Hは、モル比ムライト:YSZが98:2であり、平均熱膨張係数αSが6.00×10-6/℃であり、αS/αGaAs比が1.027であった。ムライト−YSZ系焼結体Iは、モル比ムライト:YSZが90:10であり、平均熱膨張係数αSが6.33×10-6/℃であり、αS/αGaAs比が1.084であった。ムライト−YSZ系焼結体Jは、モル比ムライト:YSZが82:18であり、平均熱膨張係数αSが6.67×10-6/℃であり、αS/αGaAs比が1.142であった。ムライト−YSZ系焼結体Kは、モル比ムライト:YSZが75:25であり、平均熱膨張係数αSが7.00×10-6/℃であり、αS/αGaAs比が1.199であった。ムライト−YSZ系焼結体Lは、モル比ムライト:YSZが69:31であり、平均熱膨張係数αSが7.25×10-6/℃であり、αS/αGaAs比が1.241であった。ムライト−YSZ系焼結体Mは、モル比ムライト:YSZが63:37であり、平均熱膨張係数αSが7.50×10-6/℃であり、αS/αGaAs比が1.284であった。 The mullite-YSZ sintered body A has a molar ratio of mullite to YSZ (hereinafter referred to as molar ratio mullite: YSZ) of 99.9: 0.1, and an average thermal expansion coefficient α from 25 ° C. to 1000 ° C. S (hereinafter simply referred to as the average thermal expansion coefficient α S ) is 4.25 × 10 −6 / ° C., and the ratio of the thermal expansion coefficient α S of the sintered body to the average thermal expansion coefficient α GaAs of the GaAs crystal (hereinafter referred to as the following) α S / α GaAs ratio) was 0.728. The mullite-YSZ sintered body B has a molar ratio of mullite: YSZ of 99.6: 0.4, an average thermal expansion coefficient α S of 4.75 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.813. The mullite-YSZ sintered body C has a molar ratio mullite: YSZ of 99.3: 0.7, an average thermal expansion coefficient α S of 5.00 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.856. The mullite-YSZ sintered body D has a molar ratio mullite: YSZ of 99: 1, an average thermal expansion coefficient α S of 5.20 × 10 −6 / ° C., and an α S / α GaAs ratio of 0.2. 890. The mullite-YSZ sintered body E has a molar ratio mullite: YSZ of 98.7: 1.3, an average thermal expansion coefficient α S of 5.40 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.925. The mullite-YSZ sintered body F has a molar ratio mullite: YSZ of 98.4: 1.6, an average thermal expansion coefficient α S of 5.60 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.959. The mullite-YSZ sintered body G has a molar ratio mullite: YSZ of 98.2: 1.8, an average thermal expansion coefficient α S of 5.80 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.993. The mullite-YSZ sintered body H has a molar ratio mullite: YSZ of 98: 2, an average coefficient of thermal expansion α S of 6.00 × 10 −6 / ° C., and an α S / α GaAs ratio of 1. 027. The mullite-YSZ sintered body I has a molar ratio mullite: YSZ of 90:10, an average thermal expansion coefficient α S of 6.33 × 10 −6 / ° C., and an α S / α GaAs ratio of 1. 084. The mullite-YSZ sintered body J has a molar ratio mullite: YSZ of 82:18, an average thermal expansion coefficient α S of 6.67 × 10 −6 / ° C., and an α S / α GaAs ratio of 1. 142. The mullite-YSZ sintered body K has a molar ratio mullite: YSZ of 75:25, an average thermal expansion coefficient α S of 7.00 × 10 −6 / ° C., and an α S / α GaAs ratio of 1. 199. The mullite-YSZ sintered body L has a molar ratio of mullite: YSZ of 69:31, an average thermal expansion coefficient α S of 7.25 × 10 −6 / ° C., and an α S / α GaAs ratio of 1. 241. The mullite-YSZ sintered body M has a molar ratio mullite: YSZ of 63:37, an average coefficient of thermal expansion α S of 7.50 × 10 −6 / ° C., and an α S / α GaAs ratio of 1. 284.

上記のムライト−YSZ系焼結体A〜Mから、直径4インチ(101.6mm)で厚さ1mmの支持基板をそれぞれ切り出して、それぞれの支持基板の両主面を鏡面に研磨して、支持基板A〜Mとした。すなわち、支持基板A〜Mの25℃から1000℃までにおける平均熱膨張係数は、それぞれムライト−YSZ系焼結体A〜Mの25℃から1000℃までにおける平均熱膨張係数に等しい。結果を表2にまとめた。   From the above-mentioned mullite-YSZ sintered bodies A to M, a support substrate having a diameter of 4 inches (101.6 mm) and a thickness of 1 mm is cut out, and both main surfaces of each support substrate are polished to a mirror surface to be supported. Substrates A to M were used. That is, the average thermal expansion coefficients of the support substrates A to M from 25 ° C. to 1000 ° C. are equal to the average thermal expansion coefficients of the mullite-YSZ sintered bodies A to M from 25 ° C. to 1000 ° C., respectively. The results are summarized in Table 2.

(2)下地基板上に単結晶膜を成膜するサブ工程
図3(B)を参照して、下地基板30として、鏡面に研磨された(001)面の主面30nを有する直径5インチ(127mm)で厚さ0.5mmのSi基板を準備した。
(2) Sub-Process for Forming Single Crystal Film on Base Substrate With reference to FIG. 3B, the base substrate 30 has a main surface 30n of (001) surface polished to a mirror surface and has a diameter of 5 inches ( 127 mm) and a 0.5 mm thick Si substrate was prepared.

上記のSi基板(下地基板30)の主面30n上に、単結晶膜13として厚さ0.4μmのGaAs膜をMOCVD法により成膜した。成膜条件は、原料ガスとしてTMG(トリメチルガリウム)ガスおよびAsH3(アルシン)ガスを使用し、キャリアガスとしてH2ガスを使用し、成膜温度(基板温度)620℃、成膜圧力は1気圧とした。なお、こうして得られたGaAs膜(単結晶膜13)の主面13mは、(001)面からのオフ角が±1°以内の面方位を有し、AFM(原子間力顕微鏡)を用いて測定した10μm×10μmの正方形領域におけるRMS(二乗平均平方根)粗さ(JIS B0601:2001に規定する二乗平均平方根粗さRqをいう。以下同じ)が1nm以下の鏡面であった。 A GaAs film having a thickness of 0.4 μm was formed as the single crystal film 13 on the main surface 30n of the Si substrate (underlying substrate 30) by the MOCVD method. The film formation conditions are as follows: TMG (trimethylgallium) gas and AsH 3 (arsine) gas are used as the source gas, H 2 gas is used as the carrier gas, the film formation temperature (substrate temperature) is 620 ° C., and the film formation pressure is 1 Atmospheric pressure. The main surface 13m of the GaAs film (single crystal film 13) obtained in this way has a plane orientation whose off angle from the (001) plane is within ± 1 °, and using an AFM (atomic force microscope). The RMS (root mean square) roughness (referred to the root mean square roughness Rq defined in JIS B0601: 2001, hereinafter the same) in a 10 μm × 10 μm square area was a mirror surface of 1 nm or less.

(3)支持基板と単結晶膜とを貼り合わせるサブ工程
図3(C)中の(C1)を参照して、図3(A)の支持基板A〜M(支持基板11)のそれぞれの主面11m上に厚さ2μmのSiO2膜をCVD(化学気相堆積)法により成膜した。次いで、支持基板A〜M(支持基板11)のそれぞれの主面11m上の厚さ2μmのSiO2膜を、CeO2スラリーを用いて研磨することにより、厚さ0.2μmのSiO2層だけ残存させて、接着層12aとした。これにより、支持基板A〜M(支持基板11)のそれぞれの主面11mの空隙が埋められ、平坦な主面12amを有する厚さ0.2μmのSiO2層(接着層12a)が得られた。
(3) Sub-process for bonding support substrate and single crystal film Referring to (C1) in FIG. 3 (C), each of the main substrates A to M (support substrate 11) in FIG. 3 (A) A SiO 2 film having a thickness of 2 μm was formed on the surface 11 m by a CVD (chemical vapor deposition) method. Next, the SiO 2 film having a thickness of 2 μm on each main surface 11m of the support substrates A to M (support substrate 11) is polished by using CeO 2 slurry, so that only the SiO 2 layer having a thickness of 0.2 μm is obtained. The adhesive layer 12a was made to remain. Thus, the gap is filled in each of the main surfaces 11m of the supporting substrate A to M (support substrate 11), SiO 2 layer having a thickness of 0.2μm having a flat main surface 12am (adhesive layer 12a) was obtained .

また、図3(C)中の(C2)を参照して、図3(B)のSi基板(下地基板30)上に成膜されたGaAs膜(単結晶膜13)の主面13n上に厚さ2μmのSiO2膜をCVD法により成膜した。次いで、この厚さ2μmのSiO2膜を、CeO2スラリーを用いて研磨することにより、厚さ0.2μmのSiO2層だけ残存させて、接着層12bとした。 Further, referring to (C2) in FIG. 3C, on the main surface 13n of the GaAs film (single crystal film 13) formed on the Si substrate (underlying substrate 30) in FIG. 3B. A SiO 2 film having a thickness of 2 μm was formed by a CVD method. Next, this SiO 2 film having a thickness of 2 μm was polished using a CeO 2 slurry, so that only the SiO 2 layer having a thickness of 0.2 μm was left to form an adhesive layer 12b.

次いで、図3(C)中の(C3)を参照して、支持基板A〜M(支持基板11)のそれぞれに形成されたSiO2層(接着層12a)の主面12amおよびSi基板(下地基板30)上に成膜されたGaAs膜(単結晶膜13)上に形成されたSiO2層(接着層12b)の主面12bnをアルゴンプラズマにより清浄化および活性化させた後、SiO2層(接着層12a)の主面12amとSiO2層(接着層12b)の主面12bnとを貼り合わせて、窒素雰囲気下300℃で2時間熱処理した。 Next, referring to (C3) in FIG. 3C, the main surface 12am of the SiO 2 layer (adhesive layer 12a) and the Si substrate (underlayer) formed on each of the support substrates A to M (support substrate 11). The main surface 12bn of the SiO 2 layer (adhesive layer 12b) formed on the GaAs film (single crystal film 13) formed on the substrate 30) is cleaned and activated by argon plasma, and then the SiO 2 layer The main surface 12am of the (adhesive layer 12a) and the main surface 12bn of the SiO 2 layer (adhesive layer 12b) were bonded together and heat-treated at 300 ° C. for 2 hours in a nitrogen atmosphere.

(4)下地基板を除去するサブ工程
図3(D)を参照して、支持基板A〜M(支持基板11)の裏側(単結晶膜13が貼り合わされていない側)の主面および側面をワックス40で覆って保護した後、10質量%のフッ化水素酸および3質量%の硝酸を含む混酸水溶液を用いて、エッチングによりSi基板(下地基板30)を除去した。こうして、図2(A)に示すように、支持基板A〜M(支持基板11)のそれぞれの主面11m側にGaAs膜(単結晶膜13)が配置された複合基板A〜M(複合基板10)が得られた。
(4) Sub-process for removing base substrate Referring to FIG. 3D, the main surface and side surfaces of the back side (side on which single crystal film 13 is not bonded) of support substrates A to M (support substrate 11) are After covering and protecting with wax 40, the Si substrate (underlying substrate 30) was removed by etching using a mixed acid aqueous solution containing 10% by mass of hydrofluoric acid and 3% by mass of nitric acid. Thus, as shown in FIG. 2A, composite substrates A to M (composite substrates) in which GaAs films (single crystal films 13) are arranged on the main surfaces 11m side of the support substrates A to M (support substrate 11). 10) was obtained.

3.GaAs系膜の成膜工程
図2(B)を参照して、複合基板A〜M(複合基板10)のGaAs膜(単結晶膜13)の主面13m(かかる主面は(001)面である。)上に、それぞれMOCVD法によりGaAs膜(GaAs系膜20)を成膜した。GaAs膜(GaAs系膜20)の成膜においては、成膜条件は、原料ガスとしてTMG(トリメチルガリウム)ガスおよびAsH3(アルシン)ガスを使用し、キャリアガスとしてH2ガスを使用し、成膜温度(基板温度)680℃で厚さ5μmのGaAs単結晶層(GaAs系単結晶層23)を成長させた。ここで、GaAs単結晶層の成長速度は1μm/hrであった。その後、複合基板A〜MのそれぞれにGaAs膜が成膜されたウエハA〜Mを10℃/minの速度で室温(25℃)まで冷却した。
3. GaAs film formation process Referring to FIG. 2B, the main surface 13m of the GaAs film (single crystal film 13) of the composite substrate A to M (composite substrate 10) (the main surface is the (001) surface). A GaAs film (GaAs-based film 20) was formed on each of them by MOCVD. In the formation of a GaAs film (GaAs-based film 20), the film formation conditions are as follows: TMG (trimethylgallium) gas and AsH 3 (arsine) gas are used as the source gas, and H 2 gas is used as the carrier gas. A GaAs single crystal layer (GaAs single crystal layer 23) having a thickness of 5 μm was grown at a film temperature (substrate temperature) of 680 ° C. Here, the growth rate of the GaAs single crystal layer was 1 μm / hr. Thereafter, the wafers A to M each having a GaAs film formed on each of the composite substrates A to M were cooled to room temperature (25 ° C.) at a rate of 10 ° C./min.

室温まで冷却後に成膜装置から取り出されたウエハA〜Mについて、ウエハの反り、GaAs膜のクラック本数密度および転位密度を測定した。ここで、ウエハの反りの形状および反り量は、GaAs膜の主面をCorning Tropel社のFM200EWaferを用いて観察される光干渉縞により測定した。GaAsN膜のクラック本数密度は、ノマルスキー顕微鏡を用いて単位長さ当りのクラック本数を測定し、1本/mm未満を「極少」、1本/mm以上5本/mm未満を「少」、5本/mm以上10本/mm未満を「多」、10本/mm以上を「極多」と評価した。GaAs膜の転位密度は、L(カソードルミネッセンス)による暗点の単位面積当たりの個数を測定した。なお、本実施例においてGaAs膜に発生したクラックは、膜を貫通しない微小なものであった。   For wafers A to M taken out from the film forming apparatus after cooling to room temperature, the warpage of the wafer, the number of cracks in the GaAs film and the dislocation density were measured. Here, the shape and amount of warpage of the wafer were measured by optical interference fringes observed on the main surface of the GaAs film using a Corning Tropel FM200EWafer. The number of cracks in the GaAsN film is determined by measuring the number of cracks per unit length using a Nomarski microscope. “Less” is less than 1 / mm, “Less” is 5 or less than 5 / mm. The book / mm or more and less than 10 / mm was evaluated as “many”, and the book / mm or more was evaluated as “very many”. The dislocation density of the GaAs film was measured by the number of dark spots per unit area due to L (cathode luminescence). In this example, cracks generated in the GaAs film were minute ones that did not penetrate the film.

ウエハAは、GaAs膜側が凹状に反り、反り量が680μmであり、GaAs膜のクラック本数密度が極多であった。ウエハBは、GaAs膜側が凹状に反り、反り量が630μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が4×104cm-2であった。ウエハCは、GaAs膜側が凹状に反り、反り量が500μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が3×104cm-2であった。ウエハDは、GaAs膜側が凹状に反り、反り量が400μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が2.5×104cm-2であった。ウエハEは、GaAs膜側が凹状に反り、反り量が350μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が2×104cm-2であった。ウエハFは、GaAs膜側が凹状に反り、反り量が230μmであり、GaAs膜のクラック本数密度が極少であり、GaAs膜の転位密度が1×104cm-2であった。ウエハGは、GaAs膜側が凹状に反り、反り量が150μmであり、GaAs膜のクラック本数密度が極少であり、GaAs膜の転位密度が1×104cm-2であった。ウエハHは、GaAs膜側が凹状に反り、反り量が10μmであり、GaAs膜のクラック本数密度が極少であり、GaAs膜の転位密度が1×104cm-2であった。ウエハIは、GaAs膜側が凸状に反り、反り量が15μmであり、GaAs膜のクラック本数密度が極少であり、GaAs膜の転位密度が1×104cm-2であった。ウエハJは、GaAs膜側が凸状に反り、反り量が120μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が2×104cm-2であった。ウエハKは、GaAs膜側が凸状に反り、反り量が230μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が3×104cm-2であった。ウエハLは、GaAs膜側が凸状に反り、反り量が745μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が4×104cm-2であった。ウエハMは、支持基板に割れが発生し、十分なGaAs膜が得られなかった。これらの結果を表2にまとめた。表2において、「−」は、その物性値が未測定であることを示す。 The wafer A warped in a concave shape on the GaAs film side, the amount of warpage was 680 μm, and the number of cracks in the GaAs film was extremely large. The wafer B warped in a concave shape on the GaAs film side, the warpage amount was 630 μm, the crack number density of the GaAs film was small, and the dislocation density of the GaAs film was 4 × 10 4 cm −2 . The wafer C warped in a concave shape on the GaAs film side, the warpage amount was 500 μm, the number of cracks in the GaAs film was small, and the dislocation density of the GaAs film was 3 × 10 4 cm −2 . The wafer D was warped concavely on the GaAs film side, the warpage amount was 400 μm, the crack number density of the GaAs film was small, and the dislocation density of the GaAs film was 2.5 × 10 4 cm −2 . The wafer E warped in a concave shape on the GaAs film side, the warpage amount was 350 μm, the crack number density of the GaAs film was small, and the dislocation density of the GaAs film was 2 × 10 4 cm −2 . The wafer F warped in a concave shape on the GaAs film side, the warpage amount was 230 μm, the crack number density of the GaAs film was extremely small, and the dislocation density of the GaAs film was 1 × 10 4 cm −2 . The wafer G was warped concavely on the GaAs film side, the warpage amount was 150 μm, the crack number density of the GaAs film was extremely small, and the dislocation density of the GaAs film was 1 × 10 4 cm −2 . The wafer H warped in a concave shape on the GaAs film side, the warpage amount was 10 μm, the crack number density of the GaAs film was extremely small, and the dislocation density of the GaAs film was 1 × 10 4 cm −2 . The wafer I was warped convexly on the GaAs film side, the warpage amount was 15 μm, the crack number density of the GaAs film was extremely small, and the dislocation density of the GaAs film was 1 × 10 4 cm −2 . The wafer J warped in a convex shape on the GaAs film side, the warpage amount was 120 μm, the crack number density of the GaAs film was small, and the dislocation density of the GaAs film was 2 × 10 4 cm −2 . The wafer K was warped convexly on the GaAs film side, the warpage amount was 230 μm, the crack number density of the GaAs film was small, and the dislocation density of the GaAs film was 3 × 10 4 cm −2 . The wafer L was warped convexly on the GaAs film side, the amount of warpage was 745 μm, the number of cracks in the GaAs film was small, and the dislocation density of the GaAs film was 4 × 10 4 cm −2 . The wafer M was cracked in the support substrate, and a sufficient GaAs film could not be obtained. These results are summarized in Table 2. In Table 2, “-” indicates that the physical property value is not measured.

4.支持基板の除去工程
図2(C)を参照して、上記で得られたウエハA〜Lを、10質量%のフッ化水素酸水溶液に浸漬することにより、支持基板A〜L(支持基板11)およびSiO2層を溶解させることにより除去して、GaAs単結晶膜(単結晶膜13)の主面13m上に成膜されたGaAs膜A〜L(GaAs系膜20)が得られた。なお、ウエハA〜Lから支持基板A〜LおよびSiO2層が除去されたGaAs膜A〜L(GaAs系膜20)においても反りがCorning Tropel社のFM200EWaferを用いて観察される光干渉縞による測定により認められ、GaAs膜A〜Lの反りの大小関係には、ウエハA〜Lにおける反りの大小関係が維持されていた。
4). Step of removing support substrate Referring to FIG. 2C, wafers A to L obtained above are immersed in a 10% by mass hydrofluoric acid aqueous solution, thereby supporting substrates A to L (support substrate 11). ) And the SiO 2 layer were removed by dissolution to obtain GaAs films A to L (GaAs-based film 20) formed on the main surface 13m of the GaAs single crystal film (single crystal film 13). It should be noted that warpage is also observed in the GaAs films A to L (GaAs-based film 20) from which the supporting substrates A to L and the SiO 2 layer are removed from the wafers A to L due to optical interference fringes observed using the Corning Tropel FM200EWafer. The magnitude relation of the warpage of the GaAs films A to L was maintained by the measurement, and the magnitude relation of the warpage in the wafers A to L was maintained.

Figure 2013116848
Figure 2013116848

表2を参照して、主面内の熱膨張係数αSがGaAs結晶の熱膨張係数αGaAsの0.8倍より大きく1.2倍より小さい(すなわち、0.8<(αS/αGaAs比)<1.2)支持基板を有する複合基板を用いることにより(ウエハB〜K)、反り小さく転位密度が低く結晶性の良好なGaAs膜を成膜することができた。また、GaAs膜の反りおよび転位密度をさらに低減する観点から、複合基板の支持基板の主面内の熱膨張係数αSは、GaAs結晶の熱膨張係数αGaAsの0.9倍より大きく1.15倍より小さいこと(すなわち、0.9<(αS/αGaAs比)<1.15)(ウエハE〜J)が好ましく、GaAs結晶の熱膨張係数αGaAsの0.95倍より大きく1.1倍より小さいこと(すなわち、0.95<(αS/αGaAs比)<1.1)(ウエハF〜I)がより好ましい。 Referring to Table 2, the thermal expansion coefficient α S in the main surface is larger than 0.8 times and smaller than 1.2 times the thermal expansion coefficient α GaAs of the GaAs crystal (that is, 0.8 <(α S / α GaAs ratio) <1.2) By using a composite substrate having a supporting substrate (wafers B to K), a GaAs film having low warpage, low dislocation density, and good crystallinity could be formed. Further, from the viewpoint of further reducing the warpage and dislocation density of the GaAs film, the thermal expansion coefficient alpha S in the main surface of the supporting substrate of the composite substrate is greater than 0.9 times the thermal expansion coefficient alpha GaAs of GaAs crystal 1. It is preferably less than 15 times (that is, 0.9 <(α S / α GaAs ratio) <1.15) (wafers E to J), and the thermal expansion coefficient of GaAs crystal is larger than 0.95 times that of α GaAs and is 1 It is more preferable that the ratio is smaller than 1 time (that is, 0.95 <(α S / α GaAs ratio) <1.1) (wafers F to I).

(実施例3)
1.GaAs結晶の熱膨張係数の測定
実施例1と同様に測定したところ、GaAs結晶の25℃から1000℃までにおける平均熱膨張係数αGaAsは、5.84×10-6/℃であった。
(Example 3)
1. Measurement of Thermal Expansion Coefficient of GaAs Crystal When measured in the same manner as in Example 1, the average thermal expansion coefficient α GaAs from 25 ° C. to 1000 ° C. of the GaAs crystal was 5.84 × 10 −6 / ° C.

2.複合基板の準備工程
(1)支持基板を準備するサブ工程
図3(A)を参照して、支持基板11の材料として、ムライトとMgOとの所定のモル比の混合物をアルゴンガス雰囲気下一軸方向に50MPaの圧力をかけて1700℃で1時間焼結させることにより、13種類のムライト−MgO系焼結体A〜Mを準備した。また、上記13種類のムライト−MgO系焼結体のそれぞれからサイズが4×4×20mm(長手方向は焼結体から切り出される支持基板の主面に実質的に平行な方向)の測定用サンプルを切り出した。ここで、ムライト−MgO系焼結体は熱膨張係数に関して方向特異性がないため、切り出し方向は任意とした。それらの測定用サンプルについて、上記と同様にして、室温(25℃)から1000℃まで昇温下時の平均熱膨張係数αSを測定した。
2. Preparation Step of Composite Substrate (1) Sub-Step of Preparing Support Substrate Referring to FIG. 3A, a mixture of mullite and MgO having a predetermined molar ratio as a material of support substrate 11 is uniaxially arranged in an argon gas atmosphere. Then, 13 kinds of mullite-MgO-based sintered bodies A to M were prepared by sintering at 1700 ° C. for 1 hour under a pressure of 50 MPa. Each of the 13 types of mullite-MgO-based sintered bodies has a measurement size of 4 × 4 × 20 mm (the longitudinal direction is a direction substantially parallel to the main surface of the support substrate cut out from the sintered body). Was cut out. Here, since the mullite-MgO-based sintered body has no direction specificity with respect to the thermal expansion coefficient, the cutting direction was arbitrary. With respect to these measurement samples, the average thermal expansion coefficient α S when the temperature was raised from room temperature (25 ° C.) to 1000 ° C. was measured in the same manner as described above.

ムライト−MgO系焼結体Aは、ムライトとMgOとのモル比(以下、モル比ムライト:MgOという)が99.9:0.1であり、25℃から1000℃までにおける平均熱膨張係数αS(以下、単に平均熱膨張係数αSという)は4.25×10-6/℃であり、GaAs結晶の平均熱膨張係数αGaAsに対する焼結体の熱膨張係数αSの比(以下、αS/αGaAs比という)は0.728であった。ムライト−MgO系焼結体Bは、モル比ムライト:MgOが99.8:0.2であり、平均熱膨張係数αSが4.75×10-6/℃であり、αS/αGaAs比が0.813であった。ムライト−MgO系焼結体Cは、モル比ムライト:MgOが99.4:0.6であり、平均熱膨張係数αSが5.00×10-6/℃であり、αS/αGaAs比が0.856であった。ムライト−MgO系焼結体Dは、モル比ムライト:MgOは99.1:0.9であり、平均熱膨張係数αSが5.20×10-6/℃であり、αS/αGaAs比が0.890であった。ムライト−MgO系焼結体Eは、モル比ムライト:MgOが98.8:1.2であり、平均熱膨張係数αSが5.40×10-6/℃であり、αS/αGaAs比が0.925であった。ムライト−MgO系焼結体Fは、モル比ムライト:MgOが98.5:1.5であり、平均熱膨張係数αSが5.60×10-6/℃であり、αS/αGaAs比が0.959であった。ムライト−MgO系焼結体Gは、モル比ムライト:MgOが98.3:1.7であり、平均熱膨張係数αSが5.80×10-6/℃であり、αS/αGaAs比が0.993であった。ムライト−MgO系焼結体Hは、モル比ムライト:MgOが98:2であり、平均熱膨張係数αSが6.00×10-6/℃であり、αS/αGaAs比が1.027であった。ムライト−MgO系焼結体Iは、モル比ムライト:MgOが94:6であり、平均熱膨張係数αSが6.33×10-6/℃であり、αS/αGaAs比が1.084であった。ムライト−MgO系焼結体Jは、モル比ムライト:MgOが89:11であり、平均熱膨張係数αSが6.67×10-6/℃であり、αS/αGaAs比が1.142であった。ムライト−MgO系焼結体Kは、モル比ムライト:MgOが85:15であり、平均熱膨張係数αSが7.00×10-6/℃であり、αS/αGaAs比が1.199であった。ムライト−MgO系焼結体Lは、モル比ムライト:MgOが81:19であり、平均熱膨張係数αSが7.25×10-6/℃であり、αS/αGaAs比が1.241であった。ムライト−MgO系焼結体Mは、モル比ムライト:MgOが78:22であり、平均熱膨張係数αSが7.50×10-6/℃であり、αS/αGaAs比が1.284であった。 The mullite-MgO-based sintered body A has a molar ratio of mullite to MgO (hereinafter referred to as molar ratio mullite: MgO) of 99.9: 0.1, and an average thermal expansion coefficient α from 25 ° C. to 1000 ° C. S (hereinafter simply referred to as the average thermal expansion coefficient α S ) is 4.25 × 10 −6 / ° C., and the ratio of the thermal expansion coefficient α S of the sintered body to the average thermal expansion coefficient α GaAs of the GaAs crystal (hereinafter referred to as the following) α S / α GaAs ratio) was 0.728. The mullite-MgO-based sintered body B has a molar ratio of mullite: MgO of 99.8: 0.2, an average coefficient of thermal expansion α S of 4.75 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.813. The mullite-MgO-based sintered body C has a molar ratio of mullite: MgO of 99.4: 0.6, an average thermal expansion coefficient α S of 5.00 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.856. The mullite-MgO-based sintered body D has a molar ratio of mullite: MgO of 99.1: 0.9, an average thermal expansion coefficient α S of 5.20 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.890. The mullite-MgO-based sintered body E has a molar ratio of mullite: MgO of 98.8: 1.2, an average thermal expansion coefficient α S of 5.40 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.925. The mullite-MgO-based sintered body F has a molar ratio of mullite: MgO of 98.5: 1.5, an average coefficient of thermal expansion α S of 5.60 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.959. The mullite-MgO-based sintered body G has a molar ratio of mullite: MgO of 98.3: 1.7, an average thermal expansion coefficient α S of 5.80 × 10 −6 / ° C., and α S / α GaAs. The ratio was 0.993. The mullite-MgO-based sintered body H has a molar ratio of mullite: MgO of 98: 2, an average coefficient of thermal expansion α S of 6.00 × 10 −6 / ° C., and an α S / α GaAs ratio of 1. 027. The mullite-MgO-based sintered body I has a molar ratio of mullite: MgO of 94: 6, an average coefficient of thermal expansion α S of 6.33 × 10 −6 / ° C., and an α S / α GaAs ratio of 1. 084. The mullite-MgO-based sintered body J has a molar ratio of mullite: MgO of 89:11, an average thermal expansion coefficient α S of 6.67 × 10 −6 / ° C., and an α S / α GaAs ratio of 1. 142. The mullite-MgO-based sintered body K has a molar ratio of mullite: MgO of 85:15, an average thermal expansion coefficient α S of 7.00 × 10 −6 / ° C., and an α S / α GaAs ratio of 1. 199. The mullite-MgO-based sintered body L has a molar ratio of mullite: MgO of 81:19, an average coefficient of thermal expansion α S of 7.25 × 10 −6 / ° C., and an α S / α GaAs ratio of 1. 241. The mullite-MgO-based sintered body M has a molar ratio of mullite: MgO of 78:22, an average coefficient of thermal expansion α S of 7.50 × 10 −6 / ° C., and an α S / α GaAs ratio of 1. 284.

上記のムライト−MgO系焼結体A〜Mから、直径4インチ(101.6mm)で厚さ1mmの支持基板をそれぞれ切り出して、それぞれの支持基板の両主面を鏡面に研磨して、支持基板A〜Mとした。すなわち、支持基板A〜Mの25℃から1000℃までにおける平均熱膨張係数は、それぞれムライト−MgO系焼結体A〜Mの25℃から1000℃までにおける平均熱膨張係数に等しい。結果を表3にまとめた。   From the mullite-MgO-based sintered bodies A to M, a support substrate having a diameter of 4 inches (101.6 mm) and a thickness of 1 mm is cut out, and both main surfaces of each support substrate are polished to a mirror surface to be supported. Substrates A to M were used. That is, the average thermal expansion coefficient of the support substrates A to M from 25 ° C. to 1000 ° C. is equal to the average thermal expansion coefficient of the mullite-MgO-based sintered bodies A to M from 25 ° C. to 1000 ° C., respectively. The results are summarized in Table 3.

(2)下地基板上に単結晶膜を成膜するサブ工程
図3(B)を参照して、下地基板30として、鏡面に研磨された(001)面の主面30nを有する直径5インチ(127mm)で厚さ0.5mmのSi基板を準備した。
(2) Sub-Process for Forming Single Crystal Film on Base Substrate With reference to FIG. 3B, the base substrate 30 has a main surface 30n of (001) surface polished to a mirror surface and has a diameter of 5 inches ( 127 mm) and a 0.5 mm thick Si substrate was prepared.

上記のSi基板(下地基板30)の主面30n上に、単結晶膜13として厚さ0.4μmのGaAs膜をMOCVD法により成膜した。成膜条件は、原料ガスとしてTMG(トリメチルガリウム)ガスおよびAsH3(アルシン)ガスを使用し、キャリアガスとしてH2ガスを使用し、成膜温度(基板温度)620℃、成膜圧力は1気圧とした。なお、こうして得られたGaAs膜(単結晶膜13)の主面13mは、(001)面からのオフ角が±1°以内の面方位を有し、AFM(原子間力顕微鏡)を用いて測定した10μm×10μmの正方形領域におけるRMS(二乗平均平方根)粗さ(JIS B0601:2001に規定する二乗平均平方根粗さRqをいう。以下同じ)が1nm以下の鏡面であった。 A GaAs film having a thickness of 0.4 μm was formed as the single crystal film 13 on the main surface 30n of the Si substrate (underlying substrate 30) by the MOCVD method. The film formation conditions are as follows: TMG (trimethylgallium) gas and AsH 3 (arsine) gas are used as the source gas, H 2 gas is used as the carrier gas, the film formation temperature (substrate temperature) is 620 ° C., and the film formation pressure is 1 Atmospheric pressure. The main surface 13m of the GaAs film (single crystal film 13) obtained in this way has a plane orientation whose off angle from the (001) plane is within ± 1 °, and using an AFM (atomic force microscope). The RMS (root mean square) roughness (referred to the root mean square roughness Rq defined in JIS B0601: 2001, hereinafter the same) in a 10 μm × 10 μm square area was a mirror surface of 1 nm or less.

(3)支持基板と単結晶膜とを貼り合わせるサブ工程
図3(C)中の(C1)を参照して、図3(A)の支持基板A〜M(支持基板11)のそれぞれの主面11m上に厚さ2μmのSiO2膜をCVD(化学気相堆積)法により成膜した。次いで、支持基板A〜M(支持基板11)のそれぞれの主面11m上の厚さ2μmのSiO2膜を、CeO2スラリーを用いて研磨することにより、厚さ0.2μmのSiO2層だけ残存させて、接着層12aとした。これにより、支持基板A〜M(支持基板11)のそれぞれの主面11mの空隙が埋められ、平坦な主面12amを有する厚さ0.2μmのSiO2層(接着層12a)が得られた。
(3) Sub-process for bonding support substrate and single crystal film Referring to (C1) in FIG. 3 (C), each of the main substrates A to M (support substrate 11) in FIG. 3 (A) A SiO 2 film having a thickness of 2 μm was formed on the surface 11 m by a CVD (chemical vapor deposition) method. Next, the SiO 2 film having a thickness of 2 μm on each main surface 11m of the support substrates A to M (support substrate 11) is polished by using CeO 2 slurry, so that only the SiO 2 layer having a thickness of 0.2 μm is obtained. The adhesive layer 12a was made to remain. Thus, the gap is filled in each of the main surfaces 11m of the supporting substrate A to M (support substrate 11), SiO 2 layer having a thickness of 0.2μm having a flat main surface 12am (adhesive layer 12a) was obtained .

また、図3(C)中の(C2)を参照して、図3(B)のSi基板(下地基板30)上に成膜されたGaAs膜(単結晶膜13)の主面13n上に厚さ2μmのSiO2膜をCVD法により成膜した。次いで、この厚さ2μmのSiO2膜を、CeO2スラリーを用いて研磨することにより、厚さ0.2μmのSiO2層だけ残存させて、接着層12bとした。 Further, referring to (C2) in FIG. 3C, on the main surface 13n of the GaAs film (single crystal film 13) formed on the Si substrate (underlying substrate 30) in FIG. 3B. A SiO 2 film having a thickness of 2 μm was formed by a CVD method. Next, this SiO 2 film having a thickness of 2 μm was polished using a CeO 2 slurry, so that only the SiO 2 layer having a thickness of 0.2 μm was left to form an adhesive layer 12b.

次いで、図3(C)中の(C3)を参照して、支持基板A〜M(支持基板11)のそれぞれに形成されたSiO2層(接着層12a)の主面12amおよびSi基板(下地基板30)上に成膜されたGaAs膜(単結晶膜13)上に形成されたSiO2層(接着層12b)の主面12bnをアルゴンプラズマにより清浄化および活性化させた後、SiO2層(接着層12a)の主面12amとSiO2層(接着層12b)の主面12bnとを貼り合わせて、窒素雰囲気下300℃で2時間熱処理した。 Next, referring to (C3) in FIG. 3C, the main surface 12am of the SiO 2 layer (adhesive layer 12a) and the Si substrate (underlayer) formed on each of the support substrates A to M (support substrate 11). The main surface 12bn of the SiO 2 layer (adhesive layer 12b) formed on the GaAs film (single crystal film 13) formed on the substrate 30) is cleaned and activated by argon plasma, and then the SiO 2 layer The main surface 12am of the (adhesive layer 12a) and the main surface 12bn of the SiO 2 layer (adhesive layer 12b) were bonded together and heat-treated at 300 ° C. for 2 hours in a nitrogen atmosphere.

(4)下地基板を除去するサブ工程
図3(D)を参照して、支持基板A〜M(支持基板11)の裏側(単結晶膜13が貼り合わされていない側)の主面および側面をワックス40で覆って保護した後、10質量%のフッ化水素酸および3質量%の硝酸を含む混酸水溶液を用いて、エッチングによりSi基板(下地基板30)を除去した。こうして、図2(A)に示すように、支持基板A〜M(支持基板11)のそれぞれの主面11m側にGaAs膜(単結晶膜13)が配置された複合基板A〜M(複合基板10)が得られた。
(4) Sub-process for removing base substrate Referring to FIG. 3D, the main surface and side surfaces of the back side (side on which single crystal film 13 is not bonded) of support substrates A to M (support substrate 11) are After covering and protecting with wax 40, the Si substrate (underlying substrate 30) was removed by etching using a mixed acid aqueous solution containing 10% by mass of hydrofluoric acid and 3% by mass of nitric acid. Thus, as shown in FIG. 2A, composite substrates A to M (composite substrates) in which GaAs films (single crystal films 13) are arranged on the main surfaces 11m side of the support substrates A to M (support substrate 11). 10) was obtained.

3.GaAs系膜の成膜工程
図2(B)を参照して、複合基板A〜M(複合基板10)のGaAs膜(単結晶膜13)の主面13m(かかる主面は(001)面である。)上に、それぞれMOCVD法によりGaAs膜(GaAs系膜20)を成膜した。GaAs膜(GaAs系膜20)の成膜においては、成膜条件は、原料ガスとしてTMG(トリメチルガリウム)ガスおよびAsH3(アルシン)ガスを使用し、キャリアガスとしてH2ガスを使用し、成膜温度(基板温度)680℃で厚さ5μmのGaAs単結晶層(GaAs系単結晶層23)を成長させた。ここで、GaAs単結晶層の成長速度は1μm/hrであった。その後、複合基板A〜MのそれぞれにGaAs膜が成膜されたウエハA〜Mを10℃/minの速度で室温(25℃)まで冷却した。
3. GaAs film formation process Referring to FIG. 2B, the main surface 13m of the GaAs film (single crystal film 13) of the composite substrate A to M (composite substrate 10) (the main surface is the (001) surface). A GaAs film (GaAs-based film 20) was formed on each of them by MOCVD. In the formation of a GaAs film (GaAs-based film 20), the film formation conditions are as follows: TMG (trimethylgallium) gas and AsH 3 (arsine) gas are used as the source gas, and H 2 gas is used as the carrier gas. A GaAs single crystal layer (GaAs single crystal layer 23) having a thickness of 5 μm was grown at a film temperature (substrate temperature) of 680 ° C. Here, the growth rate of the GaAs single crystal layer was 1 μm / hr. Thereafter, the wafers A to M each having a GaAs film formed on each of the composite substrates A to M were cooled to room temperature (25 ° C.) at a rate of 10 ° C./min.

室温まで冷却後に成膜装置から取り出されたウエハA〜Mについて、ウエハの反り、GaAs膜のクラック本数密度および転位密度を測定した。ここで、ウエハの反りの形状および反り量は、GaAs膜の主面をCorning Tropel社のFM200EWaferを用いて観察される光干渉縞により測定した。GaAsN膜のクラック本数密度は、ノマルスキー顕微鏡を用いて単位長さ当りのクラック本数を測定し、1本/mm未満を「極少」、1本/mm以上5本/mm未満を「少」、5本/mm以上10本/mm未満を「多」、10本/mm以上を「極多」と評価した。GaAs膜の転位密度は、L(カソードルミネッセンス)による暗点の単位面積当たりの個数を測定した。なお、本実施例においてGaAs膜に発生したクラックは、膜を貫通しない微小なものであった。   For wafers A to M taken out from the film forming apparatus after cooling to room temperature, the warpage of the wafer, the number of cracks in the GaAs film and the dislocation density were measured. Here, the shape and amount of warpage of the wafer were measured by optical interference fringes observed on the main surface of the GaAs film using a Corning Tropel FM200EWafer. The number of cracks in the GaAsN film is determined by measuring the number of cracks per unit length using a Nomarski microscope. “Less” is less than 1 / mm, “Less” is 5 or less than 5 / mm. The book / mm or more and less than 10 / mm was evaluated as “many”, and the book / mm or more was evaluated as “very many”. The dislocation density of the GaAs film was measured by the number of dark spots per unit area due to L (cathode luminescence). In this example, cracks generated in the GaAs film were minute ones that did not penetrate the film.

ウエハAは、GaAs膜側が凹状に反り、反り量が680μmであり、GaAs膜のクラック本数密度が極多であった。ウエハBは、GaAs膜側が凹状に反り、反り量が630μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が4×104cm-2であった。ウエハCは、GaAs膜側が凹状に反り、反り量が500μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が3×104cm-2であった。ウエハDは、GaAs膜側が凹状に反り、反り量が400μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が2.5×104cm-2であった。ウエハEは、GaAs膜側が凹状に反り、反り量が350μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が2×104cm-2であった。ウエハFは、GaAs膜側が凹状に反り、反り量が230μmであり、GaAs膜のクラック本数密度が極少であり、GaAs膜の転位密度が1×104cm-2であった。ウエハGは、GaAs膜側が凹状に反り、反り量が150μmであり、GaAs膜のクラック本数密度が極少であり、GaAs膜の転位密度が1×104cm-2であった。ウエハHは、GaAs膜側が凹状に反り、反り量が10μmであり、GaAs膜のクラック本数密度が極少であり、GaAs膜の転位密度が1×104cm-2であった。ウエハIは、GaAs膜側が凸状に反り、反り量が15μmであり、GaAs膜のクラック本数密度が極少であり、GaAs膜の転位密度が1×104cm-2であった。ウエハJは、GaAs膜側が凸状に反り、反り量が120μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が2×104cm-2であった。ウエハKは、GaAs膜側が凸状に反り、反り量が230μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が3×104cm-2であった。ウエハLは、GaAs膜側が凸状に反り、反り量が745μmであり、GaAs膜のクラック本数密度が少であり、GaAs膜の転位密度が4×104cm-2であった。ウエハMは、支持基板に割れが発生し、十分なGaAs膜が得られなかった。これらの結果を表3にまとめた。表3において、「−」は、その物性値が未測定であることを示す。 The wafer A warped in a concave shape on the GaAs film side, the amount of warpage was 680 μm, and the number of cracks in the GaAs film was extremely large. The wafer B warped in a concave shape on the GaAs film side, the warpage amount was 630 μm, the crack number density of the GaAs film was small, and the dislocation density of the GaAs film was 4 × 10 4 cm −2 . The wafer C warped in a concave shape on the GaAs film side, the warpage amount was 500 μm, the number of cracks in the GaAs film was small, and the dislocation density of the GaAs film was 3 × 10 4 cm −2 . The wafer D was warped concavely on the GaAs film side, the warpage amount was 400 μm, the crack number density of the GaAs film was small, and the dislocation density of the GaAs film was 2.5 × 10 4 cm −2 . The wafer E warped in a concave shape on the GaAs film side, the warpage amount was 350 μm, the crack number density of the GaAs film was small, and the dislocation density of the GaAs film was 2 × 10 4 cm −2 . The wafer F warped in a concave shape on the GaAs film side, the warpage amount was 230 μm, the crack number density of the GaAs film was extremely small, and the dislocation density of the GaAs film was 1 × 10 4 cm −2 . The wafer G was warped concavely on the GaAs film side, the warpage amount was 150 μm, the crack number density of the GaAs film was extremely small, and the dislocation density of the GaAs film was 1 × 10 4 cm −2 . The wafer H warped in a concave shape on the GaAs film side, the warpage amount was 10 μm, the crack number density of the GaAs film was extremely small, and the dislocation density of the GaAs film was 1 × 10 4 cm −2 . The wafer I was warped convexly on the GaAs film side, the warpage amount was 15 μm, the crack number density of the GaAs film was extremely small, and the dislocation density of the GaAs film was 1 × 10 4 cm −2 . The wafer J warped in a convex shape on the GaAs film side, the warpage amount was 120 μm, the crack number density of the GaAs film was small, and the dislocation density of the GaAs film was 2 × 10 4 cm −2 . The wafer K was warped convexly on the GaAs film side, the warpage amount was 230 μm, the crack number density of the GaAs film was small, and the dislocation density of the GaAs film was 3 × 10 4 cm −2 . The wafer L was warped convexly on the GaAs film side, the amount of warpage was 745 μm, the number of cracks in the GaAs film was small, and the dislocation density of the GaAs film was 4 × 10 4 cm −2 . The wafer M was cracked in the support substrate, and a sufficient GaAs film could not be obtained. These results are summarized in Table 3. In Table 3, “-” indicates that the physical property value is not measured.

4.支持基板の除去工程
図2(C)を参照して、上記で得られたウエハA〜Lを、10質量%のフッ化水素酸水溶液に浸漬することにより、支持基板A〜L(支持基板11)およびSiO2層を溶解させることにより除去して、GaAs単結晶膜(単結晶膜13)の主面13m上に成膜されたGaAs膜A〜L(GaAs系膜20)が得られた。なお、ウエハA〜Lから支持基板A〜LおよびSiO2層が除去されたGaAs膜A〜L(GaAs系膜20)においても反りがCorning Tropel社のFM200EWaferを用いて観察される光干渉縞による測定により認められ、GaAs膜A〜Lの反りの大小関係には、ウエハA〜Lにおける反りの大小関係が維持されていた。
4). Step of removing support substrate Referring to FIG. 2C, wafers A to L obtained above are immersed in a 10% by mass hydrofluoric acid aqueous solution, thereby supporting substrates A to L (support substrate 11). ) And the SiO 2 layer were removed by dissolution to obtain GaAs films A to L (GaAs-based film 20) formed on the main surface 13m of the GaAs single crystal film (single crystal film 13). It should be noted that warpage is also observed in the GaAs films A to L (GaAs-based film 20) from which the supporting substrates A to L and the SiO 2 layer are removed from the wafers A to L due to optical interference fringes observed using the Corning Tropel FM200EWafer. The magnitude relation of the warpage of the GaAs films A to L was maintained by the measurement, and the magnitude relation of the warpage in the wafers A to L was maintained.

Figure 2013116848
Figure 2013116848

表3を参照して、主面内の熱膨張係数αSがGaAs結晶の熱膨張係数αGaAsの0.8倍より大きく1.2倍より小さい(すなわち、0.8<(αS/αGaAs比)<1.2)支持基板を有する複合基板を用いることにより(ウエハB〜K)、反り小さく転位密度が低く結晶性の良好なGaAs膜を成膜することができた。また、GaAs膜の反りおよび転位密度をさらに低減する観点から、複合基板の支持基板の主面内の熱膨張係数αSは、GaAs結晶の熱膨張係数αGaAsの0.9倍より大きく1.15倍より小さいこと(すなわち、0.9<(αS/αGaAs比)<1.15)(ウエハE〜J)が好ましく、GaAs結晶の熱膨張係数αGaAsの0.95倍より大きく1.1倍より小さいこと(すなわち、0.95<(αS/αGaAs比)<1.1)(ウエハF〜I)がより好ましい。 Referring to Table 3, the coefficient of thermal expansion α S in the main surface is larger than 0.8 times that of GaAs crystal α GaAs and smaller than 1.2 times (that is, 0.8 <(α S / α GaAs ratio) <1.2) By using a composite substrate having a supporting substrate (wafers B to K), a GaAs film having low warpage, low dislocation density, and good crystallinity could be formed. Further, from the viewpoint of further reducing the warpage and dislocation density of the GaAs film, the thermal expansion coefficient alpha S in the main surface of the supporting substrate of the composite substrate is greater than 0.9 times the thermal expansion coefficient alpha GaAs of GaAs crystal 1. It is preferably less than 15 times (that is, 0.9 <(α S / α GaAs ratio) <1.15) (wafers E to J), and the thermal expansion coefficient of GaAs crystal is larger than 0.95 times that of α GaAs and is 1 It is more preferable that the ratio is smaller than 1 time (that is, 0.95 <(α S / α GaAs ratio) <1.1) (wafers F to I).

なお、上記実施例においては、複合基板上に非ドーピングのGaAs膜を成膜した例を示したが、ドーピングによりn型またはp型の導電性が付与されたGaAs膜を成膜した場合、ドーピングにより比抵抗が高められたGaAs膜を成膜した場合にも、上記実施例とほぼ同一の結果が得られた。   In the above embodiment, an example is shown in which an undoped GaAs film is formed on a composite substrate. However, when an n-type or p-type conductivity imparted by doping is formed, doping is performed. Even when a GaAs film having a higher specific resistance was formed by the above method, almost the same result as in the above example was obtained.

また、GaAs膜に替えてGaxInyAl1-x-yAs膜(0<x<1、y≧0、x+y≦1)などのGaAs系膜を成膜した場合にも上記実施例と同様の結果が得られた。特に、GaAs膜に替えてGaxInyAl1-x-yAs膜(0.5<x<1、y≧0、x+y≦1)を成膜する場合には、上記実施例とほぼ同一の結果が得られた。 Further, when a GaAs-based film such as a Ga x In y Al 1-xy As film (0 <x <1, y ≧ 0, x + y ≦ 1) is formed instead of the GaAs film, the same as the above embodiment Results were obtained. In particular, when a Ga x In y Al 1-xy As film (0.5 <x <1, y ≧ 0, x + y ≦ 1) is formed in place of the GaAs film, the results are almost the same as in the above embodiment. was gotten.

また、GaAs系膜(具体的にはGaxInyAl1-x-yAs膜(x>0、y≧0、x+y≦1)など)は、Ga、In、AlなどのIII族元素の組成比を変えて複数成膜することもできる。すなわち、GaAs膜に替えてGaxInyAl1-x-yAs膜(x>0、y≧0、x+y≦1)などのGaAs系膜を、Ga、In、AlなどのIII族元素の組成比を変えて、複数成膜することができる。 A GaAs-based film (specifically, Ga x In y Al 1-xy As film (x> 0, y ≧ 0, x + y ≦ 1), etc.) is a composition ratio of group III elements such as Ga, In, and Al. It is also possible to form a plurality of films by changing. That is, a GaAs-based film such as a Ga x In y Al 1-xy As film (x> 0, y ≧ 0, x + y ≦ 1) is used instead of the GaAs film, and the composition ratio of group III elements such as Ga, In, and Al A plurality of films can be formed by changing the above.

本発明の実施においては、GaAs系膜の成膜の際にELO(Epitaxial Lateral Overgrowth;ラテラル成長)技術などの公知の転位低減技術を適用できる。   In the practice of the present invention, a known dislocation reduction technique such as an ELO (Epitaxial Lateral Overgrowth) technique can be applied when forming a GaAs-based film.

また、複合基板にGaAs系膜を成膜した後に、複合基板の支持基板などを除去する際には、GaAs系膜を別の支持基板に転写してもよい。   Further, after removing the support substrate of the composite substrate after forming the GaAs film on the composite substrate, the GaAs film may be transferred to another support substrate.

今回開示された実施の形態および実施例はすべての点で例示であって制限的なものではないと考えられるべきである。本発明の範囲は上記した説明ではなくて特許請求の範囲によって示され、特許請求の範囲と均等の意味および範囲内でのすべての変更が含まれることが意図される。   It should be understood that the embodiments and examples disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

10 複合基板、11 支持基板、11m,12m,12am,12bn,13m,13n,20m,21m,23m,30n 主面、12,12a,12b 接着層、13 単結晶膜、20 GaAs系膜、21 GaAs系バッファ層、23 GaAs系単結晶層、30 下地基板、40 ワックス。   DESCRIPTION OF SYMBOLS 10 Composite substrate, 11 Support substrate, 11m, 12m, 12am, 12bn, 13m, 13n, 20m, 21m, 23m, 30n Main surface, 12, 12a, 12b Adhesive layer, 13 Single crystal film, 20 GaAs system film, 21 GaAs Buffer layer, 23 GaAs single crystal layer, 30 base substrate, 40 wax.

Claims (11)

フッ化水素酸に溶解する支持基板と、前記支持基板の主面側に配置されている単結晶膜と、を含み、
前記支持基板の主面内の熱膨張係数が、GaAs結晶の熱膨張係数に比べて、0.8倍より大きく1.2倍より小さい複合基板。
A support substrate that dissolves in hydrofluoric acid, and a single crystal film disposed on the main surface side of the support substrate,
A composite substrate having a thermal expansion coefficient in the main surface of the support substrate that is greater than 0.8 times and less than 1.2 times the thermal expansion coefficient of a GaAs crystal.
前記支持基板は、ジルコニアとシリカとで形成されるZrO2−SiO2複合酸化物と、ジルコニアおよびシリカの少なくともいずれかと、を含む請求項1に記載の複合基板。 The composite substrate according to claim 1, wherein the support substrate includes a ZrO 2 —SiO 2 composite oxide formed of zirconia and silica, and at least one of zirconia and silica. 前記支持基板は、アルミナとシリカとで形成されるAl23−SiO2複合酸化物と、イットリア安定化ジルコニアと、を含む請求項1に記載の複合基板。 The composite substrate according to claim 1, wherein the support substrate includes an Al 2 O 3 —SiO 2 composite oxide formed of alumina and silica, and yttria-stabilized zirconia. 前記支持基板は、アルミナとシリカとで形成されるAl23−SiO2複合酸化物と、マグネシアと、を含む請求項1に記載の複合基板。 The composite substrate according to claim 1, wherein the support substrate includes Al 2 O 3 —SiO 2 composite oxide formed of alumina and silica, and magnesia. 前記複合基板における前記単結晶膜の主面の面積が45cm2以上である請求項1から請求項4のいずれかに記載の複合基板。 5. The composite substrate according to claim 1, wherein an area of a main surface of the single crystal film in the composite substrate is 45 cm 2 or more. フッ化水素酸に溶解する支持基板と、前記支持基板の主面側に配置されている単結晶膜と、を含み、前記支持基板の主面内の熱膨張係数が、GaAs結晶の熱膨張係数に比べて、0.8倍より大きく1.2倍より小さい複合基板を準備する工程と、
前記支持基板の主面側に配置されている前記単結晶膜の主面上にGaAs系膜を成膜する工程と、
前記支持基板を、フッ化水素酸に溶解することにより、除去する工程と、を含むGaAs系膜の製造方法。
A support substrate that dissolves in hydrofluoric acid, and a single crystal film disposed on a main surface side of the support substrate, wherein a thermal expansion coefficient in the main surface of the support substrate is a thermal expansion coefficient of a GaAs crystal A step of preparing a composite substrate larger than 0.8 times and smaller than 1.2 times;
Forming a GaAs-based film on the main surface of the single crystal film disposed on the main surface side of the support substrate;
A step of removing the support substrate by dissolving it in hydrofluoric acid.
前記支持基板は、ジルコニアとシリカとで形成されるZrO2−SiO2複合酸化物と、ジルコニアおよびシリカの少なくともいずれかと、を含む請求項6に記載のGaAs系膜の製造方法。 The GaAs-based film manufacturing method according to claim 6, wherein the support substrate includes a ZrO 2 —SiO 2 composite oxide formed of zirconia and silica, and at least one of zirconia and silica. 前記支持基板は、アルミナとシリカとで形成されるAl23−SiO2複合酸化物と、イットリア安定化ジルコニアと、を含む請求項6に記載のGaAs系膜の製造方法。 The GaAs-based film manufacturing method according to claim 6, wherein the support substrate includes an Al 2 O 3 —SiO 2 composite oxide formed of alumina and silica and yttria-stabilized zirconia. 前記支持基板は、アルミナとシリカとで形成されるAl23−SiO2複合酸化物と、マグネシアと、を含む請求項6に記載のGaAs系膜の製造方法。 The method for producing a GaAs-based film according to claim 6, wherein the support substrate includes Al 2 O 3 —SiO 2 composite oxide formed of alumina and silica, and magnesia. 前記複合基板における前記単結晶膜の主面の面積が45cm2以上である請求項6から請求項9のいずれかに記載のGaAs系膜の製造方法。 The method for producing a GaAs-based film according to any one of claims 6 to 9, wherein an area of a main surface of the single crystal film in the composite substrate is 45 cm 2 or more. 前記GaAs系膜を成膜する工程は、前記単結晶膜の主面上にGaAs系バッファ層を形成するサブ工程と、前記GaAs系バッファ層の主面上にGaAs系単結晶層を形成するサブ工程と、を含む請求項6から請求項10のいずれかに記載のGaAs系膜の製造方法。   The step of forming the GaAs-based film includes a sub-step of forming a GaAs-based buffer layer on the main surface of the single-crystal film and a sub-step of forming a GaAs-based single crystal layer on the main surface of the GaAs-based buffer layer. A method for producing a GaAs-based film according to any one of claims 6 to 10, comprising a step.
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TWI709672B (en) * 2016-04-07 2020-11-11 日商住友電氣工業股份有限公司 Polycrystalline ceramic substrate, polycrystalline ceramic substrate with bonding layer added, and multilayer substrate
US11545356B2 (en) 2016-04-07 2023-01-03 Sumitomo Electric Industries, Ltd. Polycrystalline ceramic substrate, bonding-layer-including polycrystalline ceramic substrate, and laminated substrate

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