JP2013004897A - Group iii nitride semiconductor film, manufacturing method of the same, group iii nitride semiconductor device and manufacturing method of the same - Google Patents

Group iii nitride semiconductor film, manufacturing method of the same, group iii nitride semiconductor device and manufacturing method of the same Download PDF

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JP2013004897A
JP2013004897A JP2011137270A JP2011137270A JP2013004897A JP 2013004897 A JP2013004897 A JP 2013004897A JP 2011137270 A JP2011137270 A JP 2011137270A JP 2011137270 A JP2011137270 A JP 2011137270A JP 2013004897 A JP2013004897 A JP 2013004897A
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group iii
iii nitride
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Takashi Matsuura
尚 松浦
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Sumitomo Electric Industries Ltd
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Abstract

PROBLEM TO BE SOLVED: To provide a group III nitride semiconductor film including a homogenous group III nitride semiconductor layer of n-type conductivity and a group III nitride semiconductor device including the group III nitride semiconductor film.SOLUTION: A present group III nitride semiconductor film 20 includes at least one layer of group III nitride semiconductor layers 21, 22 in which principal surfaces 20m, 21m, 22m each has an off angle θ of larger than 0° and smaller than 180° with respect to (0001) plane 20c, and a dopant that substantially determines n-type conductivity is oxygen. A present group III nitride semiconductor device includes the above-described group III nitride semiconductor film 20.

Description

本発明は、ｎ型導電性のＩＩＩ族窒化物半導体を含むＩＩＩ族窒化物半導体膜およびその製造方法、ならびにかかるＩＩＩ族窒化物半導体膜を含むＩＩＩ族窒化物半導体デバイスおよびその製造方法に関する。   The present invention relates to a group III nitride semiconductor film including an n-type conductive group III nitride semiconductor and a manufacturing method thereof, and a group III nitride semiconductor device including the group III nitride semiconductor film and a manufacturing method thereof.

ｎ型導電性のＩＩＩ族窒化物半導体層の形成においては、ｎ型導電性を決定するためのドーパントとして、一般に、シリコン、酸素、ゲルマニウムなどが併用して用いられる。
たとえば、特開２０１０−２１２４９３号公報（特許文献１）は、主面がｃ面に対して有限な角度をなす半極性面および無極性面のいずれか一方であり、ｎ型導電性を決定するドーパントとしてシリコンおよび酸素を含むＩＩＩ族窒化物半導体層を含むＩＩＩ族窒化物半導体素子を開示する。 In forming an n-type conductive group III nitride semiconductor layer, silicon, oxygen, germanium, or the like is generally used in combination as a dopant for determining n-type conductivity.
For example, Japanese Patent Laying-Open No. 2010-212493 (Patent Document 1) has a principal surface that is one of a semipolar surface and a nonpolar surface having a finite angle with respect to the c-plane, and determines n-type conductivity. A group III nitride semiconductor device comprising a group III nitride semiconductor layer containing silicon and oxygen as dopants is disclosed.

特開２０１０−２１２４９３号公報JP 2010-212493 A

かかる特開２０１０−２１２４９３号公報で開示されるＩＩＩ族窒化物半導体素子においては、ｎ型導電性を決定するドーパントとしてシリコンおよび酸素の２種類が用いられているため、シリコンと酸素との相互作用によりｎ型キャリア濃度の再現性が低く、均質なｎ型導電性のＩＩＩ族窒化物半導体層を形成するのが困難であるという問題があった。   In the group III nitride semiconductor device disclosed in Japanese Patent Application Laid-Open No. 2010-212493, two types of silicon and oxygen are used as dopants for determining n-type conductivity, and thus the interaction between silicon and oxygen Therefore, there is a problem that the reproducibility of the n-type carrier concentration is low and it is difficult to form a homogeneous n-type conductive group III nitride semiconductor layer.

また、シリコンのドーパントには、原料として爆発しやすく危険なシランガスが使用されるため、製造設備および製造工程において安全性を担保するための措置が必要となり、製造コストが高くなるととともに製造効率が低下するという問題もあった。   In addition, silicon dopant uses silane gas that is explosive and dangerous as a raw material. Therefore, measures are required to ensure safety in manufacturing equipment and manufacturing processes, which increases manufacturing costs and decreases manufacturing efficiency. There was also a problem of doing.

本発明は、均質なｎ型導電性のＩＩＩ族窒化物半導体層を含むＩＩＩ族窒化物半導体膜およびその製造方法、ならびにかかるＩＩＩ族窒化物半導体膜を含むＩＩＩ族窒化物半導体デバイスおよびその製造方法を提供することを目的とする。   The present invention relates to a group III nitride semiconductor film including a homogeneous n-type conductive group III nitride semiconductor layer and a method for manufacturing the same, and a group III nitride semiconductor device including the group III nitride semiconductor film and a method for manufacturing the same. The purpose is to provide.

本発明は、主面が（０００１）面に対して０°より大きく１８０°より小さいオフ角を有し、ｎ型導電性を実質的に決定するドーパントが酸素であるＩＩＩ族窒化物半導体層を少なくとも１層含むＩＩＩ族窒化物半導体膜である。   The present invention provides a group III nitride semiconductor layer in which a main surface has an off angle larger than 0 ° and smaller than 180 ° with respect to a (0001) plane, and a dopant that substantially determines n-type conductivity is oxygen. It is a group III nitride semiconductor film including at least one layer.

本発明にかかるＩＩＩ族窒化物半導体膜は、ドーパントである酸素の濃度を１×１０19ｃｍ-3以上とすることができる。また、複数層のＩＩＩ族窒化物半導体層を含み、ひとつのＩＩＩ族窒化物半導体層の酸素の濃度と、それ以外のＩＩＩ族窒化物半導体層の酸素の濃度とを異ならせることができる。 In the group III nitride semiconductor film according to the present invention, the concentration of oxygen as a dopant can be set to 1 × 10 19 cm −3 or more. In addition, a group III nitride semiconductor layer can be included, and the oxygen concentration of one group III nitride semiconductor layer can be different from the oxygen concentration of other group III nitride semiconductor layers.

また、本発明は、上記のＩＩＩ族窒化物半導体膜の製造方法であって、ＩＩＩ族窒化物半導体層の成長の際に、原料ガスの水分濃度によりＩＩＩ族窒化物半導体層の酸素の濃度を調節するＩＩＩ族窒化物半導体膜の製造方法である。   The present invention is also a method for producing a group III nitride semiconductor film as described above, wherein the concentration of oxygen in the group III nitride semiconductor layer is controlled by the moisture concentration of the source gas during the growth of the group III nitride semiconductor layer. This is a method of manufacturing a group III nitride semiconductor film to be adjusted.

また、本発明は、上記のＩＩＩ族窒化物半導体膜を含むＩＩＩ族窒化物半導体デバイスである。   The present invention is also a group III nitride semiconductor device including the above group III nitride semiconductor film.

また、本発明は、上記のＩＩＩ族窒化物半導体デバイスの製造方法であって、ＩＩＩ族窒化物半導体層の成長の際に、原料ガスの水分濃度によりＩＩＩ族窒化物半導体層の酸素の濃度を調節するＩＩＩ族窒化物半導体デバイスの製造方法である。   The present invention is also a method for manufacturing a group III nitride semiconductor device as described above, wherein the concentration of oxygen in the group III nitride semiconductor layer is controlled by the moisture concentration of the source gas during the growth of the group III nitride semiconductor layer. It is a manufacturing method of the group III nitride semiconductor device to adjust.

本発明によれば、均質なｎ型導電性のＩＩＩ族窒化物半導体層を含むＩＩＩ族窒化物半導体膜およびその製造方法、ならびにかかるＩＩＩ族窒化物半導体膜を含むＩＩＩ族窒化物半導体デバイスおよびその製造方法を提供できる。   According to the present invention, a group III nitride semiconductor film including a homogeneous n-type conductive group III nitride semiconductor layer, a method for manufacturing the same, a group III nitride semiconductor device including such a group III nitride semiconductor film, and the same A manufacturing method can be provided.

本発明にかかるＩＩＩ族窒化物半導体膜の一例を示す概略断面図である。It is a schematic sectional drawing which shows an example of the group III nitride semiconductor film concerning this invention. 本発明にかかるＩＩＩ族窒化物半導体膜の製造方法の一例を示す概略断面図である。It is a schematic sectional drawing which shows an example of the manufacturing method of the group III nitride semiconductor film concerning this invention. 本発明にかかるＩＩＩ族窒化物半導体デバイスの一例を示す概略断面図である。It is a schematic sectional drawing which shows an example of the group III nitride semiconductor device concerning this invention. 本発明にかかるＩＩＩ族窒化物半導体デバイスの別の例を示す概略断面図である。It is a schematic sectional drawing which shows another example of the group III nitride semiconductor device concerning this invention. 本発明にかかるＩＩＩ族窒化物半導体デバイスのさらに別の例を示す概略断面図である。It is a schematic sectional drawing which shows another example of the group III nitride semiconductor device concerning this invention.

［実施形態１］
図１を参照して、本発明のある実施形態であるＩＩＩ族窒化物半導体膜２０は、主面２０ｍ，２１ｍ，２２ｍが（０００１）面２０ｃに対して０°より大きく１８０°より小さいオフ角θを有し、ｎ型導電性を実質的に決定するドーパントが酸素であるＩＩＩ族窒化物半導体層２１，２２を少なくとも１層含む。 [Embodiment 1]
Referring to FIG. 1, group III nitride semiconductor film 20 according to an embodiment of the present invention has an off-angle with principal surfaces 20m, 21m, and 22m larger than 0 ° and smaller than 180 ° with respect to (0001) plane 20c. It includes at least one group III nitride semiconductor layer 21, 22 that has θ and oxygen is a dopant that substantially determines n-type conductivity.

本実施形態のＩＩＩ族窒化物半導体膜２０に含まれるＩＩＩ族窒化物半導体層２１，２２は、その主面２１ｍ，２２ｍが（０００１）面２０ｃに対して０°より大きく１８０°より小さいオフ角θを有する。すなわち、ＩＩＩ族窒化物半導体層２１，２２は、その主面２１ｍ、２２ｍが、（０００１）面２０ｃに対するオフ角θが０°より大きく９０°より小さいかまたは９０°より大きく１８０°より小さい半極性面（半極性の表面をいう、以下同じ。）、または、（０００１）面２０ｃに対するオフ角θが９０°の無極性面（無極性の表面をいう、以下同じ。）であるため、成長の際にｎ型導電性を実質的に決定するドーパントとしての酸素が取り込まれやすい。このため、ＩＩＩ族窒化物半導体層２１，２２のドーパントとして酸素のみを用いることにより、ＩＩＩ族窒化物半導体層２１，２２のｎ型導電性を実質的に決定することができる。また、ＩＩＩ族窒化物半導体層２１，２２に含まれる酸素の濃度を調節することにより、所望の導電性を有するＩＩＩ族窒化物半導体層２１，２２が得られる。   The group III nitride semiconductor layers 21 and 22 included in the group III nitride semiconductor film 20 of the present embodiment have their principal surfaces 21m and 22m larger than 0 ° and smaller than 180 ° with respect to the (0001) plane 20c. θ. That is, group III nitride semiconductor layers 21 and 22 have their main surfaces 21m and 22m whose semi-off angles θ with respect to (0001) plane 20c are larger than 0 ° and smaller than 90 °, or larger than 90 ° and smaller than 180 °. Since it is a polar surface (refers to a semipolar surface, the same shall apply hereinafter) or a nonpolar surface having an off angle θ of 90 ° with respect to the (0001) surface 20c (refers to a nonpolar surface, hereinafter the same applies), At this time, oxygen as a dopant that substantially determines the n-type conductivity is easily taken in. For this reason, the n-type conductivity of the group III nitride semiconductor layers 21 and 22 can be substantially determined by using only oxygen as the dopant of the group III nitride semiconductor layers 21 and 22. Further, by adjusting the concentration of oxygen contained in group III nitride semiconductor layers 21 and 22, group III nitride semiconductor layers 21 and 22 having desired conductivity are obtained.

ここで、ＩＩＩ族窒化物半導体層２１，２２の（０００１）面２０ｃに対する主面２１ｍ，２２ｍのオフ角θは、ＩＩＩ族窒化物半導体層２１，２２への酸素の取り込み易さを促進する観点から、１０°より大きく８０°より小さいことが好ましく、６０°より大きく８０°より小さいことがさらに好ましい。   Here, the off-angle θ of the main surfaces 21m and 22m with respect to the (0001) plane 20c of the group III nitride semiconductor layers 21 and 22 is a viewpoint that promotes easy incorporation of oxygen into the group III nitride semiconductor layers 21 and 22. Therefore, it is preferably larger than 10 ° and smaller than 80 °, more preferably larger than 60 ° and smaller than 80 °.

また、ＩＩＩ族窒化物半導体層２１，２２に含まれる酸素の濃度は、ｎ型導電性を高める観点から、１×１０19ｃｍ-3以上が好ましく、５×１０19ｃｍ-3以上がより好ましい。ここで、ＩＩＩ族窒化物半導体層２１，２２に含まれる酸素の濃度は、ＳＩＭＳ（２次イオン質量分析）法により測定することができる。 Further, the concentration of oxygen contained in the group III nitride semiconductor layers 21 and 22 is preferably 1 × 10 19 cm −3 or more, more preferably 5 × 10 19 cm −3 or more, from the viewpoint of improving n-type conductivity. . Here, the concentration of oxygen contained in the group III nitride semiconductor layers 21 and 22 can be measured by SIMS (secondary ion mass spectrometry).

また、ＩＩＩ族窒化物半導体膜２０は、所望の半導体デバイスを形成する観点から、複数層のＩＩＩ族窒化物半導体層２１，２２を含み、ひとつのＩＩＩ族窒化物半導体層２１の酸素の濃度と、それ以外のＩＩＩ族窒化物半導体層２２の酸素の濃度とを異ならせることができる。   Further, from the viewpoint of forming a desired semiconductor device, the group III nitride semiconductor film 20 includes a plurality of group III nitride semiconductor layers 21 and 22, and the oxygen concentration of one group III nitride semiconductor layer 21 and The oxygen concentration of the other group III nitride semiconductor layer 22 can be made different.

［実施形態２］
図２を参照して、本発明の別の実施形態であるＩＩＩ族窒化物半導体膜の製造方法は、実施形態１のＩＩＩ族窒化物半導体膜２０の製造方法であって、ＩＩＩ族窒化物半導体層２１，２２の成長の際に、原料ガスの水分濃度によりＩＩＩ族窒化物半導体層２１，２２の酸素の濃度を調節するものである。かかる製造方法により、効率よく実施形態１のＩＩＩ族窒化物半導体膜２０が得られる。 [Embodiment 2]
Referring to FIG. 2, the Group III nitride semiconductor film manufacturing method according to another embodiment of the present invention is a Group III nitride semiconductor film 20 manufacturing method according to Embodiment 1 and includes a Group III nitride semiconductor. During the growth of the layers 21 and 22, the oxygen concentration of the group III nitride semiconductor layers 21 and 22 is adjusted by the moisture concentration of the source gas. With this manufacturing method, the group III nitride semiconductor film 20 of Embodiment 1 can be obtained efficiently.

本実施形態のＩＩＩ族窒化物半導体膜の製造方法は、特に制限はないが、効率よく実施形態１のＩＩＩ族窒化物半導体膜２０を製造する観点から、主面１０ｍが（０００１）面１０ｃに対して０°より大きく１８０°より小さいオフ角θを有するＩＩＩ族窒化物基板１０を準備する工程と、ＩＩＩ族窒化物基板１０の主面１０ｍ上に少なくとも１層のＩＩＩ族窒化物半導体層２１，２２を成長させることにより、ＩＩＩ族窒化物半導体層２１，２２を含むＩＩＩ族窒化物半導体膜２０を形成する工程と、を含むことが好ましい。   The manufacturing method of the group III nitride semiconductor film of the present embodiment is not particularly limited, but from the viewpoint of efficiently manufacturing the group III nitride semiconductor film 20 of the first embodiment, the main surface 10m becomes the (0001) surface 10c. In contrast, a step of preparing a group III nitride substrate 10 having an off angle θ larger than 0 ° and smaller than 180 °, and at least one group III nitride semiconductor layer 21 on the main surface 10m of the group III nitride substrate 10 , 22 to form a group III nitride semiconductor film 20 including group III nitride semiconductor layers 21 and 22 is preferably included.

（ＩＩＩ族窒化物基板の準備工程）
本実施形態のＩＩＩ族窒化物半導体膜の製造方法は、たとえば、主面１０ｍが（０００１）面１０ｃに対して０°より大きく１８０°より小さいオフ角θを有するＩＩＩ族窒化物基板１０を準備する工程を含む。かかるＩＩＩ族窒化物基板１０を用いることにより、主面２０ｍ，２１ｍ，２２ｍが（０００１）面２０ｃに対して０°より大きく１８０°より小さいオフ角θを有するＩＩＩ族窒化物半導体層２１，２２を少なくとも１層含むＩＩＩ族窒化物半導体膜２０を効率よく形成することができる。 (Preparation process of group III nitride substrate)
In the method for manufacturing a group III nitride semiconductor film of this embodiment, for example, a group III nitride substrate 10 having a main surface 10m having an off angle θ greater than 0 ° and smaller than 180 ° with respect to the (0001) surface 10c is prepared. The process of carrying out is included. By using the group III nitride substrate 10, the group III nitride semiconductor layers 21, 22 having the main surfaces 20m, 21m, and 22m having an off angle θ larger than 0 ° and smaller than 180 ° with respect to the (0001) surface 20c. Group III nitride semiconductor film 20 containing at least one layer can be formed efficiently.

本実施形態で用いられるＩＩＩ族窒化物基板１０を準備する方法には、特に制限はなく、たとえば、従来の方法により製造された厚いＩＩＩ族窒化物バルク結晶を（０００１）面１０ｃに対して０°より大きく１８０°より小さいオフ角θを有する面に平行な面で切り出すことができる。   The method for preparing the group III nitride substrate 10 used in the present embodiment is not particularly limited. For example, a thick group III nitride bulk crystal manufactured by a conventional method is 0 with respect to the (0001) plane 10c. It can be cut out in a plane parallel to a plane having an off angle θ larger than 180 ° and smaller than 180 °.

（ＩＩＩ族窒化物半導体膜の形成方法）
本実施形態のＩＩＩ族窒化物半導体膜の製造方法は、たとえば、上記のＩＩＩ族窒化物基板１０の主面１０ｍ上に少なくとも１層のＩＩＩ族窒化物半導体層２１，２２を成長させることにより、ＩＩＩ族窒化物半導体層２１，２２を含むＩＩＩ族窒化物半導体膜２０を形成する工程を含む。ＩＩＩ族窒化物基板１０は、（０００１）面１０ｃに対して０°より大きく１８０°より小さいオフ角θを有する主面１０ｍを有しているため、その主面１０ｍ上に、主面２１ｍ，２２ｍが（０００１）面２０ｃに対して０°より大きく１８０°より小さいオフ角θ（すなわち、ＩＩＩ族窒化物基板１０の主面１０ｍのオフ角θと同じ角度のオフ角θ）を有するＩＩＩ族窒化物半導体層２１，２２をエピタキシャル成長させることができる。 (Method for Forming Group III Nitride Semiconductor Film)
The method for producing a group III nitride semiconductor film of the present embodiment includes, for example, growing at least one group III nitride semiconductor layer 21, 22 on the main surface 10 m of the above group III nitride substrate 10, Forming a group III nitride semiconductor film 20 including group III nitride semiconductor layers 21 and 22. Since group III nitride substrate 10 has a main surface 10m having an off angle θ greater than 0 ° and smaller than 180 ° with respect to (0001) surface 10c, main surface 21m, 22m has an off angle θ larger than 0 ° and smaller than 180 ° with respect to the (0001) plane 20c (that is, a group III having the same off angle θ as the off angle θ of the main surface 10m of the group III nitride substrate 10). The nitride semiconductor layers 21 and 22 can be epitaxially grown.

ここで、ＩＩＩ族窒化物半導体層２１，２２をエピタキシャル成長させる方法は、特に制限はなく、ＭＯＶＰＥ（有機金属気相成長）法、ＭＢＥ（分子線成長）法、ＨＶＰＥ（ハイドライド気相成長）法、昇華法などの気相法、フラックス法、高窒素圧溶液法などの液相法などが、好適に挙げられる。ここで、ＩＩＩ族窒化物半導体層２１，２２の化学組成、特に酸素の濃度の調節および厚さの調節の精度が高い観点から、ＭＯＶＰＥ法が特に好ましい。ＭＯＶＰＥ法により成長させる場合には、ＩＩＩ族元素原料となる原料ガスとしてＴＭＧ（トリメチルガリウム）ガス、ＴＭＡ（トリメチルアルミニウム）ガス、ＴＭＩ（トリメチルインジウム）ガスなどが好適に用いられ、窒素原料となる原料ガスとしてＮＨ3（アンモニア）ガスなどが好適に用いられ、ｎ型導電性を決定するドーパントである酸素の原料ガスとしてＮＨ3（アンモニア）ガス中の水分（具体的には、水蒸気）が好適に用いられ、ｐ型導電性を決定するドーパントであるＭｇ（マグネシウム）の原料ガスとしてＣＰ2Ｍｇ（ビスシクロペンタジエニルマグネシウム）などが好適に用いられる。 Here, the method of epitaxially growing the group III nitride semiconductor layers 21 and 22 is not particularly limited, and includes a MOVPE (metal organic chemical vapor deposition) method, an MBE (molecular beam growth) method, an HVPE (hydride vapor phase growth) method, Preferable examples include a gas phase method such as a sublimation method, a liquid phase method such as a flux method, and a high nitrogen pressure solution method. Here, the MOVPE method is particularly preferable from the viewpoint of high accuracy in adjusting the chemical composition of the group III nitride semiconductor layers 21 and 22, in particular, the oxygen concentration and the thickness. In the case of growing by the MOVPE method, TMG (trimethylgallium) gas, TMA (trimethylaluminum) gas, TMI (trimethylindium) gas, or the like is preferably used as a source gas that becomes a group III element source, and a source material that becomes a nitrogen source such as NH 3 (ammonia) gas as a gas is suitably used (specifically, water vapor) NH 3 (ammonia) water in the gas as an oxygen source gas as a dopant for determining the n-type conductivity suitably CP 2 Mg (biscyclopentadienyl magnesium) or the like is preferably used as a source gas for Mg (magnesium), which is a dopant that determines p-type conductivity.

本実施形態のＩＩＩ族窒化物半導体膜の製造方法においては、ＩＩＩ族窒化物半導体層２１，２２の成長の際に、原料ガスの水分濃度によりＩＩＩ族窒化物半導体層２１，２２の酸素の濃度を調節する。かかる方法によれば、ＩＩＩ族窒化物半導体層２１，２２の酸素の濃度を精度よく調節することができる。   In the method for producing a group III nitride semiconductor film of this embodiment, the concentration of oxygen in the group III nitride semiconductor layers 21 and 22 depends on the moisture concentration of the source gas when the group III nitride semiconductor layers 21 and 22 are grown. Adjust. According to this method, the oxygen concentration of the group III nitride semiconductor layers 21 and 22 can be adjusted with high accuracy.

たとえば、ＭＯＶＰＥ法の場合は、原料ガスであるＮＨ3（アンモニア）ガスの水分濃度によりＩＩＩ族窒化物半導体層２１，２２の酸素の濃度を調節することができる。 For example, in the case of the MOVPE method, the oxygen concentration of the group III nitride semiconductor layers 21 and 22 can be adjusted by the moisture concentration of the NH 3 (ammonia) gas that is the source gas.

［実施形態３］
図３〜５を参照して、本発明のさらに別の実施形態であるＩＩＩ族窒化物半導体デバイスは、実施形態１のＩＩＩ族窒化物半導体膜２００を含む。かかるＩＩＩ族窒化物半導体デバイスは、ｎ型導電性を実質的に決定するドーパントが酸素であるＩＩＩ族窒化物半導体層（具体的には、ｎ型ＧａＮバッファ層２１０およびｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０の少なくとも１層）を有していることから、安定した動作電圧が得られる。 [Embodiment 3]
With reference to FIGS. 3 to 5, a group III nitride semiconductor device according to still another embodiment of the present invention includes a group III nitride semiconductor film 200 of the first embodiment. Such a group III nitride semiconductor device includes a group III nitride semiconductor layer (specifically, an n-type GaN buffer layer 210 and an n-type Al 0.04 Ga 0.96 N) in which the dopant that substantially determines the n-type conductivity is oxygen. Therefore, a stable operating voltage can be obtained.

本実施形態のＩＩＩ族窒化物半導体デバイスは、たとえば、図３および４を参照して、たとえば、ＩＩＩ族窒化物基板１０と、ＩＩＩ族窒化物基板１０の主面１０ｍ上に成長させられたＩＩＩ族窒化物半導体層であるｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０、Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ａ、Ｉｎ0.2Ｇａ0.8Ｎ井戸層とＧａＮ障壁層とで構成される３周期の量子井戸構造を有する活性層２４０、Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ｂ、ｐ型Ａｌ0.12Ｇａ0.88Ｎ電子ブロック層２５０、ｐ型Ａｌ0.06Ｇａ0.94Ｎクラッド層２６０およびｐ型ＧａＮコンタクト層２７０で構成されるＩＩＩ族窒化物半導体膜２００と、を含む。また、図５を参照して、図３および４に示すＩＩＩ族窒化物半導体デバイスにおいて、ＩＩＩ族窒化物基板１０とｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０との間に、さらなるＩＩＩ族窒化物半導体層としてｎ型ＧａＮバッファ層２１０をさらに含む。 The group III nitride semiconductor device of this embodiment is, for example, referring to FIGS. 3 and 4, for example, a group III nitride substrate 10 and a group III grown on the main surface 10 m of the group III nitride substrate 10. Three-period quantum well structure composed of an n-type Al 0.04 Ga 0.96 N cladding layer 220 which is a group nitride semiconductor layer, an In 0.03 Ga 0.97 N light guide layer 230a, an In 0.2 Ga 0.8 N well layer and a GaN barrier layer III comprising an active layer 240 having In, an In 0.03 Ga 0.97 N light guide layer 230 b, a p-type Al 0.12 Ga 0.88 N electron blocking layer 250, a p-type Al 0.06 Ga 0.94 N cladding layer 260 and a p-type GaN contact layer 270. Group nitride semiconductor film 200. Referring to FIG. 5, in the group III nitride semiconductor device shown in FIGS. 3 and 4, further group III nitride is provided between group III nitride substrate 10 and n-type Al 0.04 Ga 0.96 N cladding layer 220. An n-type GaN buffer layer 210 is further included as a semiconductor layer.

ここで、図３〜４に示すＩＩＩ族窒化物半導体デバイスは、ＩＩＩ族窒化物基板１０、ｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０、Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ａ、活性層２４０、Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ｂ、ｐ型Ａｌ0.12Ｇａ0.88Ｎ電子ブロック層２５０、ｐ型Ａｌ0.06Ｇａ0.94Ｎクラッド層２６０およびｐ型ＧａＮコンタクト層２７０は、いずれも、（０００１）面からｍ軸（＜１０−１０＞方向軸）方向に０°より大きく１８０°より小さいオフ角θを有する主面を有する。 3 to 4, the group III nitride semiconductor device includes a group III nitride substrate 10, an n-type Al 0.04 Ga 0.96 N cladding layer 220, an In 0.03 Ga 0.97 N light guide layer 230a, an active layer 240, an In The 0.03 Ga 0.97 N optical guide layer 230b, the p-type Al 0.12 Ga 0.88 N electron blocking layer 250, the p-type Al 0.06 Ga 0.94 N clad layer 260 and the p-type GaN contact layer 270 are all m-axis from the (0001) plane. (<10-10> direction axis) The main surface has an off angle θ greater than 0 ° and smaller than 180 ° in the direction.

また、図５に示すＩＩＩ族窒化物半導体デバイスは、ＩＩＩ族窒化物基板１０、ｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０、Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ａ、活性層２４０、Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ｂ、ｐ型Ａｌ0.12Ｇａ0.88Ｎ電子ブロック層２５０、ｐ型Ａｌ0.06Ｇａ0.94Ｎクラッド層２６０およびｐ型ＧａＮコンタクト層２７０に加えて、ｎ型ＧａＮバッファ層２１０も、（０００１）面２００ｃからｍ軸（＜１０−１０＞方向軸）方向に０°より大きく１８０°より小さいオフ角θを有する主面を有する。 The group III nitride semiconductor device shown in FIG. 5 includes a group III nitride substrate 10, an n-type Al 0.04 Ga 0.96 N cladding layer 220, an In 0.03 Ga 0.97 N light guide layer 230a, an active layer 240, and In 0.03 Ga 0.97. In addition to the N light guide layer 230b, the p-type Al 0.12 Ga 0.88 N electron blocking layer 250, the p-type Al 0.06 Ga 0.94 N clad layer 260 and the p-type GaN contact layer 270, the n-type GaN buffer layer 210 is also (0001) The main surface has an off-angle θ greater than 0 ° and smaller than 180 ° in the m-axis (<10-10> direction axis) direction from the surface 200c.

また、図３〜５に示すＩＩＩ族窒化物半導体デバイスにおいて、ＩＩＩ族窒化物半導体膜２００を構成するＩＩＩ族窒化物半導体層の少なくとも１層（具体的には、ｎ型ＧａＮバッファ層２１０およびｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０の少なくとも１層）は、ｎ型導電性を実質的に決定するドーパントが酸素である、すなわち、酸素のみによって実質的にｎ型導電性が決定される。また、ＩＩＩ族窒化物半導体層の少なくとも１層（具体的には、ｎ型ＧａＮバッファ層２１０およびｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０の少なくとも１層）は、ｎ型導電性を高める観点から、ドーパントである酸素の濃度が１×１０19ｃｍ-3以上であることが好ましい。また、所望の半導体デバイスを形成する観点から、ＩＩＩ族窒化物半導体層が複数層であって、ひとつのＩＩＩ族窒化物半導体層（たとえばｎ型ＧａＮバッファ層２１０）の酸素の濃度と、それ以外のＩＩＩ族窒化物半導体層（たとえばｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０）の酸素の濃度とが異なることが好ましい。 In addition, in the group III nitride semiconductor device shown in FIGS. 3 to 5, at least one group III nitride semiconductor layer (specifically, the n-type GaN buffer layer 210 and n) constituting the group III nitride semiconductor film 200 is used. In at least one layer of the type Al 0.04 Ga 0.96 N cladding layer 220), the dopant that substantially determines the n-type conductivity is oxygen, that is, the n-type conductivity is substantially determined only by oxygen. Further, at least one of the group III nitride semiconductor layers (specifically, at least one of the n-type GaN buffer layer 210 and the n-type Al 0.04 Ga 0.96 N cladding layer 220) is from the viewpoint of increasing the n-type conductivity. The concentration of oxygen as a dopant is preferably 1 × 10 19 cm −3 or more. Further, from the viewpoint of forming a desired semiconductor device, there are a plurality of group III nitride semiconductor layers, and the oxygen concentration of one group III nitride semiconductor layer (for example, the n-type GaN buffer layer 210), and the others The group III nitride semiconductor layer (for example, n-type Al 0.04 Ga 0.96 N cladding layer 220) preferably has a different oxygen concentration.

また、図３〜５を参照して、本実施形態のＩＩＩ族窒化物半導体デバイスは、ｐ型ＧａＮコンタクト層２７０上に形成された開口部を有する絶縁膜３００と、絶縁膜３００の開口部上に形成されたｐ側電極４００ｂと、ＩＩＩ族窒化物基板１０の主面１０ｎ上に形成されたｎ側電極４００ａと、をさらに含む。こうして、図３〜５に示すようなレーザダイオードＬＤ１，ＬＤ２，ＬＤ３であるＩＩＩ族窒化物半導体デバイスが得られる。   3 to 5, the group III nitride semiconductor device of this embodiment includes an insulating film 300 having an opening formed on the p-type GaN contact layer 270, and an opening of the insulating film 300. And a p-side electrode 400b formed on the main surface 10n of the group III nitride substrate 10 and an n-side electrode 400a. In this way, the group III nitride semiconductor device which is the laser diodes LD1, LD2 and LD3 as shown in FIGS.

［実施形態４］
図３〜５を参照して、本発明のさらに別の実施形態であるＩＩＩ族窒化物半導体膜の製造方法は、実施形態３のＩＩＩ族窒化物半導体デバイスの製造方法であって、ＩＩＩ族窒化物半導体層（具体的には、ｎ型ＧａＮバッファ層２１０およびｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０の少なくとも１層）の成長の際に、原料ガスの水分濃度によりＩＩＩ族窒化物半導体層（具体的には、ｎ型ＧａＮバッファ層２１０およびｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０の少なくとも１層）の酸素の濃度を調節するものである。かかる製造方法により、効率よく実施形態３のＩＩＩ族窒化物半導体デバイスが得られる。 [Embodiment 4]
Referring to FIGS. 3 to 5, the Group III nitride semiconductor film manufacturing method according to still another embodiment of the present invention is the Group III nitride semiconductor device manufacturing method of Embodiment 3, which includes Group III nitridation. During growth of a physical semiconductor layer (specifically, at least one of the n-type GaN buffer layer 210 and the n-type Al 0.04 Ga 0.96 N cladding layer 220), a group III nitride semiconductor layer ( Specifically, the oxygen concentration of the n-type GaN buffer layer 210 and the n-type Al 0.04 Ga 0.96 N clad layer 220 is adjusted. With this manufacturing method, the group III nitride semiconductor device of Embodiment 3 can be obtained efficiently.

本実施形態のＩＩＩ族窒化物半導体デバイスの製造方法は、特に制限はないが、効率よく実施形態３のＩＩＩ族窒化物半導体デバイス（たとえば、レーザダイオードＬＤ１，ＬＤ２，ＬＤ３）を製造する観点から、主面１０ｍが（０００１）面１０ｃに対して０°より大きく１８０°より小さいオフ角を有するＩＩＩ族窒化物基板１０を準備する工程と、ＩＩＩ族窒化物基板１０の主面１０ｍ上に少なくとも１層のＩＩＩ族窒化物半導体層を成長させることによりＩＩＩ族窒化物半導体層を含むＩＩＩ族窒化物半導体膜２０を形成する工程と、ＩＩＩ族窒化物半導体膜２０をデバイス化する工程と、を含むことが好ましい。   The method for manufacturing the group III nitride semiconductor device of the present embodiment is not particularly limited, but from the viewpoint of efficiently manufacturing the group III nitride semiconductor device of the third embodiment (for example, laser diodes LD1, LD2, and LD3), Preparing a group III nitride substrate 10 having a main surface 10m having an off angle larger than 0 ° and smaller than 180 ° with respect to (0001) surface 10c; and at least 1 on main surface 10m of group III nitride substrate 10 Forming a group III nitride semiconductor film 20 including a group III nitride semiconductor layer by growing a group III nitride semiconductor layer, and forming a group III nitride semiconductor film 20 as a device. It is preferable.

（ＩＩＩ族窒化物基板の準備工程）
図３〜５を参照して、本実施形態のＩＩＩ族窒化物半導体デバイスの製造方法は、たとえば、主面１０ｍが（０００１）面１０ｃに対して０°より大きく１８０°より小さいオフ角θを有するＩＩＩ族窒化物基板１０を準備する工程を含む。かかるＩＩＩ族窒化物基板１０を用いることにより、主面２１０ｍ，２２０ｍが（０００１）面２００ｃに対して０°より大きく１８０°より小さいオフ角θを有するＩＩＩ族窒化物半導体層（たとえば、ｎ型ＧａＮバッファ層２１０、ｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０）を少なくとも１層含むＩＩＩ族窒化物半導体膜２００を効率よく形成することができる。 (Preparation process of group III nitride substrate)
With reference to FIGS. 3 to 5, in the method for manufacturing a group III nitride semiconductor device of the present embodiment, for example, the main surface 10 m has an off angle θ that is greater than 0 ° and smaller than 180 ° with respect to the (0001) surface 10 c. A step of preparing a group III nitride substrate 10 having the same. By using such a group III nitride substrate 10, a group III nitride semiconductor layer (for example, n-type) having main surfaces 210m and 220m having an off angle θ greater than 0 ° and smaller than 180 ° with respect to (0001) plane 200c. The group III nitride semiconductor film 200 including at least one GaN buffer layer 210 and n-type Al 0.04 Ga 0.96 N clad layer 220) can be formed efficiently.

本実施形態で用いられるＩＩＩ族窒化物基板１０を準備する方法は、実施形態２の場合と同様であるため、ここでは繰り返さない。   Since the method for preparing the group III nitride substrate 10 used in the present embodiment is the same as that in the second embodiment, it will not be repeated here.

（ＩＩＩ族窒化物半導体膜の形成工程）
本実施形態のＩＩＩ族窒化物半導体デバイスの製造方法は、たとえば、上記のＩＩＩ族窒化物基板１０の主面１０ｍ上に少なくとも１層のＩＩＩ族窒化物半導体層を成長させることにより、ＩＩＩ族窒化物半導体層を含むＩＩＩ族窒化物半導体膜２０を形成する工程を含む。ＩＩＩ族窒化物基板１０は、（０００１）面１０ｃに対して０°より大きく１８０°より小さいオフ角θを有する主面１０ｍを有しているため、その主面１０ｍ上に、主面２１０ｍ，２２０ｍが（０００１）面２０ｃに対して０°より大きく１８０°より小さいオフ角θ（すなわち、ＩＩＩ族窒化物基板１０の主面１０ｍのオフ角θと同じ角度のオフ角θ）を有するＩＩＩ族窒化物半導体層（たとえば、ｎ型ＧａＮバッファ層２１０、ｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０）をエピタキシャル成長させることができる。 (Group III nitride semiconductor film formation process)
The method of manufacturing a group III nitride semiconductor device according to the present embodiment includes, for example, growing a group III nitride semiconductor layer by growing at least one group III nitride semiconductor layer on the main surface 10m of the group III nitride substrate 10 described above. Forming a group III nitride semiconductor film 20 including a semiconductor layer. Since group III nitride substrate 10 has a main surface 10m having an off angle θ greater than 0 ° and smaller than 180 ° with respect to (0001) surface 10c, main surface 210m, 220m has an off angle θ greater than 0 ° and smaller than 180 ° with respect to the (0001) plane 20c (that is, a group III having the same off angle θ as the off angle θ of the main surface 10m of the group III nitride substrate 10). A nitride semiconductor layer (eg, n-type GaN buffer layer 210, n-type Al 0.04 Ga 0.96 N cladding layer 220) can be epitaxially grown.

本実施形態のＩＩＩ族窒化物半導体デバイスの製造方法において、ＩＩＩ族窒化物半導体層のエピタキシャル成長は、たとえば、図３および４を参照して、ＩＩＩ族窒化物基板１０の主面１０ｍ上に、ｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０、Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ａ、Ｉｎ0.2Ｇａ0.8Ｎ井戸層とＧａＮ障壁層とで構成される３周期の量子井戸構造を有する活性層２４０、Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ｂ、ｐ型Ａｌ0.12Ｇａ0.88Ｎ電子ブロック層２５０、ｐ型Ａｌ0.06Ｇａ0.94Ｎクラッド層２６０およびｐ型ＧａＮコンタクト層２７０で構成されるＩＩＩ族窒化物半導体膜２００を順次エピタキシャル成長させることにより行なう。 In the group III nitride semiconductor device manufacturing method of the present embodiment, the group III nitride semiconductor layer is epitaxially grown on the main surface 10m of the group III nitride substrate 10 with reference to FIGS. Type Al 0.04 Ga 0.96 N cladding layer 220, In 0.03 Ga 0.97 N light guide layer 230 a, active layer 240 having a three-period quantum well structure composed of an In 0.2 Ga 0.8 N well layer and a GaN barrier layer, In 0.03 A group III nitride semiconductor film 200 composed of a Ga 0.97 N light guide layer 230b, a p-type Al 0.12 Ga 0.88 N electron blocking layer 250, a p-type Al 0.06 Ga 0.94 N cladding layer 260 and a p-type GaN contact layer 270 is sequentially formed. Epitaxial growth is performed.

また、図５を参照して、ＩＩＩ族窒化物基板１０の主面１０ｍ上にｎ型ＧａＮバッファ層２１０をエピタキシャル成長させた後、ｎ型ＧａＮバッファ層２１０上に、ｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０、Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ａ、Ｉｎ0.2Ｇａ0.8Ｎ井戸層とＧａＮ障壁層とで構成される３周期の量子井戸構造を有する活性層２４０、Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ｂ、ｐ型Ａｌ0.12Ｇａ0.88Ｎ電子ブロック層２５０、ｐ型Ａｌ0.06Ｇａ0.94Ｎクラッド層２６０およびｐ型ＧａＮコンタクト層２７０で構成されるＩＩＩ族窒化物半導体膜２００を順次エピタキシャル成長させることができる。 Referring to FIG. 5, after n-type GaN buffer layer 210 is epitaxially grown on main surface 10 m of group III nitride substrate 10, n-type Al 0.04 Ga 0.96 N cladding is formed on n-type GaN buffer layer 210. Layer 220, In 0.03 Ga 0.97 N light guide layer 230a, active layer 240 having a three-period quantum well structure composed of an In 0.2 Ga 0.8 N well layer and a GaN barrier layer, In 0.03 Ga 0.97 N light guide layer 230b The group III nitride semiconductor film 200 composed of the p-type Al 0.12 Ga 0.88 N electron blocking layer 250, the p-type Al 0.06 Ga 0.94 N cladding layer 260, and the p-type GaN contact layer 270 can be sequentially epitaxially grown.

ここで、ＩＩＩ族窒化物半導体層をエピタキシャル成長させる方法は、実施形態２の場合と同様であるため、ここでは繰り返さない。   Here, the method of epitaxially growing the group III nitride semiconductor layer is the same as in the case of the second embodiment, and is not repeated here.

本実施形態のＩＩＩ族窒化物半導体デバイスの製造方法においては、ＩＩＩ族窒化物半導体層（たとえば、ｎ型ＧａＮバッファ層２１０、ｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０）の成長の際に、原料ガスの水分濃度によりＩＩＩ族窒化物半導体層（たとえば、ｎ型ＧａＮバッファ層２１０、ｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０）の酸素の濃度を調節する。かかる方法によれば、ＩＩＩ族窒化物半導体層の酸素の濃度を精度よく調節することができる。 In the method for manufacturing a group III nitride semiconductor device according to the present embodiment, when a group III nitride semiconductor layer (for example, an n-type GaN buffer layer 210 and an n-type Al 0.04 Ga 0.96 N cladding layer 220) is grown, The oxygen concentration of the group III nitride semiconductor layer (eg, n-type GaN buffer layer 210, n-type Al 0.04 Ga 0.96 N cladding layer 220) is adjusted by the moisture concentration of the gas. According to this method, the oxygen concentration of the group III nitride semiconductor layer can be adjusted with high accuracy.

たとえば、ＭＯＶＰＥ法の場合は、原料ガスであるＮＨ3（アンモニア）ガスの水分濃度によりＩＩＩ族窒化物半導体層（たとえば、ｎ型ＧａＮバッファ層２１０、ｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０）の酸素の濃度を調節することができる。 For example, in the case of the MOVPE method, the group III nitride semiconductor layer (for example, the n-type GaN buffer layer 210 and the n-type Al 0.04 Ga 0.96 N cladding layer 220) is formed depending on the moisture concentration of the NH 3 (ammonia) gas that is the source gas. The oxygen concentration can be adjusted.

（ＩＩＩ族窒化物半導体膜のデバイス化工程）
図３〜５を参照して、本実施形態のＩＩＩ族窒化物半導体デバイスの製造方法は、たとえば、ＩＩＩ族窒化物半導体膜２０をデバイス化する工程を含む。ＩＩＩ族窒化物半導体膜２０をデバイス化することにより、ｎ型導電性を実質的に決定するドーパントが酸素であるＩＩＩ族窒化物半導体層（たとえば、ｎ型ＧａＮバッファ層２１０、ｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０）を有するＩＩＩ族窒化物半導体膜２００を有し、動作電圧が安定したＩＩＩ族窒化物半導体デバイスを効率よく製造することができる。 (Device fabrication process of group III nitride semiconductor film)
With reference to FIGS. 3 to 5, the method for manufacturing a group III nitride semiconductor device of the present embodiment includes, for example, a step of forming a group III nitride semiconductor film 20 as a device. By forming the group III nitride semiconductor film 20 as a device, a group III nitride semiconductor layer (for example, an n-type GaN buffer layer 210, an n-type Al 0.04 Ga, and the like) whose dopant that substantially determines the n-type conductivity is oxygen. A group III nitride semiconductor device 200 having a group III nitride semiconductor film 200 having a 0.96 N cladding layer 220) and having a stable operating voltage can be efficiently manufactured.

ＩＩＩ族窒化物半導体膜２００をデバイス化する方法は、特に制限はないが、たとえば、ＩＩＩ族窒化物半導体膜２００のｐ型ＧａＮコンタクト層２７０上に絶縁膜３００を形成し、絶縁膜３００に開口部を形成し、絶縁膜３００の開口部上にｐ側電極４００ｂを形成することにより行なわれる。また、ＩＩＩ族窒化物基板１０の主面１０ｎ上にｎ側電極４００ａを形成する。   A method for forming the group III nitride semiconductor film 200 as a device is not particularly limited. For example, the insulating film 300 is formed on the p-type GaN contact layer 270 of the group III nitride semiconductor film 200 and the insulating film 300 is opened. And the p-side electrode 400b is formed on the opening of the insulating film 300. In addition, n-side electrode 400 a is formed on main surface 10 n of group III nitride substrate 10.

絶縁膜３００としては、ＳｉＯ2膜、Ｓｉ3Ｎ4膜などが形成される。また、絶縁膜３００を形成する方法は、特に制限はなく、スパッタ法、ＣＶＤ（化学気相成長）法などが好適である。また、絶縁膜３００に開口部を形成する方法は、特に制限はなく、ドライエッチング法、ウェットエッチング法などが好適である。 As the insulating film 300, a SiO 2 film, a Si 3 N 4 film, or the like is formed. A method for forming the insulating film 300 is not particularly limited, and a sputtering method, a CVD (chemical vapor deposition) method, or the like is preferable. A method for forming the opening in the insulating film 300 is not particularly limited, and a dry etching method, a wet etching method, or the like is preferable.

ｐ側電極４００ｂとしては、Ａｕ電極、Ｐｄ電極などが形成される。ｎ側電極４００ａとしては、Ａｌ電極、Ｔｉ電極などが形成される。また、ｐ側電極４００ｂおよびｎ側電極４００ａを形成する方法は、蒸着法、スパッタ法、ＣＶＤ法などが好適である。   An Au electrode, a Pd electrode, or the like is formed as the p-side electrode 400b. As the n-side electrode 400a, an Al electrode, a Ti electrode, or the like is formed. Further, as a method for forming the p-side electrode 400b and the n-side electrode 400a, an evaporation method, a sputtering method, a CVD method, or the like is preferable.

（実施例１）
１．ＩＩＩ族窒化物基板の準備
図３を参照して、主面１０ｍが（０００１）面１０ｃに対してｍ軸（＜１０−１０＞方向軸）方向に７５°のオフ角θを有する（２０−２１）面である半極性主面を有するＧａＮ基板（ＩＩＩ族窒化物基板１０）を準備した。 Example 1
1. 3. Preparation of Group III Nitride Substrate Referring to FIG. 3, main surface 10m has an off angle θ of 75 ° in the m-axis (<10-10> direction axis) direction with respect to (0001) surface 10c (20− 21) A GaN substrate (group III nitride substrate 10) having a semipolar main surface as a surface was prepared.

２．ＩＩＩ族窒化物半導体膜の形成
ＧａＮ基板（ＩＩＩ族窒化物基板１０）の主面１０ｍ上に、ＭＯＶＰＥ法により複数層のＩＩＩ族窒化物半導体層を成長させて、ＩＩＩ族窒化物半導体層を含むＩＩＩ族窒化物半導体膜２００を形成した。ＩＩＩ族元素原料となる原料ガスとしてＴＭＧ（トリメチルガリウム）ガス、ＴＭＡ（トリメチルアルミニウム）ガス、ＴＭＩ（トリメチルインジウム）ガスを用いた。また、窒素原料となる原料ガスとしてＮＨ3（アンモニア）ガスを用いた。ｎ型導電性を決定するドーパントとしての酸素原料となるＮＨ3（アンモニア）ガス中の水分（具体的には、水蒸気）を用いた。ｐ型導電性を決定するドーパントとしてのＭｇ（マグネシウム）原料となるＣＰ2Ｍｇ（ビスシクロペンタジエニルマグネシウム）を用いた。詳しくは、以下のようにして、複数層のＩＩＩ族窒化物半導体層を成長させた。 2. Formation of Group III Nitride Semiconductor Film A plurality of group III nitride semiconductor layers are grown by MOVPE on the main surface 10 m of the GaN substrate (group III nitride substrate 10) to include the group III nitride semiconductor layer. A group III nitride semiconductor film 200 was formed. TMG (trimethylgallium) gas, TMA (trimethylaluminum) gas, and TMI (trimethylindium) gas were used as a source gas to be a group III element source. Further, NH 3 (ammonia) gas was used as a raw material gas to be a nitrogen raw material. Moisture (specifically, water vapor) in NH 3 (ammonia) gas serving as an oxygen raw material as a dopant for determining n-type conductivity was used. CP 2 Mg (biscyclopentadienylmagnesium) serving as a Mg (magnesium) raw material as a dopant for determining p-type conductivity was used. Specifically, a plurality of group III nitride semiconductor layers were grown as follows.

まず、ＭＯＶＰＥ装置内に、ＧａＮ基板（ＩＩＩ族窒化物基板１０）をその主面１０ｍが露出するように配置した。ＭＯＶＰＥ装置内にＮＨ3（アンモニア）ガスとＨ2（水素）ガスとの混合ガスを供給して、雰囲気温度を１０５０℃として１０分間保持することにより、ＧａＮ基板（ＩＩＩ族窒化物基板１０）の主面１０ｍを前処理（サーマルクリーニング）した。 First, a GaN substrate (Group III nitride substrate 10) was placed in the MOVPE apparatus so that its main surface 10m was exposed. By supplying a mixed gas of NH 3 (ammonia) gas and H 2 (hydrogen) gas into the MOVPE apparatus and maintaining the atmospheric temperature at 1050 ° C. for 10 minutes, the GaN substrate (Group III nitride substrate 10) The main surface 10 m was pretreated (thermal cleaning).

次に、ＩＩＩ族元素原料、窒素原料、ｎ型導電性を決定するドーパントとしての酸素原料、およびｐ型導電性を決定するドーパントとしてのＭｇ原料となる原料ガスを用いて、１０５０℃の雰囲気温度で厚さ１００ｎｍのｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０を成長させ、次いで、雰囲気温度を８４０℃にして、厚さ１００ｎｍのアンドープのＩｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ａ、厚さ３ｎｍのアンドープのＩｎ0.2Ｇａ0.8Ｎ井戸層と厚さ１ｎｍのアンドープのＧａＮ障壁層とで構成される３周期の量子井戸構造を有する活性層２４０、厚さ１００ｎｍのアンドープのＩｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ｂを成長させ、次いで、雰囲気温度を１０００℃として、厚さ１０ｎｍのｐ型Ａｌ0.12Ｇａ0.88Ｎ電子ブロック層２５０、厚さ１００ｎｍのｐ型Ａｌ0.06Ｇａ0.94Ｎクラッド層２６０、厚さ１００ｎｍのｐ型ＧａＮコンタクト層２７０を成長させた。 Next, using an III raw material, a nitrogen raw material, an oxygen raw material as a dopant that determines n-type conductivity, and a raw material gas that becomes an Mg raw material as a dopant that determines p-type conductivity, an ambient temperature of 1050 ° C. Then, an n-type Al 0.04 Ga 0.96 N cladding layer 220 having a thickness of 100 nm is grown, and then the ambient temperature is set to 840 ° C., and an undoped In 0.03 Ga 0.97 N light guide layer 230a having a thickness of 100 nm and an undoped layer having a thickness of 3 nm are formed. Active layer 240 having a three-period quantum well structure composed of an In 0.2 Ga 0.8 N well layer and an undoped GaN barrier layer having a thickness of 1 nm, an undoped In 0.03 Ga 0.97 N optical guide layer 230b having a thickness of 100 nm Then, the atmospheric temperature is set to 1000 ° C., and the p-type Al 0.12 Ga 0.88 N electron blocking layer 250 having a thickness of 10 nm is formed. A 100 nm p-type Al 0.06 Ga 0.94 N clad layer 260 and a 100 nm thick p-type GaN contact layer 270 were grown.

こうして成長された上記の複数層のＩＩＩ族窒化物半導体層（すなわち、ｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０、Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ａ、活性層２４０、Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ｂ、ｐ型Ａｌ0.12Ｇａ0.88Ｎ電子ブロック層２５０、ｐ型Ａｌ0.06Ｇａ0.94Ｎクラッド層２６０およびｐ型ＧａＮコンタクト層２７０）は、いずれもそれらの主面が、Ｘ線回折法により測定したところ、ＩＩＩ族窒化物基板１０の主面１０ｍと同様に、（２０−２１）面であった。 The plurality of group III nitride semiconductor layers grown in this way (ie, n-type Al 0.04 Ga 0.96 N cladding layer 220, In 0.03 Ga 0.97 N light guide layer 230a, active layer 240, In 0.03 Ga 0.97 N light guide) The main surface of each of the layer 230b, the p-type Al 0.12 Ga 0.88 N electron blocking layer 250, the p-type Al 0.06 Ga 0.94 N cladding layer 260 and the p-type GaN contact layer 270) was measured by an X-ray diffraction method. However, like the main surface 10m of the group III nitride substrate 10, it was the (20-21) plane.

ここで、上記の複数層のＩＩＩ族窒化物半導体層に含まれるドーパントとしての酸素の原料となるＮＨ3（アンモニア）ガス中の水分（具体的には、水蒸気）の濃度を調節するために、ＮＨ3ガスの供給装置とＭＯＶＰＥ装置との間にＮＨ3ガスの精製装置を設けた。かかるＮＨ3ガスの精製装置を用いて、ｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０の成長中には水分（水蒸気）濃度が１ｐｐｍのＮＨ3ガスを供給し、それ以外のＩＩＩ族窒化物半導体層の成長中には水分（水蒸気）濃度が測定限界である１ｐｐｂより低濃度のＮＨ3ガスを供給した。ここで、ＮＨ3ガス中の水分（水蒸気）濃度は、分光法により測定した。 Here, in order to adjust the concentration of moisture (specifically, water vapor) in NH 3 (ammonia) gas, which is a raw material of oxygen as a dopant contained in the multiple group III nitride semiconductor layers, An NH 3 gas purification device was provided between the NH 3 gas supply device and the MOVPE device. Using purified apparatus according NH 3 gas, water (steam) concentration during growth of the n-type Al 0.04 Ga 0.96 N cladding layer 220 supplies a 1 ppm NH 3 gas, III-nitride semiconductor layer other than it During the growth, NH 3 gas having a moisture (water vapor) concentration lower than 1 ppb, which is the measurement limit, was supplied. Here, the moisture (water vapor) concentration in the NH 3 gas was measured by spectroscopy.

上記のようにして得られたｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０の酸素の濃度は１×１０19ｃｍ-3であり、それ以外のＩＩＩ族窒化物半導体層の酸素の濃度は測定限界である２×１０16ｃｍ-3より低濃度であった。ここで、ＩＩＩ族窒化物半導体層の酸素の濃度は、ＳＩＭＳ法により測定した。 The n-type Al 0.04 Ga 0.96 N cladding layer 220 obtained as described above has an oxygen concentration of 1 × 10 19 cm −3 , and the oxygen concentration of the other group III nitride semiconductor layers is at the measurement limit. The concentration was lower than 2 × 10 16 cm −3 . Here, the oxygen concentration of the group III nitride semiconductor layer was measured by the SIMS method.

３．ＩＩＩ族窒化物半導体膜のデバイス化
次に、ｐ型ＧａＮコンタクト層２７０上に、スパッタ法により、絶縁膜３００として厚さ１００ｎｍのＳｉＯ2膜を形成し、次いで、ドライエッチング法により、絶縁膜３００の直径１０μｍの開口部を設けた。次いで、絶縁膜３００の開口部上に、蒸着法により、ｐ側電極４００ｂとして直径５０μｍのＡｕ電極を形成した。次いで、ＧａＮ基板（ＩＩＩ族窒化物基板１０）の主面１０ｎ上に、蒸着法により、ｎ側電極４００ａとしてＡｌ電極を形成した。こうして、半導体デバイスとして、レーザダイオードＬＤ１が作製された。 3. Next, a 100 nm thick SiO 2 film is formed as the insulating film 300 on the p-type GaN contact layer 270 by sputtering, and then the insulating film 300 is formed by dry etching. An opening having a diameter of 10 μm was provided. Next, an Au electrode having a diameter of 50 μm was formed as the p-side electrode 400b on the opening of the insulating film 300 by vapor deposition. Next, an Al electrode was formed as an n-side electrode 400a on the main surface 10n of the GaN substrate (group III nitride substrate 10) by vapor deposition. Thus, a laser diode LD1 was manufactured as a semiconductor device.

上記の方法により、１０回連続して上記のＩＩＩ族窒化物半導体膜２００を形成させて、半導体デバイスとして、１０個のレーザダイオードＬＤ１を作製した。   The group III nitride semiconductor film 200 was formed 10 times in succession by the above method, and 10 laser diodes LD1 were produced as semiconductor devices.

上記のようにして作製された１０個のレーザダイオードＬＤ１について、レーザ発振が始まる閾値電圧は、Ｉ−Ｖ法により測定したところ、４．５Ｖ±０．１Ｖと、バラツキが小さかった。   Regarding the 10 laser diodes LD1 manufactured as described above, the threshold voltage at which laser oscillation started was measured by the IV method, and the variation was as small as 4.5 V ± 0.1 V.

（比較例１）
ＭＯＶＰＥ法によるｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０の成長中に酸素原料となる水分（水蒸気）とケイ素原料となるＳｉＨ4（シラン）ガスとを供給して、酸素の濃度が５×１０18ｃｍ-3でケイ素の濃度が５×１０18ｃｍ-3のｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０を成長させたこと以外は、実施例１と同様にして、１０個のレーザダイオードを作製した。こうして作製された１０個のレーザダイオードについて、レーザ発振が始まる閾値電圧は、５．０Ｖ±０．５Ｖと、バラツキが大きかった。 (Comparative Example 1)
During the growth of the n-type Al 0.04 Ga 0.96 N clad layer 220 by the MOVPE method, moisture (water vapor) serving as an oxygen source and SiH 4 (silane) gas serving as a silicon source are supplied so that the oxygen concentration is 5 × 10 18. Ten laser diodes were fabricated in the same manner as in Example 1 except that an n-type Al 0.04 Ga 0.96 N cladding layer 220 having a cm −3 and silicon concentration of 5 × 10 18 cm −3 was grown. . Regarding the 10 laser diodes manufactured in this way, the threshold voltage at which laser oscillation started was 5.0 V ± 0.5 V, and the variation was large.

（実施例２）
図４を参照して、主面１０ｍが（０００１）面１０ｃに対してｍ軸（＜１０−１０＞方向軸）方向に９０°のオフ角θを有する（１０−１０）面である無極性主面を有するＧａＮ基板（ＩＩＩ族窒化物基板１０）を準備し、かかるＧａＮ基板（ＩＩＩ族窒化物基板１０）を用いて、ＭＯＶＰＥ法により酸素の濃度が２×１０19ｃｍ-3のｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０を成長させたこと以外は、実施例１と同様にして、半導体デバイスとして１０個のレーザダイオードＬＤ２を作製した。 (Example 2)
Referring to FIG. 4, non-polarity in which main surface 10m is a (10-10) surface having an off angle θ of 90 ° in the m-axis (<10-10> direction axis) direction with respect to (0001) surface 10c. A GaN substrate (Group III nitride substrate 10) having a main surface is prepared, and using this GaN substrate (Group III nitride substrate 10), an n-type having an oxygen concentration of 2 × 10 19 cm −3 by the MOVPE method. Ten laser diodes LD2 were produced as semiconductor devices in the same manner as in Example 1 except that the Al 0.04 Ga 0.96 N cladding layer 220 was grown.

こうして作製された半導体デバイス（レーザダイオードＬＤ２）の複数層のＩＩＩ族窒化物半導体層（すなわち、ｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０、Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ａ、活性層２４０、Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ｂ、ｐ型Ａｌ0.12Ｇａ0.88Ｎ電子ブロック層２５０、ｐ型Ａｌ0.06Ｇａ0.94Ｎクラッド層２６０およびｐ型ＧａＮコンタクト層２７０）は、いずれもそれらの主面が、ＧａＮ基板（ＩＩＩ族窒化物基板１０）の主面１０ｍと同様に、（１０−１０）面であった。 A plurality of group III nitride semiconductor layers (that is, an n-type Al 0.04 Ga 0.96 N cladding layer 220, an In 0.03 Ga 0.97 N light guide layer 230a, an active layer 240, an In layer of the semiconductor device thus fabricated (laser diode LD2). The 0.03 Ga 0.97 N light guide layer 230b, the p-type Al 0.12 Ga 0.88 N electron blocking layer 250, the p-type Al 0.06 Ga 0.94 N clad layer 260 and the p-type GaN contact layer 270) are all made of GaN. Like the main surface 10m of the substrate (Group III nitride substrate 10), it was the (10-10) plane.

こうして作製された１０個のレーザダイオードＬＤ２について、レーザ発振が始まる閾値電圧は、４．４Ｖ±０．２Ｖと、バラツキが小さかった。   For the 10 laser diodes LD2 thus manufactured, the threshold voltage at which laser oscillation started was 4.4 V ± 0.2 V, and the variation was small.

（比較例２）
ＭＯＶＰＥ法によるｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０の成長中に酸素原料となる水分（水蒸気）とケイ素原料となるＳｉＨ4（シラン）ガスとを供給して、酸素の濃度が１×１０19ｃｍ-3でケイ素の濃度が１×１０19ｃｍ-3のｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０を成長させたこと以外は、実施例２と同様にして、１０個のレーザダイオードを作製した。こうして作製された１０個のレーザダイオードについて、レーザ発振が始まる閾値電圧は、５．２Ｖ±０．５Ｖと、バラツキが大きかった。 (Comparative Example 2)
During the growth of the n-type Al 0.04 Ga 0.96 N clad layer 220 by the MOVPE method, moisture (water vapor) serving as an oxygen source and SiH 4 (silane) gas serving as a silicon source are supplied so that the oxygen concentration is 1 × 10 19. cm -3 except that the concentration of silicon was grown n-type Al 0.04 Ga 0.96 n cladding layer 220 of 1 × 10 19 cm -3, the in the same manner as in example 2, were produced 10 pieces of the laser diode . Regarding the 10 laser diodes thus manufactured, the threshold voltage at which laser oscillation started was 5.2 V ± 0.5 V, and the variation was large.

（実施例３）
図５を参照して、ＧａＮ基板（ＩＩＩ族窒化物基板１０）の主面１０ｍを前処理（サーマルクリーニング）した後、ＭＯＶＰＥ法により１０５０℃の雰囲気温度で厚さ１００ｎｍのｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０を成長させる前に、ＭＯＶＰＥ法により水分（水蒸気）濃度が２ｐｐｍのＮＨ3ガスを用いて１０５０℃の雰囲気温度で酸素の濃度が２×１０19ｃｍ-3の厚さ１００ｎｍのｎ型ＧａＮバッファ層２１０を成長させたこと以外は、実施例１と同様にして、半導体デバイスとして１０個のレーザダイオードＬＤ３を作製した。 (Example 3)
Referring to FIG. 5, after main surface 10m of GaN substrate (group III nitride substrate 10) is pretreated (thermal cleaning), n-type Al 0.04 Ga 0.96 having a thickness of 100 nm at an ambient temperature of 1050 ° C. by MOVPE method. Before growing the N-clad layer 220, an MOVPE method using NH 3 gas with a moisture (water vapor) concentration of 2 ppm and an oxygen concentration of 2 × 10 19 cm −3 and a thickness of 100 nm at an ambient temperature of 1050 ° C. Ten laser diodes LD3 were manufactured as semiconductor devices in the same manner as in Example 1 except that the type GaN buffer layer 210 was grown.

こうして作製された半導体デバイス（レーザダイオードＬＤ３）の複数層のＩＩＩ族窒化物半導体層（すなわち、ｎ型ＧａＮバッファ層２１０、ｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０、Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ａ、活性層２４０、Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層２３０ｂ、ｐ型Ａｌ0.12Ｇａ0.88Ｎ電子ブロック層２５０、ｐ型Ａｌ0.06Ｇａ0.94Ｎクラッド層２６０およびｐ型ＧａＮコンタクト層２７０）は、いずれもそれらの主面が、ＧａＮ基板（ＩＩＩ族窒化物基板１０）の主面１０ｍと同様に、（１０−１０）面であった。 A plurality of group III nitride semiconductor layers (that is, an n-type GaN buffer layer 210, an n-type Al 0.04 Ga 0.96 N cladding layer 220, and an In 0.03 Ga 0.97 N light guide layer) of the semiconductor device (laser diode LD3) thus fabricated. 230a, active layer 240, In 0.03 Ga 0.97 N light guide layer 230b, p-type Al 0.12 Ga 0.88 N electron blocking layer 250, p-type Al 0.06 Ga 0.94 N clad layer 260 and p-type GaN contact layer 270). Their main surfaces were (10-10) planes, similar to the main surface 10m of the GaN substrate (group III nitride substrate 10).

こうして作製された１０個のレーザダイオードＬＤ２について、レーザ発振が始まる閾値電圧は、４．４Ｖ±０．１Ｖと、バラツキが小さかった。   Regarding the 10 laser diodes LD2 thus manufactured, the threshold voltage at which laser oscillation starts was 4.4 V ± 0.1 V, and the variation was small.

（比較例３）
ＭＯＶＰＥ法によるｎ型ＧａＮバッファ層２１０とｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０との成長中に酸素原料となる水分（水蒸気）とケイ素原料となるＳｉＨ4（シラン）ガスとを供給して、酸素の濃度が１×１０19ｃｍ-3でケイ素の濃度が１×１０19ｃｍ-3のｎ型ＧａＮバッファ層２１０と酸素の濃度が５×１０18ｃｍ-3でケイ素の濃度が５×１０18ｃｍ-3のｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層２２０とを成長させたこと以外は、実施例３と同様にして、１０個のレーザダイオードを作製した。こうして作製された１０個のレーザダイオードについて、レーザ発振が始まる閾値電圧は、４．６Ｖ±０．５Ｖと、バラツキが大きかった。 (Comparative Example 3)
During the growth of the n-type GaN buffer layer 210 and the n-type Al 0.04 Ga 0.96 N cladding layer 220 by the MOVPE method, water (water vapor) serving as an oxygen source and SiH 4 (silane) gas serving as a silicon source are supplied, An n-type GaN buffer layer 210 having an oxygen concentration of 1 × 10 19 cm −3 and a silicon concentration of 1 × 10 19 cm −3 and an oxygen concentration of 5 × 10 18 cm −3 and a silicon concentration of 5 × 10 Ten laser diodes were fabricated in the same manner as in Example 3 except that the 18 cm −3 n-type Al 0.04 Ga 0.96 N cladding layer 220 was grown. Regarding the 10 laser diodes manufactured in this way, the threshold voltage at which laser oscillation started was 4.6 V ± 0.5 V, and the variation was large.

実施例１〜３および比較例１〜３から明らかなように、主面が（０００１）面に対して０°より大きく１８０°より小さいオフ角を有し、ｎ型導電性を実質的に決定するドーパントが酸素であるＩＩＩ族窒化物半導体層を少なくとも１層含むＩＩＩ族窒化物半導体膜を含む半導体デバイスは、主面が（０００１）面に対して０°より大きく１８０°より小さいオフ角θを有し、ｎ型導電性を実質的に決定するドーパントが酸素およびケイ素（酸素以外の元素）であるＩＩＩ族窒化物半導体層を少なくとも１層含むＩＩＩ族窒化物半導体膜を含む半導体デバイスに比べて、レーザ発振が始まる閾値電圧のバラツキを低減することができた。   As is clear from Examples 1 to 3 and Comparative Examples 1 to 3, the main surface has an off angle larger than 0 ° and smaller than 180 ° with respect to the (0001) plane, and the n-type conductivity is substantially determined. A semiconductor device including a group III nitride semiconductor film including at least one group III nitride semiconductor layer in which a dopant to be oxygen is an off angle θ is greater than 0 ° and less than 180 ° with respect to the (0001) plane. And a semiconductor device including a group III nitride semiconductor film including at least one group III nitride semiconductor layer in which the dopant that substantially determines n-type conductivity is oxygen and silicon (an element other than oxygen) Thus, variations in threshold voltage at which laser oscillation starts can be reduced.

また、実施例１および３に示すような半極性（オフ角θが０°＜θ＜９０°または９０°＜θ＜１８０°）の主面を有するＩＩＩ族窒化物基板を含む半導体デバイスであっても、実施例２に示すような無極性（オフ角θが９０°）の主面を有するＩＩＩ族窒化物基板を含む半導体デバイスであっても、ｎ型導電性を実質的に決定するドーパントが酸素であるＩＩＩ族窒化物半導体層を少なくとも１層含むＩＩＩ族窒化物半導体膜を含む半導体デバイスは、レーザ発振が始まる閾値電圧のバラツキを低減することができた。   Further, the semiconductor device includes a group III nitride substrate having a semipolar main surface (off angle θ is 0 ° <θ <90 ° or 90 ° <θ <180 °) as shown in Examples 1 and 3. Even in a semiconductor device including a group III nitride substrate having a nonpolar main surface (off angle θ is 90 °) as shown in Example 2, the dopant substantially determines n-type conductivity. The semiconductor device including the group III nitride semiconductor film including at least one group III nitride semiconductor layer in which oxygen is oxygen was able to reduce the variation in threshold voltage at which laser oscillation started.

また、実施例３に示すような主面が（０００１）面に対して０°より大きく１８０°より小さいオフ角を有し、ｎ型導電性を実質的に決定するドーパントが酸素であるＩＩＩ族窒化物半導体層を複数層含むＩＩＩ族窒化物半導体膜を含む半導体デバイスであっても、レーザ発振が始まる閾値電圧のバラツキを低減することができた。   Further, a group III in which the principal surface as shown in Example 3 has an off angle larger than 0 ° and smaller than 180 ° with respect to the (0001) plane, and the dopant that substantially determines n-type conductivity is oxygen Even in a semiconductor device including a group III nitride semiconductor film including a plurality of nitride semiconductor layers, variation in threshold voltage at which laser oscillation starts can be reduced.

今回開示された実施形態および実施例はすべての点で例示であって制限的なものではないと考えられるべきである。本発明の範囲は、上記した説明でなくて特許請求の範囲によって示され、特許請求の範囲と均等の意味および範囲内のすべての変更が含まれることが意図される。   It should be understood that the embodiments and examples disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

１０ ＩＩＩ族窒化物基板、１０ｃ，２０ｃ，２００ｃ （０００１）面、１０ｍ，１０ｎ，２０ｍ，２１ｍ，２２ｍ，２１０ｍ，２２０ｍ 主面、２０，２００ ＩＩＩ族窒化物半導体膜、２１，２２ ＩＩＩ族窒化物層、２１０ ｎ型ＧａＮバッファ層、２２０ ｎ型Ａｌ0.04Ｇａ0.96Ｎクラッド層、２３０ａ，２３０ｂ Ｉｎ0.03Ｇａ0.97Ｎ光ガイド層、２４０ 活性層、２５０ ｐ型Ａｌ0.12Ｇａ0.88Ｎ電子ブロック層、２６０ ｐ型Ａｌ0.06Ｇａ0.94Ｎクラッド層、２７０ ｐ型ＧａＮコンタクト層、３００ 絶縁膜、４００ａ ｎ側電極、４００ｂ ｐ側電極。 10 Group III nitride substrate, 10c, 20c, 200c (0001) plane, 10m, 10n, 20m, 21m, 22m, 210m, 220m Main surface, 20,200 Group III nitride semiconductor film, 21, 22 Group III nitride Layer, 210 n-type GaN buffer layer, 220 n-type Al 0.04 Ga 0.96 N cladding layer, 230a, 230b In 0.03 Ga 0.97 N light guide layer, 240 active layer, 250 p-type Al 0.12 Ga 0.88 N electron blocking layer, 260 p Type Al 0.06 Ga 0.94 N clad layer, 270 p-type GaN contact layer, 300 insulating film, 400 an n side electrode, 400 b p side electrode.

Claims (6)

主面が（０００１）面に対して０°より大きく１８０°より小さいオフ角を有し、ｎ型導電性を実質的に決定するドーパントが酸素であるＩＩＩ族窒化物半導体層を少なくとも１層含むＩＩＩ族窒化物半導体膜。   At least one group III nitride semiconductor layer having a principal surface having an off angle greater than 0 ° and smaller than 180 ° with respect to the (0001) plane, and a dopant that substantially determines n-type conductivity is oxygen Group III nitride semiconductor film. 前記ドーパントである酸素の濃度が１×１０19ｃｍ-3以上である請求項１に記載のＩＩＩ族窒化物半導体膜。 The group III nitride semiconductor film according to claim 1, wherein the concentration of oxygen as the dopant is 1 × 10 19 cm −3 or more. 複数層の前記ＩＩＩ族窒化物半導体層を含み、ひとつの前記ＩＩＩ族窒化物半導体層の酸素の濃度と、それ以外の前記ＩＩＩ族窒化物半導体層の酸素の濃度とが異なる請求項１または請求項２に記載のＩＩＩ族窒化物半導体膜。   The oxygen concentration of one said group III nitride semiconductor layer is different from the oxygen concentration of the said other group III nitride semiconductor layer including the said group III nitride semiconductor layer of multiple layers, The claim 1 or Claim Item 3. A group III nitride semiconductor film according to Item 2. 請求項１に記載のＩＩＩ族窒化物半導体膜の製造方法であって、
前記ＩＩＩ族窒化物半導体層の成長の際に、原料ガスの水分濃度により前記ＩＩＩ族窒化物半導体層の酸素の濃度を調節するＩＩＩ族窒化物半導体膜の製造方法。 A method for producing a group III nitride semiconductor film according to claim 1,
A method of manufacturing a group III nitride semiconductor film, wherein the concentration of oxygen in the group III nitride semiconductor layer is adjusted by the moisture concentration of a source gas during the growth of the group III nitride semiconductor layer. 請求項１に記載のＩＩＩ族窒化物半導体膜を含むＩＩＩ族窒化物半導体デバイス。   A group III nitride semiconductor device comprising the group III nitride semiconductor film according to claim 1. 請求項５に記載のＩＩＩ族窒化物半導体デバイスの製造方法であって、
前記ＩＩＩ族窒化物半導体層の成長の際に、原料ガスの水分濃度により前記ＩＩＩ族窒化物半導体層の酸素の濃度を調節するＩＩＩ族窒化物半導体デバイスの製造方法。 A method for producing a group III nitride semiconductor device according to claim 5,
A method of manufacturing a group III nitride semiconductor device, wherein a concentration of oxygen in the group III nitride semiconductor layer is adjusted by a moisture concentration of a source gas during the growth of the group III nitride semiconductor layer.
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US9558938B2 (en) 2014-09-29 2017-01-31 Nichia Corporation Method of manufacturing nitride semiconductor template
JP2017208438A (en) * 2016-05-18 2017-11-24 富士電機株式会社 Nitride semiconductor device and method of manufacturing the same

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014179584A (en) * 2013-02-14 2014-09-25 Seoul Semiconductor Co Ltd Semiconductor device and manufacturing method of the same
US9558938B2 (en) 2014-09-29 2017-01-31 Nichia Corporation Method of manufacturing nitride semiconductor template
JP2017208438A (en) * 2016-05-18 2017-11-24 富士電機株式会社 Nitride semiconductor device and method of manufacturing the same

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