JP2012222354A - 半導体デバイスおよび方法 - Google Patents
半導体デバイスおよび方法 Download PDFInfo
- Publication number
- JP2012222354A JP2012222354A JP2012084779A JP2012084779A JP2012222354A JP 2012222354 A JP2012222354 A JP 2012222354A JP 2012084779 A JP2012084779 A JP 2012084779A JP 2012084779 A JP2012084779 A JP 2012084779A JP 2012222354 A JP2012222354 A JP 2012222354A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- pattern
- substrate
- epitaxial semiconductor
- iii
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 88
- 238000000034 method Methods 0.000 title claims abstract description 55
- 239000000758 substrate Substances 0.000 claims abstract description 74
- 238000004519 manufacturing process Methods 0.000 claims abstract description 14
- 230000015556 catabolic process Effects 0.000 claims abstract description 9
- 229910002704 AlGaN Inorganic materials 0.000 claims description 4
- 230000003247 decreasing effect Effects 0.000 claims description 3
- 230000008569 process Effects 0.000 abstract description 7
- 230000004888 barrier function Effects 0.000 abstract description 3
- 230000003252 repetitive effect Effects 0.000 abstract description 3
- 238000004347 surface barrier Methods 0.000 abstract description 3
- 239000010410 layer Substances 0.000 description 189
- 239000000463 material Substances 0.000 description 9
- 150000004767 nitrides Chemical class 0.000 description 9
- 238000005530 etching Methods 0.000 description 8
- 229910052594 sapphire Inorganic materials 0.000 description 7
- 239000010980 sapphire Substances 0.000 description 7
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 6
- 230000002829 reductive effect Effects 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 5
- 230000005701 quantum confined stark effect Effects 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- 230000005684 electric field Effects 0.000 description 4
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000001419 dependent effect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000004049 embossing Methods 0.000 description 3
- 238000000605 extraction Methods 0.000 description 3
- 230000000670 limiting effect Effects 0.000 description 3
- 230000000873 masking effect Effects 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 238000005036 potential barrier Methods 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 230000005699 Stark effect Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 230000002860 competitive effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 239000004005 microsphere Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000002105 nanoparticle Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000036961 partial effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02428—Structure
- H01L21/0243—Surface structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02516—Crystal orientation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Led Devices (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
【解決手段】a)基板1を用意するステップと、b)第1エピタキシャル半導体層3を基板1の上に設けるステップと、c)1次元または2次元の繰り返しパターンを形成するステップと、を含み、パターンの各部分が、0.1〜50の範囲のアスペクト比を有するようにした方法を開示する。対応する半導体デバイス、電子回路および装置も開示している。
【選択図】図2d
Description
a)基板、例えば、Si,SiC,Ge,サファイア基板およびこれらの組合せ、好都合にはSi基板、例えば、<111>Si基板を用意するステップ。
b)第1エピタキシャル半導体層、例えば、III−V層、例えば、III−N層を基板の上に設けるステップ。
c)1次元または2次元の繰り返しパターンを形成するステップ。パターンの各部分が0.1〜50の範囲のアスペクト比を有する。該パターンは、好ましくは、基板または第1エピタキシャル半導体層に形成される。
・基板、例えば、Si,SiC,Ge,サファイア基板およびこれらの組合せ、好ましくはSi基板、例えば、<111>Si基板を用意するステップ。
・第1エピタキシャル半導体層、例えば、III−V層、例えば、III−N層を基板の上に設けるステップ。
・1次元または2次元の繰り返しパターンを形成するステップ。パターンの各部分が0.1〜50の範囲のアスペクト比を有する。該パターンは、好ましくは、基板または第1エピタキシャル半導体層に形成される。
Claims (15)
- 半導体デバイスを製造する方法であって、
a)基板(1)を用意するステップと、
b)第1エピタキシャル半導体層(3)を基板(1)の上に設けるステップと、
c)1次元または2次元の繰り返しパターンを形成するステップと、を含み、
パターンの各部分が、0.1〜50の範囲のアスペクト比を有するようにした方法。 - 1次元または2次元の繰り返しパターンを形成するステップは、該パターンを基板(1)または第1エピタキシャル半導体層(3)に形成することを含む請求項1記載の方法。
- ステップc)はステップb)の前に実施し、パターンは基板(1)に形成し、あるいは、ステップc)はステップb)の後に実施し、パターンは第1エピタキシャル半導体層(3)に形成するようにした請求項1または2記載の方法。
- ステップc)に続いて、d)第2エピタキシャル半導体層を設けるステップと、をさらに含む請求項1〜3のいずれかに記載の方法。
- 該パターンは、0.5〜5μmの範囲の幅を有し、及び/又は、パターン間のスペースが0.5〜5μmの範囲の長さを有し、及び/又は、該パターンは、トレンチ、ピット、スリット、柱、ピラミッド、正方形、長方形、六角形、多角形、円形、および楕円のうちの1つ又はそれ以上から選択され、及び/又は、該パターンは、0.2〜2μmの範囲の深さを有するようにした請求項1〜4のいずれかに記載の方法。
- 第1エピタキシャル半導体層(3)を形成する前に、バッファ層を基板(1)上に形成することをさらに含み、
そのバッファ層は、基板上に形成された初期層と、Al含量が底部から上部へ減少しているAlGaNを含むバッファ層を形成する第2層の1つ又はそれ以上を備える請求項1〜5のいずれかに記載の方法。 - 2つ又はそれ以上の第1のIII−Vエピタキシャル半導体層(3)が設けられ、及び/又は、2つ又はそれ以上の第2のIII−Vエピタキシャル半導体層(5)が設けられる請求項1〜6のいずれかに記載の方法。
- 該2つ又はそれ以上の第1のIII−Vエピタキシャル半導体層(3)は、2つ又はそれ以上の型の交互配列したIII−V層のスタックを形成する2つ又はそれ以上の追加のIII−V層であり、該スタックは多重量子井戸を提供するようにした請求項7記載の方法。
- 高い絶縁破壊電圧を有し、大電流で低キャリア密度の半導体デバイスであって、
基板(1)と、
基板(1)の上部にある第1エピタキシャル半導体層(3)と、
1次元または2次元の繰り返しパターンと、を備え、
パターンの各部分が0.1〜50の範囲のアスペクト比を有するデバイス。 - 第1エピタキシャル半導体層(3)の上に、第2エピタキシャル半導体層(5)をさらに備える請求項9記載のデバイス。
- 該パターンは、0.5〜5μmの範囲の幅を有し、及び/又は、パターン間のスペースが0.5〜5μmの範囲の長さを有し、及び/又は、該パターンは、トレンチ、ピット、スリット、柱、ピラミッド、正方形、長方形、六角形、多角形、円形、および楕円のうちの1つ又はそれ以上から選択され、及び/又は、該パターンは、0.2〜2μmの範囲の深さを有するようにした請求項9〜10のいずれかに記載のデバイス。
- 請求項9〜11のいずれかに記載の半導体デバイスを備えた電子回路。
- 電子回路は、トランジスタ、FET、HEMT、DHFET、LED、ダイオード、およびパワーデバイスのいずれかである請求項12記載の電子回路。
- 請求項9〜11のいずれかに記載の半導体デバイス、及び/又は、請求項12〜13のいずれかに記載の電子回路を備えた装置であって、電子回路、スイッチ、ハイパワー用途、高電圧用途、画像センサ、バイオセンサ、またはイオンセンサのいずれかである装置。
- 請求項14記載の装置、及び/又は、請求項9〜11のいずれかに記載の半導体デバイス、及び/又は、請求項12〜13のいずれかに記載の電子回路の、ハイパワー用途及び/又は高電圧用途における使用。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201161472080P | 2011-04-05 | 2011-04-05 | |
US61/472,080 | 2011-04-05 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2012222354A true JP2012222354A (ja) | 2012-11-12 |
Family
ID=46149135
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012084779A Pending JP2012222354A (ja) | 2011-04-05 | 2012-04-03 | 半導体デバイスおよび方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US9196477B2 (ja) |
EP (1) | EP2509120A1 (ja) |
JP (1) | JP2012222354A (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10374128B2 (en) * | 2013-12-12 | 2019-08-06 | Terahertz Device Corporation | Electrical contacts to light-emitting diodes for improved current spreading and injection |
CN108231908B (zh) * | 2017-11-24 | 2020-08-18 | 西安电子科技大学 | GaN/AlGaN横向超级结二极管及其制作方法 |
Citations (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04180283A (ja) * | 1990-11-14 | 1992-06-26 | Mitsubishi Electric Corp | 半導体光素子及びその製造方法 |
JPH0529714A (ja) * | 1991-07-24 | 1993-02-05 | Mitsubishi Electric Corp | 量子細線または量子箱 |
JP2002185040A (ja) * | 2000-12-15 | 2002-06-28 | Sony Corp | 半導体発光素子及び半導体発光素子の製造方法 |
JP2002204033A (ja) * | 2000-12-27 | 2002-07-19 | National Institute Of Advanced Industrial & Technology | 量子細線または量子井戸層の形成方法、及び該形成方法により形成された量子細線または量子井戸層を用いた分布帰還半導体レーザ |
JP2004111710A (ja) * | 2002-09-19 | 2004-04-08 | Fujitsu Ltd | 量子光半導体装置 |
JP2005203442A (ja) * | 2004-01-13 | 2005-07-28 | National Institute Of Advanced Industrial & Technology | 量子細線電界効果トランジスタ |
JP2006165051A (ja) * | 2004-12-02 | 2006-06-22 | Sumitomo Electric Ind Ltd | 半導体発光素子及びその製造方法 |
JP2007073675A (ja) * | 2005-09-06 | 2007-03-22 | Nippon Telegr & Teleph Corp <Ntt> | 細線構造及び配線並びにその作製方法 |
JP2007258406A (ja) * | 2006-03-23 | 2007-10-04 | Nippon Telegr & Teleph Corp <Ntt> | 半導体装置 |
JP2008226868A (ja) * | 2007-03-08 | 2008-09-25 | Showa Denko Kk | Iii族窒化物化合物半導体積層構造体 |
WO2009001888A1 (ja) * | 2007-06-27 | 2008-12-31 | Nec Corporation | 電界効果トランジスタ、ならびに、該電界効果トランジスタの作製に供される多層エピタキシャル膜 |
JP2009231561A (ja) * | 2008-03-24 | 2009-10-08 | Nippon Telegr & Teleph Corp <Ntt> | 窒化物半導体結晶薄膜およびその作製方法、半導体装置およびその製造方法 |
JP2009246247A (ja) * | 2008-03-31 | 2009-10-22 | Nec Corp | 窒化物半導体トランジスタ |
JP2009295753A (ja) * | 2008-06-04 | 2009-12-17 | Showa Denko Kk | Iii族窒化物半導体発光素子の製造方法及びiii族窒化物半導体発光素子、並びにランプ |
JP2010080633A (ja) * | 2008-09-25 | 2010-04-08 | Furukawa Electric Co Ltd:The | 半導体装置、ウエハ構造体および半導体装置の製造方法 |
JP2010258455A (ja) * | 2009-04-27 | 2010-11-11 | Aurotek Corp | 周期構造を有するサファイア基板 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4055503B2 (ja) * | 2001-07-24 | 2008-03-05 | 日亜化学工業株式会社 | 半導体発光素子 |
US20030047746A1 (en) * | 2001-09-10 | 2003-03-13 | Fuji Photo Film Co., Ltd. | GaN substrate formed over GaN layer having discretely formed minute holes produced by use of discretely arranged growth suppression mask elements |
EP3166152B1 (en) * | 2003-08-19 | 2020-04-15 | Nichia Corporation | Semiconductor light emitting diode and method of manufacturing its substrate |
US7982205B2 (en) | 2006-01-12 | 2011-07-19 | National Institute Of Advanced Industrial Science And Technology | III-V group compound semiconductor light-emitting diode |
WO2007098215A2 (en) * | 2006-02-17 | 2007-08-30 | The Regents Of The University Of California | Method for growth of semipolar (al,in,ga,b)n optoelectronic devices |
DE102006043400A1 (de) * | 2006-09-15 | 2008-03-27 | Osram Opto Semiconductors Gmbh | Optoelektronischer Halbleiterchip |
US20080149946A1 (en) | 2006-12-22 | 2008-06-26 | Philips Lumileds Lighting Company, Llc | Semiconductor Light Emitting Device Configured To Emit Multiple Wavelengths Of Light |
JP2009059851A (ja) | 2007-08-31 | 2009-03-19 | National Institute Of Advanced Industrial & Technology | 半導体発光ダイオード |
US8592800B2 (en) | 2008-03-07 | 2013-11-26 | Trustees Of Boston University | Optical devices featuring nonpolar textured semiconductor layers |
KR101092079B1 (ko) * | 2008-04-24 | 2011-12-12 | 엘지이노텍 주식회사 | 반도체 발광소자 및 그 제조방법 |
KR101533296B1 (ko) | 2008-07-08 | 2015-07-02 | 삼성전자주식회사 | 패턴 형성 기판을 구비한 질화물 반도체 발광소자 및 그제조방법 |
KR101009651B1 (ko) | 2008-10-15 | 2011-01-19 | 박은현 | 3족 질화물 반도체 발광소자 |
KR101521259B1 (ko) | 2008-12-23 | 2015-05-18 | 삼성전자주식회사 | 질화물 반도체 발광소자 및 그 제조방법 |
-
2012
- 2012-03-29 EP EP12162196A patent/EP2509120A1/en not_active Withdrawn
- 2012-04-03 US US13/438,718 patent/US9196477B2/en active Active
- 2012-04-03 JP JP2012084779A patent/JP2012222354A/ja active Pending
Patent Citations (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04180283A (ja) * | 1990-11-14 | 1992-06-26 | Mitsubishi Electric Corp | 半導体光素子及びその製造方法 |
JPH0529714A (ja) * | 1991-07-24 | 1993-02-05 | Mitsubishi Electric Corp | 量子細線または量子箱 |
JP2002185040A (ja) * | 2000-12-15 | 2002-06-28 | Sony Corp | 半導体発光素子及び半導体発光素子の製造方法 |
JP2002204033A (ja) * | 2000-12-27 | 2002-07-19 | National Institute Of Advanced Industrial & Technology | 量子細線または量子井戸層の形成方法、及び該形成方法により形成された量子細線または量子井戸層を用いた分布帰還半導体レーザ |
JP2004111710A (ja) * | 2002-09-19 | 2004-04-08 | Fujitsu Ltd | 量子光半導体装置 |
JP2005203442A (ja) * | 2004-01-13 | 2005-07-28 | National Institute Of Advanced Industrial & Technology | 量子細線電界効果トランジスタ |
JP2006165051A (ja) * | 2004-12-02 | 2006-06-22 | Sumitomo Electric Ind Ltd | 半導体発光素子及びその製造方法 |
JP2007073675A (ja) * | 2005-09-06 | 2007-03-22 | Nippon Telegr & Teleph Corp <Ntt> | 細線構造及び配線並びにその作製方法 |
JP2007258406A (ja) * | 2006-03-23 | 2007-10-04 | Nippon Telegr & Teleph Corp <Ntt> | 半導体装置 |
JP2008226868A (ja) * | 2007-03-08 | 2008-09-25 | Showa Denko Kk | Iii族窒化物化合物半導体積層構造体 |
WO2009001888A1 (ja) * | 2007-06-27 | 2008-12-31 | Nec Corporation | 電界効果トランジスタ、ならびに、該電界効果トランジスタの作製に供される多層エピタキシャル膜 |
JP2009231561A (ja) * | 2008-03-24 | 2009-10-08 | Nippon Telegr & Teleph Corp <Ntt> | 窒化物半導体結晶薄膜およびその作製方法、半導体装置およびその製造方法 |
JP2009246247A (ja) * | 2008-03-31 | 2009-10-22 | Nec Corp | 窒化物半導体トランジスタ |
JP2009295753A (ja) * | 2008-06-04 | 2009-12-17 | Showa Denko Kk | Iii族窒化物半導体発光素子の製造方法及びiii族窒化物半導体発光素子、並びにランプ |
JP2010080633A (ja) * | 2008-09-25 | 2010-04-08 | Furukawa Electric Co Ltd:The | 半導体装置、ウエハ構造体および半導体装置の製造方法 |
JP2010258455A (ja) * | 2009-04-27 | 2010-11-11 | Aurotek Corp | 周期構造を有するサファイア基板 |
Also Published As
Publication number | Publication date |
---|---|
US20130001507A1 (en) | 2013-01-03 |
EP2509120A1 (en) | 2012-10-10 |
US9196477B2 (en) | 2015-11-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8030664B2 (en) | Light emitting device | |
US9634189B2 (en) | Patterned substrate design for layer growth | |
KR100986557B1 (ko) | 반도체 발광소자 및 그 제조방법 | |
KR20070058612A (ko) | 텍스쳐화된 발광 다이오드 | |
WO2012059837A1 (en) | Solid state light emitting devices based on crystallographically relaxed structures | |
KR20080110340A (ko) | 반도체 발광소자 및 그의 제조방법 | |
JP2010512017A (ja) | 電流拡散層を含む発光ダイオードの製造方法 | |
JP5306779B2 (ja) | 発光素子及びその製造方法 | |
JP2010021513A (ja) | パターン形成基板を具備した窒化物半導体発光素子及びその製造方法 | |
KR20120083084A (ko) | 나노 로드 발광 소자 및 그 제조 방법 | |
US8785955B2 (en) | Light emitting diode | |
CN111129026A (zh) | 多色发光器件及制造这种器件的方法 | |
KR101721846B1 (ko) | 디스플레이용 초소형 질화물계 발광 다이오드 어레이의 제조방법 및 그에 의해 제조된 디스플레이용 초소형 질화물계 발광 다이오드 어레이 | |
KR100762004B1 (ko) | 질화물계 발광 다이오드 소자의 제조방법 | |
JP5818766B2 (ja) | 発光ダイオード | |
JP5794963B2 (ja) | 発光ダイオード | |
KR102264678B1 (ko) | 다공성 투명 전극을 포함하는 발광 소자 | |
JP2012222354A (ja) | 半導体デバイスおよび方法 | |
KR100812738B1 (ko) | 표면 요철 형성방법 및 그를 이용한 질화물계 반도체발광소자의 제조방법 | |
EP2450971A2 (en) | Solid state light emitting device and method for making the same | |
JP2023541295A (ja) | 単一ウエハ上に集積された三色光源 | |
KR20090017945A (ko) | 반도체 발광소자 및 그 제조방법 | |
KR102192086B1 (ko) | 질화물 양자점을 갖는 소자 및 그 제조방법 | |
KR100867499B1 (ko) | 질화물 반도체 발광소자 및 그 제조방법 | |
JP5980668B2 (ja) | 発光ダイオード |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20150325 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20160607 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20160830 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20161102 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20170314 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20170613 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20170808 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20171108 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20180109 |