JP2011086743A - Power semiconductor device and method for manufacturing the power semiconductor device - Google Patents

Power semiconductor device and method for manufacturing the power semiconductor device Download PDF

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JP2011086743A
JP2011086743A JP2009237974A JP2009237974A JP2011086743A JP 2011086743 A JP2011086743 A JP 2011086743A JP 2009237974 A JP2009237974 A JP 2009237974A JP 2009237974 A JP2009237974 A JP 2009237974A JP 2011086743 A JP2011086743 A JP 2011086743A
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solder
power semiconductor
hole
semiconductor device
surface electrode
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Yasushi Nakajima
泰 中島
Koji Hiraoka
功治 平岡
Naoki Yoshimatsu
直樹 吉松
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a power semiconductor device, with the shape stability of bonding members between a power semiconductor element and a lead frame improved. <P>SOLUTION: A power semiconductor device 101 includes a power semiconductor element 2; an inner lead 5, having a through-hole 6 disposed in facing to a surface electrode 4 of the power semiconductor element; and a solder 3 bonding the through-hole with the surface electrode. The device is structured so as to have the expression h<(L1/2) established, if the height of a gap between the inner lead and the surface electrode is h, and the width of the through-hole is L1. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、電力変換用半導体素子を内蔵する電力用半導体装置、及び該電力用半導体装置の製造方法に関する。   The present invention relates to a power semiconductor device including a power conversion semiconductor element and a method for manufacturing the power semiconductor device.

従来の電力用半導体装置では、例えば特許文献１に開示されるように、放熱板もしくはリードフレームのダイパッドに電力用半導体素子が固着されており、該電力用半導体素子の固着面と対向する面に存在する電力用半導体素子の電極と、該電極に重なって配置されたリードフレームとがはんだ付けされる。   In a conventional power semiconductor device, for example, as disclosed in Patent Document 1, a power semiconductor element is fixed to a heat sink or a die pad of a lead frame, and a surface facing the fixing surface of the power semiconductor element is provided. The electrode of the existing power semiconductor element and the lead frame arranged so as to overlap the electrode are soldered.

また、特許文献１には、リードフレームと電力用半導体素子の電極との隙間にははんだが満たされることが開示され、及び、リードフレームにおいてはんだ付けされる接合部には、貫通穴が設けられており、電力用半導体素子とリードフレームとの間に生ずる熱応力を低減するよう作用することが開示されている。   Patent Document 1 discloses that the gap between the lead frame and the electrode of the power semiconductor element is filled with solder, and a through hole is provided in a joint portion to be soldered in the lead frame. It is disclosed that it acts to reduce the thermal stress generated between the power semiconductor element and the lead frame.

特開２００８−１８２０７４号公報JP 2008-182074 A

上述したような従来の電力用半導体装置では、リードフレームと電力用半導体素子表面との隙間に対してリードフレームに設けた上記貫通穴が小さすぎる場合には、はんだ供給の際に、はんだが貫通穴の側壁に塗れただけで止まってしまい、電力用半導体素子表面まで届かないという現象が生じる可能性がある。このような現象が生じた場合には、リードフレームと電力用半導体素子とが電気的に接続されず、このような非接続を除外するための検査に時間を要する等の問題が生じてしまう。
即ち、従来の電力用半導体装置では、実際の量産で問題となるインナーリードと電力用半導体素子との間の隙間の変動に対する裕度等が低い場合も考えられる。 In the conventional power semiconductor device as described above, when the through hole provided in the lead frame is too small with respect to the gap between the lead frame and the surface of the power semiconductor element, the solder penetrates when supplying the solder. There is a possibility that a phenomenon may occur in which the surface of the power semiconductor element does not reach the surface of the power semiconductor element because it stops just by being applied to the sidewall of the hole. When such a phenomenon occurs, the lead frame and the power semiconductor element are not electrically connected, and there arises a problem that it takes time to perform an inspection for excluding such non-connection.
That is, in the conventional power semiconductor device, there may be a case where a tolerance for variation in a gap between the inner lead and the power semiconductor element, which is a problem in actual mass production, is low.

また、リードフレームにはんだが濡れ広がった場合に、供給したはんだの体積に対して、実現されるはんだ層の形状が不安定となるという懸念があった。即ち、上記貫通穴の側面ではんだの濡れが止まっている間は、フィレット形状は安定しているが、リードフレームの電力用半導体装置に対向する面にはんだが濡れたときには、フィレットの形状は不安定となる。   Further, when the solder spreads on the lead frame, there is a concern that the shape of the solder layer to be realized becomes unstable with respect to the volume of the supplied solder. That is, the fillet shape is stable while the solder wetting is stopped at the side surface of the through hole, but when the solder wets the surface of the lead frame facing the power semiconductor device, the fillet shape is not good. It becomes stable.

本発明は、このような問題点を解決するためになされたもので、電力用半導体素子とリードフレームとの接合部材の形状安定性を向上した電力用半導体装置、及び該電力用半導体装置の製造方法を提供することを目的とする。   The present invention has been made to solve such problems, and a power semiconductor device having improved shape stability of a joining member between a power semiconductor element and a lead frame, and manufacture of the power semiconductor device. It aims to provide a method.

上記目的を達成するため、本発明は以下のように構成する。
即ち、本発明の一態様における電力用半導体装置は、半導体素子と、上記半導体素子の表面電極に対向して配設された貫通穴を有する導体と、上記貫通穴及び上記表面電極を接合する導電性接合材とを備えた電力用半導体装置であって、上記導体と上記表面電極との隙間の高さをｈ、及び上記貫通穴の幅をＬ１とし、ｈ＜（Ｌ１／２）の関係を有することを特徴とする。 In order to achieve the above object, the present invention is configured as follows.
That is, the power semiconductor device according to one embodiment of the present invention includes a semiconductor element, a conductor having a through hole disposed to face the surface electrode of the semiconductor element, and a conductive material that joins the through hole and the surface electrode. A power semiconductor device comprising a conductive bonding material, wherein a height of a gap between the conductor and the surface electrode is h, and a width of the through hole is L1, and a relationship of h <(L1 / 2) is established. It is characterized by having.

本発明の一態様における電力用半導体装置によれば、導体の貫通穴と表面電極との間にｈ＜（Ｌ１／２）の関係を有することで、貫通穴へのはんだ供給量のばらつきが大きい場合でも、接合材の濡れ広がり範囲を安定化することができ、接合材の形状安定化を図ることができる。また、接合材の濡れ拡がり性が良好か不良かにかかわらず、半導体素子の表面電極への濡れ性を確保することができ、またはんだボールの生成を防止することができる。   According to the power semiconductor device of one aspect of the present invention, the relationship of h <(L1 / 2) is provided between the conductor through hole and the surface electrode, so that the amount of solder supplied to the through hole varies greatly. Even in this case, the range of wetting and spreading of the bonding material can be stabilized, and the shape of the bonding material can be stabilized. Further, it is possible to ensure wettability to the surface electrode of the semiconductor element or prevent formation of a ball, regardless of whether the bonding material has good or poor wettability.

本発明の実施の形態１における電力用半導体装置の断面図である。It is sectional drawing of the semiconductor device for electric power in Embodiment 1 of this invention. 図１Ａに示す封止樹脂の図示を省略した状態での断面図である。It is sectional drawing in the state which abbreviate | omitted illustration of sealing resin shown to FIG. 1A. 図１Ａに示す電力用半導体装置の平面図であり、封止樹脂の図示を省略した図である。FIG. 1B is a plan view of the power semiconductor device shown in FIG. 1A, in which a sealing resin is not shown. 図１Ａに示す電力用半導体装置において、インナーリードと表面電極とのはんだ付け状態を説明するための図である。It is a figure for demonstrating the soldering state of an inner lead and a surface electrode in the power semiconductor device shown to FIG. 1A. 本発明の実施の形態２における電力用半導体装置において、インナーリードと表面電極とのはんだ付けを説明するための図である。It is a figure for demonstrating the soldering of an inner lead and a surface electrode in the power semiconductor device in Embodiment 2 of this invention. 本発明の実施の形態３の電力用半導体装置におけるはんだ供給プロセスを説明するための図である。It is a figure for demonstrating the solder supply process in the semiconductor device for electric power of Embodiment 3 of this invention.

本発明の実施形態である電力用半導体装置、及び該電力用半導体装置の製造方法について、図を参照しながら以下に説明する。尚、各図において、同一又は同様の構成部分については同じ符号を付している。   A power semiconductor device according to an embodiment of the present invention and a method for manufacturing the power semiconductor device will be described below with reference to the drawings. In each figure, the same or similar components are denoted by the same reference numerals.

実施の形態１．
図１Ａに、実施の形態１における電力用半導体装置１０１の全体の断面図を示し、図１Ｂには、封止樹脂１０を除いた図を示している。また、図２には、封止樹脂１０を除いて電力用半導体装置１０１の平面図を示している。
電力用半導体装置１０１は、基本的構成として、電力変換用の電力用半導体素子２と、導体の一例に相当するインナーリード５と、導電性接合材の一例に相当するはんだ３とを備える。ここで、インナーリード５は、電力用半導体素子２の表面電極４に対向して配設され、また、表面電極４に対向する部分には貫通穴６を有する。はんだ３は、貫通穴６の側壁６ａと表面電極４との間に流動し固化することでインナーリード５と表面電極４とを接合する。また、本実施形態の電力用半導体装置１０１では、金属板１に電力用半導体素子２が例えばはんだ７によって接合されており、電力用半導体素子２の制御電極（不図示）とリードフレーム９とは、例えば直径１００〜３００μｍ程度のアルミニウムからなるワイヤ８によって配線されている。そしてこれらの構成部分の全体が封止樹脂１０にて封止され、接着硬化され、電力用半導体装置１０１の筐体を構成している。 Embodiment 1 FIG.
FIG. 1A shows an overall cross-sectional view of the power semiconductor device 101 according to the first embodiment, and FIG. 1B shows a view excluding the sealing resin 10. FIG. 2 is a plan view of the power semiconductor device 101 excluding the sealing resin 10.
The power semiconductor device 101 includes, as a basic configuration, a power semiconductor element 2 for power conversion, an inner lead 5 corresponding to an example of a conductor, and a solder 3 corresponding to an example of a conductive bonding material. Here, the inner lead 5 is disposed to face the surface electrode 4 of the power semiconductor element 2, and has a through hole 6 in a portion facing the surface electrode 4. The solder 3 flows between the side wall 6 a of the through hole 6 and the surface electrode 4 and solidifies, thereby joining the inner lead 5 and the surface electrode 4. Further, in the power semiconductor device 101 of the present embodiment, the power semiconductor element 2 is joined to the metal plate 1 by, for example, the solder 7, and the control electrode (not shown) of the power semiconductor element 2 and the lead frame 9 are For example, the wires 8 are made of aluminum having a diameter of about 100 to 300 μm. All of these components are sealed with a sealing resin 10 and adhesively hardened to constitute a housing of the power semiconductor device 101.

インナーリード５の材質としては、無酸素銅、ＮｉめっきＣｕ、ＮｉＰｄＡｕめっきＣｕ、インバー、４２アロイなど、通常用いられる材料を使用することができる。電力用半導体素子２の表面電極４は、通常、Ａｌメタライズが用いられるが、その表面に、例えばＮｉ、Ａｕなどを積み上げることで、はんだ濡れ性を確保することができる。最表面は、Ａｕが好ましいが、Ａｇなどでもかまわず、酸化せず、はんだに濡れる材料であれば良好なはんだ付性が得られる。   As a material of the inner lead 5, a commonly used material such as oxygen-free copper, Ni plating Cu, NiPdAu plating Cu, Invar, 42 alloy, or the like can be used. The surface electrode 4 of the power semiconductor element 2 is usually made of Al metallization, but solder wettability can be ensured by stacking, for example, Ni, Au or the like on the surface thereof. The outermost surface is preferably Au, but Ag or the like may be used, and a good solderability can be obtained as long as the material does not oxidize and wets the solder.

はんだ３としては、例えばＳｎＡｇＣｕ系の材料が好適である。他に、Ｓｂ、Ｉｎ、Ｚｎなどを混ぜてもよい。インナーリード５及び電力用半導体素子２の線膨張係数は、ＣｕとＳｉの場合、１７．７ｐｐｍ／℃に対して２．５ｐｐｍ／℃であり、その差は非常に大きい。よって、はんだ３を介して接合されているインナーリード５及び電力用半導体素子２において、温度変化による両者の伸縮の差は、はんだ層が吸収することになるが、その歪み量が過大であると、金属疲労によりはんだ層に亀裂が進展する懸念がある。このような金属疲労の防止には、はんだ層内に微細な析出物を分散させることで、転位線が拘束され破断までの寿命を延ばすことができることがよく知られている。よって、このような効果が得られる組成のはんだ材を用いることが好ましい。例えばＳｂなどで、そのような微細析出物が出現することが知られている。本実施形態では、電力用半導体素子２としてＳｉを用いる例を示しているが、ＳｉＣを用いてもよく、その場合、電流密度がＳｉよりも高まるため、本実施形態のように、インナーリード５を表面電極４に直接はんだ付けするような方式の場合、電気抵抗が下がり、電力用半導体装置としての損失が低減可能である。   As the solder 3, for example, a SnAgCu-based material is suitable. In addition, Sb, In, Zn, or the like may be mixed. In the case of Cu and Si, the linear expansion coefficients of the inner lead 5 and the power semiconductor element 2 are 2.5 ppm / ° C. with respect to 17.7 ppm / ° C., and the difference is very large. Therefore, in the inner lead 5 and the power semiconductor element 2 joined through the solder 3, the difference in expansion and contraction due to temperature change is absorbed by the solder layer, but the amount of distortion is excessive. There is a concern that cracks may develop in the solder layer due to metal fatigue. In order to prevent such metal fatigue, it is well known that by dispersing fine precipitates in the solder layer, the dislocation lines are restrained and the life until breakage can be extended. Therefore, it is preferable to use a solder material having such a composition as to obtain such an effect. For example, it is known that such fine precipitates appear in Sb or the like. In the present embodiment, an example in which Si is used as the power semiconductor element 2 is shown. However, SiC may be used, and in this case, the current density is higher than Si. Therefore, as in the present embodiment, the inner lead 5 Is directly soldered to the surface electrode 4, the electrical resistance is lowered, and the loss as a power semiconductor device can be reduced.

上述のように、インナーリード５を電力用半導体素子２の表面電極４にはんだ付けする構成を採ることで、複数のアルミワイヤを配線に用いた通常のパワーモジュールに対して配線抵抗が下がり、電力用半導体装置１０１としての損失を低減することができる。特に、本実施形態では、表面電極４とインナーリード５とのはんだ付け部の形状安定性を高めることを目的としており、該はんだ付け部の形状の安定化により、本技術の適用範囲を更に広げる、つまり種々の電力用半導体装置に対して本実施形態の技術を適用可能とすることも目的の一つである。
このような、はんだ付け部の形状安定化を図るための、本実施形態における構成について、以下に説明する。 As described above, by adopting a configuration in which the inner lead 5 is soldered to the surface electrode 4 of the power semiconductor element 2, the wiring resistance is reduced with respect to a normal power module using a plurality of aluminum wires for wiring. The loss as the semiconductor device 101 can be reduced. In particular, the present embodiment aims to increase the shape stability of the soldered portion between the surface electrode 4 and the inner lead 5, and further broadens the scope of application of the present technology by stabilizing the shape of the soldered portion. That is, it is one of the purposes to make the technology of the present embodiment applicable to various power semiconductor devices.
The configuration in the present embodiment for stabilizing the shape of the soldering portion will be described below.

図１Ａに示すように、インナーリード５には、表面電極４に対応して貫通穴６が設けられ、該貫通穴６内、及びインナーリード５と表面電極４との間隙１１には、はんだ３が満たされている。このとき、はんだ３のインナーリード５の底面５ａとの接触部分３ａは、貫通穴６よりも広く、かつ表面電極４よりも小さい面積となっている。このような範囲となるようにはんだ３の供給量を設定する。尚、上記底面５ａは、電力用半導体素子２に対向するインナーリード５の面をいう。   As shown in FIG. 1A, the inner lead 5 is provided with a through hole 6 corresponding to the surface electrode 4, and the solder 3 is provided in the through hole 6 and in the gap 11 between the inner lead 5 and the surface electrode 4. Is satisfied. At this time, the contact portion 3 a of the solder 3 with the bottom surface 5 a of the inner lead 5 is wider than the through hole 6 and smaller than the surface electrode 4. The supply amount of the solder 3 is set so as to be in such a range. The bottom surface 5 a is a surface of the inner lead 5 facing the power semiconductor element 2.

即ち、はんだ３の供給量が過剰な場合、もしくはインナーリード５と表面電極４との隙間１１が通常よりも狭い場合、もしくはこの両方が同時に起きた場合などに、インナーリード５の先端５ｂまではんだ３が達することが起こり得る。例えばインナーリード５の先端５ｂから水平方向に膨らむ程度にはんだ３が供給された場合には、はんだ３は、その表面積を最小とすることでエネルギを小さくできることから、ボール形状になって転がり飛び出してしまう。これは、いわゆるはんだボールの発生であり、不良状態を引き起こす原因になり、その結果、不良の検査に多大な労力を要することになってしまう。   That is, when the supply amount of the solder 3 is excessive, or when the gap 11 between the inner lead 5 and the surface electrode 4 is narrower than usual, or when both of these occur at the same time, the solder 5 reaches the tip 5b of the inner lead 5. It can happen that 3 reaches. For example, when the solder 3 is supplied to such an extent that it swells in the horizontal direction from the tip 5b of the inner lead 5, the energy of the solder 3 can be reduced by minimizing its surface area. End up. This is the generation of a so-called solder ball, which causes a defective state, and as a result, a great amount of labor is required for the inspection of the defect.

また、はんだ３がインナーリード５の底面５ａに濡れないときにも、はんだ３の供給過剰、上記隙間１１が狭い、若しくはこれらの両者が同時に発生した場合には、はんだ３が貫通穴６の縁から盛り上がり、同じくはんだボール生成の可能性が高くなる。   Even when the solder 3 does not get wet with the bottom surface 5 a of the inner lead 5, if the supply of the solder 3 is excessive, the gap 11 is narrow, or both of them occur at the same time, the solder 3 becomes the edge of the through hole 6. As a result, the possibility of solder ball generation increases.

よって、インナーリード５の底面５ａにはんだ３が濡れ、かつインナーリード５の先端５ｂにまではんだ３が達しない状態を維持すれば、はんだボールの生成は回避可能である。   Therefore, if the state in which the solder 3 gets wet on the bottom surface 5a of the inner lead 5 and the solder 3 does not reach the tip 5b of the inner lead 5 is generated, the generation of solder balls can be avoided.

そこで出願人は、はんだ量に関して、実験から次の関係を見出した。即ち、図１Ｂに示すように、インナーリード５と表面電極４との隙間１１の高さをｈ、インナーリード５の貫通穴６の幅をＬ１としたとき、ｈ＜（Ｌ１／２）の関係を満たすことで、はんだボールの発生もなく、図１Ａに示すように、上記接触部分３ａが貫通穴６よりも広く、かつ表面電極４よりも小さい面積となる。尚、幅Ｌ１は、インナーリード５の延在方向に沿った長さである。本実施形態では、図２に示すように貫通穴６は円形であるので、幅Ｌ１は、貫通穴６の直径に相当する。   Therefore, the applicant found the following relationship from the experiment regarding the amount of solder. That is, as shown in FIG. 1B, when the height of the gap 11 between the inner lead 5 and the surface electrode 4 is h and the width of the through hole 6 of the inner lead 5 is L1, the relationship of h <(L1 / 2) By satisfying the above, no solder balls are generated, and the contact portion 3a is wider than the through hole 6 and smaller than the surface electrode 4 as shown in FIG. 1A. The width L1 is a length along the extending direction of the inner lead 5. In the present embodiment, since the through hole 6 is circular as shown in FIG. 2, the width L <b> 1 corresponds to the diameter of the through hole 6.

上記関係について詳しく説明する。出願人は、一定の幅Ｌ１に対して高さｈを変化させながらはんだ接合を行う実験を行った。高さｈが比較的小さいときには、再現性よく接合が達成された。しかしながら、高さｈが大きくなるにつれて、はんだ供給量が少ない場合には、表面電極４にまではんだ３が達しないという問題が生じる。この場合、はんだ量を多くしても、表面電極４にはんだ３が接する前にインナーリード５の底面５ａにはんだ３が濡れてしまい、はんだ３が下側つまり表面電極４側に垂れ下がった塊における底辺の長さが長くなり、フィレットの形状が非常に不安定となった。   The above relationship will be described in detail. The applicant conducted an experiment in which solder bonding was performed while changing the height h with respect to a certain width L1. When the height h was relatively small, joining was achieved with good reproducibility. However, as the height h increases, there is a problem that the solder 3 does not reach the surface electrode 4 when the amount of supplied solder is small. In this case, even if the amount of solder is increased, the solder 3 gets wet on the bottom surface 5a of the inner lead 5 before the solder 3 contacts the surface electrode 4, and the solder 3 hangs down on the lower surface, that is, on the surface electrode 4 side. The length of the base became long and the shape of the fillet became very unstable.

上記実験から、インナーリード５にはんだ３が濡れ拡がる前に、はんだ３が表面電極４に接することがフィレット形状を安定化させる上で重要であることがわかった。そのような現象の境界として、実験的に、ｈ＜（Ｌ１／２）の条件が得られ、この条件を満足することで、フィレット形状の安定化が見られた。このような関係を満足すれば、インナーリード５の上方からはんだ３を供給したとき、貫通穴６の側壁６ａにはんだ３が付着した場合でも、溶融したはんだ３は、いずれ表面電極４に接する。この理由について以下に説明する。   From the above experiment, it was found that it is important for stabilizing the fillet shape that the solder 3 contacts the surface electrode 4 before the solder 3 wets and spreads on the inner lead 5. As a boundary of such a phenomenon, a condition of h <(L1 / 2) was experimentally obtained, and the fillet shape was stabilized by satisfying this condition. If such a relationship is satisfied, when the solder 3 is supplied from above the inner lead 5, even if the solder 3 adheres to the side wall 6a of the through hole 6, the molten solder 3 will eventually come into contact with the surface electrode 4. The reason for this will be described below.

一般的に、溶融金属は、形状の自由度が大きいが、空気と液体との界面の面積が小さいほど表面自由エネルギが小さくなるので、表面積が最小になろうとする。本実施形態の場合、溶融したはんだ３の表面積が最小になるのは、はんだ３が球状となり、かつ貫通穴６と、球状はんだ３のいわゆる赤道部分で接した場合である。
図３の（ａ）から（ｃ）に、溶融したはんだ３を貫通穴６部分に供給する様子を示す。貫通穴６よりも直径の大きいはんだ３が供給される場合、はんだ３は貫通穴６の側壁６ａに濡れ、その結果、（ｂ）に示すように貫通穴６からはんだ３が垂れ下がる状態となる。このとき、供給されたはんだ３の体積が十分であれば、貫通穴６の下にはんだ３の膨らみが形成され、はんだボールを形成してしまう場合もある。但し、はんだボール形成前に、はんだ３が表面電極４に接するならば、落下は起こらない。 In general, molten metal has a high degree of freedom in shape, but the surface free energy decreases as the area of the interface between air and liquid decreases, so that the surface area tends to be minimized. In the case of this embodiment, the surface area of the melted solder 3 is minimized when the solder 3 is spherical and is in contact with the through hole 6 at the so-called equator portion of the spherical solder 3.
3A to 3C show how the molten solder 3 is supplied to the through-hole 6 portion. When the solder 3 having a diameter larger than that of the through hole 6 is supplied, the solder 3 gets wet with the side wall 6a of the through hole 6, and as a result, the solder 3 hangs down from the through hole 6 as shown in FIG. At this time, if the volume of the supplied solder 3 is sufficient, a bulge of the solder 3 may be formed under the through hole 6 to form a solder ball. However, if the solder 3 is in contact with the surface electrode 4 before the solder ball is formed, the drop does not occur.

即ち、貫通穴６に接したはんだは、表面積が最小の形状を取ることが最もエネルギが小さい状態である。即ち、溶融したはんだ３は、半球状に、貫通穴６から下側に突出する形状が、安定な最小体積である。それ以上の体積が貫通穴６の下側に突出した場合、はんだボールを形成した方が、はんだ全体の表面積が小さくなる場合がある。このようにエネルギバランスの関係上、はんだボールの発生を抑制するためには、貫通穴６を直径とする半球が形成されるよりも前に、表面電極４に、はんだ３が接することが有効である。即ち、上記半球の半径は、Ｌ１／２であるので、インナーリード５の底面５ａと表面電極４との隙間１１の高さｈを、ｈ＜（１／２）に設定すれば、はんだボールが発生する臨界体積に達する前に、はんだ３が表面電極４に濡れ、はんだボールの生成を防止できる。その結果、検査工程などを簡素化することができる。また、はんだボールの発生によるはんだ３の損失がないため、インナーリード５と表面電極４との間に供給されるはんだ３の体積が安定化され、フィレット形状が安定化される。   That is, the solder in contact with the through hole 6 is in a state where the energy is the smallest when it takes a shape with the smallest surface area. In other words, the molten solder 3 has a hemispherical shape that protrudes downward from the through hole 6 and has a stable minimum volume. When a volume larger than that protrudes to the lower side of the through hole 6, the surface area of the entire solder may become smaller when the solder balls are formed. Thus, in order to suppress the generation of solder balls, it is effective that the solder 3 is in contact with the surface electrode 4 before the formation of the hemisphere having the diameter of the through hole 6 from the viewpoint of energy balance. is there. That is, since the radius of the hemisphere is L1 / 2, if the height h of the gap 11 between the bottom surface 5a of the inner lead 5 and the surface electrode 4 is set to h <(1/2), the solder ball Before reaching the critical volume to be generated, the solder 3 gets wet with the surface electrode 4 and the generation of solder balls can be prevented. As a result, the inspection process and the like can be simplified. Further, since there is no loss of the solder 3 due to the generation of solder balls, the volume of the solder 3 supplied between the inner lead 5 and the surface electrode 4 is stabilized, and the fillet shape is stabilized.

例えば、はんだ３の層の厚みを、一実施例として例えば０．６ｍｍとすると、インナーリード５の貫通穴６は、最低１．２ｍｍの幅があればよく、広いほどはんだ３の濡れの安定性が増した。インナーリード５の厚みとして、一実施例では０．３ｍｍから１ｍｍ程度を用いた。   For example, when the thickness of the layer of the solder 3 is 0.6 mm as an example, the through hole 6 of the inner lead 5 only needs to have a width of at least 1.2 mm, and the larger the width, the more stable the wetting of the solder 3. Increased. In one embodiment, the thickness of the inner lead 5 is about 0.3 mm to 1 mm.

実施の形態２．
図４には、実施の形態２における電力用半導体装置１０２の断面図を示している。尚、電力用半導体装置１０２の構成は、上述した実施の形態１における電力用半導体装置１０１と同じであり、ここでの説明は省略する。
本実施の形態２では、貫通穴６を通して糸はんだ３Ａを電力用半導体素子２の表面電極４に供給する形態について説明する。貫通穴６の幅Ｌ１と同方向における、表面電極４の幅をＬ２としたとき、Ｌ２＞Ｌ１＞２ｈの関係を満足するように、上記幅Ｌ２を設定する。このように設定する理由について、以下に説明する。 Embodiment 2. FIG.
FIG. 4 shows a cross-sectional view of power semiconductor device 102 in the second embodiment. The configuration of the power semiconductor device 102 is the same as that of the power semiconductor device 101 in the first embodiment described above, and a description thereof is omitted here.
In the second embodiment, a mode in which the thread solder 3A is supplied to the surface electrode 4 of the power semiconductor element 2 through the through hole 6 will be described. When the width of the surface electrode 4 in the same direction as the width L1 of the through hole 6 is L2, the width L2 is set so as to satisfy the relationship of L2>L1> 2h. The reason for this setting will be described below.

上記高さｈがばらついた場合であっても、インナーリード５の上記底面５ａにはんだ３が濡れ広がることが、はんだ３Ａの余剰分を吸収するのに都合がよい。はんだ付装置では、電力用半導体素子２の底面側、図４に示す構成では金属板１側、から加熱するのが装置構成として簡便である。しかしながら該構成では、インナーリード５についても、電力用半導体素子２に対向する上記底面５ａ側の温度に比べ、反対側の面５ｃの温度が低くなるという現象が生じる。これは、はんだ付装置内の雰囲気にさらされる、電力用半導体装置１０２の側面から放熱が行われることに起因する。このことは、インナーリード５の二つの主面５ａ，５ｃの内、電力用半導体素子２と対向する底面５ａ側のはんだ濡れ性が、反対側の面５ｃに比べて良好であることを意味する。即ちはんだ３Ａは、貫通穴６の側壁６ａ、インナーリード５の電力用半導体素子２と対向する底面５ａ、及び、電力用半導体素子２の表面電極４の３つに濡れ、かつ空気との界面の面積が最小になろうとする。   Even when the height h varies, it is convenient that the solder 3 spreads on the bottom surface 5a of the inner lead 5 to absorb the surplus solder 3A. In the soldering apparatus, heating from the bottom surface side of the power semiconductor element 2 and from the metal plate 1 side in the structure shown in FIG. However, in this configuration, the inner lead 5 also has a phenomenon that the temperature of the opposite surface 5c is lower than the temperature of the bottom surface 5a facing the power semiconductor element 2. This is because heat is radiated from the side surface of the power semiconductor device 102 exposed to the atmosphere in the soldering apparatus. This means that the solder wettability on the bottom surface 5a side facing the power semiconductor element 2 out of the two main surfaces 5a and 5c of the inner lead 5 is better than that of the opposite surface 5c. . That is, the solder 3A gets wet with three of the side wall 6a of the through hole 6, the bottom surface 5a of the inner lead 5 facing the power semiconductor element 2, and the surface electrode 4 of the power semiconductor element 2, and the interface between the solder 3A and the air. Try to minimize the area.

このとき、はんだ量が過大である、あるいは高さｈが小さいときには、保持可能なはんだ量を超えると、過剰分のはんだ３Ａは、球状になり転がり、はんだボールを生成してしまう。即ち、はんだボール分の体積を取り去った後に残されたはんだの体積＋はんだボールの体積は、供給されたはんだ量に相当する。一方、インナーリード５と表面電極４との隙間１１に形成されたはんだ層のフィレットの表面積、及び貫通穴６の断面積の和がはんだの全表面積である。よって、はんだボールを出現させる方が出現させない場合よりも、上記全表面積が小さくなるときには、はんだボールの発生は、避けられないということになる。   At this time, when the amount of solder is excessive or the height h is small, when the amount of solder that can be held is exceeded, the excess amount of solder 3A becomes spherical and rolls to generate solder balls. That is, the volume of the solder remaining after removing the volume of the solder balls + the volume of the solder balls corresponds to the supplied amount of solder. On the other hand, the sum of the surface area of the fillet of the solder layer formed in the gap 11 between the inner lead 5 and the surface electrode 4 and the cross-sectional area of the through hole 6 is the total surface area of the solder. Therefore, when the total surface area is smaller than the case where the solder ball does not appear, the generation of the solder ball is unavoidable.

即ち、インナーリード５と表面電極４との間で、過剰なはんだを吸収できる能力が高いほど、安定性の高い生産を行えることになる。ここで、表面電極４の面積が貫通穴６の断面積よりも大きい場合、換言すると上記幅Ｌ２＞上記幅Ｌ１の場合、はんだフィレットが形成された後、インナーリード５の底面５ａにはんだ３Ａが濡れていくほど、はんだ３Ａの表面積は減る関係になる。つまりエネルギ的には、低い方へ進むことになる。   That is, the higher the ability to absorb excess solder between the inner lead 5 and the surface electrode 4, the more stable the production can be performed. Here, when the area of the surface electrode 4 is larger than the cross-sectional area of the through hole 6, in other words, when the width L2> the width L1, the solder 3A is formed on the bottom surface 5a of the inner lead 5 after the solder fillet is formed. As the surface gets wet, the surface area of the solder 3A decreases. That is, in terms of energy, the process proceeds to the lower side.

逆に、表面電極４の面積が貫通穴６の断面積よりも小さい場合、換言すると幅Ｌ２＜幅Ｌ１の場合、インナーリード５の底面５ａにはんだ３Ａが濡れるほど、はんだ３Ａのフィレット部の表面積は、増えることになる。その結果、底面５ａへのはんだ３Ａの濡れが拡大するよりも、はんだボールを出現させた方がエネルギ的に安定する。よって、はんだボールの生成を防止することができなくなる。   On the contrary, when the area of the surface electrode 4 is smaller than the cross-sectional area of the through hole 6, in other words, when the width L <b> 2 <the width L <b> 1, the surface area of the fillet portion of the solder 3 </ b> A increases as the solder 3 </ b> A gets wet with the bottom surface 5 a of the inner lead 5. Will increase. As a result, the appearance of the solder ball is more energetically stable than the expansion of the wetting of the solder 3A onto the bottom surface 5a. Therefore, it becomes impossible to prevent the formation of solder balls.

以上の説明からわかるように、表面電極４の幅Ｌ２＞貫通穴６の幅Ｌ１＞２ｈとすることで、はんだ付けにおける安定度を確保することができ、はんだボールの生成を抑制することができる。   As can be seen from the above description, by setting the width L2 of the surface electrode 4> the width L1 of the through hole 6> 2h, it is possible to ensure the stability in soldering and to suppress the generation of solder balls. .

実施の形態３．
本実施形態３では、上述した実施の形態２の電力用半導体装置１０２を例に採り、その製造方法、特に、インナーリード５と表面電極４とのはんだ付け方法について述べる。
はんだ付けプロセスでは、雰囲気の酸素濃度、雰囲気の温度、加熱時間、及びはんだ付けされる材料の表面状態の諸条件によって、はんだ濡れ性は、大きく影響を受ける。具体的には、上記諸条件により表面張力に差が生じ、はんだ濡れ性が悪い場合には、濡れ角が大きくなる関係がある。例えば酸素濃度が低く、温度が高く、加熱時間が長く、及び、材料の表面についてクリーニングなどをしたほうが良好な濡れ性を得ることができ、濡れ角は小さくなる。
尚、一般的に濡れ角とは、液体と固体とが接するとき、二者間でなす角度をいい、また、濡れ角が９０度以下のときに「濡れる」と言う。 Embodiment 3 FIG.
In the third embodiment, the power semiconductor device 102 of the second embodiment described above will be taken as an example, and a manufacturing method thereof, in particular, a soldering method between the inner lead 5 and the surface electrode 4 will be described.
In the soldering process, solder wettability is greatly affected by various conditions such as the oxygen concentration of the atmosphere, the temperature of the atmosphere, the heating time, and the surface state of the material to be soldered. Specifically, there is a relationship in which the wetting angle increases when the surface tension varies depending on the above conditions and the solder wettability is poor. For example, when the oxygen concentration is low, the temperature is high, the heating time is long, and the surface of the material is cleaned, better wettability can be obtained, and the wetting angle becomes smaller.
In general, the wetting angle refers to an angle formed between the two when the liquid and the solid are in contact with each other, and “wetting” is referred to when the wetting angle is 90 degrees or less.

はんだ付けプロセスにおいて、図４の（ａ）に示す、実施の形態２の電力用半導体装置１０２を例に、図５に示すようにはんだの濡れ角をθ、該濡れ角θを形成するはんだの表面を形成する半径をＲとすると、図４の（ａ）及び図５から、
（Ｌ２／２）２＋（Ｒｃｏｓθ）２＝Ｒ２、及び
（Ｌ１／２）２＋（ｈ＋Ｒｃｏｓθ）２＝Ｒ２
の関係が得られる。 In the soldering process, taking the power semiconductor device 102 of the second embodiment shown in FIG. 4A as an example, the solder wetting angle is θ as shown in FIG. If the radius forming the surface is R, from (a) of FIG. 4 and FIG.
(L2 / 2) 2 + (Rcosθ) 2 = R 2 and (L1 / 2) 2 + (h + Rcosθ) 2 = R 2
The relationship is obtained.

はんだをインナーリード５の貫通穴６よりも小さい径で供給した場合、はんだがインナーリード５に濡れる条件としては、上述のように濡れ角が９０度以下のときに「濡れる」ことからＲの最大がＬ２／２に相当するので、
ｈ＜（（Ｌ２／２）２−（Ｌ１／２）２＋（Ｒｃｏｓθ）２）１／２−Ｒｃｏｓθ となる。 When the solder is supplied with a diameter smaller than the through hole 6 of the inner lead 5, the condition for the solder to wet the inner lead 5 is “wet” when the wetting angle is 90 degrees or less as described above. Is equivalent to L2 / 2,
h <((L2 / 2) 2 − (L1 / 2) 2 + (Rcos θ) 2 ) 1/2 −Rcos θ.

このように、インナーリード５の貫通穴６の幅Ｌ１、表面電極４の幅Ｌ２、及び隙間１１の高さｈを決定することで、最大濡れ角θが得られる。よって、電力用半導体装置の製造方法において、このような濡れ角θを満たすように、はんだ濡れ雰囲気、及び温度を整える工程を備えることで、はんだボールの発生防止を図りながら、確実な接合面積を確保し、再現性のあるフィレット形状を得ることが可能となる。   Thus, by determining the width L1 of the through hole 6 of the inner lead 5, the width L2 of the surface electrode 4, and the height h of the gap 11, the maximum wetting angle θ is obtained. Therefore, in the method for manufacturing a power semiconductor device, by providing a solder wetting atmosphere and a process for adjusting the temperature so as to satisfy such a wetting angle θ, it is possible to prevent a solder ball from being generated and provide a reliable bonding area. It is possible to secure and obtain a reproducible fillet shape.

２ 電力用半導体素子、３ はんだ、４ 表面電極、５ インナーリード、６ 貫通穴、 １０１、１０２ 電力用半導体装置。   2 Power semiconductor element, 3 solder, 4 surface electrode, 5 inner lead, 6 through hole, 101, 102 power semiconductor device.

Claims (3)

半導体素子と、上記半導体素子の表面電極に対向して配設された貫通穴を有する導体と、上記貫通穴及び上記表面電極を接合する導電性接合材とを備えた電力用半導体装置であって、
上記導体と上記表面電極との隙間の高さをｈ、及び上記貫通穴の幅をＬ１とし、
ｈ＜（Ｌ１／２）の関係を有することを特徴とする電力用半導体装置。 A power semiconductor device comprising: a semiconductor element; a conductor having a through hole disposed to face a surface electrode of the semiconductor element; and a conductive bonding material that joins the through hole and the surface electrode. ,
The height of the gap between the conductor and the surface electrode is h, and the width of the through hole is L1,
A power semiconductor device having a relationship of h <(L1 / 2). 上記貫通穴の幅と同方向における上記表面電極の幅をＬ２とし、
Ｌ２＞Ｌ１＞２ｈの関係を有する、請求項１記載の電力用半導体装置。 The width of the surface electrode in the same direction as the width of the through hole is L2,
The power semiconductor device according to claim 1, wherein a relationship of L2>L1> 2h is satisfied. 貫通穴を有する導体を半導体素子の表面電極に対向して配設し、上記貫通穴と上記表面電極とをはんだ付けして接合する電力用半導体装置の製造方法であって、
上記導体と上記表面電極との隙間の高さをｈ、上記貫通穴の幅をＬ１、及び、上記貫通穴の幅と同方向における上記表面電極の幅をＬ２とし、上記はんだ付けを行うときのはんだと上記表面電極とのなす濡れ角θは、
ｈ＜（（Ｌ２／２）２−（Ｌ１／２）２＋（Ｒｃｏｓθ）２）１／２−Ｒｃｏｓθ を満たすことを特徴とする電力用半導体装置の製造方法。 A method of manufacturing a power semiconductor device in which a conductor having a through hole is disposed opposite to a surface electrode of a semiconductor element, and the through hole and the surface electrode are soldered and joined.
The height of the gap between the conductor and the surface electrode is h, the width of the through hole is L1, and the width of the surface electrode in the same direction as the width of the through hole is L2. The wetting angle θ between the solder and the surface electrode is
A method for manufacturing a power semiconductor device, wherein h <((L2 / 2) 2 − (L1 / 2) 2 + (Rcos θ) 2 ) 1/2 −Rcos θ is satisfied.
JP2009237974A 2009-10-15 2009-10-15 Power semiconductor device and method for manufacturing the power semiconductor device Pending JP2011086743A (en)

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