JP2010199395A - Semiconductor light-emitting element - Google Patents

Semiconductor light-emitting element Download PDF

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JP2010199395A
JP2010199395A JP2009044203A JP2009044203A JP2010199395A JP 2010199395 A JP2010199395 A JP 2010199395A JP 2009044203 A JP2009044203 A JP 2009044203A JP 2009044203 A JP2009044203 A JP 2009044203A JP 2010199395 A JP2010199395 A JP 2010199395A
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light emitting
electrode
layer
semiconductor light
emitting element
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JP5614938B2 (en
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Ryohei Hirose
量平 広瀬
Masahiko Sano
雅彦 佐野
Fumihiro Inoue
史大 井上
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Nichia Corp
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Nichia Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting element where extraction efficiency is improved while suppressing nonuniformity in light emission. <P>SOLUTION: The semiconductor light-emitting element 1 includes: a light emission part 10 where a second conductivity type layer 11, a light emission layer 12, and a first conductivity type layer 13 are laminated in order; and an electrode pair 20 constituted of a second electrode 30 which is connected to the second conductivity type layer 11 and a first electrode 40 which has a translucent electrode 70 on the first conductivity type layer 13 and is connected to the translucent electrode 70. The first electrode 40 includes: extension parts 41 which are formed to enclose the second electrode 30 when viewing the semiconductor light-emitting element 1 from above; an insulating film 50 arranged in the lower part of the extension part 41; and two or more first connection parts 45 to be electrically connected to the translucent electrode 70. The second electrode 30 includes a second connection part 35 which is electrically connected to the second conductivity type semiconductor layer 11 and is arranged in a region connecting the at least two first connection parts 45. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、半導体発光素子に関し、特に、取出し効率と発光の均一性を共に高めた半導体発光素子に関する。   The present invention relates to a semiconductor light emitting device, and more particularly, to a semiconductor light emitting device with improved extraction efficiency and emission uniformity.

従来の半導体発光素子において、発光むらを改善させるために、外部電源と接続するpパッド電極から細長いp側電極を延伸させたものが知られている(例えば、特許文献1参照)。さらに発光むらを改善するために、pパッド電極から伸びる直線状のp側電極と、nパッド電極から伸びるn側電極とを交互に配列した半導体発光素子が知られている(例えば、特許文献2〜4参照)。   In a conventional semiconductor light emitting device, an elongated p-side electrode is extended from a p-pad electrode connected to an external power source in order to improve light emission unevenness (see, for example, Patent Document 1). In order to further improve the light emission unevenness, a semiconductor light emitting device is known in which linear p-side electrodes extending from p-pad electrodes and n-side electrodes extending from n-pad electrodes are alternately arranged (for example, Patent Document 2). To 4).

また、発光領域内部に設けられたn側電極を、延伸部を設けたp側電極で囲んだ半導体発光素子も知られている(例えば、特許文献5〜8参照)。   In addition, a semiconductor light-emitting element in which an n-side electrode provided inside a light-emitting region is surrounded by a p-side electrode provided with an extending portion is also known (for example, see Patent Documents 5 to 8).

別の形態の発光素子では、n側電極を発光領域のp型半導体層上に絶縁膜を介して設け、p型半導体層に形成した複数のビアを介してn側電極とn型半導体層とを複数箇所で接続したものが知られている(例えば、特許文献9参照)。また、p型半導体層にp側電極を複数設けた発光素子も知られている(例えば、特許文献10の図17(a)参照)。   In another form of the light-emitting element, an n-side electrode is provided on the p-type semiconductor layer in the light-emitting region via an insulating film, and the n-side electrode, the n-type semiconductor layer, and the like are formed through a plurality of vias formed in the p-type semiconductor layer. Are connected at a plurality of locations (for example, see Patent Document 9). A light-emitting element in which a plurality of p-side electrodes are provided on a p-type semiconductor layer is also known (see, for example, FIG. 17A of Patent Document 10).

特開2007−281426号公報JP 2007-281426 A 特開2002−319704号公報JP 2002-319704 A 特開2001−345480号公報JP 2001-345480 A 特開2000−164930号公報JP 2000-164930 A 特開2005−183910号公報JP 2005-183910 A 特開平7−254732号公報JP-A-7-254732 特開平7−30153号公報Japanese Patent Laid-Open No. 7-30153 特開2003−179263号公報JP 2003-179263 A 特開2004−47988号公報JP 2004-47988 A 特開2004−56109号公報JP 2004-56109 A

発光素子は、p側電極の直下で強く発光するが、その発光の一部はp側電極に吸収される。特許文献1〜8のようにp側電極を延伸すると、発光素子の発光部における発光むらが抑制できる効果はあるものの、p側電極の面積が広くなるため、発光の吸収量が増加する。その結果、発光効率が低くなる問題がある。
特許文献10は、比較的小面積のp側電極を複数設けるので、p側電極の面積を小さく抑えることができる。しかしながら、発光素子の実装時に、p側電極と外部電極との配線が複雑になる恐れがある。
The light emitting element emits intense light immediately below the p-side electrode, but part of the emitted light is absorbed by the p-side electrode. When the p-side electrode is stretched as in Patent Documents 1 to 8, although there is an effect that unevenness of light emission in the light-emitting portion of the light-emitting element can be suppressed, the area of the p-side electrode is widened, so that the amount of light emission is increased. As a result, there is a problem that luminous efficiency is lowered.
Since Patent Document 10 provides a plurality of p-side electrodes having a relatively small area, the area of the p-side electrode can be kept small. However, when the light emitting element is mounted, the wiring between the p-side electrode and the external electrode may be complicated.

そこで、本発明は発光むらを抑制しながら、光取出し効率を高めた半導体発光素子を提供することを目的とする。   Accordingly, an object of the present invention is to provide a semiconductor light emitting device with improved light extraction efficiency while suppressing unevenness of light emission.

本発明の半導体発光素子は、第2導電型層、発光層及び第1導電型層を順に積層した発光部と、前記第2導電型層に接続された第2電極と前記第1導電型層上に透光性電極を有し該透光性電極に接続された第1電極とからなる電極対と、を備えた半導体発光素子であって、前記半導体発光素子を上面から見て、前記第1電極は、前記第2電極を囲むように形成された延伸部を含み、前記延伸部の下部に、絶縁膜を備えると共に、前記透光性電極と電気的に接続される第1接続部を2つ以上有し、前記第2電極は、少なくとも2つの前記第1接続部を結ぶ領域に、前記第2導電型半導体層と電気的に接続される第2接続部を有することを特徴とする。   The semiconductor light emitting device according to the present invention includes a light emitting unit in which a second conductive type layer, a light emitting layer, and a first conductive type layer are sequentially stacked, a second electrode connected to the second conductive type layer, and the first conductive type layer. A semiconductor light-emitting element comprising: a light-transmitting electrode; and an electrode pair including a first electrode connected to the light-transmitting electrode. One electrode includes an extending portion formed so as to surround the second electrode, and includes an insulating film at a lower portion of the extending portion, and a first connecting portion electrically connected to the translucent electrode. The second electrode has a second connection portion electrically connected to the second conductivity type semiconductor layer in a region connecting at least two of the first connection portions. .

本発明によれば、第1電極が延伸部を有し、延伸部の下部に絶縁膜を備えることで、延伸部における発光吸収を抑制することができる。さらに、本発明によれば、延伸部と透光性電極とが電気的に接続されている第1接続部を2つ以上有し、それらの接続部を結ぶ領域に第2電極が形成されていることで、光取り出し面における発光むらが大幅に改善される。このように、本発明の半導体発光素子は、発光むらを抑制しながら、光取り出し効率を高めることができる。本発明において「発光むら」とは、光取出し面側から見たときに、発光部の発光が不均一に見えることであり、例えば光が他と比べて暗部があるものなどをいい、発光むらが改善されるとは、発光部の発光が均一に近づくことをいう。   According to the present invention, the first electrode has the extending portion, and the insulating film is provided in the lower portion of the extending portion, so that the light emission absorption in the extending portion can be suppressed. Furthermore, according to the present invention, the extending portion and the translucent electrode have two or more first connection portions that are electrically connected, and the second electrode is formed in a region connecting the connection portions. As a result, the light emission unevenness on the light extraction surface is significantly improved. As described above, the semiconductor light emitting device of the present invention can increase the light extraction efficiency while suppressing unevenness of light emission. In the present invention, “light emission unevenness” means that the light emission of the light emitting part appears uneven when viewed from the light extraction surface side, for example, light having a dark part as compared with others. “Improved” means that the light emitted from the light emitting portion becomes nearly uniform.

第1の実施形態に係る半導体発光素子を示す概略平面図である。1 is a schematic plan view showing a semiconductor light emitting element according to a first embodiment. 図1のA−A線における概略断面図である。It is a schematic sectional drawing in the AA of FIG. 図1のB−B線における概略断面図である。It is a schematic sectional drawing in the BB line of FIG. 第1の実施形態に係る半導体発光素子の変形例を示す概略平面図である。It is a schematic plan view which shows the modification of the semiconductor light-emitting device concerning 1st Embodiment. 第1の実施形態に係る半導体発光素子の変形例を示す概略平面図である。It is a schematic plan view which shows the modification of the semiconductor light-emitting device concerning 1st Embodiment. 第2の実施形態に係る半導体発光素子を示す概略平面図である。It is a schematic plan view which shows the semiconductor light-emitting device concerning 2nd Embodiment. 第2の実施形態に係る半導体発光素子の変形例を示す概略平面図である。It is a schematic plan view which shows the modification of the semiconductor light-emitting device concerning 2nd Embodiment. 第2の実施形態に係る半導体発光素子の変形例を示す概略平面図である。It is a schematic plan view which shows the modification of the semiconductor light-emitting device concerning 2nd Embodiment.

以下、図面に基づいて本発明の実施の形態を詳細に説明する。なお、以下の説明では、必要に応じて特定の方向や位置を示す用語(例えば、「上」、「下」、「右」、「左」及び、それらの用語を含む別の用語)を用いる。それらの用語の使用は図面を参照した発明の理解を容易にするためであって、それらの用語の意味によって本発明の技術的範囲が限定されるものではない。また、複数の図面に表れる同一符号の部分は同一の部分又は部材を示す。また発明を理解しやすくするために、実施形態を分けて説明するが、これらの実施形態はそれぞれ独立するものではなく、共有できるところは他の実施形態の説明を適用できる。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the following description, terms indicating specific directions and positions (for example, “up”, “down”, “right”, “left” and other terms including those terms) are used as necessary. . The use of these terms is to facilitate understanding of the invention with reference to the drawings, and the technical scope of the present invention is not limited by the meaning of these terms. Moreover, the part of the same code | symbol which appears in several drawing shows the same part or member. In order to facilitate understanding of the invention, the embodiments will be described separately. However, these embodiments are not independent, and descriptions of other embodiments can be applied where they can be shared.

<第1の実施形態>
図1、図2A及び図2Bに示すように、本願発明に係る半導体発光素子1は、基板3の上に第2導電型層(n型半導体層)11、発光層12及び第1導電型層(p型半導体層)13を順に積層した発光部10を備えている。発光部10は、p型半導体層13及び発光層12を部分的に除去してn型半導体層11を露出させた切欠き部15(図1では切り欠きされた方向に対して垂直方向に長い楕円形)を備えている。
<First Embodiment>
As shown in FIGS. 1, 2A, and 2B, a semiconductor light emitting device 1 according to the present invention includes a second conductive layer (n-type semiconductor layer) 11, a light emitting layer 12, and a first conductive layer on a substrate 3. A light emitting unit 10 in which (p-type semiconductor layers) 13 are sequentially stacked is provided. The light-emitting portion 10 has a notch 15 in which the n-type semiconductor layer 11 is exposed by partially removing the p-type semiconductor layer 13 and the light-emitting layer 12 (in FIG. 1, it is longer in the direction perpendicular to the notched direction). Oval).

本実施の形態の半導体発光素子1は、第2電極(n側電極)30と第1電極(p側電極)40とから成る電極対20を1組備えている。またp側電極40はp型半導体層13上に備えた透光性電極70と接続されている。n側電極30は、切欠き部15に露出したn型半導体層11に電気的に接続されて、第2接続部35を形成している(図1及び図2A参照)。n側電極30は、切欠き部15からp側半導体層13の上面に伸びて、外部電極(図示せず)と接続される。そして、n側電極30とp型半導体層13と間には絶縁膜60が形成されており、n側電極30とp型半導体層13との短絡を防止している(図1及び図2B参照)。   The semiconductor light emitting device 1 according to the present embodiment includes a pair of electrode pairs 20 including a second electrode (n-side electrode) 30 and a first electrode (p-side electrode) 40. The p-side electrode 40 is connected to a translucent electrode 70 provided on the p-type semiconductor layer 13. The n-side electrode 30 is electrically connected to the n-type semiconductor layer 11 exposed at the notch portion 15 to form a second connection portion 35 (see FIGS. 1 and 2A). The n-side electrode 30 extends from the notch 15 to the upper surface of the p-side semiconductor layer 13 and is connected to an external electrode (not shown). An insulating film 60 is formed between the n-side electrode 30 and the p-type semiconductor layer 13 to prevent a short circuit between the n-side electrode 30 and the p-type semiconductor layer 13 (see FIGS. 1 and 2B). ).

図1に示すように、p側電極40は、p型半導体層13上に備えた透光性電極70の表面の一部に形成されている。p側電極40は、n側電極30を囲むように形成された延伸部41を含んでいる。そして、図2A及び図2Bに示すように、延伸部41の下部、すなわち延伸部41と透光性電極70との間に、絶縁膜50が形成されている。この絶縁膜50には、2つ以上(図1では2つ)の開口部51が形成され、この開口部51の内側で、延伸部41と透光性電極70(p型半導体層13)とが接触して第1接続部45を形成している。この第1接続部45は、少なくとも延伸部41の一部と透光性電極70とが電気的に接続されていればよい。絶縁膜50に設けた開口部51内に第1接続部45を形成する他にも、例えば、延伸部41の一部を絶縁膜50の幅よりも広い幅で設けて、その幅広領域において、延伸部41と透光性電極70とを絶縁膜50の周囲で接続して第1接続部45を形成することもできる。   As shown in FIG. 1, the p-side electrode 40 is formed on a part of the surface of the translucent electrode 70 provided on the p-type semiconductor layer 13. The p-side electrode 40 includes an extending portion 41 formed so as to surround the n-side electrode 30. As shown in FIGS. 2A and 2B, an insulating film 50 is formed below the extending portion 41, that is, between the extending portion 41 and the translucent electrode 70. Two or more (two in FIG. 1) openings 51 are formed in the insulating film 50. Inside the openings 51, the extending portion 41, the translucent electrode 70 (p-type semiconductor layer 13), and Are in contact with each other to form the first connection portion 45. The first connection part 45 only needs to be electrically connected to at least a part of the extending part 41 and the translucent electrode 70. In addition to forming the first connection portion 45 in the opening 51 provided in the insulating film 50, for example, a part of the extending portion 41 is provided with a width wider than the width of the insulating film 50, and in the wide region, The extending portion 41 and the translucent electrode 70 can be connected around the insulating film 50 to form the first connecting portion 45.

この半導体発光素子1によれば、延伸部41と、p型半導体層13上に有する透光性電極70と、の間に絶縁膜50が形成されるので、発光層12から延伸部41に入射する光が減少するので、延伸部41での発光吸収が抑制される。よって、半導体発光素子1の光取出し効率が向上する。   According to the semiconductor light emitting device 1, since the insulating film 50 is formed between the extending portion 41 and the translucent electrode 70 provided on the p-type semiconductor layer 13, the light enters the extending portion 41 from the light emitting layer 12. Since the light to be reduced is reduced, the light absorption at the extending portion 41 is suppressed. Therefore, the light extraction efficiency of the semiconductor light emitting device 1 is improved.

また、少なくとも2つ以上(図1では2つ)の第1接続部45を有することで、それぞれの第1接続部45から電流が透光性電極70に流れ、さらにp型半導体層13に流れることで、発光層12の面内における発光むらを、ひいては光取出し部での発光むらを改善することができる。さらに、半導体発光素子を上面から見て、少なくとも2つ以上の第1接続部45を結ぶ領域55内に第2接続部35が形成されている(つまり、領域55内にn側電極30が形成されている)ので、1つのn側電極30に向かってそれぞれの第1接続部45から電流が流れて、n側電極30の周囲を広く発光させることができる。その結果、n側電極30周囲の非発光領域(いわゆる暗部)が減少し、発光むらを効果的に抑えることができる。図1においては、第1接続部45が2つ設けられており、この2つの第1接続部45を結ぶ領域55(斜線部分)内にn側電極が配置されているので、領域55において発光むらを抑えることができる。   Further, by having at least two or more (two in FIG. 1) first connection portions 45, current flows from the first connection portions 45 to the translucent electrode 70 and further flows to the p-type semiconductor layer 13. As a result, the uneven light emission within the surface of the light emitting layer 12 and, in turn, the uneven light emission at the light extraction portion can be improved. Furthermore, when the semiconductor light emitting element is viewed from above, the second connection portion 35 is formed in a region 55 connecting at least two or more first connection portions 45 (that is, the n-side electrode 30 is formed in the region 55). Therefore, a current flows from each of the first connection portions 45 toward one n-side electrode 30, so that the periphery of the n-side electrode 30 can emit light widely. As a result, the non-light emitting region (so-called dark portion) around the n-side electrode 30 is reduced, and uneven light emission can be effectively suppressed. In FIG. 1, two first connection portions 45 are provided, and the n-side electrode is disposed in a region 55 (shaded portion) connecting the two first connection portions 45, so that light emission occurs in the region 55. Unevenness can be suppressed.

第1接続部45の大きさは、延伸部41での発光吸収を抑制するために、できるだけ小さく設けることが好ましい。本実施形態のように第1接続部45が2つであって、これらの第1接続部45を結ぶ領域55にn側電極30が配置される場合、2つの第1接続部45の延伸方向における長さの総和は、延伸部41の延伸方向における長さの少なくとも半分以下に設定することが好ましい。また各第1接続部45の面積は、少なくともp側電極から透光性電極70に電流が流れればよく、できるだけ小さく設けることが好ましい。   The size of the first connection portion 45 is preferably provided as small as possible in order to suppress light absorption at the extending portion 41. When the number of the first connection portions 45 is two and the n-side electrode 30 is disposed in the region 55 that connects these first connection portions 45 as in the present embodiment, the extending direction of the two first connection portions 45 The total sum of the lengths of is preferably set to at least half the length of the stretched portion 41 in the stretching direction. Further, the area of each first connection portion 45 may be as small as possible as long as current flows from the p-side electrode to the translucent electrode 70.

なお、本明細書において、「少なくとも2つの第1接続部45を結ぶ領域55に、第2導電型半導体層(n型半導体層)11と電気的に接続される第2接続部35を有する」とは、領域55の内部にn側電極30の少なくとも一部が形成され、かつ領域55の内部においてn側電極30がn型半導体層11と通電している(すなわち、領域55内に第2接続部35の少なくとも一部が設けられている)ことを意味している。特に図1に示すように、n側電極30の先端部が領域55の内部に形成されているのが好ましい。   In the present specification, “having the second connection portion 35 electrically connected to the second conductive semiconductor layer (n-type semiconductor layer) 11 in a region 55 connecting at least two first connection portions 45”. Means that at least a part of the n-side electrode 30 is formed inside the region 55 and the n-side electrode 30 is energized with the n-type semiconductor layer 11 inside the region 55 (that is, the second electrode is present in the region 55. This means that at least a part of the connecting portion 35 is provided). In particular, as shown in FIG. 1, the tip of the n-side electrode 30 is preferably formed inside the region 55.

また、図1のように、第1接続部45(開口部51)が延伸部41の先端近傍に形成されているのが好ましい。延伸部41の先端は、p側電極40の給電位置から最も遠い部分である。よって、延伸部41の先端に第1接続部45を設けると、発光部10の広範囲に電流を拡散することができる。その結果、半導体発光素子1の発光むらを抑えることができる。
なお、図1では、絶縁膜50の先端近傍に形成された開口部51を介して、第1接続部45を設ける形態を示している。しかしながら、開口部51を形成せずに、延伸部41の先端に第1接続部45を設けてもよい。例えば、図7のように、延伸部41の長手方向において延伸部41を絶縁膜50よりも長く形成すれば、延伸部41の先端は、絶縁膜50を越えて透光性電極70に接触し、第1接続部45が形成される。
In addition, as shown in FIG. 1, the first connection portion 45 (opening 51) is preferably formed in the vicinity of the tip of the extending portion 41. The tip of the extending portion 41 is the portion farthest from the power feeding position of the p-side electrode 40. Therefore, when the first connection portion 45 is provided at the tip of the extending portion 41, current can be diffused over a wide range of the light emitting portion 10. As a result, the uneven light emission of the semiconductor light emitting device 1 can be suppressed.
Note that FIG. 1 shows a form in which the first connection portion 45 is provided through the opening 51 formed in the vicinity of the tip of the insulating film 50. However, the first connecting portion 45 may be provided at the tip of the extending portion 41 without forming the opening 51. For example, as shown in FIG. 7, if the extending portion 41 is formed longer than the insulating film 50 in the longitudinal direction of the extending portion 41, the distal end of the extending portion 41 contacts the translucent electrode 70 beyond the insulating film 50. The first connection part 45 is formed.

延伸部41は、n側電極30を囲むように形成されていれば、どのような形状に延伸することもできる。特に、延伸部41が略U字状(図1では上下が逆向きのU字状に描かれている)であるのが好ましい。
図1において、上側から下向きに伸びるp側電極40は、左右に分岐したのちに弧を描きながら下方向に延びている。「U字状の延伸部41」とは、図1のp側電極40において、左右に分岐して下方向に伸びている部分を指している。
The extending portion 41 can be extended in any shape as long as it is formed so as to surround the n-side electrode 30. In particular, it is preferable that the extending portion 41 has a substantially U shape (in FIG. 1, the up and down direction is drawn in a reverse U shape).
In FIG. 1, the p-side electrode 40 extending downward from the upper side extends downward while drawing an arc after branching left and right. The “U-shaped extending portion 41” refers to a portion that branches to the left and right and extends downward in the p-side electrode 40 of FIG.

複数の第1接続部45(開口部51)を形成するときに、第1接続部45とn側電極30との距離をほぼ等しくすると、各第1接続部45からn側電極30に流れる電流の電流密度が同程度になる。よって、第1接続部45とn側電極30との間の輝度がほぼ一定にできる利点がある。そして、延伸部41を略U字状に形成することにより、第1接続部45の形成位置に関係なく、第1接続部45とn側電極30との距離をほぼ等しくすることができる。
すなわち、延伸部41をU字状にすることにより、任意の位置に第1接続部45(開口部51)を形成しても、発光むらを抑えることができる。
When forming the plurality of first connection portions 45 (openings 51), if the distance between the first connection portion 45 and the n-side electrode 30 is substantially equal, the current flowing from each first connection portion 45 to the n-side electrode 30 The current density is about the same. Therefore, there is an advantage that the luminance between the first connection portion 45 and the n-side electrode 30 can be made substantially constant. Then, by forming the extending portion 41 in a substantially U shape, the distance between the first connecting portion 45 and the n-side electrode 30 can be made substantially equal regardless of the position where the first connecting portion 45 is formed.
That is, by making the extending portion 41 U-shaped, unevenness in light emission can be suppressed even if the first connection portion 45 (opening portion 51) is formed at an arbitrary position.

第2電極(n側電極)30は第2配線(n側配線)37を備えることが好ましい。本明細書における「n側配線37」とは、切欠き部15に設けられたn側電極30から延びる配線部分を指す。n側配線37を設けることにより、外部電源と接続されるパッド(図示せず)と、パッドから離れた位置(例えば領域55内)に形成されたn側電極30との間を、電気的に接続することができる。よって、領域55内に第2接続部35を設けることが比較的容易になる。   The second electrode (n-side electrode) 30 preferably includes a second wiring (n-side wiring) 37. The “n-side wiring 37” in this specification refers to a wiring portion extending from the n-side electrode 30 provided in the notch portion 15. By providing the n-side wiring 37, an electrical connection is established between a pad (not shown) connected to the external power source and the n-side electrode 30 formed at a position away from the pad (for example, in the region 55). Can be connected. Therefore, it is relatively easy to provide the second connection portion 35 in the region 55.

n側配線37は、発光する領域(主に、領域55)の外側まで設けることが好ましい。具体的には、図1のように、切欠き部15が発光部10内に孤立して形成されている場合(つまり、切欠き部15の周囲が、全てp型半導体層13で囲まれている場合)、n側配線37は、p型半導体層13の上に形成されることになる。n側電極30とp型半導体層13との短絡を防止するために、n側配線37とp型半導体層13と間に、絶縁膜60を介在させるとよい(図2B参照)。また、絶縁膜60により、発光層12からn側配線37に入射する光が減少するので、n側配線37での発光吸収が抑制される。よって、半導体発光素子1の光取出し効率が向上する効果も得られる。   The n-side wiring 37 is preferably provided to the outside of the light emitting region (mainly the region 55). Specifically, as shown in FIG. 1, when the notch 15 is formed in isolation in the light emitting unit 10 (that is, the entire periphery of the notch 15 is surrounded by the p-type semiconductor layer 13. The n-side wiring 37 is formed on the p-type semiconductor layer 13. In order to prevent a short circuit between the n-side electrode 30 and the p-type semiconductor layer 13, an insulating film 60 may be interposed between the n-side wiring 37 and the p-type semiconductor layer 13 (see FIG. 2B). Further, the light incident on the n-side wiring 37 from the light-emitting layer 12 is reduced by the insulating film 60, so that light emission absorption in the n-side wiring 37 is suppressed. Therefore, the effect of improving the light extraction efficiency of the semiconductor light emitting element 1 can also be obtained.

また、別の例としては、切欠き部15が発光部10の外側まで連続して設けられている場合(図示せず)、n側配線37は、切欠き部15に(すなわち、n型半導体層11の上に)形成することができる。n側配線37とn型半導体層11との間は絶縁する必要はないので、それらの間には絶縁膜を介在させても、させなくてもよい。特に、絶縁膜を介在させると、発光層12からn側配線37に入射する光を減少させて、n側配線37での発光吸収を抑制することができる。すなわち、絶縁膜を介在させることにより、半導体発光素子1の光取出し効率が向上する効果が得られる。   As another example, when the notch 15 is continuously provided to the outside of the light emitting unit 10 (not shown), the n-side wiring 37 is connected to the notch 15 (that is, the n-type semiconductor). Over the layer 11). Since it is not necessary to insulate between the n-side wiring 37 and the n-type semiconductor layer 11, an insulating film may or may not be interposed between them. In particular, when an insulating film is interposed, light incident on the n-side wiring 37 from the light emitting layer 12 can be reduced, and light emission absorption in the n-side wiring 37 can be suppressed. That is, the effect of improving the light extraction efficiency of the semiconductor light emitting device 1 can be obtained by interposing the insulating film.

なお、切欠き部15を形成するには、発光層12を除去する必要がある。よって、切欠き部15の面積をできるだけ小さくすると、発光層12の面積を広くすることができる。特に、図1のように、切欠き部15を孤立して形成すると、切欠き部15の面積は、第2接続部35の形成に必要な面積まで縮小可能なため、発光部10の面積を広くするのに有利である。   In order to form the notch 15, it is necessary to remove the light emitting layer 12. Therefore, if the area of the notch 15 is made as small as possible, the area of the light emitting layer 12 can be increased. In particular, as shown in FIG. 1, when the notch 15 is formed in isolation, the area of the notch 15 can be reduced to the area necessary for forming the second connection portion 35. It is advantageous for widening.

図1の半導体発光素子1を応用して、大面積化に適した半導体発光素子を形成することもできる。図3及び図4を参照しながら、半導体発光素子1の応用例を詳細に説明する。   By applying the semiconductor light emitting device 1 of FIG. 1, a semiconductor light emitting device suitable for increasing the area can also be formed. An application example of the semiconductor light emitting device 1 will be described in detail with reference to FIGS. 3 and 4.

図3に示すように、本発明の半導体発光素子1では、1つの発光部10に、n側電極30とp側電極40とから成る電極対50を複数形成してもよい。図1と同様に、電極対50のp側電極40の2本の延伸部41の先端近傍には、第1接続部45(開口部51)がそれぞれ形成されている。また、2つの第1接続部45を結ぶ領域55の内部には、n側電極30が形成されている。なお図3では、第1接続部45、開口部51及び領域55は1つ(上側)の電極対50のみに図示されているが、実際には、それらの構成は、全ての電極対50に形成されている。
特に、大面積の半導体発光素子1を形成する場合には、複数の電極対50を形成することにより、半導体発光素子1の全体を発光させることができる。よって、大面積の半導体発光素子1であっても、発光むらを抑えることができる。
As shown in FIG. 3, in the semiconductor light emitting device 1 of the present invention, a plurality of electrode pairs 50 including the n-side electrode 30 and the p-side electrode 40 may be formed in one light-emitting portion 10. As in FIG. 1, first connection portions 45 (openings 51) are formed in the vicinity of the ends of the two extending portions 41 of the p-side electrode 40 of the electrode pair 50. An n-side electrode 30 is formed inside a region 55 that connects the two first connection portions 45. In FIG. 3, the first connection portion 45, the opening portion 51, and the region 55 are illustrated in only one (upper) electrode pair 50, but actually, the configuration thereof is included in all the electrode pairs 50. Is formed.
In particular, when the semiconductor light emitting element 1 having a large area is formed, the entire semiconductor light emitting element 1 can emit light by forming the plurality of electrode pairs 50. Therefore, even if the semiconductor light emitting element 1 has a large area, unevenness in light emission can be suppressed.

図3には、2つのnパッド33と、2つのpパッド43とが図示されている。これらのパッド3、43は、半導体発光素子1と外部電源との接続の際に、ワイヤ等をボンディングする部分である。
1つのnパッド33には、隣接する電極対20のn側電極30から、それぞれ1本(合計2本)のn側配線37が接続されている。そして、全ての(図3では3つの)n側電極30が、nパッド33とn側配線37によって接続されている。
また、1つのpパッド43には、隣接する電極対20のp側電極40から、それぞれ1本(合計2本)の第1配線(p側配線)47が接続されている。そして、全ての(図3では3つの)p側電極40が、pパッド43とp側配線47によって接続されている。
n側配線37及びp側配線47を上述のように接続することにより、複数の電極対50が並列に接続される。
なお、隣接する2つのn側電極30は、nパッド33と接続する前に、互いのn側配線37によって接続されてもよい。また、隣接する2つのp側電極40も、pパッド43と接続する前に、互いのp側配線47によって接続されてもよい。
In FIG. 3, two n-pads 33 and two p-pads 43 are shown. These pads 3 and 43 are portions for bonding wires or the like when the semiconductor light emitting element 1 is connected to an external power source.
One n-pad 33 is connected to one n-pad 33 from the n-side electrode 30 of the adjacent electrode pair 20. All (three in FIG. 3) n-side electrodes 30 are connected by an n-pad 33 and an n-side wiring 37.
In addition, one p-pad 43 is connected with one (total of two) first wirings (p-side wirings) 47 from the p-side electrode 40 of the adjacent electrode pair 20. All (three in FIG. 3) p-side electrodes 40 are connected by the p-pad 43 and the p-side wiring 47.
By connecting the n-side wiring 37 and the p-side wiring 47 as described above, the plurality of electrode pairs 50 are connected in parallel.
Note that the two adjacent n-side electrodes 30 may be connected to each other by the n-side wiring 37 before being connected to the n-pad 33. Two adjacent p-side electrodes 40 may also be connected to each other by the p-side wiring 47 before being connected to the p pad 43.

複数の電極対50は、直列に接続することもできる(図示せず)。2つの電極対20を直列接続する例を具体的に説明する。2つの電極対20を隣接配置し、一方の電極対20のn側電極30と、他方の電極対20のp側電極40とを、n側配線37及びp側配線47を介して接続する。そして、一方の電極対20のp側電極40は、p側配線47を介してpパッド43と接続する。他方の電極対20のn側電極30は、n側配線37を介してnパッド33と接続する。3つ以上の電極対20を直列接続する場合も同様に接続すればよく、隣接する電極対20のn側電極30とp側電極40とを接続し、両端に位置するn側電極30とp側電極40とを、それぞれnパッド33及びpパッド43と接続する。   The plurality of electrode pairs 50 can also be connected in series (not shown). An example in which two electrode pairs 20 are connected in series will be specifically described. Two electrode pairs 20 are arranged adjacent to each other, and the n-side electrode 30 of one electrode pair 20 and the p-side electrode 40 of the other electrode pair 20 are connected via an n-side wiring 37 and a p-side wiring 47. The p-side electrode 40 of one electrode pair 20 is connected to the p-pad 43 through the p-side wiring 47. The n-side electrode 30 of the other electrode pair 20 is connected to the n-pad 33 via the n-side wiring 37. When three or more electrode pairs 20 are connected in series, they may be connected in the same manner. The n-side electrode 30 and the p-side electrode 40 of the adjacent electrode pair 20 are connected, and the n-side electrode 30 and p located at both ends are connected. The side electrode 40 is connected to the n pad 33 and the p pad 43, respectively.

1つの発光部10に複数の電極対20を形成する場合には、図3のように並列に接続するのがより好ましい。電極対20を並列にすると、全ての電極対20の周囲の発光の強度がほぼ等しくなるので、発光部10の発光むらを抑制することができる。   When a plurality of electrode pairs 20 are formed in one light emitting unit 10, it is more preferable to connect them in parallel as shown in FIG. When the electrode pairs 20 are arranged in parallel, the intensity of light emission around all the electrode pairs 20 becomes substantially equal, so that uneven light emission of the light emitting unit 10 can be suppressed.

図4に示すように、本発明の半導体発光素子1では、複数の発光部10を備えることができる。そのような半導体発光素子1は、特に、大面積の半導体発光素子1を形成するのに適している。複数の発光部10を形成し、各発光部10を発光させることにより、大面積の半導体発光素子1であっても発光むらを抑えることができる。   As shown in FIG. 4, the semiconductor light emitting device 1 of the present invention can include a plurality of light emitting units 10. Such a semiconductor light emitting device 1 is particularly suitable for forming a semiconductor light emitting device 1 having a large area. By forming the plurality of light emitting units 10 and causing each light emitting unit 10 to emit light, even the semiconductor light emitting element 1 having a large area can suppress uneven light emission.

図4には、図3に示した「複数(3つ)の電極対50を備えた発光部10」を、さらに複数(3つ)備えた半導体発光素子1を図示している。nパッド33は、一番下の発光部10の下縁部に形成され、pパッド43は、一番上の発光部10の上縁部に設けられている。まん中の発光部10には、いずれのパッド33、43も形成されていない。
また、隣り合う発光部10と発光部10との間から、基板3が露出されている。
FIG. 4 illustrates the semiconductor light emitting device 1 further including a plurality (three) of the “light emitting units 10 including a plurality (three) of electrode pairs 50” illustrated in FIG. 3. The n pad 33 is formed at the lower edge of the lowermost light emitting unit 10, and the p pad 43 is provided at the upper edge of the uppermost light emitting unit 10. None of the pads 33 and 43 are formed on the light emitting unit 10 in the middle.
Further, the substrate 3 is exposed from between the light emitting units 10 adjacent to each other.

図4では、横方向(各発光部10内)に配列した3つの電極対20は、図3と同様に並列に接続されている。
そして、縦方向(隣接する発光部10間)に配列した3つの電極対20は、直列に接続される。つまり、縦方向に隣接する電極対20の一方に含まれるn側電極30(例えば、一番上の発光部10のn側電極30)と、他方に含まれるp側電極40(例えば、まん中の発光部10のp側電極40)とが、n側配線37及びp側配線47を介して接続されている。そして、一番上の発光部10のp側電極40は、p側配線47を介してpパッド43に接続さる。また、一番下の発光部10のn側電極30は、n側配線37を介してnパッド33に接続される。
In FIG. 4, the three electrode pairs 20 arranged in the horizontal direction (inside each light emitting unit 10) are connected in parallel as in FIG.
Then, the three electrode pairs 20 arranged in the vertical direction (between adjacent light emitting units 10) are connected in series. That is, the n-side electrode 30 (for example, the n-side electrode 30 of the uppermost light emitting unit 10) included in one of the vertically adjacent electrode pairs 20 and the p-side electrode 40 (for example, the middle The p-side electrode 40) of the light emitting unit 10 is connected via the n-side wiring 37 and the p-side wiring 47. The p-side electrode 40 of the uppermost light emitting unit 10 is connected to the p-pad 43 via the p-side wiring 47. In addition, the n-side electrode 30 of the lowermost light emitting unit 10 is connected to the n-pad 33 via the n-side wiring 37.

なお、縦方向(隣接する発光部10間)に配列した3つの電極対20も、並列に接続することもできる(図示せず)。つまり、縦方向に並んだ電極対20の全てのn側電極30が、それぞれのn側配線37を介して接続され、全てのp側電極40が、それぞれのp側配線47を介して接続されてもよい。そして、いずれかのn側配線37がnパッド33に接続され、いずれかのp側配線47がpパッド43に接続される。   Note that the three electrode pairs 20 arranged in the vertical direction (between adjacent light emitting units 10) can also be connected in parallel (not shown). That is, all the n-side electrodes 30 of the electrode pairs 20 arranged in the vertical direction are connected via the respective n-side wirings 37, and all the p-side electrodes 40 are connected via the respective p-side wirings 47. May be. One of the n-side wirings 37 is connected to the n pad 33, and one of the p-side wirings 47 is connected to the p pad 43.

複数の発光部10に複数の電極対20を形成する場合には、並列に接続するのがより好ましい。電極対20を並列にすると、全ての電極対20の周囲の発光の強度がほぼ等しくなるので、発光部10の発光むらを抑制することができる。   When the plurality of electrode pairs 20 are formed in the plurality of light emitting units 10, it is more preferable to connect them in parallel. When the electrode pairs 20 are arranged in parallel, the intensity of light emission around all the electrode pairs 20 becomes substantially equal, so that uneven light emission of the light emitting unit 10 can be suppressed.

図3及び図4では、n側配線37及びp側配線47の下側に絶縁膜が形成される(図示せず)。絶縁膜により、n側配線37及びp側配線47は、その下にあるn型半導体層11、p型半導体層13、及び透光性電極70と絶縁される。なお、図4の発光部10間のように、基板13の上にn側配線37及びp側配線47を形成する場合にも、n側配線37及びp側配線47と基板13との間に絶縁膜を形成するのが好ましい。   3 and 4, an insulating film is formed below the n-side wiring 37 and the p-side wiring 47 (not shown). The n-side wiring 37 and the p-side wiring 47 are insulated from the underlying n-type semiconductor layer 11, p-type semiconductor layer 13, and translucent electrode 70 by the insulating film. 4, even when the n-side wiring 37 and the p-side wiring 47 are formed on the substrate 13 as between the light emitting units 10 in FIG. 4, the n-side wiring 37 and the p-side wiring 47 are interposed between the substrate 13 and the substrate 13. It is preferable to form an insulating film.

pパッド43は、発光部10の上側に形成されてもよいが、特に、発光部10の外側に形成されるのが好ましい。pパッド43を発光部10の外側に形成すると、発光層12からの光をpパッド43が吸収するのを防ぐことができる。さらに、pパッド43によって発光層12からの光が遮られるのを防止する効果も得られる。   The p pad 43 may be formed on the upper side of the light emitting unit 10, but is particularly preferably formed on the outer side of the light emitting unit 10. If the p pad 43 is formed outside the light emitting unit 10, it is possible to prevent the p pad 43 from absorbing light from the light emitting layer 12. Furthermore, the effect of preventing light from the light emitting layer 12 from being blocked by the p-pad 43 is also obtained.

上面図(図3及び図4)における具体的なpパッド43の形成位置としては、発光素子1の端部が最も好ましい。
また、断面図における具体的なpパッド43の形成位置としては、基板3上又はn型半導体層11上が挙げられる。これらの位置は、直下に発光層12を含まないので、発光の吸収や遮光の影響を少なくできる。なお、n型半導体層11上にpパッド43を形成する場合には、絶縁膜等を介して絶縁する必要がある。
As a specific formation position of the p pad 43 in the top view (FIGS. 3 and 4), the end of the light emitting element 1 is most preferable.
Further, specific positions for forming the p-pad 43 in the cross-sectional view include the substrate 3 or the n-type semiconductor layer 11. Since these positions do not include the light emitting layer 12 immediately below, the influence of light absorption and light shielding can be reduced. In addition, when forming the p pad 43 on the n-type semiconductor layer 11, it is necessary to insulate via an insulating film etc.

さらに、光吸収の抑制と遮光の低減のために、発光部10の上側に形成されるp側配線47の長さをできるだけ短くするのが好ましい。例えば、図3では、隣接する電極対20のp側電極40は、p側配線47やpパッド43を介して並列接続されるが、その際に、p側配線47の長さができるだけ短くなるように配線するのが好ましい。具体例としては、隣接する電極対20のそれぞれのp側電極40から、最近接の発光部10の縁部までp側配線47を延ばし、発光部10外側で互いのp側配線47を接続する。   Furthermore, in order to suppress light absorption and reduce light shielding, it is preferable to shorten the length of the p-side wiring 47 formed on the upper side of the light emitting unit 10 as much as possible. For example, in FIG. 3, the p-side electrode 40 of the adjacent electrode pair 20 is connected in parallel via the p-side wiring 47 and the p pad 43, but at this time, the length of the p-side wiring 47 is as short as possible. It is preferable to perform wiring as described above. As a specific example, the p-side wiring 47 is extended from each p-side electrode 40 of the adjacent electrode pair 20 to the edge of the nearest light emitting unit 10, and the p-side wirings 47 are connected to each other outside the light emitting unit 10. .

また、nパッド33も、発光部10の上側に形成されてもよいが、特に発光部10の外側に形成されるのが好ましい。nパッド33を発光部10の外側に形成すると、発光層12からの光をnパッド33が吸収するのを防ぐことができる。さらに、pパッド43によって発光層12からの光が遮られるのを防止する効果も得られる。   The n pad 33 may also be formed on the upper side of the light emitting unit 10, but it is particularly preferable that the n pad 33 be formed on the outer side of the light emitting unit 10. When the n pad 33 is formed outside the light emitting unit 10, the light from the light emitting layer 12 can be prevented from being absorbed by the n pad 33. Furthermore, the effect of preventing light from the light emitting layer 12 from being blocked by the p-pad 43 is also obtained.

上面図(図3及び図4)における具体的なnパッド33の形成位置としては、発光素子1の端部が最も好ましい。
また、断面図における具体的なnパッド33の形成位置としては、基板3上又はn型半導体層11上が挙げられる。これらの位置は、直下に発光層12を含まないので、発光の吸収や遮光の影響を少なくできる。
As a specific formation position of the n-pad 33 in the top view (FIGS. 3 and 4), the end of the light emitting element 1 is most preferable.
In addition, specific formation positions of the n pad 33 in the cross-sectional view include the substrate 3 or the n-type semiconductor layer 11. Since these positions do not include the light emitting layer 12 immediately below, the influence of light absorption and light shielding can be reduced.

また、p型半導体層13はp型窒化物半導体層であり、n型半導体層11はn型窒化物半導体層にすることができる。
p型の窒化物半導体層は、n型の窒化物半導体層に比べて非常に抵抗が高いので、電流が面内に広がりにくい。しかしながら、本発明では、p型半導体層13の表面に透光性電極70を有しており、この透光性電極70が、p型半導体層13の面内に電流を広げる補助として機能するので、発光層12に流れる電流も、面内に均一に流れやすくなる。よって、本発明は、p型半導体層13をp型窒化物半導体層から形成するのに好適である。
The p-type semiconductor layer 13 can be a p-type nitride semiconductor layer, and the n-type semiconductor layer 11 can be an n-type nitride semiconductor layer.
Since the p-type nitride semiconductor layer has a very high resistance compared to the n-type nitride semiconductor layer, the current hardly spreads in the plane. However, in the present invention, the translucent electrode 70 is provided on the surface of the p-type semiconductor layer 13, and this translucent electrode 70 functions as an aid for spreading the current in the plane of the p-type semiconductor layer 13. The current flowing through the light emitting layer 12 is also likely to flow uniformly in the plane. Therefore, the present invention is suitable for forming the p-type semiconductor layer 13 from a p-type nitride semiconductor layer.

次に、各構成部材について詳述する。   Next, each component will be described in detail.

(基板3)
基板3は、半導体結晶をエピタキシャル成長させるのに適した材料から形成される。窒化物半導体のエピタキシャル成長に適した基板3としては、C面、A面、R面のいずれかを主面とするサファイア(A1)やスピネル(MgA12)のような絶縁性基板、またSiC(6H、4H、3C)、シリコン、ZnS、ZnO、GaAs、ダイヤモンド;LiNbO、NdGaO等の酸化物基板、窒化物半導体基板(GaN、AlN等)等が挙げられる。また、半導体成長面がオフアングルした基板、或いは凹凸構造が設けられた基板であってもよい。なお、基板3は、最終的に除去することもできる。さらに、透光性を有する基板であれば、半導体素子構造を積層した主面に対向するもう一方の主面側を光取り出し面とすることも可能である。
(Substrate 3)
The substrate 3 is formed from a material suitable for epitaxially growing a semiconductor crystal. As a substrate 3 suitable for epitaxial growth of nitride semiconductor, an insulating substrate such as sapphire (A1 2 O 3 ) or spinel (MgA 12 O 4 ) whose main surface is any one of C-plane, A-plane and R-plane In addition, SiC (6H, 4H, 3C), silicon, ZnS, ZnO, GaAs, diamond; oxide substrates such as LiNbO 3 , NdGaO 3 , nitride semiconductor substrates (GaN, AlN, etc.), and the like can be given. Moreover, the board | substrate with which the semiconductor growth surface was off-angled, or the board | substrate with which the uneven structure was provided may be sufficient. The substrate 3 can be finally removed. Further, if the substrate has a light-transmitting property, the other main surface side facing the main surface on which the semiconductor element structures are stacked can be used as a light extraction surface.

(発光部10)
半導体発光素子1を構成する発光部10としては、いわゆる発光ダイオード、レーザーダイオードなどが好適である。発光部10の形状は特に限定されず、例えば、円形、楕円形、多角形又はこれに近い形状のものを利用することができる。特に、三角形、四角形、六角形などの形状であると、半導体発光素子1を形成する際に、複数の発光部10を緻密に配置できるので好ましい。
(Light Emitting Unit 10)
As the light emitting unit 10 constituting the semiconductor light emitting element 1, a so-called light emitting diode, laser diode or the like is suitable. The shape of the light emitting unit 10 is not particularly limited, and for example, a circular shape, an elliptical shape, a polygonal shape, or a shape close thereto can be used. In particular, it is preferable that the shape is a triangle, a quadrangle, a hexagon, or the like because a plurality of light emitting portions 10 can be densely arranged when the semiconductor light emitting element 1 is formed.

発光部10の構造としては、MIS接合、PIN接合、PN接合等のホモ構造、ヘテロ結合あるいはダブルヘテロ結合のものが挙げられる。また、半導体活性層12を量子効果が生ずる薄膜に形成させた単一量子井戸構造、多重量子井戸構造としてもよい。活性層12には、Si、Ge等のドナー不純物及び/又はZn、Mg等のアクセプター不純物がドープされる場合もある。得られる半導体発光素子1の発光波長は、半導体の材料、混晶比、活性層12のInGaNのIn含有量、活性層12にドープする不純物の種類を変化させる等によって、紫外領域から赤外領域まで変化させることができる。   Examples of the structure of the light emitting unit 10 include a homostructure such as a MIS junction, a PIN junction, and a PN junction, a hetero bond, and a double hetero bond. Alternatively, the semiconductor active layer 12 may have a single quantum well structure or a multiple quantum well structure in which a thin film generating a quantum effect is formed. The active layer 12 may be doped with donor impurities such as Si and Ge and / or acceptor impurities such as Zn and Mg. The emission wavelength of the obtained semiconductor light emitting device 1 varies from the ultraviolet region to the infrared region by changing the semiconductor material, the mixed crystal ratio, the In content of InGaN in the active layer 12, the type of impurities doped in the active layer 12, and the like. Can vary up to.

発光部10に含まれるn型半導体層11、活性層12及びp型半導体層13は、例えば、InN、AlN、GaN、InGaN、AlGaN、InGaAlN等の窒化物半導体、III−V族化合物半導体、II−VI族化合物半導体等、種々の半導体から形成することができる。特に、n型半導体層11、活性層12p型半導体層13は、窒化物半導体から形成するのが好ましい。   The n-type semiconductor layer 11, the active layer 12, and the p-type semiconductor layer 13 included in the light emitting unit 10 include, for example, nitride semiconductors such as InN, AlN, GaN, InGaN, AlGaN, InGaAlN, III-V group compound semiconductors, II It can be formed from various semiconductors such as a group VI compound semiconductor. In particular, the n-type semiconductor layer 11 and the active layer 12 p-type semiconductor layer 13 are preferably formed from a nitride semiconductor.

窒化物半導体から成る発光部10の具体例としては、例えば、AlGaNよりなるバッファ層、アンドープGaN層、Siドープn型GaNよりなるn側コンタクト層、GaN層とInGaN層とを交互に積層させた超格子構造のn側クラッド層、GaN層とInGaN層とを交互に積層させた多重量子井戸構造の発光層、MgドープAlGaN層とMgドープInGaN層とを交互に積層させた超格子構造のp側クラッド層、MgドープGaNよりなるp側コンタクト層を含むことができる。   As a specific example of the light emitting unit 10 made of a nitride semiconductor, for example, a buffer layer made of AlGaN, an undoped GaN layer, an n-side contact layer made of Si-doped n-type GaN, and a GaN layer and an InGaN layer are alternately laminated. An n-side cladding layer having a superlattice structure, a light emitting layer having a multiple quantum well structure in which GaN layers and InGaN layers are alternately stacked, a p having a superlattice structure in which Mg-doped AlGaN layers and Mg-doped InGaN layers are alternately stacked A side cladding layer and a p-side contact layer made of Mg-doped GaN can be included.

(電極30、40)
電極30、40は、第1接続部45及び第2接続部35を形成する際に、n型半導体層11もしくは透光性電極70と接続される。よって、第1接続部45及び第2接続部35が低抵抗な状態で接続できるように、電極30、40の材料が選択される。電極30、40を積層構造で設ける場合、例えばAu、Pt、Pd、Rh、Ni、W、Mo、Cr、Tiのいずれかの金属またはこれらの合金やそれらの組み合わせとすることができる。具体的な一例として、窒化物半導体層や透光性電極70と接続する側からTi/Rh/Au、W/Pt/Au、Rh/Pt/Au、W/Pt/Au/Ni、Pt/Au、Ti/Rhなどを用いて構成することができる。
(Electrodes 30, 40)
The electrodes 30 and 40 are connected to the n-type semiconductor layer 11 or the translucent electrode 70 when the first connection portion 45 and the second connection portion 35 are formed. Therefore, the materials of the electrodes 30 and 40 are selected so that the first connection part 45 and the second connection part 35 can be connected in a low resistance state. When the electrodes 30 and 40 are provided in a laminated structure, for example, any one of Au, Pt, Pd, Rh, Ni, W, Mo, Cr, and Ti, or an alloy thereof, or a combination thereof can be used. As a specific example, Ti / Rh / Au, W / Pt / Au, Rh / Pt / Au, W / Pt / Au / Ni, Pt / Au from the side connected to the nitride semiconductor layer or the translucent electrode 70. Ti / Rh or the like can be used.

(透光性電極70)
発光部上の第2導電型半導体層に設けられる透光性電極70は、第2導電型半導体層の全面に設けられることが好ましい。発光層12からの光は、この透光性電極70を通って外部に放出される。そのため、透光性電極70には、特に、発光層で発生する光の波長域における光透過率が大きい材料が好適に用いられる。例えば、透光性電極70としては、In、Zn、Sn、Ga、W、Tiから選択される少なくとも1種を含む導電性の酸化物、具体的には、ITO、IZO、ZnO、In、SnO、TiO及びこれらの複合酸化物が挙げられる。
(Translucent electrode 70)
The translucent electrode 70 provided on the second conductive type semiconductor layer on the light emitting part is preferably provided on the entire surface of the second conductive type semiconductor layer. Light from the light emitting layer 12 is emitted to the outside through the translucent electrode 70. Therefore, a material having a high light transmittance in the wavelength region of light generated in the light emitting layer is preferably used for the translucent electrode 70. For example, as the translucent electrode 70, a conductive oxide containing at least one selected from In, Zn, Sn, Ga, W, and Ti, specifically, ITO, IZO, ZnO, and In 2 O 3 , SnO 2 , TiO 2 and composite oxides thereof.

(絶縁膜50、60)
絶縁膜50、60は、p型半導体層13よりも屈折率の小さい材料から形成するのが好ましい。これにより、p型半導体層13側から入射した光は、p型半導体層13と絶縁膜50、60との界面で全反射が起こりやすくなる。よって、絶縁膜50、60の上側に形成されたn側電極30(n側配線37を含む)及びp側電極40(p側配線47を含む)に入射する発光を効果的に低減して、それらの電極30、40に吸収される発光を低減することができる。その結果、半導体発光素子1の発光の取出し効率を向上させることができる。
p型半導体層13がGaNに代表される窒化物半導体層(n=2.5〜2.6)から成る場合、絶縁膜50、60は、屈折率が2.5未満(n<2.5)の材料が適している。
(Insulating films 50, 60)
The insulating films 50 and 60 are preferably formed from a material having a refractive index smaller than that of the p-type semiconductor layer 13. As a result, light incident from the p-type semiconductor layer 13 side is likely to undergo total reflection at the interface between the p-type semiconductor layer 13 and the insulating films 50 and 60. Therefore, light emission incident on the n-side electrode 30 (including the n-side wiring 37) and the p-side electrode 40 (including the p-side wiring 47) formed on the upper side of the insulating films 50 and 60 is effectively reduced, Light emission absorbed by the electrodes 30 and 40 can be reduced. As a result, the light emission efficiency of the semiconductor light emitting device 1 can be improved.
When the p-type semiconductor layer 13 is made of a nitride semiconductor layer (n = 2.5 to 2.6) typified by GaN, the insulating films 50 and 60 have a refractive index of less than 2.5 (n <2.5 ) Material is suitable.

さらに、絶縁膜50、60は、透光性電極70よりも屈折率の小さい材料から形成するのが好ましい。これにより、透光性電極70の上に絶縁膜50、60が形成された場所において、透光性電極70と絶縁膜50、60との界面で全反射が起こりやすくなる。よって、絶縁膜50、60の上側に形成されたn側電極30(n側配線37を含む)及びp側電極40(p側配線47を含む)に入射する発光を効果的に低減して、それらの電極30、40に吸収される発光を低減することができる。その結果、半導体発光素子1の発光の取出し効率を向上させることができる。
透光性電極70がITO(屈折率:n=2.1〜2.2)である場合、絶縁膜50、60に適した材料には、SiO(n=1.46)、Al(n=1.6)などがある。
Furthermore, the insulating films 50 and 60 are preferably formed from a material having a refractive index smaller than that of the translucent electrode 70. As a result, total reflection is likely to occur at the interface between the translucent electrode 70 and the insulating films 50 and 60 where the insulating films 50 and 60 are formed on the translucent electrode 70. Therefore, light emission incident on the n-side electrode 30 (including the n-side wiring 37) and the p-side electrode 40 (including the p-side wiring 47) formed on the upper side of the insulating films 50 and 60 is effectively reduced, Light emission absorbed by the electrodes 30 and 40 can be reduced. As a result, the light emission efficiency of the semiconductor light emitting device 1 can be improved.
When the translucent electrode 70 is ITO (refractive index: n = 2.1 to 2.2), suitable materials for the insulating films 50 and 60 include SiO 2 (n = 1.46), Al 2 O. 3 (n = 1.6).

<第2の実施形態>
図5は、延伸部41に第1接続部45(開口部51)を3つ設けた点で、第1の実施形態と異なる。第1接続部45を3つ以上設けると、それらを結ぶ領域55が多角形となるため、領域55の面積は、主に第1接続部45の配置に依存する。よって、本実施の形態では、第1接続部45の寸法が小さくても、十分な面積の領域55を確保できる。
なお、第1の実施形態(図1参照)では、第1接続部45を2つだけ設けているので、第1接続部45を結んだ領域55の面積は、第1接続部45の寸法(例えば、延伸部41の延伸方向における第1接続部45の長さ)に依存する。よって、第1の実施形態では、領域55の面積を確保しながら、第1接続部45の寸法を小さくすることが難しい。
<Second Embodiment>
FIG. 5 is different from the first embodiment in that three extending portions 41 are provided with three first connecting portions 45 (opening portions 51). When three or more first connection portions 45 are provided, the region 55 connecting them becomes a polygon, and the area of the region 55 mainly depends on the arrangement of the first connection portions 45. Therefore, in the present embodiment, a region 55 having a sufficient area can be secured even if the size of the first connection portion 45 is small.
In the first embodiment (see FIG. 1), since only two first connection portions 45 are provided, the area of the region 55 connecting the first connection portions 45 is the dimension of the first connection portion 45 (see FIG. For example, it depends on the length of the first connecting portion 45 in the extending direction of the extending portion 41. Therefore, in the first embodiment, it is difficult to reduce the size of the first connection portion 45 while securing the area of the region 55.

このように、本実施形態では、領域55の面積を確保しながら第1接続部45(開口部51)の寸法を小さくできるので、延伸部41と透光性電極70(p型半導体層13)との間に備える絶縁膜50を大きく設けることができる。よって、延伸部41での発光吸収をさらに抑制することができる。   Thus, in this embodiment, since the dimension of the 1st connection part 45 (opening part 51) can be made small, ensuring the area of the area | region 55, the extending | stretching part 41 and the translucent electrode 70 (p-type semiconductor layer 13). A large insulating film 50 can be provided between the two. Therefore, it is possible to further suppress light emission absorption at the extending portion 41.

また、本実施形態も、第1の実施形態と同様に、領域55の内部にn側電極30の第2接続部35の少なくとも一部が含まれているので、n側電極30周囲の暗部が減少し、発光むらを抑えることができる。   Also, in the present embodiment, as in the first embodiment, since at least a part of the second connection portion 35 of the n-side electrode 30 is included in the region 55, the dark portion around the n-side electrode 30 is reduced. It reduces, and the light emission nonuniformity can be suppressed.

本実施形態では、第1接続部45(開口部51)の個数は、3つ以上であれば任意に選択できる。また、第1接続部45の配置は任意に設計することができる。一例として、図6〜図7に、5つの第1接続部45の配置例を示す。   In the present embodiment, the number of first connection portions 45 (openings 51) can be arbitrarily selected as long as it is three or more. Further, the arrangement of the first connection portions 45 can be arbitrarily designed. As an example, FIGS. 6 to 7 show arrangement examples of the five first connection portions 45.

図6〜図7に示す半導体発光素子1では、5つの第1接続部45を設けている。まず、2本の延伸部41の先端に、第1接続部45(451)を各々1つ(合計2つ)形成する。そして、2つの延伸部41のほぼ中央の位置に第1接続部45(452)を1つ形成する。第1接続部452から湾曲して左右に延びる延伸部41に、さらに第1接続部45(453)を各々1つ(合計2つ)形成する。第1接続部453は、湾曲した延伸部41に沿って、中央の第1接続部452と端部の第1接続部451との間に位置することになる。
ここで、図6では、第1接続部453は、延伸部41に沿って測定したときに、隣接する中央の第1接続部452と端部の第1接続部541との間隔が等しくなるように配置されている。一方、図7では、図6に比べると、第1接続部453が先端の第1接続部451寄りに配置されている。
In the semiconductor light emitting device 1 shown in FIGS. 6 to 7, five first connection portions 45 are provided. First, one first connection portion 45 (451) is formed at each end of the two extending portions 41 (two in total). And one 1st connection part 45 (452) is formed in the approximate center position of the two extending | stretching parts 41. FIG. Further, one first connecting portion 45 (453) is formed in each of the extending portions 41 that are curved from the first connecting portion 452 and extend leftward and rightward (two in total). The first connection portion 453 is positioned between the central first connection portion 452 and the end first connection portion 451 along the curved extending portion 41.
Here, in FIG. 6, when the first connection portion 453 is measured along the extending portion 41, the interval between the adjacent first first connection portion 452 and the first connection portion 541 at the end is equal. Is arranged. On the other hand, in FIG. 7, compared with FIG. 6, the 1st connection part 453 is arrange | positioned near the 1st connection part 451 of a front-end | tip.

なお、図6〜図7では、第1接続部45は左右対称の位置に配置されているが、これに限定されず、左右非対称に配置しても構わない。また、形成する第1接続部45の個数によっては、中央の第1接続部452を形成しなくてもよい。   6 to 7, the first connection portion 45 is disposed at a symmetrical position, but is not limited thereto, and may be disposed asymmetrically. Further, depending on the number of first connection portions 45 to be formed, the central first connection portion 452 may not be formed.

図6〜図7のいずれの半導体発光素子1でも、領域55の内側にn側電極30の第2接続部35の少なくとも一部が含まれているので、n側電極30周囲の暗部が減少し、発光むらを抑えることができる。特に、図6のように開口部51を等間隔に形成すると、発光むらが最も小さくできる。   In any of the semiconductor light emitting devices 1 of FIGS. 6 to 7, since at least a part of the second connection portion 35 of the n-side electrode 30 is included inside the region 55, the dark portion around the n-side electrode 30 is reduced. Uneven light emission can be suppressed. In particular, when the openings 51 are formed at equal intervals as shown in FIG.

なお、開口部51の形状は、図3〜図5では円形にされているが、これに限定されない。第1接続部45は、少なくともp側電極から透光性電極70に電流が流れればよく、楕円形、多角形等の任意の形状にすることができる。   In addition, although the shape of the opening part 51 is circular in FIGS. 3-5, it is not limited to this. The first connecting portion 45 only needs to flow a current from at least the p-side electrode to the translucent electrode 70, and can have an arbitrary shape such as an ellipse or a polygon.

上述の第1及び第2の実施形態では、第1導電型半導体層がp型半導体層13から成り、第2導電型半導体層がn型半導体層11から成る半導体発光素子1を説明してきた。しかしながら、特に限定する場合を除いて、本発明は、第1導電型半導体層がn型半導体層から成り、第2導電型半導体層がp型半導体層から成る半導体発光素子も含むものと理解されるべきである。この場合、第1電極がn側電極、第2電極はp側電極となる。   In the first and second embodiments described above, the semiconductor light emitting device 1 in which the first conductive semiconductor layer is made of the p-type semiconductor layer 13 and the second conductive semiconductor layer is made of the n-type semiconductor layer 11 has been described. However, unless otherwise specified, the present invention is understood to include a semiconductor light emitting device in which the first conductive semiconductor layer is an n-type semiconductor layer and the second conductive semiconductor layer is a p-type semiconductor layer. Should be. In this case, the first electrode is an n-side electrode and the second electrode is a p-side electrode.

また、本発明で使用される透光性電極70は、第1導電型半導体層が高抵抗の場合(例えばp型窒化物半導体層から成る場合)に、第1導電型半導体層の面内に沿って電流を拡げるのに非常に有効である。しかしながら、第1導電型半導体層の抵抗がそれほど高くなく、第1導電型半導体層の内部で十分に電流を拡げることができる場合等には、透光性電極70を設けなくてもよい。   In addition, the translucent electrode 70 used in the present invention is provided in the plane of the first conductive semiconductor layer when the first conductive semiconductor layer has a high resistance (for example, a p-type nitride semiconductor layer). It is very effective to spread the current along. However, if the resistance of the first conductivity type semiconductor layer is not so high and the current can be sufficiently expanded inside the first conductivity type semiconductor layer, the translucent electrode 70 may not be provided.

本発明の半導体発光素子は、照明用光源、各種インジケーター用光源、車載用光源、ディスプレイ用光源、液晶のバックライト用光源、センサー用光源、信号機、車載部品、看板用チャンネルレター等、種々の光源に使用することができる。   The semiconductor light emitting device of the present invention includes various light sources such as an illumination light source, various indicator light sources, an in-vehicle light source, a display light source, a liquid crystal backlight light source, a sensor light source, a traffic light, an in-vehicle component, and a signboard channel letter. Can be used for

1 半導体発光素子
3 基板
10 発光部
11 第1導電型層(n型半導体層)
12 発光層
13 第2導電型層(p型半導体層)
15 切欠き部
20 電極対
30 第1電極(n側電極)
33 nパッド
35 第2接続部
37 第2配線(n側配線)
40 第2電極(p側電極)
41 延伸部
43 pパッド
45 第1接続部
47 第1配線(p側配線)
50、60 絶縁膜
51 開口部
55 領域
70 透光性電極
DESCRIPTION OF SYMBOLS 1 Semiconductor light emitting element 3 Substrate 10 Light emission part 11 1st conductivity type layer (n-type semiconductor layer)
12 Light emitting layer 13 Second conductivity type layer (p-type semiconductor layer)
15 Notch 20 Electrode pair 30 First electrode (n-side electrode)
33 n pad 35 second connection portion 37 second wiring (n-side wiring)
40 Second electrode (p-side electrode)
41 Extension part 43 p pad 45 1st connection part 47 1st wiring (p side wiring)
50, 60 Insulating film 51 Opening 55 Region 70 Translucent electrode

Claims (10)

第2導電型層、発光層及び第1導電型層を順に積層した発光部と、
前記第2導電型層に接続された第2電極と、前記第1導電型層上に透光性電極を有し、該透光性電極に接続された第1電極と、からなる電極対と、を備えた半導体発光素子であって、
前記半導体発光素子を上面から見て、
前記第1電極は、前記第2電極を囲むように形成された延伸部を含み、
前記延伸部の下部に、絶縁膜を備えると共に、前記透光性電極と電気的に接続される第1接続部を2つ以上有し、
前記第2電極は、少なくとも2つの前記第1接続部を結ぶ領域に、前記第2導電型半導体層と電気的に接続される第2接続部を有する
ことを特徴とする半導体発光素子。
A light emitting part in which a second conductive type layer, a light emitting layer, and a first conductive type layer are sequentially laminated;
An electrode pair comprising: a second electrode connected to the second conductivity type layer; and a first electrode having a translucent electrode on the first conductivity type layer and connected to the translucent electrode. A semiconductor light emitting device comprising:
When the semiconductor light emitting device is viewed from above,
The first electrode includes an extending portion formed so as to surround the second electrode,
An insulating film is provided at the lower part of the extending portion, and has two or more first connecting portions that are electrically connected to the translucent electrode,
The second electrode has a second connection portion electrically connected to the second conductivity type semiconductor layer in a region connecting at least two of the first connection portions. The semiconductor light emitting element.
前記延伸部は前記第1接続部を少なくとも3つ備えることを特徴とする請求項1に記載の半導体発光素子。   The semiconductor light emitting element according to claim 1, wherein the extending portion includes at least three of the first connection portions. 前記第1接続部が、前記延伸部の先端と対応する位置に形成されていることを特徴とする請求項1又は2に記載の半導体発光素子。   The semiconductor light emitting element according to claim 1, wherein the first connection portion is formed at a position corresponding to a tip of the extending portion. 前記第1電極は、発光部の外から延伸してなり、前記延伸部が、略U字状であることを特徴とする請求項1乃至3のいずれか1項に記載の半導体発光素子。   4. The semiconductor light emitting element according to claim 1, wherein the first electrode is extended from the outside of the light emitting portion, and the extended portion is substantially U-shaped. 5. 前記第2電極は、第第2配線を含み、
該第2配線の下部に、絶縁膜を備えることを特徴とする請求項1乃至4のいずれか1項に記載の半導体発光素子。
The second electrode includes a second wiring,
The semiconductor light emitting element according to claim 1, further comprising an insulating film under the second wiring.
前記発光部に前記電極対が複数形成されていることを特徴とする請求項1乃至5のいずれか1項に記載の半導体発光素子。   6. The semiconductor light emitting element according to claim 1, wherein a plurality of the electrode pairs are formed in the light emitting portion. 複数の前記発光部を有することを特徴とする請求項1乃至6のいずれか1項に記載の半導体発光素子。   The semiconductor light emitting element according to claim 1, comprising a plurality of the light emitting portions. 前記絶縁膜が、前記透光性電極より屈折率の小さい材料からなることを特徴とする請求項1乃至7のいずれか1項に記載の半導体発光素子。   The semiconductor light emitting element according to claim 1, wherein the insulating film is made of a material having a refractive index smaller than that of the translucent electrode. 前記第1電極は、発光部の外に外部と接続されるパッド部を備えることを特徴とする請求項1乃至8のいずれか1項に記載の半導体発光素子。   The semiconductor light emitting element according to claim 1, wherein the first electrode includes a pad portion connected to the outside in addition to the light emitting portion. 前記第1導電型層は、p型の窒化物半導体層であり、第2導電型層は、n型の窒化物半導体層であることを特徴とする請求項1乃至9のいずれか1項に記載の半導体発光素子。   10. The device according to claim 1, wherein the first conductivity type layer is a p-type nitride semiconductor layer, and the second conductivity type layer is an n-type nitride semiconductor layer. The semiconductor light emitting element as described.
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