JP2010192774A - 電子部品モジュール - Google Patents
電子部品モジュール Download PDFInfo
- Publication number
- JP2010192774A JP2010192774A JP2009037179A JP2009037179A JP2010192774A JP 2010192774 A JP2010192774 A JP 2010192774A JP 2009037179 A JP2009037179 A JP 2009037179A JP 2009037179 A JP2009037179 A JP 2009037179A JP 2010192774 A JP2010192774 A JP 2010192774A
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- substrate
- mounting
- terminal
- inspection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
【解決手段】基板10に電子部品22,27が実装された電子部品モジュールは、基板10に、電子部品22,27を実装するための実装用端子32,37と、検査用端子40とが形成されている。検査用端子40の少なくとも一部41は、実装用端子32に実装された電子部品22と基板10との間の部品搭載領域22s内に、形成されている。
【選択図】図4
Description
10 基板
10a 表面
10b 裏面
20〜28 電子部品
20s〜27s 部品搭載領域
22t 実装エリア
30〜37 実装用端子
40 検査用端子
41 一部分
42 検査用端子
44 検査用端子
45 一部分
60 接合材
Claims (6)
- 基板に電子部品が搭載された電子部品モジュールであって、
前記基板には、前記電子部品を実装するための実装用端子と、検査用端子とが形成され、
前記検査用端子は、前記実装用端子に実装された前記電子部品と前記基板との間の部品搭載領域内に、当該検査用端子の少なくとも一部が形成されていることを特徴とする、電子部品モジュール。 - 基板に電子部品が搭載された電子部品モジュールであって、
前記基板には、前記電子部品を実装するための実装用端子と、検査用端子とが形成され、
前記実装用端子に実装された前記電子部品と前記基板との間の部品搭載領域の外側に、当該電子部品と前記基板とを接合する接合部材が延在し、
前記検査用端子は、前記部品搭載領域の外側、かつ前記接合部材が延在する接合材領域内に、当該検査用端子の少なくとも一部が形成されていることを特徴とする、電子部品モジュール。 - 前記接合部材は、前記検査用端子を覆う樹脂であることを特徴とする、請求項2に記載の電子部品モジュール。
- 前記検査用端子は、当該検査用端子の少なくとも一部が形成された前記部品搭載領域又は前記接合材領域を規定する前記電子部品を実装するための前記実装用端子とは、電気的に絶縁されていることを特徴とする、請求項1、2又は3に記載の電子部品モジュール。
- 前記基板は一対の主面を有し、
前記基板の前記主面の一方側に形成された前記検査用端子は、前記基板の前記主面の他方側に形成された前記実装用端子に電気的に接続されていることを特徴とする、請求項1乃至4のいずれか一つに記載の電子部品モジュール。 - 前記基板は、セラミック又は樹脂の層が積層された多層基板であることを特徴とする、請求候1乃至5のいずれか一つに記載の電子部品モジュール。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009037179A JP5267194B2 (ja) | 2009-02-19 | 2009-02-19 | 電子部品モジュール |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009037179A JP5267194B2 (ja) | 2009-02-19 | 2009-02-19 | 電子部品モジュール |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2010192774A true JP2010192774A (ja) | 2010-09-02 |
JP5267194B2 JP5267194B2 (ja) | 2013-08-21 |
Family
ID=42818463
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009037179A Expired - Fee Related JP5267194B2 (ja) | 2009-02-19 | 2009-02-19 | 電子部品モジュール |
Country Status (1)
Country | Link |
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JP (1) | JP5267194B2 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPWO2014181697A1 (ja) * | 2013-05-08 | 2017-02-23 | 株式会社村田製作所 | 多層配線基板 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0837367A (ja) * | 1994-07-22 | 1996-02-06 | Matsushita Electric Ind Co Ltd | 半田バンプを備えた電子部品の検査方法及び基板 |
JP2002083897A (ja) * | 2000-09-05 | 2002-03-22 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
JP2007266501A (ja) * | 2006-03-29 | 2007-10-11 | Toyota Motor Corp | 半導体装置の実装方法及び実装基板 |
-
2009
- 2009-02-19 JP JP2009037179A patent/JP5267194B2/ja not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0837367A (ja) * | 1994-07-22 | 1996-02-06 | Matsushita Electric Ind Co Ltd | 半田バンプを備えた電子部品の検査方法及び基板 |
JP2002083897A (ja) * | 2000-09-05 | 2002-03-22 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
JP2007266501A (ja) * | 2006-03-29 | 2007-10-11 | Toyota Motor Corp | 半導体装置の実装方法及び実装基板 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPWO2014181697A1 (ja) * | 2013-05-08 | 2017-02-23 | 株式会社村田製作所 | 多層配線基板 |
US9844138B2 (en) | 2013-05-08 | 2017-12-12 | Murata Manufacturing Co., Ltd. | Multilayer wiring board |
Also Published As
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JP5267194B2 (ja) | 2013-08-21 |
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