JP2009260103A - Method and apparatus for evaluating solder print state - Google Patents

Method and apparatus for evaluating solder print state Download PDF

Info

Publication number
JP2009260103A
JP2009260103A JP2008108588A JP2008108588A JP2009260103A JP 2009260103 A JP2009260103 A JP 2009260103A JP 2008108588 A JP2008108588 A JP 2008108588A JP 2008108588 A JP2008108588 A JP 2008108588A JP 2009260103 A JP2009260103 A JP 2009260103A
Authority
JP
Japan
Prior art keywords
solder
printing
printed
state
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2008108588A
Other languages
Japanese (ja)
Other versions
JP4941394B2 (en
Inventor
Daisuke Nagai
大介 永井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Panasonic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp filed Critical Panasonic Corp
Priority to JP2008108588A priority Critical patent/JP4941394B2/en
Publication of JP2009260103A publication Critical patent/JP2009260103A/en
Application granted granted Critical
Publication of JP4941394B2 publication Critical patent/JP4941394B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide an apparatus capable of determining solder print states by shapes in appearance. <P>SOLUTION: The apparatus is equipped with a means of obtaining three-dimensional data of surfaces of solder printed on a plurality of substrates with masks, a means of creating three-dimensional images representing solder appearances according to the obtained three-dimensional data, and a means of displaying in a superimposed manner three-dimensional images of solder printed on a plurality of substrates of the same kind on a single screen. This apparatus enables visual determination by superimposed solder appearances even when the solder shapes can hardly be evaluated by numeric threshold processing. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明はマスクを用いて基板に印刷された半田の印刷状態の評価を行う方法および装置に関するものである。   The present invention relates to a method and an apparatus for evaluating the printing state of solder printed on a substrate using a mask.

基板に電子部品を実装する場合、基板表面の電極が形成されたランド部に半田を供給し、これに電子部品を搭載した後に加熱して半田付けを行っている。同一の基板に同一パターンで半田を印刷する場合にはスクリーン印刷が広く用いられている。スクリーン印刷は電極と対応する位置が開口された所定の厚さを有するマスクを用いた印刷方法であり、基板に被せたマスク上でクリーム半田をスキージングすることで電極に一定量のクリーム半田を印刷する。スクリーン印刷によれば、同一のマスクを用いている限り複数の基板間でクリーム半田の印刷面積や印刷厚さ等の印刷状態は常に同一になるのであるが、実際には印刷条件や印刷環境の経時的な変化によって各基板間で印刷状態にばらつきが生じることがある。半田の印刷状態が悪いと理想的な半田付けが実現されないので実装強度を長期に亘って保てない場合がある。従来、電子部品の搭載に先立って半田の印刷状態を検査することを目的として、クリーム半田の印刷状態を数値化して評価することが行われている。また、この評価結果から得られた知見をスキージ速度等の印刷条件にフィードバックして印刷品質の向上を図っている(特許文献1参照)。
特開平2−208545号公報
When an electronic component is mounted on a substrate, solder is supplied to a land portion on which an electrode on the surface of the substrate is formed, and the electronic component is mounted on the land portion and then heated to perform soldering. Screen printing is widely used when printing solder with the same pattern on the same substrate. Screen printing is a printing method using a mask having a predetermined thickness that is opened at a position corresponding to an electrode, and a certain amount of cream solder is applied to the electrode by squeezing the cream solder on the mask placed on the substrate. Print. According to screen printing, as long as the same mask is used, the printing state such as the printing area and thickness of cream solder is always the same between multiple boards. Due to changes over time, the printed state may vary among the substrates. If the printed state of the solder is poor, ideal soldering cannot be realized, and the mounting strength may not be maintained for a long time. Conventionally, for the purpose of inspecting the printed state of solder prior to the mounting of electronic components, the printed state of cream solder has been quantified and evaluated. Further, the knowledge obtained from the evaluation result is fed back to printing conditions such as the squeegee speed to improve the printing quality (see Patent Document 1).
JP-A-2-208545

印刷状態を数値化して評価する方法は、閾値処理によって画一的に効率良く評価することができるという利点を有するが、評価基準となる閾値をどのように設定するかが問題であり、評価対象の性質に応じた適切な設定になっていないと実際の印刷状態と乖離した評価がなされてしまうことがある。スクリーン印刷の場合、スキージング時やマスク取り外し時にクリーム半田に作用する力は電極に半田の印刷範囲として設定された領域全体において均一ではないので、これを考慮した評価基準を設定することでより適切な評価ができる。   The method of evaluating the print state by quantifying it has the advantage that it can be uniformly and efficiently evaluated by threshold processing, but there is a problem in how to set the threshold value as an evaluation criterion, and the evaluation target If the setting is not appropriate for the nature of the image, the evaluation may deviate from the actual print state. In the case of screen printing, the force acting on the cream solder when squeezing or removing the mask is not uniform over the entire area set as the solder printing range on the electrode, so it is more appropriate to set an evaluation standard that takes this into account. Can be evaluated.

本発明は、半田の印刷状態を適切に評価することができる半田の印刷状態検査装置を提供することを目的とする。   SUMMARY OF THE INVENTION An object of the present invention is to provide a solder printing state inspection apparatus that can appropriately evaluate the printing state of solder.

請求項1に記載の方法は、電極に印刷された半田の印刷状態を評価する方法であって、電極を複数に区画した各領域に印刷されている半田の代表的な高さを求める工程と、各領域に対して求められた半田の代表的な高さに関する評価を各領域に対して与える工程と、各領域に対して与えられた複数の評価に基づいて電極に半田の印刷状態を評価する工程を含む。   The method according to claim 1 is a method for evaluating a printing state of solder printed on an electrode, and a step of obtaining a representative height of solder printed in each region in which the electrode is partitioned into a plurality of areas; The process of giving each area an evaluation regarding the representative height of the solder obtained for each area, and evaluating the printed state of the solder on the electrode based on a plurality of evaluations given to each area The process of carrying out is included.

請求項2に記載の装置は、電極に印刷された半田の印刷状態を評価する装置であって、電極を複数に区画した各領域に印刷されている半田の代表的な高さを求める手段と、各領域に対して求められた半田の代表的な高さに関する評価を各領域に対して与える手段と、各領域に対して与えられた複数の評価に基づいて電極に半田の印刷状態を評価する手段を備えた。   The apparatus according to claim 2 is an apparatus for evaluating the printed state of the solder printed on the electrode, and means for obtaining a representative height of the solder printed in each region in which the electrode is partitioned into a plurality of areas; A means for giving each region an evaluation regarding the representative height of the solder obtained for each region, and evaluating the printed state of the solder on the electrode based on a plurality of evaluations given to each region It has a means to do.

本発明によれば、電極の形状に応じて領域の形状や数を変更ことができるので、複雑な形状の電極であっても半田の印刷状態を適切に評価することが可能になる。   According to the present invention, since the shape and number of regions can be changed according to the shape of the electrode, it is possible to appropriately evaluate the printed state of the solder even if the electrode has a complicated shape.

添付した図面を参照して本発明の実施の形態について説明する。図1は本発明の実施の形態の電子部品実装装置の構成を示したブロック図、図2は基板に形成されている電極を示す斜視図、図3は半田の平均高さに基づいた評価の一例を示す説明図、図4は電極に印刷された半田の印刷状態を示す平面図、図5は半田の印刷状態を表す評価データの一例を示す説明図である。   Embodiments of the present invention will be described with reference to the accompanying drawings. FIG. 1 is a block diagram showing a configuration of an electronic component mounting apparatus according to an embodiment of the present invention, FIG. 2 is a perspective view showing electrodes formed on a substrate, and FIG. 3 is an evaluation based on the average height of solder. FIG. 4 is an explanatory view showing an example, FIG. 4 is a plan view showing a printed state of solder printed on an electrode, and FIG. 5 is an explanatory view showing an example of evaluation data showing the printed state of solder.

図1において、電子部品実装装置1は、基板の搬送方向に対して上流から下流に向けて配置された基板検査装置2と半田印刷装置3と印刷状態検査装置4と電子部品搭載装置5と搭載状態検査装置6とリフロー装置7と実装状態検査装置8と管理コンピュータ9で構成されている。電子部品実装装置1は、これら各装置においてそれぞれ所定の処理を施すことで基板に電子部品を実装する。   In FIG. 1, an electronic component mounting apparatus 1 is mounted with a board inspection device 2, a solder printing device 3, a printing state inspection device 4, and an electronic component mounting device 5 that are arranged from upstream to downstream with respect to the board conveyance direction. It comprises a state inspection device 6, a reflow device 7, a mounting state inspection device 8, and a management computer 9. The electronic component mounting apparatus 1 mounts an electronic component on a substrate by performing predetermined processing in each of these apparatuses.

基板検査装置2は実装対象となる基板の外観検査を行う。この外観検査には非接触型の三次元計測器を用いる。三次元計測器は基板表面に光を走査させ、基板表面で反射した光を受光した位置に応じてサンプリング測点の高さ(Z座標値)を計測する。サンプリング測点は基板の全面に適宜分布するように水平位置(XY座標値)が予め設定されている。サンプリング測点の高さ(Z座標値)に予め定めた許容値を超えるものがなかった場合には、基板には品質上問題となる反りは生じていないと判断され、次の半田印刷装置3に移送される。   The board inspection apparatus 2 performs an appearance inspection of a board to be mounted. A non-contact type three-dimensional measuring instrument is used for this visual inspection. The three-dimensional measuring instrument scans the surface of the substrate with light and measures the height (Z coordinate value) of the sampling point according to the position where the light reflected on the surface of the substrate is received. The horizontal positions (XY coordinate values) are set in advance so that the sampling measurement points are appropriately distributed over the entire surface of the substrate. If the sampling station height (Z coordinate value) does not exceed a predetermined allowable value, it is determined that the substrate does not have a warp that causes a quality problem, and the next solder printing apparatus 3 It is transferred to.

半田印刷装置3は基板表面に形成されている電極に半田のスクリーン印刷を行う。スクリーン印刷に用いるマスクは基板表面に密着させる必要があり、顕著な反りがある基板とは密着しないので、そのような反りを生じている基板は基板検査装置2によって電子部品実装装置1から排除される。半田印刷装置3は基板の電極に対応する位置に開口が設けられているマスクを備えており、移送されてきた基板の表面にマスクを重ね、マスク上でスキージングしたクリーム状の半田を電極上に印刷する。マスクは基板の種類(電極の位置)によって専用のものが準備されている。同種の基板に対しては同一のマスクを使用して印刷を行う。半田印刷装置3で半田が印刷された基板は印刷状態検査装置4に順次移送される。   The solder printing apparatus 3 performs solder screen printing on the electrodes formed on the substrate surface. A mask used for screen printing needs to be in close contact with the substrate surface and does not adhere to a substrate with significant warpage. Therefore, the substrate incurring such warpage is excluded from the electronic component mounting apparatus 1 by the substrate inspection apparatus 2. The The solder printing apparatus 3 is provided with a mask having an opening at a position corresponding to the electrode of the substrate. The mask is superimposed on the surface of the transferred substrate, and the cream-like solder squeezed on the mask is placed on the electrode. Print on. A special mask is prepared depending on the type of substrate (position of electrode). Printing is performed on the same type of substrate using the same mask. The board on which the solder is printed by the solder printing apparatus 3 is sequentially transferred to the printing state inspection apparatus 4.

印刷状検査装置4は半田印刷装置3から順次移送されてきた基板に印刷されている半田の外観検査を行う。半田の外観検査は、三次元測定器によって取得した半田表面の三次元データを用いて行う。この三次元データに基づいて印刷面積、体積、厚さ、位置等の要素からなる半田の印刷状態を評価し、その良否を判断する。印刷状態検査装置4による半田の印刷状態の評価結果は表示パネル10に表示され、その内容がオペレータ等に報知されるようになっている。   The printed inspection apparatus 4 inspects the appearance of the solder printed on the board sequentially transferred from the solder printing apparatus 3. The appearance inspection of the solder is performed using the three-dimensional data of the solder surface acquired by the three-dimensional measuring instrument. Based on the three-dimensional data, the printing state of the solder composed of elements such as the printing area, volume, thickness and position is evaluated, and the quality is judged. The evaluation result of the solder printing state by the printing state inspection device 4 is displayed on the display panel 10, and the contents are notified to an operator or the like.

次に図2乃至図4を参照して半田の印刷状態の評価方法について説明する。図2において電極11の表面には半田印刷面12が設定されている。電極11の表面は縦2つ横3つの計6つの領域A〜Fに仮想的に区画されている。ここで仮想的に区画されているとは、三次元データの演算処理において必要となる電算上の区画という意味であり、現実の電極が物理的に区画されているということではない。   Next, a method for evaluating the printed state of solder will be described with reference to FIGS. In FIG. 2, a solder printing surface 12 is set on the surface of the electrode 11. The surface of the electrode 11 is virtually divided into a total of six regions A to F, two vertically and three horizontally. Here, “virtually partitioned” means a computerized partition required in the calculation processing of three-dimensional data, and does not mean that an actual electrode is physically partitioned.

印刷状態検査装置4は、半田の表面を計測して取得した三次元データを演算処理し、各領域A〜Fにおける半田の平均高さを求める。そして、求められた半田の平均高さに基づいて段階的な評価を各領域A〜Fに与え、各領域A〜Fに与えた評価に基づいて半田の印
刷状態を評価する。各領域A〜Fにおける半田の平均高さに対して段階的な評価を与える方法としては、図3に示すように、半田印刷面12に対する高さを0(なし)、1(過少)、2(適正)、3(過多)の4段階に区分する評価テーブルを予め作成しておき、各領域A〜Fにおいて求められた半田の平均高さに対して0〜3の何れかの評価を与える方法がある。
The printing state inspection device 4 performs arithmetic processing on the three-dimensional data acquired by measuring the surface of the solder, and obtains the average height of the solder in each of the areas A to F. And stepwise evaluation is given to each area | region AF based on the calculated | required average height of solder, and the printing state of solder is evaluated based on the evaluation given to each area | region AF. As a method of giving stepwise evaluation to the average height of the solder in each of the areas A to F, as shown in FIG. 3, the height with respect to the solder printing surface 12 is 0 (none), 1 (too little), 2 (Appropriate) An evaluation table that is divided into four stages of 3 (excessive) is prepared in advance, and an evaluation of any one of 0 to 3 is given to the average height of the solder obtained in each of the areas A to F. There is a way.

図4に不良な印刷状態にある半田の例を示す。このうち(a)に示した半田13は、領域A、B、D、Eでは正常に印刷されているが、領域C、Fでは半田印刷面12を大きくはみ出している。このような印刷状態は、半田付けの際に領域C、F側に溶出して隣の電極に印刷されている半田との間で短絡を引き起こす原因となる。領域C、Fにおいて半田13が半田印刷面12をはみ出した分だけ、半田印刷面12の面積に対する半田量が増大し、結果として領域C、Fにおける半田の平均高さを押し上げることになる。これにより半田13の印刷状態の評価は、領域A、B、D、Eでは2(適正)、領域C、Fでは3(過多)となる。   FIG. 4 shows an example of solder in a defective printing state. Among them, the solder 13 shown in (a) is normally printed in the regions A, B, D, and E, but the solder printing surface 12 greatly protrudes in the regions C and F. Such a printing state causes a short circuit between the solder that is eluted to the regions C and F and is printed on the adjacent electrodes during soldering. The solder amount with respect to the area of the solder printing surface 12 is increased by the amount of the solder 13 protruding from the solder printing surface 12 in the regions C and F. As a result, the average height of the solder in the regions C and F is increased. As a result, the evaluation of the printing state of the solder 13 is 2 (appropriate) in the regions A, B, D, and E, and 3 (excessive) in the regions C and F.

これに対し(b)に示した半田14は、領域A、B、D、Eでは正常に印刷されているが、領域C、Fにはほとんど印刷されていない。このような印刷状態は、半田付けの際の強度不足を招き、基板と電子部品の接触不良等の不具合を引き起こす原因となる。半田14の印刷状態の評価は、領域A、B、D、Eでは2(適正)、領域C、Fでは0(なし)となる。   On the other hand, the solder 14 shown in (b) is normally printed in the regions A, B, D, and E, but is hardly printed in the regions C and F. Such a printing state causes insufficient strength at the time of soldering and causes problems such as poor contact between the substrate and the electronic component. The evaluation of the printing state of the solder 14 is 2 (appropriate) in the regions A, B, D, and E, and 0 (none) in the regions C and F.

このようにして各領域A〜Fに与えられた評価に基づいて半田の印刷状態についての最終評価を下すことになる。全領域A〜Fにおいて2(適正)の評価が与えられた場合には非常に良好な印刷状態にあると評価することができる。各領域A〜Fに与えられた評価に基づいて印刷状態を良好であると評価する際の基準は、製品として要求される水準に基づいて予め設定しておく。また特に印刷状態が良好であることが要求される領域に関しては評価の重み付けを行うことも可能である。電極11の表面を仮想的に区画する領域は自由に設定することができ、その形状や数は限定されないので、電極の形状やサイズに応じた領域を設定することでより適切な最終評価を下すことができる。   In this way, the final evaluation of the printed state of the solder is made based on the evaluation given to each of the areas A to F. If 2 (appropriate) is given for all areas A to F, it can be evaluated that the printing state is very good. The standard for evaluating that the printing state is good based on the evaluation given to each of the areas A to F is set in advance based on the level required for the product. In particular, it is possible to weight the evaluation for an area that is required to have a good printing state. The region that virtually divides the surface of the electrode 11 can be freely set, and the shape and number thereof are not limited. Therefore, a more appropriate final evaluation can be performed by setting the region according to the shape and size of the electrode. be able to.

また、印刷不良には半田の外観が異なるいくつかの態様があり、半田の外観形状から印刷不良の要因を推察することができる。この半田の外観形状は各領域A〜Fに与えられた評価によって近似することができる。従って、各領域に与えられた評価の分布状態と印刷不良の要因を関連付けた不良要因相関テーブルを予め作成しておき、最終的に不良と評価された印刷状態については、各領域に与えられた評価とともに印刷不良の発生要因を併せて提示することもできる。半田の外観形状から印刷不良の発生要因を推察するにはある程度の熟練を要するが、このように各領域に与えられた評価から一義的に印刷不良の発生要因を特定し、これを表示パネル10に表示することで、経験の浅いオペレータに対して有用な情報を提示することができる。   In addition, there are several modes in which the appearance of solder differs in printing failure, and the cause of printing failure can be inferred from the appearance of solder. The external shape of the solder can be approximated by the evaluation given to each of the areas A to F. Therefore, a failure factor correlation table that associates the distribution of evaluation given to each region with the cause of printing failure is created in advance, and the printing state that is finally evaluated as defective is assigned to each region. Along with the evaluation, it is possible to present the cause of printing failure. A certain amount of skill is required to infer the cause of the printing failure from the external shape of the solder, but the cause of the printing failure is uniquely identified from the evaluation given to each region in this way, and this is displayed on the display panel 10. By displaying on the screen, useful information can be presented to an inexperienced operator.

このようにして印刷状態が良好であると評価された基板は電子部品搭載装置5に移送される。電子部品搭載装置5は電子部品の電極が半田に接触するように電子部品の搭載を行う。搭載状態検査装置6は基板表面の三次元計測によって電子部品の搭載状態の検査を行う。電子部品が正常な搭載状態にある基板はリフロー装置7に移送され、ここで電子部品を基板に半田付けする。これで電子部品と基板が電気的および機械的に完全に接続された状態となり、電子部品の実装工程が完了する。   Thus, the board | substrate evaluated that the printing state is favorable is transferred to the electronic component mounting apparatus 5. FIG. The electronic component mounting apparatus 5 mounts the electronic component such that the electrode of the electronic component is in contact with the solder. The mounting state inspection device 6 inspects the mounting state of the electronic component by three-dimensional measurement of the substrate surface. The substrate on which the electronic component is normally mounted is transferred to the reflow device 7 where the electronic component is soldered to the substrate. Thus, the electronic component and the board are completely electrically and mechanically connected, and the mounting process of the electronic component is completed.

実装状態検査装置8は、実装を終えた基板の外観検査を行う。この外観検査は基板が製品として出荷できる品質であるかどうかの最終確認を行うものであり、半田のリフロー時に移動した電子部品が許容範囲内にあるかどうかを基板表面の三次元計測によって確認す
る。
The mounting state inspection device 8 performs an appearance inspection of the substrate after the mounting. This visual inspection is a final confirmation of whether the board is of a quality that can be shipped as a product. It is confirmed by three-dimensional measurement of the board surface whether the electronic parts moved during solder reflow are within an acceptable range. .

管理コンピュータ9は、前記各装置2〜8の動作制御を行うとともに、個々の基板に対して各装置2〜8で実行した作業に関するデータをデータベース化して記憶する。図6は半田の印刷状態の評価に関するデータを模式的に表したものである。ここでは1つの領域に与えられる評価(0〜3)を2ビットで表し、全ての領域A〜Fに対して合計12ビットで表している。(a)に示した評価データは図4(a)に示した半田の評価データであり、(b)に示した評価データは図4(b)に示した半田の評価データである。このように実際には複雑な半田の形状を極めて小さいデータ容量で表すようにしたことで、限られたデータベースを有効に活用することができるとともに、より容量の少ない安価なシステムでの運用を可能にしている。   The management computer 9 controls the operation of each of the devices 2 to 8 and stores data relating to work performed by the devices 2 to 8 on each substrate in a database. FIG. 6 schematically shows data relating to the evaluation of the printed state of solder. Here, the evaluation (0 to 3) given to one area is represented by 2 bits, and all areas A to F are represented by 12 bits in total. The evaluation data shown in (a) is the evaluation data of the solder shown in FIG. 4 (a), and the evaluation data shown in (b) is the evaluation data of the solder shown in FIG. 4 (b). In this way, in fact, the complicated solder shape is represented by an extremely small data capacity, so that a limited database can be used effectively, and operation with an inexpensive system with a smaller capacity is possible. I have to.

なお、本発明を構成する「半田の代表的な高さ」としては要約統計量を使用するのが一般的であり、ここでは比較的用いられる頻度が高いと思われる「平均値(平均高さ)」を最良の形態としているが、印刷状態の検査の目的等に応じて、「最大値(最も半田が厚い部分の高さ)」や「最小値(最も半田が薄い部分の高さ)」、「最頻値」、「中央値」を用いてもよい。   Note that summary statistics are generally used as the “representative height of solder” that constitutes the present invention. Here, the “average value (average height), which is considered to be used relatively frequently, is used. ) "Is the best form, but depending on the purpose of the printed state inspection, etc., the" maximum value (height of the part with the thickest solder) "or" minimum value (height of the part with the thinnest solder) " , “Mode” and “median” may be used.

本発明は品質の高い半田付けが要求される電子部品の実装分野において有用である。   The present invention is useful in the field of mounting electronic components that require high quality soldering.

本発明の実施の形態の電子部品実装装置の構成を示したブロック図The block diagram which showed the structure of the electronic component mounting apparatus of embodiment of this invention 基板に形成されている電極を示す斜視図The perspective view which shows the electrode currently formed in the board | substrate 半田の平均高さに基づいた評価の一例を示す説明図Explanatory drawing showing an example of evaluation based on the average height of solder 電極に印刷された半田の印刷状態を示す平面図Plan view showing the printed state of the solder printed on the electrode 半田の印刷状態を表す評価データの一例を示す説明図Explanatory drawing which shows an example of the evaluation data showing the printing state of solder

符号の説明Explanation of symbols

1 電子部品実装装置
4 印刷状態検査装置
11 電極
13、14 半田
A〜F 電極を区画した領域
DESCRIPTION OF SYMBOLS 1 Electronic component mounting apparatus 4 Print state inspection apparatus 11 Electrode 13, 14 Solder AF area which divided the electrode

Claims (2)

電極に印刷された半田の印刷状態を評価する方法であって、電極を複数に区画した各領域に印刷されている半田の代表的な高さを求める工程と、各領域に対して求められた半田の代表的な高さに関する評価を各領域に対して与える工程と、各領域に対して与えられた複数の評価に基づいて電極に半田の印刷状態を評価する工程を含む方法。   A method for evaluating a printed state of solder printed on an electrode, a step of obtaining a representative height of solder printed in each region in which the electrode is divided into a plurality of regions, and a method obtained for each region A method including a step of giving an evaluation regarding a representative height of solder to each region, and a step of evaluating a printed state of the solder on the electrode based on a plurality of evaluations given to each region. 電極に印刷された半田の印刷状態を評価する装置であって、電極を複数に区画した各領域に印刷されている半田の代表的な高さを求める手段と、各領域に対して求められた半田の代表的な高さに関する評価を各領域に対して与える手段と、各領域に対して与えられた複数の評価に基づいて電極に半田の印刷状態を評価する手段を備えた装置。   An apparatus for evaluating a printing state of solder printed on an electrode, and a means for obtaining a representative height of solder printed in each region in which an electrode is divided into a plurality of regions, and obtained for each region An apparatus comprising means for giving an evaluation about a typical height of solder to each area, and means for evaluating a printed state of solder on the electrode based on a plurality of evaluations given to each area.
JP2008108588A 2008-04-18 2008-04-18 Method and apparatus for evaluating printed state of solder Expired - Fee Related JP4941394B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008108588A JP4941394B2 (en) 2008-04-18 2008-04-18 Method and apparatus for evaluating printed state of solder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008108588A JP4941394B2 (en) 2008-04-18 2008-04-18 Method and apparatus for evaluating printed state of solder

Publications (2)

Publication Number Publication Date
JP2009260103A true JP2009260103A (en) 2009-11-05
JP4941394B2 JP4941394B2 (en) 2012-05-30

Family

ID=41387144

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008108588A Expired - Fee Related JP4941394B2 (en) 2008-04-18 2008-04-18 Method and apparatus for evaluating printed state of solder

Country Status (1)

Country Link
JP (1) JP4941394B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015516580A (en) * 2012-05-22 2015-06-11 コー・ヤング・テクノロジー・インコーポレーテッド Method for measuring the height of a three-dimensional shape measuring device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003224353A (en) * 2002-01-30 2003-08-08 Hitachi Ltd Method for mounting substrate of electronic component
JP2004037222A (en) * 2002-07-03 2004-02-05 Matsushita Electric Ind Co Ltd Teaching method, electronic substrate inspection method, and electronic substrate inspection device
JP2007088109A (en) * 2005-09-21 2007-04-05 Ckd Corp Substrate inspection device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003224353A (en) * 2002-01-30 2003-08-08 Hitachi Ltd Method for mounting substrate of electronic component
JP2004037222A (en) * 2002-07-03 2004-02-05 Matsushita Electric Ind Co Ltd Teaching method, electronic substrate inspection method, and electronic substrate inspection device
JP2007088109A (en) * 2005-09-21 2007-04-05 Ckd Corp Substrate inspection device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015516580A (en) * 2012-05-22 2015-06-11 コー・ヤング・テクノロジー・インコーポレーテッド Method for measuring the height of a three-dimensional shape measuring device
US9243899B2 (en) 2012-05-22 2016-01-26 Koh Young Technology Inc. Method of measuring a height of 3-dimensional shape measurement apparatus

Also Published As

Publication number Publication date
JP4941394B2 (en) 2012-05-30

Similar Documents

Publication Publication Date Title
CN104111037B (en) Apparatus for inspecting solder printing
JP5290233B2 (en) Three-dimensional measuring device and substrate inspection device
TWI395941B (en) Solder printing inspection device
US20050209822A1 (en) Inspection method and system and production method of mounted substrate
JP6329667B1 (en) Component mounting system and adhesive inspection device
Huang et al. The solder paste printing process: critical parameters, defect scenarios, specifications, and cost reduction
JP2009192282A (en) Solder printing inspection apparatus and component mounting system
Janóczki et al. Automatic optical inspection of soldering
US20190114764A1 (en) Solder printing inspection device
JP2009300429A (en) Method and device for inspecting printed solder paste
JP4743172B2 (en) Solder inspection method
JP4372719B2 (en) Component mounting system
JP4249543B2 (en) Circuit board appearance inspection method and circuit board appearance inspection apparatus
JP4941394B2 (en) Method and apparatus for evaluating printed state of solder
JP4161884B2 (en) Solder inspection equipment
JP2007088109A (en) Substrate inspection device
JP4540831B2 (en) Double-sided mounting board inspection method and apparatus
JP2022106238A (en) Management system, management device, management method, and program
JP4840394B2 (en) Device for inspecting the printed state of solder
WO2022157994A1 (en) Management system, management device, management method, and program
WO2022157995A1 (en) Inspection management system, inspection management device, inspection management method, and program
WO2022190543A1 (en) Information generation device
JP7266123B2 (en) Welding quality inspection method and welding quality inspection device
JP2007227624A (en) System and method for inspecting quality of solder
JP4239309B2 (en) Printed wiring board and printing inspection method for cream solder printed on printed wiring board

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20100208

RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20100312

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20110413

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20110419

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20110518

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20111129

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120111

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120131

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120213

R151 Written notification of patent or utility model registration

Ref document number: 4941394

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R151

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150309

Year of fee payment: 3

LAPS Cancellation because of no payment of annual fees