JP2009128400A - マルチチップパッケージの半導体装置 - Google Patents
マルチチップパッケージの半導体装置 Download PDFInfo
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- JP2009128400A JP2009128400A JP2007300144A JP2007300144A JP2009128400A JP 2009128400 A JP2009128400 A JP 2009128400A JP 2007300144 A JP2007300144 A JP 2007300144A JP 2007300144 A JP2007300144 A JP 2007300144A JP 2009128400 A JP2009128400 A JP 2009128400A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/60—Control of cameras or camera modules
- H04N23/68—Control of cameras or camera modules for stable pick-up of the scene, e.g. compensating for camera body vibrations
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/60—Control of cameras or camera modules
- H04N23/68—Control of cameras or camera modules for stable pick-up of the scene, e.g. compensating for camera body vibrations
- H04N23/682—Vibration or motion blur correction
- H04N23/685—Vibration or motion blur correction performed by mechanical compensation
- H04N23/687—Vibration or motion blur correction performed by mechanical compensation by shifting the lens or sensor position
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
- H01L2225/06562—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking at least one device in the stack being rotated or offset
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- Multimedia (AREA)
- Signal Processing (AREA)
- Semiconductor Integrated Circuits (AREA)
- Adjustment Of Camera Lenses (AREA)
- Studio Devices (AREA)
Abstract
【解決手段】アナログ回路を有するドライバチップ20と、デジタル回路を有するロジックチップ30とが、共通して実装されたマルチチップパッケージの半導体装置であり、ドライバチップがロジックチップ専用のロジックチップ電源を作成するロジックチップ用電源回路40を備える。ロジックチップ30は、電源入力端子を介して前記ロジックチップ用電源回路からの電力供給を受けて動作する内部ロジック回路を有する。
【選択図】図1
Description
=(kT/q)×ln[(Ie1/Ae1)/(Ie2/Ae2)]
=(kT/q)×ln[(Ie1/Ie2)N] ・・・・(1)
ここで、式(1)において、kはボルツマン定数、Tは絶対温度、qは電子の電荷量、Ie1はQ11のエミッタ電流、Ie2はQ12のエミッタ電流である。
Ie2=△Vbe/R4 ・・・(2)
式(2)式において、R4は抵抗R4の抵抗値である。
VR3=Ic2×R3+Ib3×R3 ・・・(3)
式(3)において、Ic2はQ12のコレクタ電流、Ib3はQ13のベース電流である。用いるトランジスタの電流増幅率hFEが充分に大きく、ベース電流が無視できるものとすると、上記(3)式は下式(4)
VR3=Ie2×R3=R3/R4×△Vbe ・・・(4)
で示すことができる。よって、ノードNrefにおける電圧Vrefは、下式(5)
Vref =Vbe3+(R3/R4)×△Vbe
=Vbe3
+(R3/R4)×(kT/q)×ln[(Ie1/Ie2)N]・・・(5)
で決定される電圧となる。ここで抵抗R2及びR3の抵抗値を等しくすると、Q11及びQ12のコレクタ電流が等しくなり、かつ、両トランジスタの電流増幅率hFEが充分に大きく、各ベース電流を無視できるものとすると、Q11及びQ12のエミッタ電流は等しく、(5)式は、下記式(6)
Vref=Vbe3+(R3/R4)×(kT/q)×ln[N] ・・・(6)
で表される。
Claims (3)
- アナログ回路を有するドライバチップと、デジタル回路を有するロジックチップとが、同一パッケージ内に実装されたマルチチップパッケージの半導体装置であり、
前記ドライバチップは、前記ロジックチップ専用のロジックチップ電源を作成するロジックチップ用電源回路と、前記ロジックチップ電源を出力するためのロジックチップ電源出力端子とを備え、
前記ロジックチップは、電源入力端子を介して前記ロジックチップ用電源回路からの電力供給を受けて動作する回路を有することを特徴とする半導体装置。 - 請求項1に記載の半導体装置において、
前記ドライバチップは、バイポーラ素子を少なくとも一部に用いたアナログ回路であって、半導体装置の搭載される機器における防振制御のための振動検出用アナログ回路、振動補正用アナログ回路を有し、
前記ロジックチップは、前記ドライバチップから供給される振動検出信号に基づいて振動量を求めて補正信号を作成するデジタル回路を有し、
作成した前記補正信号が前記ドライバチップの前記振動補正用アナログ回路に供給されることを特徴とする半導体装置。 - 請求項1又は請求項2に記載の半導体装置において、
前記ドライバチップの前記ロジックチップ用電源回路は、バンドギャップ定電圧を利用した電源回路であることを特徴とする半導体装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007300144A JP2009128400A (ja) | 2007-11-20 | 2007-11-20 | マルチチップパッケージの半導体装置 |
US11/945,030 US7893757B2 (en) | 2007-11-20 | 2007-11-26 | Multi-chip package semiconductor device |
CN2008101781135A CN101442041B (zh) | 2007-11-20 | 2008-11-19 | 多芯片封装的半导体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007300144A JP2009128400A (ja) | 2007-11-20 | 2007-11-20 | マルチチップパッケージの半導体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2009128400A true JP2009128400A (ja) | 2009-06-11 |
Family
ID=40641288
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007300144A Pending JP2009128400A (ja) | 2007-11-20 | 2007-11-20 | マルチチップパッケージの半導体装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7893757B2 (ja) |
JP (1) | JP2009128400A (ja) |
CN (1) | CN101442041B (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8809762B2 (en) | 2011-12-13 | 2014-08-19 | Semiconductor Components Industries, Llc | Photodetector circuit |
US9063014B2 (en) | 2011-12-13 | 2015-06-23 | Semiconductor Components Industries, Llc | Photodetector control circuit to control drive of a photodiode and current detection of a phototransistor |
US9074876B2 (en) | 2011-12-13 | 2015-07-07 | Semiconductor Components Industries, Llc | Lens position detecting circuit |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009159110A (ja) * | 2007-12-25 | 2009-07-16 | Sanyo Electric Co Ltd | アンプ回路 |
JP2012044108A (ja) * | 2010-08-23 | 2012-03-01 | Mitsumi Electric Co Ltd | 半導体集積回路、該回路を備えるスイッチング電源及び該電源を備える制御システム |
CN102081538A (zh) * | 2011-01-11 | 2011-06-01 | 上海华勤通讯技术有限公司 | 手机处理器兼容多种芯片的方法 |
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JP3934261B2 (ja) | 1998-09-18 | 2007-06-20 | 株式会社ルネサステクノロジ | 半導体集積回路 |
JP3579633B2 (ja) * | 2000-05-19 | 2004-10-20 | 株式会社ルネサステクノロジ | 半導体集積回路 |
JP2002057270A (ja) | 2000-08-08 | 2002-02-22 | Sharp Corp | チップ積層型半導体装置 |
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US20060227221A1 (en) * | 2005-04-05 | 2006-10-12 | Mitsumasa Okubo | Image pickup device |
US7408330B2 (en) * | 2006-06-06 | 2008-08-05 | Skyworks Solutions, Inc. | Voltage up-conversion circuit using low voltage transistors |
-
2007
- 2007-11-20 JP JP2007300144A patent/JP2009128400A/ja active Pending
- 2007-11-26 US US11/945,030 patent/US7893757B2/en active Active
-
2008
- 2008-11-19 CN CN2008101781135A patent/CN101442041B/zh not_active Expired - Fee Related
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH0694443A (ja) * | 1992-09-16 | 1994-04-05 | Olympus Optical Co Ltd | 2軸傾きセンサ |
JP2004046082A (ja) * | 1993-03-16 | 2004-02-12 | Olympus Corp | カメラ制御用1チップマイクロコンピュータ |
JP2002107808A (ja) * | 2000-09-29 | 2002-04-10 | Matsushita Electric Ind Co Ltd | カメラの制御方法およびその制御に使用するカウンタ回路 |
JP2003116032A (ja) * | 2001-08-01 | 2003-04-18 | Sanyo Electric Co Ltd | 画像信号処理装置 |
JP2003234951A (ja) * | 2002-02-13 | 2003-08-22 | Sony Corp | 画像処理装置および方法、記録媒体、並びにプログラム |
JP2004354878A (ja) * | 2003-05-30 | 2004-12-16 | Minolta Co Ltd | 撮像装置 |
JP2006261603A (ja) * | 2005-03-18 | 2006-09-28 | Ricoh Co Ltd | マルチチップ型半導体装置及びその製造方法 |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8809762B2 (en) | 2011-12-13 | 2014-08-19 | Semiconductor Components Industries, Llc | Photodetector circuit |
US9063014B2 (en) | 2011-12-13 | 2015-06-23 | Semiconductor Components Industries, Llc | Photodetector control circuit to control drive of a photodiode and current detection of a phototransistor |
US9074876B2 (en) | 2011-12-13 | 2015-07-07 | Semiconductor Components Industries, Llc | Lens position detecting circuit |
US9389066B2 (en) | 2011-12-13 | 2016-07-12 | Semiconductor Components Industries, Llc | Lens position detecting circuit and method |
Also Published As
Publication number | Publication date |
---|---|
CN101442041A (zh) | 2009-05-27 |
US7893757B2 (en) | 2011-02-22 |
US20090128229A1 (en) | 2009-05-21 |
CN101442041B (zh) | 2012-08-29 |
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