JP2009065015A5 - - Google Patents
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- JP2009065015A5 JP2009065015A5 JP2007232503A JP2007232503A JP2009065015A5 JP 2009065015 A5 JP2009065015 A5 JP 2009065015A5 JP 2007232503 A JP2007232503 A JP 2007232503A JP 2007232503 A JP2007232503 A JP 2007232503A JP 2009065015 A5 JP2009065015 A5 JP 2009065015A5
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- container
- semiconductor films
- semiconductor
- bond substrate
- substrate
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Claims (4)
前記ボンド基板を劈開させることで前記ボンド基板から形成される複数の第1の半導体膜を、前記第1の容器に載置し、
前記第1の容器の上に第2の容器を配置した後、前記第1の容器及び前記第2の容器を反転させることで、前記複数の第1の半導体膜を前記第2の容器に載置し、
前記複数の第1の半導体膜を前記第2の容器から拾い上げて、前記複数の第1の半導体膜どうしが離隔するように、なおかつ前記劈開により露出した面がベース基板側を向くように、前記複数の第1の半導体膜を前記ベース基板に貼り、
前記複数の第1の半導体膜をエッチングすることで、複数の第2の半導体膜を形成することを特徴とする半導体装置の作製方法。 After placing the first container under the bond substrate,
A plurality of first semiconductor films formed from the bond substrate by cleaving the bond substrate are placed on the first container,
After disposing the second container on the first container, the first container and the second container are inverted, so that the plurality of first semiconductor films are mounted on the second container. Place
The plurality of first semiconductor films are picked up from the second container so that the plurality of first semiconductor films are separated from each other, and the surface exposed by the cleavage is directed to the base substrate side. bonding the plurality of first semiconductor layer on the base substrate,
A method for manufacturing a semiconductor device, wherein the plurality of second semiconductor films are formed by etching the plurality of first semiconductor films.
前記第1のボンド基板を劈開させることで前記第1のボンド基板から形成される複数の第1の半導体膜を、前記第1の容器に載置し、
前記第1の容器の上に第2の容器を配置した後、前記第1の容器及び前記第2の容器を反転させることで、前記複数の第1の半導体膜を前記第2の容器に載置し、
第2の結晶面方位を有する第2のボンド基板の下に第3の容器を配置した後、
前記第2のボンド基板を劈開させることで前記第2のボンド基板から形成される複数の第2の半導体膜を、前記第3の容器に載置し、
前記第3の容器の上に第4の容器を配置した後、前記第3の容器及び前記第4の容器を反転させることで、前記複数の第2の半導体膜を前記第4の容器に載置し、
前記複数の第1の半導体膜を前記第2の容器から拾い上げて、前記複数の第1の半導体膜どうしが離隔するように、なおかつ前記劈開により露出した面がベース基板側を向くように、前記複数の第1の半導体膜を前記ベース基板に貼り、
前記複数の第2の半導体膜を前記第4の容器から拾い上げて、前記複数の第2の半導体膜どうしが離隔するように、なおかつ前記複数の第1の半導体膜と前記複数の第2の半導体膜とが離隔するように、さらに前記劈開により露出した面が前記ベース基板側を向くように、前記複数の第2の半導体膜を前記ベース基板に貼り、
前記複数の第1の半導体膜及び前記複数の第2の半導体膜をエッチングすることで、複数の第3の半導体膜及び複数の第4の半導体膜を形成することを特徴とする半導体装置の作製方法。 After disposing the first container under the first bond substrate having the first crystal plane orientation,
A plurality of first semiconductor films formed from the first bond substrate by cleaving the first bond substrate are placed on the first container,
After disposing the second container on the first container, the first container and the second container are inverted, so that the plurality of first semiconductor films are mounted on the second container. Place
After placing the third container under the second bond substrate having the second crystal plane orientation,
A plurality of second semiconductor films formed from the second bond substrate by cleaving the second bond substrate are placed on the third container,
After disposing the fourth container on the third container, the third container and the fourth container are inverted, so that the plurality of second semiconductor films are mounted on the fourth container. Place
The plurality of first semiconductor films are picked up from the second container so that the plurality of first semiconductor films are separated from each other, and the surface exposed by the cleavage is directed to the base substrate side. A plurality of first semiconductor films are attached to the base substrate,
The plurality of second semiconductor films are picked up from the fourth container so that the plurality of second semiconductor films are separated from each other, and the plurality of first semiconductor films and the plurality of second semiconductors are separated from each other. so that the film is separated, so that more surface exposed by the cleavage faces the base substrate side, attached to said plurality of second semiconductor film on the base substrate,
A plurality of third semiconductor films and a plurality of fourth semiconductor films are formed by etching the plurality of first semiconductor films and the plurality of second semiconductor films. Method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007232503A JP5255801B2 (en) | 2007-09-07 | 2007-09-07 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007232503A JP5255801B2 (en) | 2007-09-07 | 2007-09-07 | Method for manufacturing semiconductor device |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2009065015A JP2009065015A (en) | 2009-03-26 |
JP2009065015A5 true JP2009065015A5 (en) | 2010-09-30 |
JP5255801B2 JP5255801B2 (en) | 2013-08-07 |
Family
ID=40559327
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007232503A Expired - Fee Related JP5255801B2 (en) | 2007-09-07 | 2007-09-07 | Method for manufacturing semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5255801B2 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB0819449D0 (en) * | 2008-10-23 | 2008-12-03 | Cambridge Display Tech Ltd | Display drivers |
US8432021B2 (en) * | 2009-05-26 | 2013-04-30 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of SOI substrate |
WO2011156787A2 (en) * | 2010-06-11 | 2011-12-15 | Crossbar, Inc. | Pillar structure for memory device and method |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000012864A (en) * | 1998-06-22 | 2000-01-14 | Semiconductor Energy Lab Co Ltd | Manufacture of semiconductor device |
JP2000349266A (en) * | 1999-03-26 | 2000-12-15 | Canon Inc | Manufacture of semiconductor member, utilization method for semiconductor basic substance, manufacture system for semiconductor member, production control method therefor and utilizing method for forming device for film depositing |
JP3771084B2 (en) * | 1999-04-30 | 2006-04-26 | Necエレクトロニクス株式会社 | Tray for semiconductor integrated circuit device |
JP4378672B2 (en) * | 2002-09-03 | 2009-12-09 | セイコーエプソン株式会社 | Circuit board manufacturing method |
JP4163478B2 (en) * | 2002-09-25 | 2008-10-08 | トッパン・フォームズ株式会社 | Chip reversing device |
JP4299721B2 (en) * | 2003-12-09 | 2009-07-22 | 株式会社ルネサステクノロジ | Method for transporting semiconductor device and method for manufacturing semiconductor device |
JP4838504B2 (en) * | 2004-09-08 | 2011-12-14 | キヤノン株式会社 | Manufacturing method of semiconductor device |
JP4687366B2 (en) * | 2005-10-12 | 2011-05-25 | セイコーエプソン株式会社 | Semiconductor chip storage tray and semiconductor chip transfer method |
US7696574B2 (en) * | 2005-10-26 | 2010-04-13 | International Business Machines Corporation | Semiconductor substrate with multiple crystallographic orientations |
-
2007
- 2007-09-07 JP JP2007232503A patent/JP5255801B2/en not_active Expired - Fee Related
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