JP2009004447A - Printed circuit board, electronic apparatus, and semiconductor package - Google Patents

Printed circuit board, electronic apparatus, and semiconductor package Download PDF

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Publication number
JP2009004447A
JP2009004447A JP2007161680A JP2007161680A JP2009004447A JP 2009004447 A JP2009004447 A JP 2009004447A JP 2007161680 A JP2007161680 A JP 2007161680A JP 2007161680 A JP2007161680 A JP 2007161680A JP 2009004447 A JP2009004447 A JP 2009004447A
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Prior art keywords
circuit board
semiconductor package
adhesive member
printed circuit
bumps
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Japanese (ja)
Inventor
Minoru Takizawa
稔 滝澤
Masaru Harashima
勝 原島
Kuniyasu Hosoda
邦康 細田
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Toshiba Corp
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Toshiba Corp
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Priority to JP2007161680A priority Critical patent/JP2009004447A/en
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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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Abstract

<P>PROBLEM TO BE SOLVED: To utilize efficiently space for mounting electronic components on a printed circuit board. <P>SOLUTION: The printed circuit board 3 has a circuit board 20, a semiconductor package 10 provided with an opposite surface to the circuit board and a plurality of bumps 12 formed on the opposite surface and connected with the circuit board via the plurality of bumps, and bonding members 30 disposed in the vicinity of at least the respective corners of the opposite surface of the semiconductor package which are present in the region between the circuit board and the semiconductor package so that the circuit board and the semiconductor package are bonded each other via them. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、回路基板に半導体パッケージを実装して構成されるプリント回路板に関する。また、本発明は、当該プリント回路板の一部である半導体パッケージ、および、当該プリント回路板を備える電子機器に関する。   The present invention relates to a printed circuit board configured by mounting a semiconductor package on a circuit board. The present invention also relates to a semiconductor package that is a part of the printed circuit board, and an electronic device including the printed circuit board.

従来文献（特許文献１）には、プリント回路板の一例が示されている。このプリント回路板では、半導体パッケージを回路基板に実装するために、金属細線およびシリコーンゴムからなる部材を、半導体パッケージと回路基板との間に配設している。ここで、金属細線およびシリコーンゴムからなる部材は変形するため、半導体パッケージと回路基板との熱膨張係数の相違に起因する接続不良が防止される。   An example of a printed circuit board is shown in a conventional document (Patent Document 1). In this printed circuit board, in order to mount the semiconductor package on the circuit board, a member made of a fine metal wire and silicone rubber is disposed between the semiconductor package and the circuit board. Here, since the member made of the fine metal wire and the silicone rubber is deformed, poor connection due to the difference in the thermal expansion coefficient between the semiconductor package and the circuit board is prevented.

他の従来文献（特許文献２）には、プリント回路板の別の一例が示されている。このプリント回路板では、半導体パッケージを回路基板に実装するために、半導体パッケージの裏面に配列された複数のバンプが、回路基板の表面に配列された複数の導電性パッドに接合される。ここで、半導体パッケージを回路基板に実装する際に、複数の導電性パッドの間にアンダーフィルを塗布することにより、はんだブリッジの形成を防止している。   Another conventional document (Patent Document 2) shows another example of a printed circuit board. In this printed circuit board, in order to mount the semiconductor package on the circuit board, a plurality of bumps arranged on the back surface of the semiconductor package are bonded to a plurality of conductive pads arranged on the surface of the circuit board. Here, when the semiconductor package is mounted on the circuit board, formation of a solder bridge is prevented by applying an underfill between the plurality of conductive pads.

特開平１１−１５０３５１号公報JP-A-11-150351 特開２００５−１８３７１５号公報JP 2005-183715 A

ＢＧＡ（Ball Grid Alley）やＣＳＰ（Chip Size Package）などのバンプを有する半導体パッケージにおいて、半導体パッケージおよび回路基板をアンダーフィル接着剤を用いて接着する場合には、半導体パッケージと回路基板との隙間にアンダーフィル接着剤を充填して硬化させる。ここで、アンダーフィル接着剤は半導体パッケージの外側から流し込んで供給するため、アンダーフィル接着剤は半導体パッケージと回路基板との間の領域からはみ出す。よって、回路基板上の電子部品を搭載するためのスペースは無駄に使われてしまう。   In a semiconductor package having bumps such as BGA (Ball Grid Alley) and CSP (Chip Size Package), when the semiconductor package and the circuit board are bonded using an underfill adhesive, the gap between the semiconductor package and the circuit board is used. Fill with underfill adhesive and cure. Here, since the underfill adhesive is supplied by being poured from the outside of the semiconductor package, the underfill adhesive protrudes from the region between the semiconductor package and the circuit board. Therefore, the space for mounting the electronic components on the circuit board is wasted.

本発明は、上記の課題を解決するためになされたもので、プリント回路板上の電子部品を搭載するためのスペースを効率的に利用することが可能なプリント回路板、電子機器、および半導体パッケージを提供することを目的とする。   The present invention has been made to solve the above-described problems, and a printed circuit board, an electronic apparatus, and a semiconductor package capable of efficiently using a space for mounting an electronic component on the printed circuit board. The purpose is to provide.

上述した目的を達成するために、本発明に係るプリント回路板は、回路基板と、回路基板に対向する対向面と、当該対向面に形成された複数のバンプとを有し、当該複数のバンプを介して回路基板に接続された半導体パッケージと、回路基板と半導体パッケージとの間の領域において半導体パッケージの対向面の少なくとも各隅部近傍に配設され、回路基板と半導体パッケージとを接着する接着部材と、を備えることを特徴とする。   In order to achieve the above-described object, a printed circuit board according to the present invention includes a circuit board, a facing surface facing the circuit board, and a plurality of bumps formed on the facing surface, and the plurality of bumps. A semiconductor package connected to the circuit board via the semiconductor substrate, and an adhesion between the circuit board and the semiconductor package, disposed in the vicinity of at least each corner of the opposing surface of the semiconductor package in the region between the circuit board and the semiconductor package And a member.

また、本発明に係る電子機器は、回路基板と、回路基板に対向する対向面と、当該対向面に形成された複数のバンプとを有し、当該複数のバンプを介して回路基板に接続された半導体パッケージと、回路基板と半導体パッケージとの間の領域において半導体パッケージの対向面の少なくとも各隅部近傍に配設され、回路基板と半導体パッケージとを接着する接着部材と、を備えるプリント回路板を含んで構成されることを特徴とする。   The electronic device according to the present invention includes a circuit board, a facing surface facing the circuit board, and a plurality of bumps formed on the facing surface, and is connected to the circuit board via the plurality of bumps. A printed circuit board comprising: a semiconductor package; and an adhesive member that is disposed in the vicinity of at least each corner of the opposing surface of the semiconductor package in a region between the circuit board and the semiconductor package and bonds the circuit board and the semiconductor package. It is characterized by including.

また、本発明に係る半導体パッケージは、半導体ウェーハを含んで構成されており、複数のバンプが形成された面と、当該面の少なくとも各隅部近傍に配設された接着部材と、を備えることを特徴とする。   The semiconductor package according to the present invention includes a semiconductor wafer, and includes a surface on which a plurality of bumps are formed, and an adhesive member disposed near at least each corner of the surface. It is characterized by.

本発明によれば、プリント回路板上の電子部品を搭載するためのスペースを効率的に利用することが可能なプリント回路板、電子機器、および半導体パッケージを提供することができる。   ADVANTAGE OF THE INVENTION According to this invention, the printed circuit board, electronic device, and semiconductor package which can utilize efficiently the space for mounting the electronic component on a printed circuit board can be provided.

以下、添付図面を参照して、本発明の好適な実施形態について詳細に説明する。なお、説明において、同一要素または同一機能を有する要素には、同一符号を用いることとし、重複する説明は省略する。   Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description, the same reference numerals are used for the same elements or elements having the same function, and redundant description is omitted.

（第１実施形態）
図１および図２を参照して、第１実施形態に係るプリント回路板３について説明する。図１は、半導体パッケージ１０と回路基板２０とを接着するための接着部材３０を示す正面図である。図２は、図１の接着部材３０を一部に含むプリント回路板３を示す断面図である。 (First embodiment)
A printed circuit board 3 according to the first embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a front view showing an adhesive member 30 for adhering the semiconductor package 10 and the circuit board 20. FIG. 2 is a cross-sectional view showing a printed circuit board 3 partially including the adhesive member 30 of FIG.

図１に示されるように、接着部材３０は、矩形形状の枠状の部材であり、紙面垂直方向に一定の厚みを有している。接着部材３０は、矩形形状の四隅において９０度に折れ曲がった形状の４つの頂部（図１にて破線で囲われる範囲）３０ａ，３０ｂ，３０ｃ，３０ｄと、隣り合う頂部３０ａ，３０ｂ，３０ｃ，３０ｄを直線状に繋ぐ４つの辺部３０ｅ，３０ｆ，３０ｇ，３０ｈと、を有している。また、接着部材３０は、矩形形状の外側の外周面３０ｊと、矩形形状の内側の内周面３０ｋとを有している。   As shown in FIG. 1, the adhesive member 30 is a rectangular frame-shaped member, and has a certain thickness in the direction perpendicular to the paper surface. The adhesive member 30 includes four apexes (a range surrounded by a broken line in FIG. 1) 30a, 30b, 30c, 30d, and adjacent apexes 30a, 30b, 30c, 30d. Have four side portions 30e, 30f, 30g, and 30h. The adhesive member 30 has a rectangular outer peripheral surface 30j and a rectangular inner peripheral surface 30k.

接着部材３０は、次に説明する特性を有するゴム系高分子材料で形成されている。第１に、接着部材３０は、回路基板２０と半導体パッケージ１０との間に配置する前に、図１に示される形状に成形可能なゴム系高分子材料で形成されている。第２に、接着部材３０は、回路基板２０と半導体パッケージ１０との間に配置して加熱することで、回路基板２０および半導体パッケージ１０に接着されるゴム系高分子材料で形成されている。このようなゴム系高分子材料は、例えば、シリコーンゴム系高分子材料やウレタンゴム系高分子材料などである。また、このようなゴム系高分子材料のうち、弾性率の比較的に低いものが選択されることが好ましい。   The adhesive member 30 is formed of a rubber-based polymer material having the characteristics described below. First, the adhesive member 30 is formed of a rubber-based polymer material that can be molded into the shape shown in FIG. 1 before being disposed between the circuit board 20 and the semiconductor package 10. Second, the adhesive member 30 is formed of a rubber-based polymer material that is bonded to the circuit board 20 and the semiconductor package 10 by being disposed between the circuit board 20 and the semiconductor package 10 and heating. Such a rubber-based polymer material is, for example, a silicone rubber-based polymer material or a urethane rubber-based polymer material. Moreover, it is preferable to select a rubber-based polymer material having a relatively low elastic modulus.

図２（ａ）は、半導体パッケージ１０と回路基板２０とを接合して構成されるプリント回路板３を板面に垂直な方向から見た断面図であり、図２（ｂ）は、プリント回路板３を板面に平行な方向から見た断面図である。図２（ａ）は図２（ｂ）のａ−ａ断面に相当し、図２（ｂ）は図２（ａ）のｂ−ｂ断面に相当する。   2A is a cross-sectional view of the printed circuit board 3 formed by joining the semiconductor package 10 and the circuit board 20 as seen from a direction perpendicular to the board surface, and FIG. 2B is a printed circuit board. It is sectional drawing which looked at the board 3 from the direction parallel to a board surface. 2A corresponds to the aa cross section of FIG. 2B, and FIG. 2B corresponds to the bb cross section of FIG. 2A.

プリント回路板３は、電子部品を搭載するための回路基板２０と、内部に半導体ウェーハを有する半導体パッケージ１０と、半導体パッケージ１０を回路基板２０に接続するバンプ１２およびランド２２と、半導体パッケージ１０を回路基板２０に接着する接着部材３０と、を備えている。   The printed circuit board 3 includes a circuit board 20 for mounting electronic components, a semiconductor package 10 having a semiconductor wafer therein, bumps 12 and lands 22 for connecting the semiconductor package 10 to the circuit board 20, and the semiconductor package 10. And an adhesive member 30 that adheres to the circuit board 20.

回路基板２０は、電子部品を搭載するために設けられた板状の部材であり、その表層および内層には銅箔により形成された多数の配線が形成されている。回路基板２０は上面２０ａおよび下面２０ｂを有しており、回路基板２０の上面２０ａには、エリアアレイ型の構造をした多数のランド２２が形成されている。また、回路基板２０の上面２０ａには、接着部材３０が接着されて配置されている。   The circuit board 20 is a plate-like member provided for mounting electronic components, and a large number of wirings formed of copper foil are formed on the surface layer and the inner layer. The circuit board 20 has an upper surface 20a and a lower surface 20b. On the upper surface 20a of the circuit board 20, a number of lands 22 having an area array structure are formed. In addition, an adhesive member 30 is bonded to the upper surface 20a of the circuit board 20.

半導体パッケージ１０は、ＢＧＡ（Ball Grid Alley）やＣＳＰ（ChipSize Package）などの半導体ウェーハを内部に有するパッケージである。半導体パッケージ１０は、略矩形の板状の部材であり、回路基板２０と対向して回路基板２０に平行に設けられている。半導体パッケージ１０は上面１０ａおよび下面１０ｂを有しており、半導体パッケージ１０の下面１０ｂは回路基板２０に対向する対向面である。半導体パッケージ１０の下面１０ｂには、エリアアレイ型の構造をした多数のバンプ１２が形成されている。また、半導体パッケージ１０の下面１０ｂには、接着部材３０が接着されて配置されている。   The semiconductor package 10 is a package having a semiconductor wafer such as BGA (Ball Grid Alley) or CSP (ChipSize Package) inside. The semiconductor package 10 is a substantially rectangular plate-like member, and is provided in parallel to the circuit board 20 so as to face the circuit board 20. The semiconductor package 10 has an upper surface 10 a and a lower surface 10 b, and the lower surface 10 b of the semiconductor package 10 is a facing surface that faces the circuit board 20. A large number of bumps 12 having an area array type structure are formed on the lower surface 10 b of the semiconductor package 10. Further, an adhesive member 30 is bonded and disposed on the lower surface 10 b of the semiconductor package 10.

バンプ１２の各々は、はんだや金などを材質とする略球状の部材である。バンプ１２の各々は、上面１２ａおよび下面１２ｂを有している。各バンプ１２の上面１２ａは半導体パッケージ１０に接合されており、各バンプ１２の下面１２ｂはランド２２に接合されている。ランド２２の各々は、回路基板２０の表層に形成された配線と同様に、銅箔により形成されている。ランド２２の各々は、上面２２ａおよび下面２２ｂを有している。各ランド２２の上面２２ａはバンプ１２に接合されており、各ランド２２の下面２２ｂは回路基板２０に接合されている。   Each of the bumps 12 is a substantially spherical member made of solder or gold. Each of the bumps 12 has an upper surface 12a and a lower surface 12b. The upper surface 12 a of each bump 12 is bonded to the semiconductor package 10, and the lower surface 12 b of each bump 12 is bonded to the land 22. Each of the lands 22 is formed of a copper foil similarly to the wiring formed on the surface layer of the circuit board 20. Each land 22 has an upper surface 22a and a lower surface 22b. The upper surface 22 a of each land 22 is bonded to the bump 12, and the lower surface 22 b of each land 22 is bonded to the circuit board 20.

既述のとおり、バンプ１２およびランド２２は、エリアアレイ型の構造をしている。より詳しく説明すると、多数のバンプ１２が、半導体パッケージ１０の下面１０ｂにおいて一定間隔をあけて２次元的に配列されている。また、バンプ１２と同数のランド２２が、回路基板２０の上面２０ａにおいて一定間隔をあけて２次元的に配列されている。そして、各対となるバンプ１２およびランド２２が互いに接合されることにより、半導体パッケージ１０と回路基板２０とが機械的に接合される。この結果、半導体パッケージ１０と回路基板２０とが電気的に接続される。なお、本実施形態では、バンプ１２およびランド２２は８×８のエリアアレイ型構造であるが、バンプ１２およびランド２２の個数はそれよりも多くてもよいし、それよりも少なくてもよい。   As described above, the bump 12 and the land 22 have an area array type structure. More specifically, a large number of bumps 12 are two-dimensionally arranged at regular intervals on the lower surface 10b of the semiconductor package 10. Further, the same number of lands 22 as the bumps 12 are two-dimensionally arranged on the upper surface 20a of the circuit board 20 with a predetermined interval. The semiconductor package 10 and the circuit board 20 are mechanically bonded to each other by bonding the bumps 12 and the lands 22 that are paired with each other. As a result, the semiconductor package 10 and the circuit board 20 are electrically connected. In the present embodiment, the bumps 12 and the lands 22 have an 8 × 8 area array structure, but the number of the bumps 12 and the lands 22 may be larger or smaller.

接着部材３０は、半導体パッケージ１０および回路基板２０に接着されて、半導体パッケージ１０および回路基板２０の接合を補強する。接着部材３０はゴム素材で形成されているため、プリント回路板３に衝撃や振動が作用した際には、その衝撃や振動を吸収して緩和する。接着部材３０は、半導体パッケージ１０および回路基板２０により挟まれた領域において、半導体パッケージ１０の外縁１０ｊに沿って配設されている。接着部材３０の外周面３０ｊは半導体パッケージ１０の外縁１０ｊよりも若干内側方向（半導体パッケージ１０の中心方向）に退避しており、接着部材３０は半導体パッケージ１０からはみ出していない。なお、接着部材３０の内周面３０ｋは、バンプ１２およびランド２２に沿って配設されており、バンプ１２およびランド２２に対向している。   The bonding member 30 is bonded to the semiconductor package 10 and the circuit board 20 to reinforce the bonding between the semiconductor package 10 and the circuit board 20. Since the adhesive member 30 is formed of a rubber material, when an impact or vibration is applied to the printed circuit board 3, the adhesive member 30 absorbs and relaxes the impact or vibration. The adhesive member 30 is disposed along the outer edge 10 j of the semiconductor package 10 in a region sandwiched between the semiconductor package 10 and the circuit board 20. The outer peripheral surface 30j of the adhesive member 30 is retracted slightly inwardly of the outer edge 10j of the semiconductor package 10 (the central direction of the semiconductor package 10), and the adhesive member 30 does not protrude from the semiconductor package 10. The inner peripheral surface 30k of the adhesive member 30 is disposed along the bump 12 and the land 22 and faces the bump 12 and the land 22.

本実施形態のプリント回路板３では、半導体パッケージ１０からはみ出さないように接着部材３０が配設されているため、接着部材３０を用いて半導体パッケージ１０と回路基板２０との接合を補強することができると共に、プリント回路板３上の電子部品を搭載するためのスペースを効率的に利用することができる。すなわち、接着部材３０が半導体パッケージ１０からはみ出さないため、半導体パッケージ１０に近接した位置に他の電子部品や配線などを配設して、プリント回路板３における電子部品の実装密度を向上することができる。   In the printed circuit board 3 of the present embodiment, since the adhesive member 30 is disposed so as not to protrude from the semiconductor package 10, the bonding between the semiconductor package 10 and the circuit board 20 is reinforced using the adhesive member 30. In addition, the space for mounting the electronic components on the printed circuit board 3 can be used efficiently. That is, since the adhesive member 30 does not protrude from the semiconductor package 10, other electronic components, wirings, and the like are disposed in the vicinity of the semiconductor package 10 to improve the mounting density of the electronic components on the printed circuit board 3. Can do.

また、本実施形態のプリント回路板３では、接着部材３０は矩形の枠状に形成されており、比較的に簡易な形状であるため製造に適している。但し、本実施形態では接着部材３０は矩形の枠状であったが、他の実施形態では接着部材３０は少なくとも４つの頂部（図１にて破線で囲われる範囲）３０ａ，３０ｂ，３０ｃ，３０ｄの位置に配置されればよい。接着部材３０が少なくとも４つの頂部３０ａ，３０ｂ，３０ｃ，３０ｄの位置に配置されることにより、半導体パッケージ１０と回路基板２０との機械的な接合を十分に補強することができる。   Further, in the printed circuit board 3 of the present embodiment, the adhesive member 30 is formed in a rectangular frame shape and has a relatively simple shape, which is suitable for manufacturing. However, in the present embodiment, the adhesive member 30 has a rectangular frame shape, but in other embodiments, the adhesive member 30 has at least four apexes (a range surrounded by a broken line in FIG. 1) 30a, 30b, 30c, 30d. It suffices if it is arranged at the position. By disposing the adhesive member 30 at the position of at least four top portions 30a, 30b, 30c, and 30d, the mechanical bonding between the semiconductor package 10 and the circuit board 20 can be sufficiently reinforced.

また、本実施形態のプリント回路板３では、半導体パッケージ１０と接着部材３０との接着、回路基板２０と接着部材３０との接着は、各界面にて比較的に剥がしやすいため、半導体パッケージ１０の交換が必要となった場合には、半導体パッケージ１０の交換作業を容易に行うことができる。   In the printed circuit board 3 of the present embodiment, the adhesion between the semiconductor package 10 and the adhesive member 30 and the adhesion between the circuit board 20 and the adhesive member 30 are relatively easy to peel off at each interface. When replacement is required, the semiconductor package 10 can be easily replaced.

（第２実施形態）
図３および図４を参照して、第２実施形態に係るプリント回路板４について説明する。図３は、半導体パッケージ１０と回路基板２０とを接着するための接着部材４０を示す正面図である。図４は、図３の接着部材４０を一部に含むプリント回路板４を示す断面図である。図４（ａ）は、半導体パッケージ１０と回路基板２０とを接合して構成されるプリント回路板４を板面に垂直な方向から見た断面図であり、図４（ｂ）は、プリント回路板４を板面に平行な方向から見た断面図である。図４（ａ）は図４（ｂ）のａ−ａ断面に相当し、図４（ｂ）は図４（ａ）のｂ−ｂ断面に相当する。 (Second Embodiment)
The printed circuit board 4 according to the second embodiment will be described with reference to FIGS. 3 and 4. FIG. 3 is a front view showing an adhesive member 40 for bonding the semiconductor package 10 and the circuit board 20. 4 is a cross-sectional view showing the printed circuit board 4 partially including the adhesive member 40 of FIG. 4A is a cross-sectional view of the printed circuit board 4 configured by joining the semiconductor package 10 and the circuit board 20 as viewed from a direction perpendicular to the board surface, and FIG. 4B is a printed circuit board. It is sectional drawing which looked at the board 4 from the direction parallel to a board surface. 4A corresponds to the aa cross section of FIG. 4B, and FIG. 4B corresponds to the bb cross section of FIG. 4A.

第２実施形態では、接着部材４０に用いる材料は第１実施形態と同じであるが、接着部材４０の形状が第１実施形態と異なっている。第２実施形態では、接着部材４０は４つの構成片４０Ａ，４０Ｂ，４０Ｃ，４０Ｄからなる。接着部材４０の各構成片４０Ａ，４０Ｂ，４０Ｃ，４０Ｄの各々は、小さな矩形の枠状であり、紙面垂直方向に一定の厚みを有している。第２実施形態においても、第１実施形態と同様に、接着部材４０は４つの頂部の位置を含んで構成されている。   In the second embodiment, the material used for the adhesive member 40 is the same as that of the first embodiment, but the shape of the adhesive member 40 is different from that of the first embodiment. In the second embodiment, the adhesive member 40 includes four component pieces 40A, 40B, 40C, and 40D. Each of the component pieces 40A, 40B, 40C, and 40D of the adhesive member 40 has a small rectangular frame shape, and has a certain thickness in the direction perpendicular to the paper surface. Also in the second embodiment, as in the first embodiment, the adhesive member 40 includes four top positions.

接着部材４０の各構成片４０Ａ，４０Ｂ，４０Ｃ，４０Ｄは、半導体パッケージ１０および回路基板２０により挟まれた領域において、半導体パッケージ１０の四隅近傍に配設されている。接着部材４０の各構成片４０Ａ，４０Ｂ，４０Ｃ，４０Ｄは、半導体パッケージ１０の四隅近傍の１対のバンプ１２およびランド２２を囲むように配設されている。接着部材４０の外周面４０ｊは半導体パッケージ１０の外縁１０ｊよりも内側にあり、接着部材４０が半導体パッケージ１０からはみ出さないようになっている。   Each component piece 40A, 40B, 40C, 40D of the adhesive member 40 is disposed in the vicinity of the four corners of the semiconductor package 10 in a region sandwiched between the semiconductor package 10 and the circuit board 20. Each component piece 40A, 40B, 40C, 40D of the adhesive member 40 is disposed so as to surround a pair of bumps 12 and lands 22 in the vicinity of the four corners of the semiconductor package 10. The outer peripheral surface 40j of the adhesive member 40 is inside the outer edge 10j of the semiconductor package 10 so that the adhesive member 40 does not protrude from the semiconductor package 10.

本実施形態のプリント回路板４では、半導体パッケージ１０からはみ出さないように接着部材４０が配設されているため、半導体パッケージ１０と回路基板２０との接合を補強することができると共に、プリント回路板４上の電子部品を搭載するためのスペースを効率的に利用することができる。なお、本実施形態では、接着部材４０の４つの構成片４０Ａ，４０Ｂ，４０Ｃ，４０Ｄは半導体パッケージ１０の四隅に配設されているため、接着面積の小さな接着部材４０で効果的に半導体パッケージ１０と回路基板２０との接合を補強している。   In the printed circuit board 4 of the present embodiment, since the adhesive member 40 is disposed so as not to protrude from the semiconductor package 10, the bonding between the semiconductor package 10 and the circuit board 20 can be reinforced, and the printed circuit The space for mounting the electronic components on the plate 4 can be used efficiently. In this embodiment, since the four component pieces 40A, 40B, 40C, and 40D of the adhesive member 40 are disposed at the four corners of the semiconductor package 10, the semiconductor package 10 can be effectively used with the adhesive member 40 having a small adhesion area. And the circuit board 20 are reinforced.

（第３実施形態）
図５および図６を参照して、第３実施形態に係るプリント回路板５について説明する。図５は、半導体パッケージ１０と回路基板２０とを接着するための接着部材５０を示す正面図である。図６は、図５の接着部材５０を一部に含むプリント回路板５を示す断面図である。図６（ａ）は、半導体パッケージ１０と回路基板２０とを接合して構成されるプリント回路板５を板面に垂直な方向から見た断面図であり、図６（ｂ）は、プリント回路板５を板面に平行な方向から見た断面図を示している。図６（ａ）は図６（ｂ）のａ−ａ断面に相当し、図６（ｂ）は図６（ａ）のｂ−ｂ断面に相当する。 (Third embodiment)
A printed circuit board 5 according to the third embodiment will be described with reference to FIGS. 5 and 6. FIG. 5 is a front view showing an adhesive member 50 for adhering the semiconductor package 10 and the circuit board 20. FIG. 6 is a cross-sectional view showing the printed circuit board 5 partially including the adhesive member 50 of FIG. 6A is a cross-sectional view of the printed circuit board 5 formed by joining the semiconductor package 10 and the circuit board 20 as seen from a direction perpendicular to the board surface, and FIG. 6B is a printed circuit board. Sectional drawing which looked at the board 5 from the direction parallel to a board surface is shown. 6A corresponds to the aa cross section of FIG. 6B, and FIG. 6B corresponds to the bb cross section of FIG. 6A.

第３実施形態では、接着部材５０に用いる材料は第１，第２実施形態と同じであるが、接着部材５０の形状が第１，第２実施形態と異なっている。第３実施形態では、接着部材５０は４つの構成片５０Ａ，５０Ｂ，５０Ｃ，５０Ｄからなる。接着部材５０の各構成片５０Ａ，５０Ｂ，５０Ｃ，５０Ｄの各々は、矩形の枠部５０ａの内部に縦横に１本ずつ仕切り部５０ｂ，５０ｃが設けられた形状であり、紙面垂直方向に一定の厚みを有している。第３実施形態においても、第１，第２実施形態と同様に、接着部材５０は４つの頂部の位置を含んで構成されている。   In the third embodiment, the material used for the adhesive member 50 is the same as that of the first and second embodiments, but the shape of the adhesive member 50 is different from that of the first and second embodiments. In the third embodiment, the adhesive member 50 includes four component pieces 50A, 50B, 50C, and 50D. Each of the component pieces 50A, 50B, 50C, and 50D of the adhesive member 50 has a shape in which the partition portions 50b and 50c are provided in the rectangular frame portion 50a one by one in the vertical and horizontal directions. It has a thickness. Also in the third embodiment, as in the first and second embodiments, the adhesive member 50 is configured to include four top positions.

接着部材５０の各構成片５０Ａ，５０Ｂ，５０Ｃ，５０Ｄは、半導体パッケージ１０および回路基板２０により挟まれた領域において、半導体パッケージ１０の四隅近傍に配設されている。接着部材５０の各構成片５０Ａ，５０Ｂ，５０Ｃ，５０Ｄは、半導体パッケージ１０の四隅近傍の４対のバンプ１２およびランド２２を囲むように配設されている。接着部材５０の外周面５０ｊは半導体パッケージ１０の外縁１０ｊよりも内側にあり、接着部材５０が半導体パッケージ１０からはみ出さないようになっている。   Each component piece 50A, 50B, 50C, 50D of the adhesive member 50 is disposed in the vicinity of the four corners of the semiconductor package 10 in a region sandwiched between the semiconductor package 10 and the circuit board 20. Each component piece 50A, 50B, 50C, 50D of the adhesive member 50 is disposed so as to surround the four pairs of bumps 12 and lands 22 in the vicinity of the four corners of the semiconductor package 10. The outer peripheral surface 50j of the adhesive member 50 is inside the outer edge 10j of the semiconductor package 10 so that the adhesive member 50 does not protrude from the semiconductor package 10.

本実施形態のプリント回路板５では、半導体パッケージ１０からはみ出さないように接着部材５０が配設されているため、半導体パッケージ１０と回路基板２０との接合を補強することができると共に、プリント回路板５上の電子部品を搭載するためのスペースを効率的に利用することができる。なお、本実施形態では、接着部材５０の４つの構成片５０Ａ，５０Ｂ，５０Ｃ，５０Ｄは半導体パッケージ１０の四隅に配設されているため、接着面積の小さな接着部材５０で効果的に半導体パッケージ１０と回路基板２０との接合を補強している。また、本実施形態では、第１実施形態よりも接着面積が広いため、半導体パッケージ１０と回路基板２０との接合は第１実施形態よりも安定したものとなっている。   In the printed circuit board 5 of the present embodiment, since the adhesive member 50 is disposed so as not to protrude from the semiconductor package 10, the bonding between the semiconductor package 10 and the circuit board 20 can be reinforced, and the printed circuit The space for mounting the electronic components on the plate 5 can be used efficiently. In the present embodiment, since the four component pieces 50A, 50B, 50C, 50D of the adhesive member 50 are disposed at the four corners of the semiconductor package 10, the semiconductor package 10 can be effectively used with the adhesive member 50 having a small adhesion area. And the circuit board 20 are reinforced. In this embodiment, since the bonding area is larger than that in the first embodiment, the bonding between the semiconductor package 10 and the circuit board 20 is more stable than in the first embodiment.

なお、第３実施形態では、接着部材５０の４つの構成片５０Ａ，５０Ｂ，５０Ｃ，５０Ｄは、半導体パッケージ１０の四隅近傍の４対のバンプ１２およびランド２２を囲むように配設された。但し、他の実施形態では、接着部材５０の４つの構成片５０Ａ，５０Ｂ，５０Ｃ，５０Ｄは、半導体パッケージ１０の四隅近傍において２対、３対または５対以上のバンプ１２およびランド２２を囲むように配設されてもよい。   In the third embodiment, the four component pieces 50 </ b> A, 50 </ b> B, 50 </ b> C, and 50 </ b> D of the adhesive member 50 are arranged so as to surround the four pairs of bumps 12 and lands 22 near the four corners of the semiconductor package 10. However, in other embodiments, the four component pieces 50 </ b> A, 50 </ b> B, 50 </ b> C, 50 </ b> D of the adhesive member 50 surround two, three, or five or more bumps 12 and lands 22 in the vicinity of the four corners of the semiconductor package 10. It may be arranged.

（第４実施形態）
図７および図８を参照して、第４実施形態に係るプリント回路板６について説明する。図７は、半導体パッケージ１０と回路基板２０とを接着するための接着部材６０を示す正面図である。図８は、図７の接着部材６０を一部に含むプリント回路板６を示す断面図である。図８（ａ）は、半導体パッケージ１０と回路基板２０とを接合して構成されるプリント回路板６を板面に垂直な方向から見た断面図であり、図８（ｂ）は、プリント回路板６を板面に平行な方向から見た断面図である。図８（ａ）は図８（ｂ）のａ−ａ断面に相当し、図８（ｂ）は図８（ａ）のｂ−ｂ断面に相当する。 (Fourth embodiment)
With reference to FIG. 7 and FIG. 8, the printed circuit board 6 which concerns on 4th Embodiment is demonstrated. FIG. 7 is a front view showing an adhesive member 60 for adhering the semiconductor package 10 and the circuit board 20. FIG. 8 is a cross-sectional view showing the printed circuit board 6 that partially includes the adhesive member 60 of FIG. FIG. 8A is a cross-sectional view of a printed circuit board 6 configured by joining the semiconductor package 10 and the circuit board 20 as viewed from a direction perpendicular to the board surface, and FIG. 8B is a printed circuit board. It is sectional drawing which looked at the board 6 from the direction parallel to a board surface. 8A corresponds to the aa cross section of FIG. 8B, and FIG. 8B corresponds to the bb cross section of FIG. 8A.

第４実施形態では、接着部材６０に用いる材料は第１〜第３実施形態と同じであるが、接着部材６０の形状が第１〜第３実施形態と異なっている。第４実施形態では、接着部材６０は、矩形の枠部６０ａの内部に縦横に複数本ずつ仕切り部６０ｂ，６０ｃが設けられた格子状であり、紙面垂直方向に一定の厚みを有している。第４実施形態においても、第１〜第３実施形態と同様に、接着部材６０は４つの頂部の位置を含んで構成されている。   In the fourth embodiment, the material used for the adhesive member 60 is the same as that in the first to third embodiments, but the shape of the adhesive member 60 is different from that in the first to third embodiments. In the fourth embodiment, the adhesive member 60 has a lattice shape in which a plurality of partition portions 60b and 60c are provided vertically and horizontally inside a rectangular frame portion 60a, and has a constant thickness in the direction perpendicular to the paper surface. . Also in 4th Embodiment, the adhesive member 60 is comprised including the position of four top parts similarly to the 1st-3rd embodiment.

接着部材６０は、半導体パッケージ１０および回路基板２０により挟まれた領域において、半導体パッケージ１０のほぼ全域に配設されている。接着部材６０は、半導体パッケージ１０の全域においての全てのバンプ１２およびランド２２を囲むように配設されている。接着部材６０の外周面６０ｊは半導体パッケージ１０の外縁１０ｊよりも内側にあり、接着部材６０が半導体パッケージ１０からはみ出さないようになっている。   The adhesive member 60 is disposed over almost the entire area of the semiconductor package 10 in a region sandwiched between the semiconductor package 10 and the circuit board 20. The adhesive member 60 is disposed so as to surround all the bumps 12 and lands 22 in the entire area of the semiconductor package 10. The outer peripheral surface 60j of the adhesive member 60 is inside the outer edge 10j of the semiconductor package 10 so that the adhesive member 60 does not protrude from the semiconductor package 10.

本実施形態のプリント回路板６では、半導体パッケージ１０からはみ出さないように接着部材６０が配設されているため、半導体パッケージ１０と回路基板２０との接合を補強することができると共に、プリント回路板６上の電子部品を搭載するためのスペースを効率的に利用することができる。なお、本実施形態では、接着部材６０が半導体パッケージ１０のほぼ全域に配設されているため、接着部材６０の接着面積が大きく、半導体パッケージ１０と回路基板２０との接合が大幅に補強されている。   In the printed circuit board 6 of the present embodiment, since the adhesive member 60 is disposed so as not to protrude from the semiconductor package 10, the bonding between the semiconductor package 10 and the circuit board 20 can be reinforced, and the printed circuit The space for mounting the electronic components on the plate 6 can be used efficiently. In the present embodiment, since the adhesive member 60 is disposed in almost the entire area of the semiconductor package 10, the adhesive area of the adhesive member 60 is large, and the bonding between the semiconductor package 10 and the circuit board 20 is greatly reinforced. Yes.

図９を参照して、第１〜第４実施形態のプリント回路板３，４，５，６の製造工程について説明する。図９では、第１実施形態のプリント回路板３の製造工程を代表として示している。   With reference to FIG. 9, the manufacturing process of the printed circuit boards 3, 4, 5, and 6 of 1st-4th embodiment is demonstrated. In FIG. 9, the manufacturing process of the printed circuit board 3 of the first embodiment is shown as a representative.

図９（ａ）に示されるように、第１工程において、バンプ１２付きの半導体パッケージ１０および接着部材３０を用意する。ここで、接着部材３０は、図１、図３、図５または図７の形状に予め成形されている。そして、バンプ１２付きの半導体パッケージ１０に接着部材３０を接着する。ここで、半導体パッケージ１０に接着部材３０を接着するためには、半導体パッケージ１０と接着部材３０とを接触させてから接触部分を加熱すればよい。この結果、半導体パッケージ１０と接着部材３０とが互いに接着され、半導体パッケージ１０および接着部材３０からなるサブアッセンブリー８が形成される。   As shown in FIG. 9A, in the first step, the semiconductor package 10 with the bumps 12 and the adhesive member 30 are prepared. Here, the adhesive member 30 is pre-formed into the shape of FIG. 1, FIG. 3, FIG. 5 or FIG. Then, the adhesive member 30 is bonded to the semiconductor package 10 with the bumps 12. Here, in order to bond the adhesive member 30 to the semiconductor package 10, the contact portion may be heated after the semiconductor package 10 and the adhesive member 30 are brought into contact with each other. As a result, the semiconductor package 10 and the adhesive member 30 are bonded to each other, and the subassembly 8 including the semiconductor package 10 and the adhesive member 30 is formed.

図９（ｂ）に示されるように、第２工程において、回路基板２０にサブアッセンブリー８を接合する。ここで、回路基板２０に接着部材３０を接着するためには、回路基板２０と接着部材３０とを接触させてから接触部分を加熱すればよい。なお、バンプ１２とランド２２を接合するためのリフロー工程を経ることで、回路基板２０と接着部材３０との接触部分を加熱して、回路基板２０に接着部材３０を接着してもよい。この結果、図９（ｃ）に示されるように、プリント回路板３が完成する。   As shown in FIG. 9B, the subassembly 8 is joined to the circuit board 20 in the second step. Here, in order to bond the adhesive member 30 to the circuit board 20, the contact portion may be heated after the circuit board 20 and the adhesive member 30 are brought into contact with each other. Note that the contact member between the circuit board 20 and the adhesive member 30 may be heated to bond the adhesive member 30 to the circuit board 20 through a reflow process for bonding the bumps 12 and the lands 22. As a result, as shown in FIG. 9C, the printed circuit board 3 is completed.

上述したプリント回路板３の製造方法によれば、プリント回路板３を図１、図３、図５または図７の形状に予め成形されているため、接着部材３０を半導体パッケージ１０と回路基板２０との間に配置する際に、アンダーフィル接着剤の供給装置のような特殊な製造装置を必要とすることがない。よって、本実施形態の接着部材３０を用いることにより、プリント回路板３の製造工程を簡略化し、製造コストを低減することができる。   According to the method of manufacturing the printed circuit board 3 described above, since the printed circuit board 3 is pre-shaped in the shape of FIG. 1, FIG. 3, FIG. 5, or FIG. Therefore, a special manufacturing device such as an underfill adhesive supply device is not required. Therefore, by using the adhesive member 30 of this embodiment, the manufacturing process of the printed circuit board 3 can be simplified and the manufacturing cost can be reduced.

また、上述したプリント回路板３の製造方法によれば、接着部材３０がゴム系高分子材料で形成されているため、リフロー工程のみで接着部材３０を回路基板２０に確実に接着することができる。なお、接着部材３０をエポキシ樹脂やアクリル樹脂などの樹脂素材で形成した場合には、これらの樹脂素材はリフロー工程のみでは十分に硬化しないため、アフターキュア工程が必要となってしまう。一方、本実施形態のようにゴム系高分子材料の接着部材３０を用いた場合には、アフターキュア工程を必要とせず、製造工程を簡略化することができる。   Moreover, according to the manufacturing method of the printed circuit board 3 mentioned above, since the adhesive member 30 is formed with the rubber-type polymer material, the adhesive member 30 can be reliably adhere | attached on the circuit board 20 only by a reflow process. . In addition, when the adhesive member 30 is formed of a resin material such as an epoxy resin or an acrylic resin, these resin materials are not sufficiently cured only by the reflow process, and thus an after cure process is required. On the other hand, when the rubber-based polymer material adhesive member 30 is used as in the present embodiment, an after-curing process is not required, and the manufacturing process can be simplified.

また、本実施形態では、接着部材３０は図１、図３、図５または図７の所定形状に予め成形されている。エポキシ樹脂やアクリル樹脂などのアンダーフィル接着剤を用いた場合には、液状のアンダーフィル接着剤を半導体パッケージ１０と回路基板２０との間に流し込むため、液状のアンダーフィル接着剤が回路基板２０に形成されたスルーホールや部品穴に入ってしまうおそれがある。本実施形態では、接着部材３０は所定の形状に予め成形されているため、回路基板２０に形成されたスルーホールや部品穴に入ってしまうことを未然に防止することができる。   In the present embodiment, the adhesive member 30 is preliminarily molded into the predetermined shape shown in FIG. 1, FIG. 3, FIG. 5, or FIG. When an underfill adhesive such as an epoxy resin or an acrylic resin is used, the liquid underfill adhesive is poured between the semiconductor package 10 and the circuit board 20, so that the liquid underfill adhesive is applied to the circuit board 20. There is a risk of entering the formed through hole or component hole. In the present embodiment, since the adhesive member 30 is preliminarily formed into a predetermined shape, it can be prevented in advance that the adhesive member 30 enters a through hole or a component hole formed in the circuit board 20.

なお、第１〜第４実施形態のプリント回路板３，４，５，６は、電子機器の内部に配置されて用いられる。このような電子機器としては、例えば、デスクトップ型パーソナルコンピュータ、ノートブック型パーソナルコンピュータ、その他のプリント回路板を具備する電子機器である。電子機器の一例であるノートブック型パーソナルコンピュータ１を図１０に示す。   The printed circuit boards 3, 4, 5, and 6 of the first to fourth embodiments are used by being arranged inside an electronic device. Examples of such an electronic device include a desktop personal computer, a notebook personal computer, and other electronic devices including a printed circuit board. A notebook personal computer 1 which is an example of an electronic apparatus is shown in FIG.

第１実施形態に係る接着部材を示す正面図である。It is a front view which shows the adhesive member which concerns on 1st Embodiment. 第１実施形態に係るプリント回路板を示す断面図である。It is sectional drawing which shows the printed circuit board which concerns on 1st Embodiment. 第２実施形態に係る接着部材を示す正面図である。It is a front view which shows the adhesive member which concerns on 2nd Embodiment. 第２実施形態に係るプリント回路板を示す断面図である。It is sectional drawing which shows the printed circuit board which concerns on 2nd Embodiment. 第３実施形態に係る接着部材を示す正面図である。It is a front view which shows the adhesive member which concerns on 3rd Embodiment. 第３実施形態に係るプリント回路板を示す断面図である。It is sectional drawing which shows the printed circuit board which concerns on 3rd Embodiment. 第４実施形態に係る接着部材を示す正面図である。It is a front view which shows the adhesive member which concerns on 4th Embodiment. 第４実施形態に係るプリント回路板を示す断面図である。It is sectional drawing which shows the printed circuit board which concerns on 4th Embodiment. 第１〜第４実施形態のプリント回路板の製造工程を示す側面図である。It is a side view which shows the manufacturing process of the printed circuit board of 1st-4th embodiment. プリント回路板を備えるノートブック型パーソナルコンピュータを示す斜視図である。It is a perspective view which shows a notebook type personal computer provided with a printed circuit board.

符号の説明Explanation of symbols

１…ノートブック型パーソナルコンピュータ（電子機器）、３，４，５，６…プリント回路板、８，１０…半導体パッケージ、１２…バンプ、２０…回路基板、２２…ランド、３０，４０，５０，６０…接着部材。   DESCRIPTION OF SYMBOLS 1 ... Notebook-type personal computer (electronic device) 3, 4, 5, 6 ... Printed circuit board, 8, 10 ... Semiconductor package, 12 ... Bump, 20 ... Circuit board, 22 ... Land, 30, 40, 50, 60: Adhesive member.

Claims (11)

回路基板と、
前記回路基板に対向する対向面と、当該対向面に形成された複数のバンプとを有し、当該複数のバンプを介して前記回路基板に接続された半導体パッケージと、
前記回路基板と前記半導体パッケージとの間の領域において前記半導体パッケージの対向面の少なくとも各隅部近傍に配設され、前記回路基板と前記半導体パッケージとを接着する接着部材と、
を備えることを特徴とするプリント回路板。 A circuit board;
A semiconductor package having a facing surface facing the circuit board and a plurality of bumps formed on the facing surface, the semiconductor package being connected to the circuit board via the plurality of bumps;
An adhesive member that is disposed in the vicinity of at least each corner of the facing surface of the semiconductor package in a region between the circuit board and the semiconductor package, and bonds the circuit board and the semiconductor package;
A printed circuit board comprising: 前記接着部材は、前記回路基板と前記半導体パッケージとの間に配置する前に所定の形状に成形可能であり、前記回路基板および前記半導体パッケージに接触させて加熱することで前記回路基板および前記半導体パッケージに接着されるゴム系材料を用いて形成されていることを特徴とする請求項１に記載のプリント回路板。   The adhesive member can be molded into a predetermined shape before being disposed between the circuit board and the semiconductor package, and is heated by being brought into contact with the circuit board and the semiconductor package. The printed circuit board according to claim 1, wherein the printed circuit board is formed using a rubber-based material bonded to a package. 前記接着部材は、シリコーンゴム系高分子材料またはウレタンゴム系高分子材料を用いて形成されていることを特徴とする請求項２に記載のプリント回路板。   The printed circuit board according to claim 2, wherein the adhesive member is formed using a silicone rubber-based polymer material or a urethane rubber-based polymer material. 前記接着部材は、前記半導体パッケージの対向面の外縁に沿って配設されていることを特徴とする請求項１〜３のいずれか１項に記載のプリント回路板。   The printed circuit board according to claim 1, wherein the adhesive member is disposed along an outer edge of an opposing surface of the semiconductor package. 前記接着部材は、前記半導体パッケージの対向面の各隅部近傍に形成された１つのバンプを囲うように配設されていることを特徴とする請求項１〜３のいずれか１項に記載のプリント回路板。   The said adhesive member is arrange | positioned so that one bump formed in each corner part vicinity of the opposing surface of the said semiconductor package may be enclosed, The any one of Claims 1-3 characterized by the above-mentioned. Printed circuit board. 前記接着部材は、前記半導体パッケージの対向面の各隅部近傍に形成された複数のバンプを囲うように配設されていることを特徴とする請求項１〜３のいずれか１項に記載のプリント回路板。   The said adhesive member is arrange | positioned so that the several bump formed in each corner part vicinity of the opposing surface of the said semiconductor package may be enclosed, The any one of Claims 1-3 characterized by the above-mentioned. Printed circuit board. 前記接着部材は、前記半導体パッケージの対向面の全域に格子状に配設されていることを特徴とする請求項１に記載のプリント回路板。   The printed circuit board according to claim 1, wherein the adhesive member is disposed in a lattice pattern over the entire area of the opposing surface of the semiconductor package. 前記半導体パッケージは、チップサイズパッケージであることを特徴とする請求項１〜３のいずれか１項に記載のプリント回路板。   The printed circuit board according to claim 1, wherein the semiconductor package is a chip size package. 前記半導体パッケージに形成された複数のバンプは、ボールグリッドアレイであることを特徴とする請求項１〜３のいずれか１項に記載のプリント回路板。   The printed circuit board according to claim 1, wherein the plurality of bumps formed on the semiconductor package is a ball grid array. 回路基板と、
前記回路基板に対向する対向面と、当該対向面に形成された複数のバンプとを有し、当該複数のバンプを介して前記回路基板に接続された半導体パッケージと、
前記回路基板と前記半導体パッケージとの間の領域において前記半導体パッケージの対向面の少なくとも各隅部近傍に配設され、前記回路基板と前記半導体パッケージとを接着する接着部材と、
を備えるプリント回路板を含んで構成されることを特徴とする電子機器。 A circuit board;
A semiconductor package having a facing surface facing the circuit board and a plurality of bumps formed on the facing surface, the semiconductor package being connected to the circuit board via the plurality of bumps;
An adhesive member that is disposed in the vicinity of at least each corner of the facing surface of the semiconductor package in a region between the circuit board and the semiconductor package, and bonds the circuit board and the semiconductor package;
An electronic apparatus comprising a printed circuit board comprising: 半導体ウェーハを含んで構成されており、複数のバンプが形成された面と、当該面の少なくとも各隅部近傍に配設された接着部材と、を備えることを特徴とする半導体パッケージ。   A semiconductor package comprising a semiconductor wafer, comprising: a surface on which a plurality of bumps are formed; and an adhesive member disposed in the vicinity of at least each corner of the surface.
JP2007161680A 2007-06-19 2007-06-19 Printed circuit board, electronic apparatus, and semiconductor package Pending JP2009004447A (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011119731A (en) * 2009-11-30 2011-06-16 Numonyx Bv Package including underfill material in portion of area between package and substrate or another package
WO2011158468A1 (en) * 2010-06-14 2011-12-22 パナソニック株式会社 Semiconductor device and manufacturing method therefor
JP2012040495A (en) * 2010-08-19 2012-03-01 Panasonic Corp Paste application method
CN103000599A (en) * 2011-09-15 2013-03-27 南茂科技股份有限公司 Flip chip package structure and method for forming the same
JP2015177007A (en) * 2014-03-14 2015-10-05 株式会社東芝 Semiconductor device and method of manufacturing the same
CN111341753A (en) * 2020-02-26 2020-06-26 通富微电子股份有限公司 Embedded type packaging device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011119731A (en) * 2009-11-30 2011-06-16 Numonyx Bv Package including underfill material in portion of area between package and substrate or another package
US9374902B2 (en) 2009-11-30 2016-06-21 Micron Technology, Inc. Package including an underfill material in a portion of an area between the package and a substrate or another package
WO2011158468A1 (en) * 2010-06-14 2011-12-22 パナソニック株式会社 Semiconductor device and manufacturing method therefor
JP2012040495A (en) * 2010-08-19 2012-03-01 Panasonic Corp Paste application method
CN103000599A (en) * 2011-09-15 2013-03-27 南茂科技股份有限公司 Flip chip package structure and method for forming the same
JP2015177007A (en) * 2014-03-14 2015-10-05 株式会社東芝 Semiconductor device and method of manufacturing the same
CN111341753A (en) * 2020-02-26 2020-06-26 通富微电子股份有限公司 Embedded type packaging device

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