JP2008082952A - Semiconductor strain sensor - Google Patents

Semiconductor strain sensor Download PDF

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JP2008082952A
JP2008082952A JP2006265079A JP2006265079A JP2008082952A JP 2008082952 A JP2008082952 A JP 2008082952A JP 2006265079 A JP2006265079 A JP 2006265079A JP 2006265079 A JP2006265079 A JP 2006265079A JP 2008082952 A JP2008082952 A JP 2008082952A
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electrode
piezoresistor
outer frame
semiconductor strain
semiconductor substrate
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Eiji Yoshikawa
英治 吉川
Kimiaki Taruya
公昭 樽谷
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor strain sensor for reducing the error of an electric signal from piezoresistance by preventing thermal stress from reaching the piezoresistance even when the whole temperature varies and the thermal stress occurs between an electrode and a semiconductor substrate. <P>SOLUTION: This semiconductor strain sensor comprises the semiconductor substrate 1 having a thin section 1a and an outer frame section 1b that is disposed outside the thin section 1a and is thicker than the thin section 1a, the piezoresistance 2 disposed in the thin section 1a, and the electrode 4 that is disposed in the outer frame section 1b, is electrically connected to the piezoresistance 2 via wiring 3, and transmits the electric signal from the piezoresistance 2 to the outside. A recessed part 1c is formed along the periphery of the electrode 4 in the outer frame section 1b. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

この発明は、半導体基板に、変形することで抵抗値が変化するピエゾ抵抗と、このピエゾ抵抗の抵抗値の変化を電気信号で外部に伝達する電極とを備えた半導体感歪センサに関する。   The present invention relates to a semiconductor strain sensitive sensor comprising a semiconductor substrate having a piezoresistor whose resistance value changes by deformation and an electrode for transmitting the change in the resistance value of the piezoresistor to the outside by an electric signal.

従来、薄肉部およびこの薄肉部の外側に設けられこの薄肉部よりも厚い外枠部を有した半導体基板と、前記薄肉部に設けられたピエゾ抵抗と、前記外枠部に設けられ、前記ピエゾ抵抗と配線を介して電気的に接続され、前記ピエゾ抵抗からの電気信号を外部に伝達する電極とを備えた半導体感歪センサにおいて、全面に渡って平らである前記半導体基板の上面に、電極が配置された半導体感歪センサが知られている（例えば、特許文献１参照）。   Conventionally, a semiconductor substrate having a thin portion and an outer frame portion provided outside the thin portion and thicker than the thin portion, a piezoresistor provided in the thin portion, and provided in the outer frame portion, the piezo In a semiconductor strain sensitive sensor comprising an electrode electrically connected to a resistor through a wiring and transmitting an electric signal from the piezoresistor to the outside, an electrode is formed on the upper surface of the semiconductor substrate that is flat over the entire surface. A semiconductor strain sensitive sensor in which is arranged is known (for example, see Patent Document 1).

特開２００２−１３１１６１号公報JP 2002-131161 A

しかしながら、このものの場合、通常、電極にはアルミニウムが用いられ、半導体基板にはシリコンが用いられており、両者の熱膨張係数が異なるので、全体の温度が変化すると、電極と半導体基板との間に熱応力が発生し、この熱応力がピエゾ抵抗にまで伝達され、ピエゾ抵抗からの電気信号に誤差が発生してしまうという問題点があった。   However, in this case, aluminum is usually used for the electrode, and silicon is used for the semiconductor substrate. Since the thermal expansion coefficients of the two are different, if the overall temperature changes, there is a difference between the electrode and the semiconductor substrate. There is a problem in that a thermal stress is generated and the thermal stress is transmitted to the piezoresistor, and an error occurs in an electric signal from the piezoresistor.

この発明は、上述のような問題点を解決することを課題とするものであって、その目的は、全体の温度が変化し、電極と半導体基板との間に熱応力が発生しても、この熱応力がピエゾ抵抗にまで伝達せず、その結果ピエゾ抵抗からの電気信号の誤差を低減する半導体感歪センサを提供するものである。   The object of the present invention is to solve the above-described problems, and the purpose of the invention is to change the overall temperature and generate thermal stress between the electrode and the semiconductor substrate. It is an object of the present invention to provide a semiconductor strain sensitive sensor in which this thermal stress is not transmitted to a piezoresistor, and as a result, an error in an electric signal from the piezoresistor is reduced.

この発明に係る半導体感歪センサは、薄肉部およびこの薄肉部の外側に設けられこの薄肉部よりも厚い外枠部を有した半導体基板と、前記薄肉部に設けられたピエゾ抵抗と、前記外枠部に設けられ、前記ピエゾ抵抗と配線を介して電気的に接続され、前記ピエゾ抵抗からの電気信号を外部に伝達する電極とを備えた半導体感歪センサにおいて、前記外枠部には、前記電極の周囲に沿って凹部が形成されている。
また、この発明に係る半導体感歪センサは、薄肉部およびこの薄肉部の外側に設けられこの薄肉部よりも厚い外枠部を有した半導体基板と、前記薄肉部に設けられたピエゾ抵抗と、前記外枠部に設けられ、前記ピエゾ抵抗と配線を介して電気的に接続され、前記ピエゾ抵抗からの電気信号を外部に伝達する電極とを備えた半導体感歪センサにおいて、前記配線は、弾性の接続体を有し、前記接続体は、前記電極と前記ピエゾ抵抗とをつなぐ経路の一部を構成している。 The semiconductor strain sensitive sensor according to the present invention includes a thin substrate and a semiconductor substrate provided outside the thin portion and having an outer frame portion thicker than the thin portion, a piezoresistor provided in the thin portion, and the outer In the semiconductor strain sensitive sensor, which is provided in a frame portion and is electrically connected to the piezoresistor via a wiring and includes an electrode that transmits an electric signal from the piezoresistor to the outside, the outer frame portion includes: A recess is formed along the periphery of the electrode.
The semiconductor strain sensitive sensor according to the present invention is a semiconductor substrate having a thin portion and an outer frame portion provided outside the thin portion and thicker than the thin portion, a piezoresistor provided in the thin portion, In the semiconductor strain sensitive sensor, which is provided in the outer frame portion and is electrically connected to the piezoresistor via a wiring and transmits an electric signal from the piezoresistor to the outside, the wiring is elastic The connection body constitutes a part of a path connecting the electrode and the piezoresistor.

この発明に係る半導体感歪センサによれば、全体の温度が変化し、電極と半導体基板との間に熱応力が発生しても、この熱応力がピエゾ抵抗にまで伝達せず、その結果、ピエゾ抵抗からの電気信号の誤差を低減することができる。   According to the semiconductor strain sensitive sensor according to the present invention, even if the overall temperature changes and thermal stress is generated between the electrode and the semiconductor substrate, this thermal stress is not transmitted to the piezoresistor, and as a result, The error of the electric signal from the piezoresistor can be reduced.

以下、この発明の各実施の形態を図に基づいて説明するが、各図において、同一または相当の部材、部位については、同一の符号を付して説明する。
実施の形態１．
図１は実施の形態１に係る半導体感歪センサの平面図、図２は図１のＩＩ−ＩＩ線に沿った矢視断面図、図３は図１のＩＩＩ−ＩＩＩ線に沿った矢視断面図である。
実施の形態１に係る半導体感歪センサは、薄肉部１ａおよびこの薄肉部１ａの外側に設けられたこの薄肉部１ａよりも厚い外枠部１ｂを有した半導体基板１と、半導体基板１の下側に設けられた台座５とを備えている。 Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings, the same or corresponding members and parts will be described with the same reference numerals.
Embodiment 1 FIG.
1 is a plan view of the semiconductor strain sensitive sensor according to the first embodiment, FIG. 2 is a cross-sectional view taken along line II-II in FIG. 1, and FIG. 3 is a view taken along line III-III in FIG. It is sectional drawing.
A semiconductor strain sensitive sensor according to the first embodiment includes a semiconductor substrate 1 having a thin portion 1a and an outer frame portion 1b that is provided outside the thin portion 1a and is thicker than the thin portion 1a. And a pedestal 5 provided on the side.

半導体基板１と台座５との間で、薄肉部１ａの下方には、真空が維持された圧力基準室８が形成されている。
薄肉部１ａは、ダイヤフラムとして機能しており、外部の空気の圧力の変化により変形する。
薄肉部１ａの上部の周縁部には、変形にともない抵抗値が変化する４個のピエゾ抵抗２が互いに対向して設けられている。
それぞれのピエゾ抵抗２には、ホイートストンブリッジを構成するように４本の配線３（図１の点模様で示した領域）が接続されている。
外枠部１ｂの上部の一端部には、ピエゾ抵抗２に電圧を印加し、また、ピエゾ抵抗２の抵抗値の変化にともない変化する電圧を電気信号として外部に伝達する４個の電極４が外枠部１ｂの１つの側面に沿って設けられ、それぞれの電極４は、配線３の上側に積層して接続されている。
外枠部１ｂの上面には、電極４の周囲において、外枠部１ｂの１つの側面に面した領域以外には、電極４の周囲に沿って凹部１ｃが形成されている。
配線３は、凹部１ｃを迂回して、外枠部１ｂの１つの側面に面した領域を通って電極４と接続されている。 A pressure reference chamber 8 in which a vacuum is maintained is formed between the semiconductor substrate 1 and the base 5 and below the thin portion 1a.
The thin portion 1a functions as a diaphragm and is deformed by a change in the pressure of external air.
Four piezoresistors 2 whose resistance values change with deformation are provided opposite to each other at the upper peripheral portion of the thin portion 1a.
Each of the piezoresistors 2 is connected with four wires 3 (regions indicated by dotted patterns in FIG. 1) so as to constitute a Wheatstone bridge.
Four electrodes 4 that apply a voltage to the piezoresistor 2 and transmit a voltage that changes with a change in the resistance value of the piezoresistor 2 as an electrical signal to one end of the upper portion of the outer frame 1b. Provided along one side surface of the outer frame portion 1 b, each electrode 4 is stacked and connected on the upper side of the wiring 3.
On the upper surface of the outer frame portion 1 b, a recess 1 c is formed along the periphery of the electrode 4 except for the region facing the one side surface of the outer frame portion 1 b around the electrode 4.
The wiring 3 bypasses the concave portion 1c and is connected to the electrode 4 through a region facing one side surface of the outer frame portion 1b.

半導体基板１は、ＳＯＩ基板であり、中間部に層状の埋込酸化膜１ｄが全面に渡って形成されている。
薄肉部１ａは、半導体基板１の下面からディープＲＩＥによって埋込酸化膜１ｄまでエッチングすることにより形成されている。
薄肉部１ａの大きさは、一辺が４００μｍ、厚さが１０μｍ程度である。 The semiconductor substrate 1 is an SOI substrate, and a layered buried oxide film 1d is formed over the entire surface in an intermediate portion.
The thin portion 1a is formed by etching from the lower surface of the semiconductor substrate 1 to the buried oxide film 1d by deep RIE.
As for the size of the thin portion 1a, one side is about 400 μm and the thickness is about 10 μm.

半導体基板１の上面には、シリコン酸化膜６が形成され、さらにこのシリコン酸化膜６の上面にはシリコン窒化膜７が形成されており、シリコン酸化膜６およびシリコン窒化膜７によって半導体基板１が保護されている。   A silicon oxide film 6 is formed on the upper surface of the semiconductor substrate 1, and a silicon nitride film 7 is formed on the upper surface of the silicon oxide film 6, and the semiconductor substrate 1 is formed by the silicon oxide film 6 and the silicon nitride film 7. Protected.

電極４は、配線３とのオートミックコンタクト性、コスト、耐久性などを総合的に考慮すると、アルミニウムまたはアルミニウムに微量のシリコンや銅を添加したアルミニウム合金を用いることが望ましい。
台座５は、ホウ珪酸ガラスからなり、陽極接合により半導体基板１と接合されている。 For the electrode 4, it is desirable to use aluminum or an aluminum alloy obtained by adding a trace amount of silicon or copper to aluminum in consideration of the automic contact property with the wiring 3, cost, and durability.
The pedestal 5 is made of borosilicate glass and is bonded to the semiconductor substrate 1 by anodic bonding.

ピエゾ抵抗２および配線３は、半導体基板１にイオン注入、拡散することによって形成されている。
凹部１ｃの深さは、イオン注入、拡散によって形成された配線３の深さと同等以上であり、３μｍ〜５μｍ程度であり、ドライエッチングにより形成されている。 The piezoresistor 2 and the wiring 3 are formed by ion implantation and diffusion into the semiconductor substrate 1.
The depth of the recess 1c is equal to or greater than the depth of the wiring 3 formed by ion implantation and diffusion, and is about 3 μm to 5 μm, and is formed by dry etching.

次に、実施の形態１に係る半導体感歪センサの動作について説明する。
まず、電極４により、各ピエゾ抵抗２には、ホイートストンブリッジとしての電圧が印加される。
次に、外部の空気の圧力の変化にともない、薄肉部１ａが変形し、ピエゾ抵抗２の抵抗値も変化する。ピエゾ抵抗２の抵抗値が変化すると、配線３を介して変化した電圧が電極４に伝えられる。
電極４には、図示しない圧力算出手段が設けられており、この圧力算出手段は、電圧の変化から薄肉部１ａの変形量を算出し、さらに、薄肉部１ａの変形量から薄肉部１ａに加えた空気の圧力を算出する。 Next, the operation of the semiconductor strain sensitive sensor according to the first embodiment will be described.
First, a voltage as a Wheatstone bridge is applied to each piezoresistor 2 by the electrode 4.
Next, as the pressure of the external air changes, the thin portion 1a is deformed and the resistance value of the piezoresistor 2 also changes. When the resistance value of the piezoresistor 2 changes, the changed voltage is transmitted to the electrode 4 via the wiring 3.
The electrode 4 is provided with a pressure calculation means (not shown). The pressure calculation means calculates the deformation amount of the thin portion 1a from the change in voltage, and further adds the deformation amount of the thin portion 1a to the thin portion 1a. Calculate the air pressure.

ここで、全体の温度が変化すると、電極４および半導体基板１は変形する。
このとき、電極４と半導体基板１とは、それぞれの熱膨張係数が異なるため、電極４と半導体基板１との間では、熱応力が発生する。
この熱応力は、半導体基板１を通じて伝達されるものの、電極４周辺の半導体基板１には、電極４の周囲に沿った凹部１ｃが形成されているので、熱応力が、凹部１ｃに吸収され、凹部１ｃより外側へ伝達されない。
その結果、ピエゾ抵抗２には、全体の温度変化により発生する熱応力の影響が伝達されず、半導体感歪センサの誤差の発生を防ぐことができる。 Here, when the entire temperature changes, the electrode 4 and the semiconductor substrate 1 are deformed.
At this time, since the thermal expansion coefficients of the electrode 4 and the semiconductor substrate 1 are different, thermal stress is generated between the electrode 4 and the semiconductor substrate 1.
Although this thermal stress is transmitted through the semiconductor substrate 1, the semiconductor substrate 1 around the electrode 4 is formed with the recess 1c along the periphery of the electrode 4, so that the thermal stress is absorbed by the recess 1c, It is not transmitted outside the recess 1c.
As a result, the influence of the thermal stress generated by the overall temperature change is not transmitted to the piezoresistor 2, and the occurrence of errors in the semiconductor strain sensitive sensor can be prevented.

以上説明したように、実施の形態１に係る半導体感歪センサによると、外枠部１ｂには、電極４の周囲に沿って凹部１ｃが形成されているので、全体の温度が変化し、電極４と半導体基板１との間に熱応力が発生しても、この熱応力がピエゾ抵抗２にまで伝達せず、その結果、ピエゾ抵抗２からの電気信号の誤差を低減することができる。   As described above, according to the semiconductor strain sensor according to the first embodiment, the outer frame portion 1b is formed with the recess 1c along the periphery of the electrode 4, so that the overall temperature changes, and the electrode Even if a thermal stress is generated between the semiconductor substrate 1 and the semiconductor substrate 1, the thermal stress is not transmitted to the piezoresistor 2, and as a result, an error in the electrical signal from the piezoresistor 2 can be reduced.

実施の形態２．
図４は実施の形態２に係る半導体感歪センサの平面図、図５は図４のＶ−Ｖ線に沿った矢視断面図である。
実施の形態２に係る半導体感歪センサは、半導体基板１の外枠部１ｂに、電極４の全周囲に渡って凹部１ｃが形成され、電極４と配線３とが切り離されている。
この凹部１ｃには、接続体である１本の板形状のバネ９がＺ形状に折り曲げられて設けられており、このバネ９を介して電極４と配線３とが電気的に接続されている。
外枠部１ｂには、電極４の全周に渡って凹部１ｃが形成されているので、外部の温度変化に伴い、電極４と配線３との間に熱応力が発生しても、熱応力が凹部１ｃより外側へ伝達されない。
その他の構成は、実施の形態１と同様である。 Embodiment 2. FIG.
4 is a plan view of the semiconductor strain sensitive sensor according to the second embodiment, and FIG. 5 is a cross-sectional view taken along line VV in FIG.
In the semiconductor strain sensitive sensor according to the second embodiment, a recess 1 c is formed in the outer frame portion 1 b of the semiconductor substrate 1 over the entire periphery of the electrode 4, and the electrode 4 and the wiring 3 are separated.
In this recess 1c, a single plate-like spring 9 as a connecting body is provided by being bent in a Z shape, and the electrode 4 and the wiring 3 are electrically connected via the spring 9. .
Since the recess 1c is formed in the outer frame 1b over the entire circumference of the electrode 4, even if a thermal stress is generated between the electrode 4 and the wiring 3 due to an external temperature change, the thermal stress Is not transmitted outside the recess 1c.
Other configurations are the same as those in the first embodiment.

実施の形態２に係る半導体感歪センサによると、配線３は、バネ９を有し、このバネ９を介して電極４と接続されているので、外部の温度が変化し、電極４による熱応力が発生しても、ピエゾ抵抗２にまで伝達されず、半導体感歪センサの誤差を低減することができる。
また、電極４および配線３が変形し、電極４と配線３との間の距離が広がっても、バネ９が変形することで、電極４と配線３との間の距離の変化に追随し、両者の電気的接続を確実にすることができる。 According to the semiconductor strain sensitive sensor according to the second embodiment, since the wiring 3 has the spring 9 and is connected to the electrode 4 through the spring 9, the external temperature changes and the thermal stress caused by the electrode 4 changes. Even if this occurs, it is not transmitted to the piezoresistor 2, and the error of the semiconductor strain sensitive sensor can be reduced.
Moreover, even if the electrode 4 and the wiring 3 are deformed and the distance between the electrode 4 and the wiring 3 is increased, the spring 9 is deformed to follow the change in the distance between the electrode 4 and the wiring 3, Both electrical connections can be ensured.

実施の形態３．
図６（ａ）は実施の形態３に係る半導体感歪センサの平面図、図６（ｂ）は図６（ａ）のバネ９の拡大図である。
実施の形態３に係る半導体感歪センサは、半導体基板１の外枠部１ｂに、電極４の全周に渡って凹部１ｃが形成され、電極４と配線３とが切り離されている。
この凹部１ｃの電極４と配線３との間には、接続体である板形状のバネ９が２本設けられ、それぞれのバネ９は山形状に折り曲げられ、突出した方向が互いに反対方向となるように配置されている。これらのバネ９により電極４と配線３とが電気的に接続されている。
その他の構成は、実施の形態２と同様である。 Embodiment 3 FIG.
FIG. 6A is a plan view of the semiconductor strain sensitive sensor according to the third embodiment, and FIG. 6B is an enlarged view of the spring 9 in FIG.
In the semiconductor strain sensitive sensor according to the third embodiment, a recess 1 c is formed in the outer frame portion 1 b of the semiconductor substrate 1 over the entire circumference of the electrode 4, and the electrode 4 and the wiring 3 are separated.
Two plate-shaped springs 9 as connecting bodies are provided between the electrode 4 and the wiring 3 of the recess 1c. Each spring 9 is bent into a mountain shape, and the protruding directions are opposite to each other. Are arranged as follows. The electrodes 4 and the wiring 3 are electrically connected by these springs 9.
Other configurations are the same as those of the second embodiment.

実施の形態３に係る半導体感歪センサによると、凹部１ｃには、バネ９が２本設けられているので、実施の形態２に係る半導体感歪センサのものより、電極４と配線３との電気的接続をより確実にすることができる。   According to the semiconductor strain sensor according to the third embodiment, since two springs 9 are provided in the recess 1c, the electrode 4 and the wiring 3 are connected to those of the semiconductor strain sensor according to the second embodiment. The electrical connection can be made more reliable.

なお、上記実施の形態２および実施の形態３では、接続体をバネ９として説明したが勿論このものに限らず、導電性かつ弾性のあるものであればよい。   In the second embodiment and the third embodiment, the connection body has been described as the spring 9, but of course, the connection body is not limited to this, and any conductive and elastic material may be used.

また、上記実施の形態２および実施の形態３では、バネ９の端部が電極４と接続されている半導体感歪センサについて説明したが、バネ９が配線３の中間部にあり、配線３の端部が電極４と接続されてもよい。   In the second and third embodiments, the semiconductor strain sensitive sensor in which the end of the spring 9 is connected to the electrode 4 has been described. However, the spring 9 is in the middle of the wiring 3 and the wiring 3 The end may be connected to the electrode 4.

また、上記各実施の形態では、外部の空気の圧力を測定するための半導体感歪センサについて説明したが、例えば、可動機構体の可動部の可動量を測定するためのセンサであってもよく、また、ピエゾ抵抗を備えた加速度を測定するセンサ等であってもよい。   In each of the above embodiments, the semiconductor strain sensitive sensor for measuring the pressure of the external air has been described. However, for example, the sensor may be a sensor for measuring the movable amount of the movable portion of the movable mechanism body. Also, a sensor or the like that measures acceleration with a piezoresistor may be used.

実施の形態１に係る半導体感歪センサの平面図である。2 is a plan view of the semiconductor strain sensor according to Embodiment 1. FIG. 図１のＩＩ−ＩＩ線に沿った矢視断面図である。It is arrow sectional drawing along the II-II line | wire of FIG. 図１のＩＩＩ−ＩＩＩ線に沿った矢視断面図である。It is arrow sectional drawing along the III-III line of FIG. 実施の形態２に係る半導体感歪センサの平面図である。FIG. 6 is a plan view of a semiconductor strain sensitive sensor according to a second embodiment. 図４のＶ−Ｖ線に沿った矢視断面図である。It is arrow sectional drawing along the VV line of FIG. 図６（ａ）は実施の形態３に係る半導体感歪センサの平面図、図６（ｂ）は図６（ａ）のバネの拡大図である。6A is a plan view of the semiconductor strain sensitive sensor according to the third embodiment, and FIG. 6B is an enlarged view of the spring of FIG. 6A.

符号の説明Explanation of symbols

１ 半導体基板、１ａ 薄肉部、１ｂ 外枠部、１ｃ 凹部、１ｄ 埋込酸化膜、２ ピエゾ抵抗、３ 配線、４ 電極、５ 台座、６ シリコン酸化膜、７ シリコン窒化膜、８ 圧力基準室、９ バネ。   DESCRIPTION OF SYMBOLS 1 Semiconductor substrate, 1a Thin part, 1b Outer frame part, 1c Recessed part, 1d Embedded oxide film, 2 Piezoresistor, 3 Wiring, 4 Electrode, 5 base, 6 Silicon oxide film, 7 Silicon nitride film, 8 Pressure reference chamber, 9 Spring.

Claims (4)

薄肉部およびこの薄肉部の外側に設けられこの薄肉部よりも厚い外枠部を有した半導体基板と、
前記薄肉部に設けられたピエゾ抵抗と、
前記外枠部に設けられ、前記ピエゾ抵抗と配線を介して電気的に接続され、前記ピエゾ抵抗からの電気信号を外部に伝達する電極と、
を備えた半導体感歪センサにおいて、
前記外枠部には、前記電極の周囲に沿って凹部が形成されていることを特徴とする半導体感歪センサ。 A semiconductor substrate having a thin portion and an outer frame portion provided outside the thin portion and thicker than the thin portion;
Piezoresistor provided in the thin part,
An electrode provided on the outer frame, electrically connected to the piezoresistor via a wiring, and transmitting an electric signal from the piezoresistor to the outside;
In a semiconductor strain sensitive sensor equipped with
A semiconductor strain sensitive sensor, wherein a concave portion is formed in the outer frame portion along the periphery of the electrode. 薄肉部およびこの薄肉部の外側に設けられこの薄肉部よりも厚い外枠部を有した半導体基板と、
前記薄肉部に設けられたピエゾ抵抗と、
前記外枠部に設けられ、前記ピエゾ抵抗と配線を介して電気的に接続され、前記ピエゾ抵抗からの電気信号を外部に伝達する電極と、
を備えた半導体感歪センサにおいて、
前記配線は、弾性の接続体を有し、前記接続体は、前記電極と前記ピエゾ抵抗とをつなぐ経路の一部を構成していることを特徴とする半導体感歪センサ。 A semiconductor substrate having a thin portion and an outer frame portion provided outside the thin portion and thicker than the thin portion;
Piezoresistor provided in the thin part,
An electrode provided on the outer frame, electrically connected to the piezoresistor via a wiring, and transmitting an electric signal from the piezoresistor to the outside;
In a semiconductor strain sensitive sensor equipped with
The wiring includes an elastic connection body, and the connection body constitutes a part of a path connecting the electrode and the piezoresistor. 前記接続体は、並列に複数設けられたことを特徴とする請求項２に記載の半導体感歪センサ。   The semiconductor strain sensor according to claim 2, wherein a plurality of the connection bodies are provided in parallel. 前記接続体は、バネであることを特徴とする請求項２または請求項３に記載の半導体感歪センサ。   4. The semiconductor strain sensitive sensor according to claim 2, wherein the connection body is a spring.
JP2006265079A 2006-09-28 2006-09-28 Semiconductor strain sensor Pending JP2008082952A (en)

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