JP2008047836A - Semiconductor device and manufacturing method of semiconductor device - Google Patents

Semiconductor device and manufacturing method of semiconductor device Download PDF

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JP2008047836A
JP2008047836A JP2006224567A JP2006224567A JP2008047836A JP 2008047836 A JP2008047836 A JP 2008047836A JP 2006224567 A JP2006224567 A JP 2006224567A JP 2006224567 A JP2006224567 A JP 2006224567A JP 2008047836 A JP2008047836 A JP 2008047836A
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semiconductor device
semiconductor element
optical semiconductor
resin
metal plates
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Masayuki Sakakibara
正之 榊原
Hitoshi Inoue
仁 井上
Hisaya Sugiura
久也 杉浦
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Hamamatsu Photonics KK
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Light Receiving Elements (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which can be easily reduced in size and thickness. <P>SOLUTION: In the semiconductor device 1, an optical semiconductor element 10, metal plates 31, 32 and bumps 41, 42 are sealed with a resin 50. The metal plates 31, 32 are respectively electrically connected to electrode pads 11, 12 on the bottom surface of the optical semiconductor element 10 via the bumps 41, 42, and are used as external connection terminals. The bottom surfaces of the metal plates 31, 32 are provided on a common virtual plane. The optical semiconductor element 10 and the bumps 41, 42 are covered with a resin 50 provided on one side for the virtual plane. The top surfaces and side surfaces of the metal plates 31, 32 are also covered with the resin 50. The bottom surfaces of the metal plates 31, 32 are not covered with the resin 50, but exposed. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、光半導体素子を含む半導体装置、および、このような半導体装置を製造する方法に関するものである。   The present invention relates to a semiconductor device including an optical semiconductor element and a method for manufacturing such a semiconductor device.

光半導体素子は、発光または受光する半導体素子であり、例えば、光を発生する発光ダイオード、入射した光を受光して光電変換するフォトダイオード（ＰＤ）、光の入射位置に応じた値の電気信号を出力するＰＳＤ（Position Sensing Device）、入射光の強度分布に応じた電気信号を出力するＣＣＤ（Charge Coupled Device）やＰＤアレイ等が挙げられる。このような光半導体素子を含む半導体装置として、特許文献１に開示されたリードレス表面実装型のものが知られている。この特許文献１に開示された半導体装置は、発光ダイオードが基板上に搭載され、発光ダイオードの電極と基板とが導電性ワイヤで接続され、これら発光ダイオード，基板および導電性ワイヤが透明樹脂により封止されたものである。
特開平１０−２４２５２６号公報 An optical semiconductor element is a semiconductor element that emits or receives light. For example, a light emitting diode that generates light, a photodiode (PD) that receives and photoelectrically converts incident light, and an electric signal having a value corresponding to the incident position of light. A PSD (Position Sensing Device) that outputs a signal, a CCD (Charge Coupled Device) that outputs an electrical signal according to the intensity distribution of incident light, a PD array, and the like. As a semiconductor device including such an optical semiconductor element, a leadless surface mount type device disclosed in Patent Document 1 is known. In the semiconductor device disclosed in Patent Document 1, a light emitting diode is mounted on a substrate, an electrode of the light emitting diode and the substrate are connected by a conductive wire, and the light emitting diode, the substrate, and the conductive wire are sealed with a transparent resin. It has been stopped.
Japanese Patent Laid-Open No. 10-242526

しかしながら、特許文献１に開示された半導体装置は、光半導体素子（発光ダイオード）の厚みが２００μｍ〜４００μｍ程度であるにも拘らず、一般に光半導体素子より厚い基板を用い、しかも、導電性ワイヤによる接続を採用していることから、小型化および薄型化の点で問題がある。   However, the semiconductor device disclosed in Patent Document 1 uses a substrate that is generally thicker than the optical semiconductor element, despite the fact that the thickness of the optical semiconductor element (light emitting diode) is about 200 μm to 400 μm. Since the connection is adopted, there is a problem in terms of miniaturization and thinning.

本発明は、上記問題点を解消する為になされたものであり、小型化および薄型化が容易な半導体装置および半導体装置製造方法を提供することを目的とする。   The present invention has been made to solve the above problems, and an object of the present invention is to provide a semiconductor device and a semiconductor device manufacturing method that can be easily reduced in size and thickness.

本発明に係る半導体装置は、(1) 互いに対向する第１面および第２面を有し、該第２面に電極パッドが形成されており、該第２面の側へ発光または該第２面の側から受光する光半導体素子と、(2) 互いに対向する第１面および第２面を有し、該第１面が光半導体素子の電極パッドと接続された金属板と、を備えることを特徴とする。さらに、本発明に係る半導体装置は、光半導体素子が金属板の第２面に対して一方の側に設けられた樹脂により覆われ、金属板の第２面が樹脂により覆われることなく露出していることを特徴とする。   A semiconductor device according to the present invention has (1) a first surface and a second surface that are opposed to each other, and an electrode pad is formed on the second surface, and light is emitted to the second surface side or the second surface. An optical semiconductor element that receives light from the side of the surface, and (2) a metal plate that has a first surface and a second surface that face each other, and the first surface is connected to an electrode pad of the optical semiconductor element. It is characterized by. Furthermore, in the semiconductor device according to the present invention, the optical semiconductor element is covered with a resin provided on one side with respect to the second surface of the metal plate, and the second surface of the metal plate is exposed without being covered with the resin. It is characterized by.

このように構成される半導体装置は、パッケージに入れられることなく、樹脂封止された形態のままであるので、小型化および薄型化が可能であり、また、例えばプリント基板上における実装の密度の向上が可能である。なお、光半導体素子の電極パッドと、これに接続される外部接続端子としての金属板とは、一般に複数組ある。   Since the semiconductor device configured in this way remains in a resin-sealed form without being put into a package, it can be reduced in size and thickness, and, for example, the density of mounting on a printed circuit board can be reduced. Improvement is possible. In general, there are a plurality of sets of electrode pads of the optical semiconductor element and metal plates as external connection terminals connected thereto.

また、本発明に係る半導体装置は、光半導体素子の第２面の側に、光半導体素子が発光または受光する光に対して波長選択性を有するフィルタ、光半導体素子が発光または受光する光に対して空間選択性を有するマスク、または、光半導体素子が発光または受光する光に対して集光作用を有するレンズ、を更に備えるのが好適である。発光ダイオードやフォトダイオード等の光半導体素子は一般に大きいが、本発明の如く、光半導体素子の第２面の側にフィルタ，マスクまたはレンズが設けられていることにより、これらを別途設ける必要がなく、これらを含めた全体として小型化が可能である。   In addition, the semiconductor device according to the present invention is provided on the second surface side of the optical semiconductor element with a filter having wavelength selectivity with respect to light emitted or received by the optical semiconductor element, and light emitted or received by the optical semiconductor element. It is preferable to further include a mask having spatial selectivity, or a lens having a condensing function with respect to light emitted or received by the optical semiconductor element. Although optical semiconductor elements such as light emitting diodes and photodiodes are generally large, there is no need to provide these separately because a filter, mask, or lens is provided on the second surface side of the optical semiconductor element as in the present invention. Therefore, it is possible to reduce the size as a whole including these.

本発明に係る半導体装置製造方法は、上記の本発明に係る半導体装置を製造する方法であって、(1) 導電性を有する電鋳基板の主面上に所定のレジストパターンを形成するレジストパターン形成工程と、(2)レジストパターン形成工程において形成されたレジストパターンを除く電鋳基板の主面の露出部上に導電性金属を電着して、電鋳基板の主面上に金属板を形成する電着工程と、(3) 電着工程の後に、電鋳基板からレジストパターンを除去するレジストパターン除去工程と、(4) レジストパターン除去工程の後に、互いに対向する第１面および第２面を有し該第２面に電極パッドが形成され該第２面の側へ発光または該第２面の側から受光する光半導体素子の該電極パッドを金属板に接続する光半導体素子搭載工程と、(5) 光半導体素子搭載工程の後に光半導体素子を樹脂で覆う樹脂封止工程と、(6) 樹脂封止工程の後に電鋳基板を除去する電鋳基板除去工程と、を備えることを特徴とする。   A semiconductor device manufacturing method according to the present invention is a method for manufacturing the above-described semiconductor device according to the present invention. (1) A resist pattern for forming a predetermined resist pattern on a main surface of an electroformed substrate having conductivity And (2) electrodepositing a conductive metal on the exposed portion of the main surface of the electroformed substrate excluding the resist pattern formed in the resist pattern forming step, and forming a metal plate on the main surface of the electroformed substrate An electrodeposition process to be formed; (3) a resist pattern removal process for removing the resist pattern from the electroformed substrate after the electrodeposition process; and (4) a first surface and a second surface facing each other after the resist pattern removal process. An optical semiconductor element mounting step in which an electrode pad is formed on the second surface, and the electrode pad of the optical semiconductor element that emits light to or receives light from the second surface is connected to a metal plate. (5) Optical semiconductor device mounting process And (6) an electroformed substrate removing step for removing the electroformed substrate after the resin sealing step.

また、本発明に係る半導体装置製造方法は、光半導体素子搭載工程の前に、光半導体素子が発光または受光する光に対して波長選択性を有するフィルタを電鋳基板の主面上であって光半導体素子の搭載位置の下方に配置する工程を更に備えるのが好適である。また、光半導体素子搭載工程の前に、光半導体素子が発光または受光する光に対して空間選択性を有するマスクを電鋳基板の主面上であって光半導体素子の搭載位置の下方に配置する工程を更に備えるのが好適である。また、電鋳基板が光半導体素子の搭載位置の領域に凹面を有するのが好適である。これらの場合には、フィルタ，マスクまたはレンズを更に備える本発明に係る半導体装置を容易に製造することができる。   The semiconductor device manufacturing method according to the present invention includes a filter having wavelength selectivity for light emitted or received by the optical semiconductor element on the main surface of the electroformed substrate before the optical semiconductor element mounting step. It is preferable to further include a step of disposing the optical semiconductor element below the mounting position. In addition, before the optical semiconductor element mounting step, a mask having spatial selectivity with respect to light emitted or received by the optical semiconductor element is disposed on the main surface of the electroformed substrate and below the mounting position of the optical semiconductor element. It is preferable that the method further includes the step of: Further, it is preferable that the electroformed substrate has a concave surface in the region where the optical semiconductor element is mounted. In these cases, the semiconductor device according to the present invention further including a filter, a mask, or a lens can be easily manufactured.

本発明によれば、小型化および薄型化が容易な半導体装置を提供することができる。   According to the present invention, it is possible to provide a semiconductor device that can be easily reduced in size and thickness.

以下、添付図面を参照して、本発明を実施するための最良の形態を詳細に説明する。なお、図面の説明において同一または同種の要素には同一の符号を付し、重複する説明を省略する。   The best mode for carrying out the present invention will be described below in detail with reference to the accompanying drawings. In the description of the drawings, the same or similar elements are denoted by the same reference numerals, and redundant description is omitted.

（第１実施形態）
先ず、本発明に係る半導体装置および半導体装置製造方法の第１実施形態について説明する。図１は、第１実施形態に係る半導体装置１の上面図，断面図および底面図である。同図（ａ）は上面図を示し、同図（ｂ）は断面図を示し、同図（ｃ）は底面図を示す。この図に示される半導体装置１では、光半導体素子１０、金属板３１，３２およびバンプ４１，４２が、樹脂５０により封止されている。半導体装置１は全体として凡そ直方体形状である。 (First embodiment)
First, a first embodiment of a semiconductor device and a semiconductor device manufacturing method according to the present invention will be described. FIG. 1 is a top view, a cross-sectional view, and a bottom view of a semiconductor device 1 according to the first embodiment. FIG. 1A shows a top view, FIG. 1B shows a cross-sectional view, and FIG. 1C shows a bottom view. In the semiconductor device 1 shown in this figure, the optical semiconductor element 10, the metal plates 31 and 32, and the bumps 41 and 42 are sealed with a resin 50. The semiconductor device 1 has a substantially rectangular parallelepiped shape as a whole.

光半導体素子１０は、互いに対向し平行な第１面（上面）および第２面（下面）を有する平板形状のものであり、下面に電極パッド１１，１２が形成されており、下面の側へ発光または下面の側から受光する素子である。この発光または受光する光は、光半導体素子１０の下面にある樹脂５０を透過する。光半導体素子１０は、例えば、光を発生する発光ダイオードであってもよいし、入射した光を受光して光電変換するフォトダイオード（ＰＤ）であってもよいし、光の入射位置に応じた値の電気信号を出力するＰＳＤであってもよいし、また、入射光の強度分布に応じた電気信号を出力するＣＣＤやＰＤアレイであってもよい。発光部または受光部の周りに電極パッド１１，１２が形成されている。   The optical semiconductor element 10 has a flat plate shape having a first surface (upper surface) and a second surface (lower surface) that face each other and are parallel to each other. Electrode pads 11 and 12 are formed on the lower surface, and toward the lower surface side. An element that emits light or receives light from the lower surface side. The light to be emitted or received is transmitted through the resin 50 on the lower surface of the optical semiconductor element 10. The optical semiconductor element 10 may be, for example, a light emitting diode that generates light, or may be a photodiode (PD) that receives incident light and performs photoelectric conversion, or according to a light incident position. It may be a PSD that outputs an electrical signal of a value, or may be a CCD or PD array that outputs an electrical signal according to the intensity distribution of incident light. Electrode pads 11 and 12 are formed around the light emitting part or the light receiving part.

金属板３１，３２それぞれは、互いに対向し平行な第１面（上面）および第２面（下面）を有する平板形状のものであり、光半導体素子１０の下面の電極パッド１１，１２と電気的に接続された外部接続端子として用いられる。金属板３１の上面は、光半導体素子１０の下面の電極パッド１１とバンプ４１で接続されている。また、金属板３２の上面は、光半導体素子１０の下面の電極パッド１２とバンプ４２で接続されている。なお、光半導体素子１０の電極パッドとこれに接続される外部接続端子としての金属板とは、一般に複数組あるが、本実施形態では説明の簡便化のため２組としている。   Each of the metal plates 31 and 32 has a flat plate shape having a first surface (upper surface) and a second surface (lower surface) that face each other and are parallel to each other, and is electrically connected to the electrode pads 11 and 12 on the lower surface of the optical semiconductor element 10. It is used as an external connection terminal connected to. The upper surface of the metal plate 31 is connected to the electrode pads 11 and the bumps 41 on the lower surface of the optical semiconductor element 10. The upper surface of the metal plate 32 is connected to the electrode pads 12 on the lower surface of the optical semiconductor element 10 by bumps 42. In general, there are a plurality of sets of electrode pads of the optical semiconductor element 10 and metal plates serving as external connection terminals connected to the electrode pads. However, in the present embodiment, two sets are provided for ease of explanation.

樹脂５０としては、一般に樹脂封止型半導体装置を形成する際に用いられる樹脂が用いられ、例えば熱硬化型のエポキシ樹脂やシリコーン樹脂等が用いられる。光半導体素子１０が発光または受光する素子であるので、光半導体素子１０が発光または受光する光の波長において透明である樹脂が樹脂５０として用いられる。   As the resin 50, a resin generally used when forming a resin-encapsulated semiconductor device is used, and for example, a thermosetting epoxy resin, a silicone resin, or the like is used. Since the optical semiconductor element 10 emits or receives light, a resin that is transparent at the wavelength of light emitted or received by the optical semiconductor element 10 is used as the resin 50.

金属板３１，３２それぞれの下面は共通の仮想平面上にある。光半導体素子１０およびバンプ４１，４２は、その仮想平面に対して一方の側に設けられた樹脂５０により覆われている。金属板３１，３２それぞれの上面および側面も樹脂５０により覆われている。しかし、金属板３１，３２それぞれの下面は、樹脂５０により覆われることなく露出している。   The lower surfaces of the metal plates 31 and 32 are on a common virtual plane. The optical semiconductor element 10 and the bumps 41 and 42 are covered with a resin 50 provided on one side with respect to the virtual plane. The upper and side surfaces of the metal plates 31 and 32 are also covered with the resin 50. However, the lower surfaces of the metal plates 31 and 32 are exposed without being covered with the resin 50.

金属板３１，３２それぞれの露出した下面が例えばプリント基板上に半田付けされることで、半導体装置１は該基板上に実装される。このような半導体装置１は、パッケージに入れられることなく、樹脂封止された形態のままであるので、小型化および薄型化が可能であり、また、基板上における実装の密度の向上が可能である。   The exposed lower surface of each of the metal plates 31 and 32 is soldered onto, for example, a printed board, so that the semiconductor device 1 is mounted on the board. Since such a semiconductor device 1 remains in a resin-sealed form without being put into a package, it can be reduced in size and thickness, and the mounting density on the substrate can be improved. is there.

また、この半導体装置１では、光半導体素子１０の下面の一部領域は金属板３１，３２の上面とバンプで接着される一方、他の領域は樹脂５０により覆われる。このように構成される半導体装置１は、光半導体素子１０が大きい場合であっても、製造時において、光半導体素子１０が樹脂５０から剥離することが防止されて、歩留まりよく製造することができる。   In the semiconductor device 1, a part of the lower surface of the optical semiconductor element 10 is bonded to the upper surfaces of the metal plates 31 and 32 with bumps, while the other region is covered with the resin 50. Even when the optical semiconductor element 10 is large, the semiconductor device 1 configured as described above can be manufactured with high yield by preventing the optical semiconductor element 10 from being peeled off from the resin 50 during manufacturing. .

次に、第１実施形態に係る半導体装置１を製造する方法について説明する。図２は、第１実施形態に係る半導体装置１を製造する方法を説明するフローチャートである。図３および図４は、第１実施形態に係る半導体装置１を製造する方法を説明する工程図である。これらの図では、複数個（図示では３個）の半導体装置１を同時に製造する場合を示している。   Next, a method for manufacturing the semiconductor device 1 according to the first embodiment will be described. FIG. 2 is a flowchart illustrating a method for manufacturing the semiconductor device 1 according to the first embodiment. 3 and 4 are process diagrams illustrating a method for manufacturing the semiconductor device 1 according to the first embodiment. In these drawings, a plurality (three in the drawing) of semiconductor devices 1 are manufactured at the same time.

初めに、レジストパターン形成工程（ステップＳ１）では、導電性を有する電鋳基板９０の主面上に所定のレジストパターン９１が形成される（図３（ａ），（ｂ））。ここで用いられる電鋳基板９０は、両面が平坦な金属板であり、厚みが例えば０.１ｍｍであり、例えばステンレススチール，アルミニウムおよび銅などからなる。この電鋳基板９０の両面にレジスト９１，９２が塗布される（図３（ａ））。ここで塗布されるレジストは、例えば厚み５０μｍのアルカリタイプの感光性フィルムレジストである。このレジストが塗布された電鋳基板９０の一方の主面上に所定パターンのマスクが配され、この状態で紫外線照射による両面露光が行われ、現像処理が行われる。これにより、電鋳基板９０の主面上のレジストが硬化し、所定のレジストパターン９１が形成される（図３（ｂ））。   First, in the resist pattern forming step (step S1), a predetermined resist pattern 91 is formed on the main surface of the electroformed substrate 90 having conductivity (FIGS. 3A and 3B). The electroformed substrate 90 used here is a metal plate whose both surfaces are flat, has a thickness of, for example, 0.1 mm, and is made of, for example, stainless steel, aluminum, copper, or the like. Resists 91 and 92 are applied to both surfaces of the electroformed substrate 90 (FIG. 3A). The resist applied here is, for example, an alkali type photosensitive film resist having a thickness of 50 μm. A mask having a predetermined pattern is disposed on one main surface of the electroformed substrate 90 coated with the resist, and in this state, double-sided exposure is performed by ultraviolet irradiation, and development processing is performed. Thereby, the resist on the main surface of the electroformed substrate 90 is cured, and a predetermined resist pattern 91 is formed (FIG. 3B).

レジストパターン形成工程（ステップＳ１）に続く電着工程（ステップＳ２）では、レジストパターン９１を除く電鋳基板９０の主面の露出部上に導電性金属が電着されて、電鋳基板９０の主面上に金属板３１，３２が形成される（図３（ｃ））。なお、この電着の前に、必要に応じて化学エッチングによる表面酸化被膜除去や薬品による化学処理等の表面活性化処理が行われる。例えば、電着物としてはニッケルやニッケル−コバルト合金、銅その他種々の金属が用いられ、また、スルファミン酸ニッケルの無光沢浴が使用され、レジストパターン９１の厚さ程度の４０〜５０μｍの厚さで金属板３１，３２が形成される。なお、必要に応じて、金属板３１，３２それぞれの表面に結着力向上用の金メッキ等を０.３〜０.４μｍ厚で行うのが好ましい。   In the electrodeposition process (step S2) subsequent to the resist pattern formation process (step S1), a conductive metal is electrodeposited on the exposed portion of the main surface of the electroformed substrate 90 excluding the resist pattern 91, so that the electroformed substrate 90 Metal plates 31 and 32 are formed on the main surface (FIG. 3C). Before this electrodeposition, surface activation treatment such as removal of the surface oxide film by chemical etching or chemical treatment with chemicals is performed as necessary. For example, nickel, nickel-cobalt alloy, copper and other various metals are used as electrodeposits, and a matte bath of nickel sulfamate is used, and the thickness of the resist pattern 91 is about 40 to 50 μm. Metal plates 31 and 32 are formed. If necessary, it is preferable to perform gold plating or the like for improving the binding force on the surfaces of the metal plates 31 and 32 in a thickness of 0.3 to 0.4 μm.

電着工程（ステップＳ２）に続くレジストパターン除去工程（ステップＳ３）では、電鋳基板９０からレジスト９１，９２が除去される（図３（ｄ））。レジスト除去方法としては、アルカリ溶液による膨潤除去の方法等が可能である。   In the resist pattern removing step (step S3) subsequent to the electrodeposition step (step S2), the resists 91 and 92 are removed from the electroformed substrate 90 (FIG. 3D). As a resist removal method, a swelling removal method using an alkaline solution or the like is possible.

レジストパターン除去工程（ステップＳ３）に続く半導体素子搭載工程（ステップＳ４）では、光半導体素子１０の電極パッド１１，１２が金属板３１，３２にバンプ４１，４２で接続される（図４（ａ））。   In the semiconductor element mounting process (step S4) following the resist pattern removing process (step S3), the electrode pads 11 and 12 of the optical semiconductor element 10 are connected to the metal plates 31 and 32 by the bumps 41 and 42 (FIG. 4A )).

半導体素子搭載工程（ステップＳ４）に続く樹脂封止工程（ステップＳ５）では、光半導体素子１０、金属板３１，３２およびバンプ４１，４２は、樹脂５０により覆われて封止される（図４（ｂ））。光半導体素子１０の発光部または受光部と電鋳基板９０との間にも樹脂５０が侵入する。このとき具体的には、電鋳基板９０の上面がモールド金型（上型）に装着されて、そのモールド金型内のキャビティに樹脂５０が圧入される。このとき、電鋳基板９０は樹脂モールド時における下型の機能を果たす。これにより、電鋳基板９０上に複数の光半導体素子１０等が配列されて樹脂５０により一体的に封止された形態となる。なお、モールド時に複数の電鋳基板９０を並列に配置して、樹脂９０をランナーにより分配して各電鋳基板９０と上型との間に圧入するようにすれば、効率よく多数の樹脂封止を行うことが可能である。   In the resin sealing step (step S5) subsequent to the semiconductor element mounting step (step S4), the optical semiconductor element 10, the metal plates 31, 32, and the bumps 41, 42 are covered and sealed with the resin 50 (FIG. 4). (B)). The resin 50 also enters between the light emitting part or the light receiving part of the optical semiconductor element 10 and the electroformed substrate 90. Specifically, at this time, the upper surface of the electroformed substrate 90 is mounted on the mold (upper mold), and the resin 50 is press-fitted into the cavity in the mold. At this time, the electroformed substrate 90 functions as a lower mold during resin molding. As a result, a plurality of optical semiconductor elements 10 and the like are arranged on the electroformed substrate 90 and are integrally sealed with the resin 50. If a plurality of electroformed substrates 90 are arranged in parallel at the time of molding and the resin 90 is distributed by a runner and press-fitted between each electroformed substrate 90 and the upper mold, a large number of resin seals can be efficiently provided. Can be stopped.

樹脂封止工程（ステップＳ５）に続く電鋳基板除去工程（ステップＳ６）では、電鋳基板９０が除去されることにより、金属板３１，３２の下面が露出した樹脂封止体が得られる（図４（ｃ））。電鋳基板９０を除去する方法としては、樹脂封止体から電鋳基板９０を機械的に引き剥がす等の強制的に剥離除去する方法の他、電鋳基板９０等を構成する材質に応じては、樹脂封止体側への影響のない溶剤等により電鋳基板９０を溶解して除去する方法も可能である。金属板３１，３２それぞれの下面および樹脂５０の下面は、共通の仮想平面上にある。なお、本工程後に必要に応じて、金属板３１，３２それぞれの下面に、実装用に金および銀等の導電性金属層の薄膜をフラッシュメッキ等の方法により０.３〜０.５μｍ厚で形成するようにしてもよい。   In the electroformed substrate removal step (step S6) subsequent to the resin sealing step (step S5), the resin-cast body in which the lower surfaces of the metal plates 31 and 32 are exposed is obtained by removing the electroformed substrate 90 ( FIG. 4 (c)). As a method for removing the electroformed substrate 90, depending on the material constituting the electroformed substrate 90 and the like, in addition to a method for forcibly separating and removing the electroformed substrate 90 from the resin sealing body, etc. The method of dissolving and removing the electroformed substrate 90 with a solvent or the like that does not affect the resin sealing body side is also possible. The lower surfaces of the metal plates 31 and 32 and the lower surface of the resin 50 are on a common virtual plane. If necessary, a thin film of a conductive metal layer such as gold or silver is mounted on the lower surface of each of the metal plates 31 and 32 by a method such as flash plating on the lower surfaces of the metal plates 31 and 32 as necessary after this step. You may make it form.

電鋳基板除去工程（ステップＳ６）に続く切断工程（ステップＳ７）では、図４（ｃ）中において点線で示される切断線に沿って上記の樹脂封止体が切断されて、これにより、個々の半導体装置１（図１）が製造される。   In the cutting process (step S7) subsequent to the electroformed substrate removal process (step S6), the resin sealing body is cut along the cutting line indicated by the dotted line in FIG. The semiconductor device 1 (FIG. 1) is manufactured.

（第２実施形態）
次に、本発明に係る半導体装置および半導体装置製造方法の第２実施形態について説明する。図５は、第２実施形態に係る半導体装置２の上面図，断面図および底面図である。同図（ａ）は上面図を示し、同図（ｂ）は断面図を示し、同図（ｃ）は底面図を示す。この図に示される半導体装置２では、光半導体素子１０、フィルタ２１、金属板３１，３２およびバンプ４１，４２が、樹脂５０により封止されている。半導体装置２は全体として凡そ直方体形状である。 (Second Embodiment)
Next, a semiconductor device and a semiconductor device manufacturing method according to a second embodiment of the present invention will be described. FIG. 5 is a top view, a cross-sectional view, and a bottom view of the semiconductor device 2 according to the second embodiment. FIG. 1A shows a top view, FIG. 1B shows a cross-sectional view, and FIG. 1C shows a bottom view. In the semiconductor device 2 shown in this figure, the optical semiconductor element 10, the filter 21, the metal plates 31 and 32, and the bumps 41 and 42 are sealed with a resin 50. The semiconductor device 2 has a substantially rectangular parallelepiped shape as a whole.

図１に示された第１実施形態に係る半導体装置１と比較すると、この図５に示される第２実施形態に係る半導体装置２は、フィルタ２１を更に備える点で相違している。すなわち、図１に示された第１実施形態に係る半導体装置１では、光半導体素子１０が発光または受光する光は透明な樹脂５０を透過した。これに対して、図５に示される第２実施形態に係る半導体装置２では、金属板３１，３２の下面を含む仮想平面と光半導体素子１０の下面との間にフィルタ２１が設けられている。このフィルタ２１は、光半導体素子１０が発光または受光する光に対して波長選択性を有していて、所定の透過帯域に含まれる波長の光を選択的に透過させる。   Compared with the semiconductor device 1 according to the first embodiment shown in FIG. 1, the semiconductor device 2 according to the second embodiment shown in FIG. 5 is different in that it further includes a filter 21. That is, in the semiconductor device 1 according to the first embodiment shown in FIG. 1, the light emitted or received by the optical semiconductor element 10 is transmitted through the transparent resin 50. In contrast, in the semiconductor device 2 according to the second embodiment shown in FIG. 5, the filter 21 is provided between the virtual plane including the lower surfaces of the metal plates 31 and 32 and the lower surface of the optical semiconductor element 10. . The filter 21 has wavelength selectivity with respect to light emitted or received by the optical semiconductor element 10 and selectively transmits light having a wavelength included in a predetermined transmission band.

このような構成とすることにより、第２実施形態に係る半導体装置２は、フィルタを別途設ける必要がなく、フィルタをも一体化した構成のものであるので、フィルタ２１を含めた全体として小型化が可能である。なお、フィルタ２１は、樹脂５０との密着性がよい材料からなるのが好ましい。   By adopting such a configuration, the semiconductor device 2 according to the second embodiment does not need to be separately provided with a filter, and has a configuration in which the filter is also integrated. Therefore, the entire size including the filter 21 is reduced. Is possible. The filter 21 is preferably made of a material having good adhesion with the resin 50.

この第２実施形態に係る半導体装置２は、図２〜図４を用いて説明した製造方法と略同様にして製造される。ただし、レジストパターン除去工程（ステップＳ３）より後の工程が相違する。図６は、第２実施形態に係る半導体装置２を製造する方法を説明する工程図である。   The semiconductor device 2 according to the second embodiment is manufactured in substantially the same manner as the manufacturing method described with reference to FIGS. However, the steps after the resist pattern removing step (step S3) are different. FIG. 6 is a process diagram illustrating a method for manufacturing the semiconductor device 2 according to the second embodiment.

レジストパターン除去工程（ステップＳ３）の後であって半導体素子搭載工程（ステップＳ４）の前に、電鋳基板９０の主面上であって光半導体素子１０の搭載位置の下方にフィルタ２１が配置される。その後、半導体素子搭載工程（ステップＳ４）において、光半導体素子１０の電極パッド１１，１２が金属板３１，３２にバンプ４１，４２で接続される（図５（ａ））。   After the resist pattern removing process (step S3) and before the semiconductor element mounting process (step S4), the filter 21 is disposed on the main surface of the electroformed substrate 90 and below the mounting position of the optical semiconductor element 10. Is done. Thereafter, in the semiconductor element mounting step (step S4), the electrode pads 11 and 12 of the optical semiconductor element 10 are connected to the metal plates 31 and 32 by the bumps 41 and 42 (FIG. 5A).

半導体素子搭載工程（ステップＳ４）に続く樹脂封止工程（ステップＳ５）では、光半導体素子１０、フィルタ２１、金属板３１，３２およびバンプ４１，４２は、樹脂５０により覆われて封止される（図６（ｂ））。   In the resin sealing step (step S5) subsequent to the semiconductor element mounting step (step S4), the optical semiconductor element 10, the filter 21, the metal plates 31, 32, and the bumps 41, 42 are covered and sealed with the resin 50. (FIG. 6B).

樹脂封止工程（ステップＳ５）に続く電鋳基板除去工程（ステップＳ６）では、電鋳基板９０が除去されることにより、フィルタ２１および金属板３１，３２それぞれの下面が露出した樹脂封止体が得られる（図６（ｃ））。   In the electroformed substrate removing step (step S6) subsequent to the resin sealing step (step S5), the resin encapsulated body in which the lower surfaces of the filter 21 and the metal plates 31 and 32 are exposed by removing the electroformed substrate 90. Is obtained (FIG. 6C).

そして、電鋳基板除去工程（ステップＳ６）に続く切断工程（ステップＳ７）では、図６（ｃ）中において点線で示される切断線に沿って上記の樹脂封止体が切断されて、これにより、個々の半導体装置２（図５）が製造される。   Then, in the cutting step (step S7) subsequent to the electroformed substrate removal step (step S6), the resin sealing body is cut along the cutting line indicated by the dotted line in FIG. Individual semiconductor devices 2 (FIG. 5) are manufactured.

（第３実施形態）
次に、本発明に係る半導体装置および半導体装置製造方法の第３実施形態について説明する。図７は、第３実施形態に係る半導体装置３の上面図，断面図および底面図である。同図（ａ）は上面図を示し、同図（ｂ）は断面図を示し、同図（ｃ）は底面図を示す。この図に示される半導体装置３では、光半導体素子１０、マスク２２、金属板３１，３２およびバンプ４１，４２が、樹脂５０により封止されている。半導体装置３は全体として凡そ直方体形状である。 (Third embodiment)
Next, a semiconductor device and a semiconductor device manufacturing method according to a third embodiment of the present invention will be described. FIG. 7 is a top view, a cross-sectional view, and a bottom view of the semiconductor device 3 according to the third embodiment. FIG. 1A shows a top view, FIG. 1B shows a cross-sectional view, and FIG. 1C shows a bottom view. In the semiconductor device 3 shown in this figure, the optical semiconductor element 10, the mask 22, the metal plates 31 and 32, and the bumps 41 and 42 are sealed with a resin 50. The semiconductor device 3 has a substantially rectangular parallelepiped shape as a whole.

図１に示された第１実施形態に係る半導体装置１と比較すると、この図７に示される第３実施形態に係る半導体装置３は、マスク２２を更に備える点で相違している。すなわち、図１に示された第１実施形態に係る半導体装置１では、光半導体素子１０が発光または受光する光は、空間的な制約を受けること無く透明な樹脂５０を透過した。これに対して、図７に示される第３実施形態に係る半導体装置３では、金属板３１，３２の下面を含む仮想平面と光半導体素子１０の下面との間にマスク２２が設けられている。このマスク２２は、光半導体素子１０が発光または受光する光に対して空間選択性を有していて、例えばマスク２２に設けられた開口やスリットを通過する光を選択的に透過させる。   Compared with the semiconductor device 1 according to the first embodiment shown in FIG. 1, the semiconductor device 3 according to the third embodiment shown in FIG. 7 is different in that it further includes a mask 22. That is, in the semiconductor device 1 according to the first embodiment shown in FIG. 1, the light emitted or received by the optical semiconductor element 10 is transmitted through the transparent resin 50 without being restricted by space. In contrast, in the semiconductor device 3 according to the third embodiment shown in FIG. 7, the mask 22 is provided between the virtual plane including the lower surfaces of the metal plates 31 and 32 and the lower surface of the optical semiconductor element 10. . The mask 22 has spatial selectivity with respect to light emitted or received by the optical semiconductor element 10 and selectively transmits light passing through, for example, an opening or slit provided in the mask 22.

このような構成とすることにより、第３実施形態に係る半導体装置３は、マスクを別途設ける必要がなく、マスクをも一体化した構成のものであるので、マスク２２を含めた全体として小型化が可能である。なお、マスク２２は、樹脂５０との密着性がよい材料からなるのが好ましい。   By adopting such a configuration, the semiconductor device 3 according to the third embodiment does not need to be separately provided with a mask, and has a configuration in which the mask is also integrated. Therefore, the entire size including the mask 22 is reduced. Is possible. The mask 22 is preferably made of a material having good adhesion with the resin 50.

この第３実施形態に係る半導体装置３は、図２〜図４を用いて説明した製造方法と略同様にして製造される。ただし、レジストパターン除去工程（ステップＳ３）より後の工程が相違する。図８は、第３実施形態に係る半導体装置３を製造する方法を説明する工程図である。   The semiconductor device 3 according to the third embodiment is manufactured in substantially the same manner as the manufacturing method described with reference to FIGS. However, the steps after the resist pattern removing step (step S3) are different. FIG. 8 is a process diagram illustrating a method for manufacturing the semiconductor device 3 according to the third embodiment.

レジストパターン除去工程（ステップＳ３）の後であって半導体素子搭載工程（ステップＳ４）の前に、電鋳基板９０の主面上であって光半導体素子１０の搭載位置の下方にマスク２２が配置される。なお、マスク２２は、電着工程（ステップＳ２）において金属板３１，３２と同時に形成されてもよい。その後、半導体素子搭載工程（ステップＳ４）において、光半導体素子１０の電極パッド１１，１２が金属板３１，３２にバンプ４１，４２で接続される（図７（ａ））。   After the resist pattern removing step (step S3) and before the semiconductor element mounting step (step S4), the mask 22 is disposed on the main surface of the electroformed substrate 90 and below the mounting position of the optical semiconductor element 10. Is done. The mask 22 may be formed simultaneously with the metal plates 31 and 32 in the electrodeposition process (step S2). Thereafter, in the semiconductor element mounting step (step S4), the electrode pads 11 and 12 of the optical semiconductor element 10 are connected to the metal plates 31 and 32 by the bumps 41 and 42 (FIG. 7A).

半導体素子搭載工程（ステップＳ４）に続く樹脂封止工程（ステップＳ５）では、光半導体素子１０、マスク２２、金属板３１，３２およびバンプ４１，４２は、樹脂５０により覆われて封止される（図８（ｂ））。   In the resin sealing process (step S5) subsequent to the semiconductor element mounting process (step S4), the optical semiconductor element 10, the mask 22, the metal plates 31, 32, and the bumps 41, 42 are covered and sealed with the resin 50. (FIG. 8B).

樹脂封止工程（ステップＳ５）に続く電鋳基板除去工程（ステップＳ６）では、電鋳基板９０が除去されることにより、マスク２２および金属板３１，３２それぞれの下面が露出した樹脂封止体が得られる（図８（ｃ））。   In the electroformed substrate removing step (step S6) subsequent to the resin sealing step (step S5), the resin molded body in which the lower surfaces of the mask 22 and the metal plates 31 and 32 are exposed by removing the electroformed substrate 90. Is obtained (FIG. 8C).

そして、電鋳基板除去工程（ステップＳ６）に続く切断工程（ステップＳ７）では、図８（ｃ）中において点線で示される切断線に沿って上記の樹脂封止体が切断されて、これにより、個々の半導体装置３（図７）が製造される。   Then, in the cutting step (step S7) following the electroformed substrate removal step (step S6), the resin sealing body is cut along the cutting line indicated by the dotted line in FIG. Individual semiconductor devices 3 (FIG. 7) are manufactured.

（第４実施形態）
次に、本発明に係る半導体装置および半導体装置製造方法の第４実施形態について説明する。図９は、第４実施形態に係る半導体装置４の上面図，断面図および底面図である。同図（ａ）は上面図を示し、同図（ｂ）は断面図を示し、同図（ｃ）は底面図を示す。この図に示される半導体装置４では、光半導体素子１０、金属板３１，３２およびバンプ４１，４２が、樹脂５０により封止されている。 (Fourth embodiment)
Next, a semiconductor device and a semiconductor device manufacturing method according to a fourth embodiment of the invention will be described. FIG. 9 is a top view, a cross-sectional view, and a bottom view of the semiconductor device 4 according to the fourth embodiment. FIG. 1A shows a top view, FIG. 1B shows a cross-sectional view, and FIG. 1C shows a bottom view. In the semiconductor device 4 shown in this figure, the optical semiconductor element 10, the metal plates 31 and 32, and the bumps 41 and 42 are sealed with a resin 50.

図１に示された第１実施形態に係る半導体装置１と比較すると、この図９に示される第４実施形態に係る半導体装置４は、下面において樹脂５０が凸部５１を有していて、その凸部５１が凸レンズ形状を有している点で相違する。この凸レンズとしての凸部５１は、光半導体素子１０が発光または受光する光に対して集光作用を有する。   Compared with the semiconductor device 1 according to the first embodiment shown in FIG. 1, the semiconductor device 4 according to the fourth embodiment shown in FIG. The difference is that the convex portion 51 has a convex lens shape. The convex portion 51 as the convex lens has a condensing function for the light emitted or received by the optical semiconductor element 10.

この第４実施形態では、光半導体素子１０が発光ダイオードである場合、この光半導体素子１０から出力された光は、透明な樹脂５０の凸部５１によりコリメートされて外部へ出力される。光半導体素子１０がフォトダイオードである場合、外部から透明な樹脂５０の凸部５１に入射した光は、この凸部５１により収斂されて光半導体素子１０により受光される。このように、本実施形態に係る半導体装置４は、集光レンズを別途設ける必要がなく、集光レンズをも一体化した構成のものであるので、集光レンズを含めた全体として小型化が可能である。   In the fourth embodiment, when the optical semiconductor element 10 is a light emitting diode, the light output from the optical semiconductor element 10 is collimated by the convex portions 51 of the transparent resin 50 and output to the outside. When the optical semiconductor element 10 is a photodiode, light incident on the convex portion 51 of the transparent resin 50 from the outside is converged by the convex portion 51 and received by the optical semiconductor element 10. As described above, the semiconductor device 4 according to the present embodiment does not need to be separately provided with a condensing lens, and has a configuration in which the condensing lens is also integrated. Is possible.

この第４実施形態に係る半導体装置４は、図２〜図４を用いて説明した製造方法と略同様にして製造される。ただし、電鋳基板９０として、光半導体素子１０が搭載されるべき領域に凹面を有するものが用いられる。図１０および図１１は、第４実施形態に係る半導体装置４を製造する方法を説明する工程図である。   The semiconductor device 4 according to the fourth embodiment is manufactured in substantially the same manner as the manufacturing method described with reference to FIGS. However, as the electroformed substrate 90, a substrate having a concave surface in the region where the optical semiconductor element 10 is to be mounted is used. 10 and 11 are process diagrams illustrating a method for manufacturing the semiconductor device 4 according to the fourth embodiment.

初めに、レジストパターン形成工程（ステップＳ１）では、導電性を有する電鋳基板９０の主面上に所定のレジストパターン９１が形成される（図１０（ａ），（ｂ））。ここで用いられる電鋳基板９０は、レジストパターン９１が形成されるべき一方の主面において、光半導体素子１０が搭載されるべき領域に凹面が形成されている。この電鋳基板９０の両面にレジスト９１，９２が塗布され（図１０（ａ））、このレジストが塗布された電鋳基板９０の一方の主面上に所定パターンのマスクが配され、この状態で紫外線照射による両面露光が行われ、現像処理が行われる。これにより、電鋳基板９０の主面上のレジストが硬化し、所定のレジストパターン９１が形成される（図１０（ｂ））。このとき、レジスト９１は、電鋳基板９０の主面上の凹面領域に残っている。   First, in the resist pattern forming step (step S1), a predetermined resist pattern 91 is formed on the main surface of the electroformed substrate 90 having conductivity (FIGS. 10A and 10B). The electroformed substrate 90 used here has a concave surface in a region where the optical semiconductor element 10 is to be mounted on one main surface where the resist pattern 91 is to be formed. Resists 91 and 92 are applied to both surfaces of the electroformed substrate 90 (FIG. 10A), and a mask having a predetermined pattern is arranged on one main surface of the electroformed substrate 90 to which the resist is applied. Then, double-sided exposure is performed by ultraviolet irradiation, and development processing is performed. Thereby, the resist on the main surface of the electroformed substrate 90 is cured, and a predetermined resist pattern 91 is formed (FIG. 10B). At this time, the resist 91 remains in the concave area on the main surface of the electroformed substrate 90.

電着工程（ステップＳ２）では、レジストパターン９１を除く電鋳基板９０の主面の露出部上に導電性金属が電着されて、電鋳基板９０の主面上に金属板３１，３２が形成される（図１０（ｃ））。レジストパターン除去工程（ステップＳ３）では、電鋳基板９０からレジスト９１，９２が除去される（図１０（ｄ））。   In the electrodeposition process (step S <b> 2), conductive metal is electrodeposited on the exposed portion of the main surface of the electroformed substrate 90 excluding the resist pattern 91, and the metal plates 31 and 32 are formed on the main surface of the electroformed substrate 90. It is formed (FIG. 10C). In the resist pattern removing step (step S3), the resists 91 and 92 are removed from the electroformed substrate 90 (FIG. 10D).

半導体素子搭載工程（ステップＳ４）では、光半導体素子１０の電極パッド１１，１２が金属板３１，３２にバンプ４１，４２で接続される（図１１（ａ））。樹脂封止工程（ステップＳ５）では、光半導体素子１０、金属板３１，３２およびバンプ４１，４２は、樹脂５０により覆われて封止される（図１１（ｂ））。光半導体素子１０の発光部または受光部と電鋳基板９０との間にも樹脂５０が侵入する。このとき、光半導体素子１０の下方では、電鋳基板９０の主面において凹面領域となっているので、凸部５１が形成される。   In the semiconductor element mounting step (step S4), the electrode pads 11 and 12 of the optical semiconductor element 10 are connected to the metal plates 31 and 32 by the bumps 41 and 42 (FIG. 11A). In the resin sealing step (step S5), the optical semiconductor element 10, the metal plates 31, 32, and the bumps 41, 42 are covered and sealed with the resin 50 (FIG. 11B). The resin 50 also enters between the light emitting part or the light receiving part of the optical semiconductor element 10 and the electroformed substrate 90. At this time, a convex portion 51 is formed below the optical semiconductor element 10 because it is a concave region on the main surface of the electroformed substrate 90.

電鋳基板除去工程（ステップＳ６）では、電鋳基板９０が除去されることにより、金属板３１，３２の下面が露出した樹脂封止体が得られる（図１１（ｃ））。切断工程（ステップＳ７）では、図１１（ｃ）中において点線で示される切断線に沿って上記の樹脂封止体が切断されて、これにより、個々の半導体装置４（図９）が製造される。   In the electroformed substrate removing step (step S6), the electroformed substrate 90 is removed, thereby obtaining a resin sealing body in which the lower surfaces of the metal plates 31 and 32 are exposed (FIG. 11C). In the cutting step (step S7), the resin sealing body is cut along a cutting line indicated by a dotted line in FIG. 11C, whereby individual semiconductor devices 4 (FIG. 9) are manufactured. The

（第５実施形態）
次に、本発明に係る半導体装置および半導体装置製造方法の第５実施形態について説明する。図１２は、第５実施形態に係る半導体装置５の断面図である。この図に示される半導体装置５では、光半導体素子１０、金属板３１，３２およびバンプ４１，４２が、樹脂５０により封止されている。また、透明樹脂からなる凸レンズ形状の凸部５２が設けられている。 (Fifth embodiment)
Next, a semiconductor device and a semiconductor device manufacturing method according to a fifth embodiment of the invention will be described. FIG. 12 is a cross-sectional view of the semiconductor device 5 according to the fifth embodiment. In the semiconductor device 5 shown in this figure, the optical semiconductor element 10, the metal plates 31 and 32, and the bumps 41 and 42 are sealed with a resin 50. Moreover, the convex part 52 of the convex lens shape which consists of transparent resin is provided.

図９に示された第４実施形態に係る半導体装置４と比較すると、この図１２に示される第５実施形態に係る半導体装置５は、金属板３１，３２の形状の点で相違し、また、凸部５１に替えて凸部５２が設けられている点で相違する。半導体装置４の下面において、金属板３１，３２が平板状ではなく、中央部と比べて周縁部が外側へ突出している。そして、その凹部となっている中央部に、透明樹脂からなる凸レンズ形状の凸部５２が設けられている。   Compared with the semiconductor device 4 according to the fourth embodiment shown in FIG. 9, the semiconductor device 5 according to the fifth embodiment shown in FIG. 12 is different in terms of the shapes of the metal plates 31 and 32, and The difference is that a convex portion 52 is provided instead of the convex portion 51. On the lower surface of the semiconductor device 4, the metal plates 31 and 32 are not flat, and the peripheral edge protrudes outward compared to the central part. And the convex part 52 of the convex lens shape which consists of transparent resin is provided in the center part used as the recessed part.

この第５実施形態では、光半導体素子１０が発光ダイオードである場合、この光半導体素子１０から出力された光は、透明樹脂からなる凸部５２によりコリメートされて外部へ出力される。光半導体素子１０がフォトダイオードである場合、外部から凸部５２に入射した光は、この凸部５２により収斂されて光半導体素子１０により受光される。このように、本実施形態に係る半導体装置５は、集光レンズを別途設ける必要がなく、集光レンズをも一体化した構成のものであるので、集光レンズを含めた全体として小型化が可能である。   In the fifth embodiment, when the optical semiconductor element 10 is a light emitting diode, the light output from the optical semiconductor element 10 is collimated by the convex portion 52 made of a transparent resin and output to the outside. When the optical semiconductor element 10 is a photodiode, light incident on the convex portion 52 from the outside is converged by the convex portion 52 and received by the optical semiconductor element 10. As described above, the semiconductor device 5 according to the present embodiment does not need to be provided with a condensing lens and has a configuration in which the condensing lens is also integrated. Is possible.

この第５実施形態に係る半導体装置５は、図２および図１３に示される方法により製造される。図１３は、第５実施形態に係る半導体装置５を製造する方法を説明する工程図である。   The semiconductor device 5 according to the fifth embodiment is manufactured by the method shown in FIGS. FIG. 13 is a process diagram illustrating a method for manufacturing the semiconductor device 5 according to the fifth embodiment.

本実施形態では、電鋳基板９０として一方の主面に凹部領域（金属板３１，３２が形成されるべき領域）を有するものが用意される。レジストパターン形成工程（ステップＳ１），電着工程（ステップＳ２）およびレジストパターン除去工程（ステップＳ３）を経て、電鋳基板９０の凹部領域および当該周辺領域に金属板３１，３２が形成される（図１３（ａ））。   In the present embodiment, an electroformed substrate 90 having a concave area (area where the metal plates 31 and 32 are to be formed) on one main surface is prepared. Through the resist pattern forming process (step S1), the electrodeposition process (step S2), and the resist pattern removing process (step S3), the metal plates 31 and 32 are formed in the recessed area and the peripheral area of the electroformed substrate 90 ( FIG. 13 (a)).

半導体素子搭載工程（ステップＳ４）では、光半導体素子１０の電極パッド１１，１２が金属板３１，３２にバンプ４１，４２で接続される（図１３（ｂ））。樹脂封止工程（ステップＳ５）では、光半導体素子１０、金属板３１，３２およびバンプ４１，４２は、樹脂５０により覆われて封止される（図１３（ｃ））。光半導体素子１０の発光部または受光部と電鋳基板９０との間にも樹脂５０が侵入する。   In the semiconductor element mounting step (step S4), the electrode pads 11 and 12 of the optical semiconductor element 10 are connected to the metal plates 31 and 32 by the bumps 41 and 42 (FIG. 13B). In the resin sealing step (step S5), the optical semiconductor element 10, the metal plates 31, 32, and the bumps 41, 42 are covered and sealed with the resin 50 (FIG. 13C). The resin 50 also enters between the light emitting part or the light receiving part of the optical semiconductor element 10 and the electroformed substrate 90.

電鋳基板除去工程（ステップＳ６）では、電鋳基板９０が除去されることにより、金属板３１，３２の下面が露出した樹脂封止体が得られる（図１３（ｄ））。その後、この樹脂封止体の下面の凹部領域に、透明樹脂からなる凸レンズ形状の凸部５２が形成される（図１３（ｅ））。そして、切断工程（ステップＳ７）で、図１３（ｅ）中において点線で示される切断線に沿って上記の樹脂封止体が切断されて、これにより、個々の半導体装置５（図１２）が製造される。   In the electroformed substrate removing step (step S6), by removing the electroformed substrate 90, a resin sealing body in which the lower surfaces of the metal plates 31 and 32 are exposed is obtained (FIG. 13D). Thereafter, a convex lens-shaped convex portion 52 made of a transparent resin is formed in the concave region on the lower surface of the resin sealing body (FIG. 13E). Then, in the cutting step (step S7), the resin sealing body is cut along a cutting line indicated by a dotted line in FIG. 13E, whereby each semiconductor device 5 (FIG. 12) is cut. Manufactured.

（第６実施形態）
次に、本発明に係る半導体装置および半導体装置製造方法の第６実施形態について説明する。図１４は、第６実施形態に係る半導体装置６の上面図，断面図および底面図である。同図（ａ）は上面図を示し、同図（ｂ）は同図（a）に示されるXIV−XIV断面図を示し、同図（ｃ）は底面図を示す。この図に示される半導体装置６では、光半導体素子１０、金属板３１，３２およびバンプ４１，４２が、樹脂５０により封止されている。 (Sixth embodiment)
Next, a semiconductor device and a semiconductor device manufacturing method according to a sixth embodiment of the invention will be described. FIG. 14 is a top view, a cross-sectional view, and a bottom view of the semiconductor device 6 according to the sixth embodiment. The figure (a) shows a top view, the figure (b) shows the XIV-XIV sectional view shown in the figure (a), and the figure (c) shows the bottom view. In the semiconductor device 6 shown in this figure, the optical semiconductor element 10, the metal plates 31 and 32, and the bumps 41 and 42 are sealed with a resin 50.

図１に示された第１実施形態に係る半導体装置１と比較すると、この図１４に示される第６実施形態に係る半導体装置６は、金属板３１，３２の一部が側方に突出して樹脂５０に覆われること無く露出している点で相違する。このようにすることにより、光半導体素子１０からの出力信号を金属板３１，３２を経て半導体装置６の上方に取り出すことができ、或いは、光半導体素子１０を駆動するための駆動信号を半導体装置６の上方から金属板３１，３２を経て光半導体素子１０に供給することができる。   Compared with the semiconductor device 1 according to the first embodiment shown in FIG. 1, the semiconductor device 6 according to the sixth embodiment shown in FIG. 14 has a part of the metal plates 31 and 32 protruding sideways. The difference is that the resin 50 is exposed without being covered. By doing so, an output signal from the optical semiconductor element 10 can be taken out above the semiconductor device 6 through the metal plates 31 and 32, or a drive signal for driving the optical semiconductor element 10 is supplied to the semiconductor device. 6 can be supplied to the optical semiconductor element 10 through the metal plates 31 and 32 from above.

なお、図１５に示される半導体装置６Ａの構成の如く、金属板３１，３２の一部で側方に突出した露出部の上面に、例えば導電性ペーストからなる導電体６１，６２，６３，６４が設けられていてもよい。   Note that, as in the configuration of the semiconductor device 6A shown in FIG. 15, conductors 61, 62, 63, and 64 made of, for example, conductive paste are formed on the upper surfaces of the exposed portions of the metal plates 31 and 32 protruding sideways. May be provided.

この第６実施形態に係る半導体装置６は、図２〜図４を用いて説明した製造方法と略同様にして製造される。ただし、図１６に示されるように、樹脂封止工程（ステップＳ５）においては、金属板３１，３２の端部に樹脂５０を密着させないような形状を有する上型９３を用いて、半導体素子１０，金属板３１，３２およびバンプ４１，４２を樹脂５０で覆う。このようにすることにより、金属板３１，３２の一部を側方に突出させて露出させることができる。図においては、金属板の一部が側方に突出する例としたが、側方の全てで金属板が突出してもよい。   The semiconductor device 6 according to the sixth embodiment is manufactured in substantially the same manner as the manufacturing method described with reference to FIGS. However, as shown in FIG. 16, in the resin sealing step (step S <b> 5), the semiconductor element 10 is formed using the upper mold 93 having a shape that does not allow the resin 50 to adhere to the ends of the metal plates 31 and 32. The metal plates 31 and 32 and the bumps 41 and 42 are covered with a resin 50. By doing in this way, a part of metal plates 31 and 32 can be made to protrude sideways, and can be exposed. In the drawing, a part of the metal plate protrudes to the side, but the metal plate may protrude from all sides.

（第７実施形態）
次に、本発明に係る半導体装置および半導体装置製造方法の第７実施形態について説明する。図１７は、第７実施形態に係る半導体装置７の上面図，断面図および底面図である。同図（ａ）は上面図を示し、同図（ｂ）は同図（a）に示されるXVII−XVII断面図を示し、同図（ｃ）は底面図を示す。この図に示される半導体装置７では、光半導体素子１０、金属板３１，３２およびバンプ４１，４２が、樹脂５０により封止されている。 (Seventh embodiment)
Next, a semiconductor device and a semiconductor device manufacturing method according to a seventh embodiment of the invention will be described. FIG. 17 is a top view, a cross-sectional view, and a bottom view of the semiconductor device 7 according to the seventh embodiment. FIG. 2A shows a top view, FIG. 2B shows a cross-sectional view along XVII-XVII shown in FIG. 1A, and FIG. 1C shows a bottom view. In the semiconductor device 7 shown in this figure, the optical semiconductor element 10, the metal plates 31 and 32, and the bumps 41 and 42 are sealed with a resin 50.

図１に示された第１実施形態に係る半導体装置１と比較すると、この図１７に示される第７実施形態に係る半導体装置７は、金属板３１，３２の途中の一部が樹脂５０に覆われること無く露出している点で相違する。このようにすることにより、光半導体素子１０からの出力信号を金属板３１，３２を経て半導体装置７の上方に取り出すことができ、或いは、光半導体素子１０を駆動するための駆動信号を半導体装置７の上方から金属板３１，３２を経て光半導体素子１０に供給することができる。   Compared with the semiconductor device 1 according to the first embodiment shown in FIG. 1, the semiconductor device 7 according to the seventh embodiment shown in FIG. It differs in that it is exposed without being covered. By doing so, an output signal from the optical semiconductor element 10 can be taken out above the semiconductor device 7 through the metal plates 31 and 32, or a drive signal for driving the optical semiconductor element 10 is supplied to the semiconductor device. 7 can be supplied to the optical semiconductor element 10 through the metal plates 31 and 32 from above.

なお、図１８に示される半導体装置７Ａの構成の如く、金属板３１，３２の途中の露出部の上面に、例えば導電性ペーストからなる導電体６１，６２，６３，６４が設けられていてもよい。   Note that, as in the configuration of the semiconductor device 7A shown in FIG. 18, conductors 61, 62, 63, and 64 made of, for example, a conductive paste are provided on the upper surface of the exposed portion in the middle of the metal plates 31 and 32. Good.

この第７実施形態に係る半導体装置７は、図２〜図４を用いて説明した製造方法と略同様にして製造される。ただし、図１９に示されるように、樹脂封止工程（ステップＳ５）においては、金属板３１，３２の途中の一部に樹脂５０を密着させないような形状を有する上型９３を用いて、半導体素子１０，金属板３１，３２およびバンプ４１，４２を樹脂５０で覆う。このようにすることにより、金属板３１，３２の途中の一部を露出させることができる。   The semiconductor device 7 according to the seventh embodiment is manufactured in substantially the same manner as the manufacturing method described with reference to FIGS. However, as shown in FIG. 19, in the resin sealing step (step S <b> 5), the upper mold 93 having a shape that does not allow the resin 50 to adhere to a part of the metal plates 31 and 32 is used to form a semiconductor. The element 10, the metal plates 31 and 32, and the bumps 41 and 42 are covered with a resin 50. By doing so, part of the metal plates 31 and 32 can be exposed.

（第８実施形態）
次に、本発明に係る半導体装置および半導体装置製造方法の第８実施形態について説明する。図２０は、第８実施形態に係る半導体装置８の断面図である。この図に示される半導体装置８では、光半導体素子１０、金属板３１，３２およびバンプ４１，４２が、樹脂５０により封止されている。 (Eighth embodiment)
Next, an eighth embodiment of a semiconductor device and a semiconductor device manufacturing method according to the present invention will be described. FIG. 20 is a cross-sectional view of the semiconductor device 8 according to the eighth embodiment. In the semiconductor device 8 shown in this figure, the optical semiconductor element 10, the metal plates 31 and 32, and the bumps 41 and 42 are sealed with a resin 50.

図１に示された第１実施形態に係る半導体装置１と比較すると、この図２０に示される第８実施形態に係る半導体装置８は、下面において金属板３１，３２の下面に対して樹脂５０の表面が後退している点で相違する。換言すれば、半導体装置８の下面において樹脂５０の表面に対して金属板３１，３２が突出している。   Compared with the semiconductor device 1 according to the first embodiment shown in FIG. 1, the semiconductor device 8 according to the eighth embodiment shown in FIG. The difference is that the surface of the is receding. In other words, the metal plates 31 and 32 protrude from the surface of the resin 50 on the lower surface of the semiconductor device 8.

この第８実施形態に係る半導体装置８は、第１実施形態に係る半導体装置１と同様の効果を有する他、樹脂５０の表面に対して金属板３１，３２が突出していることにより、プリント基板等に実装する際に半田等の染み出しの問題が軽減される。   The semiconductor device 8 according to the eighth embodiment has the same effect as that of the semiconductor device 1 according to the first embodiment, and the metal plates 31 and 32 protrude from the surface of the resin 50. The problem of seepage of solder or the like when mounted on the board is reduced.

この第８実施形態に係る半導体装置８は、図２〜図４を用いて説明した製造方法と略同様にして製造される。ただし、ここで用いられる電鋳基板９０は、導電性金属が電着されるべき領域が他の領域に対して窪んでいる。このような電鋳基板９０を用いて以降は同様にして製造され得る。   The semiconductor device 8 according to the eighth embodiment is manufactured in substantially the same manner as the manufacturing method described with reference to FIGS. However, in the electroformed substrate 90 used here, the region where the conductive metal is to be electrodeposited is recessed with respect to other regions. Thereafter, the electroformed substrate 90 can be manufactured in the same manner.

（第９実施形態）
次に、本発明に係る半導体装置および半導体装置製造方法の第９実施形態について説明する。図２１は、第９実施形態に係る半導体装置９の断面図である。この図に示される半導体装置９では、光半導体素子１０、金属板３１，３２およびバンプ４１，４２が、樹脂５０により封止されている。 (Ninth embodiment)
Next, a semiconductor device and a semiconductor device manufacturing method according to a ninth embodiment of the invention will be described. FIG. 21 is a cross-sectional view of the semiconductor device 9 according to the ninth embodiment. In the semiconductor device 9 shown in this figure, the optical semiconductor element 10, the metal plates 31 and 32, and the bumps 41 and 42 are sealed with a resin 50.

図１に示された第１実施形態に係る半導体装置１と比較すると、この図２１に示される第９実施形態に係る半導体装置９は、下面において金属板３１，３２の下面に対して樹脂５０の表面が突出している点で相違する。換言すれば、半導体装置９の下面において樹脂５０の表面に対して金属板３１，３２が後退している。   Compared with the semiconductor device 1 according to the first embodiment shown in FIG. 1, the semiconductor device 9 according to the ninth embodiment shown in FIG. 21 has a resin 50 relative to the lower surfaces of the metal plates 31 and 32 on the lower surface. It differs in that the surface of is protruding. In other words, the metal plates 31 and 32 are retracted from the surface of the resin 50 on the lower surface of the semiconductor device 9.

この第９実施形態に係る半導体装置９は、第１実施形態に係る半導体装置１と同様の効果を有する他、樹脂５０の表面に対して金属板３１，３２が後退していることにより、プリント基板等に実装する際に半田等の染み出しの問題が軽減される。ただし、この半導体装置９が実装されるプリント基板等の表面においては、半導体装置９の下面の凹凸に応じて、金属板３１，３２と電気的接続が可能な形状を有していることが必要である。   The semiconductor device 9 according to the ninth embodiment has the same effect as that of the semiconductor device 1 according to the first embodiment, and the metal plates 31 and 32 are retreated with respect to the surface of the resin 50. The problem of seepage of solder or the like when mounting on a substrate or the like is reduced. However, the surface of the printed circuit board or the like on which the semiconductor device 9 is mounted must have a shape that can be electrically connected to the metal plates 31 and 32 according to the unevenness of the lower surface of the semiconductor device 9. It is.

この第９実施形態に係る半導体装置９は、図２〜図４を用いて説明した製造方法と略同様にして製造される。ただし、ここで用いられる電鋳基板９０は、導電性金属が電着されるべき領域が他の領域に対して突出している。このような電鋳基板９０を用いて以降は同様にして製造され得る。   The semiconductor device 9 according to the ninth embodiment is manufactured in substantially the same manner as the manufacturing method described with reference to FIGS. However, in the electroformed substrate 90 used here, the region where the conductive metal is to be electrodeposited protrudes from the other regions. Thereafter, the electroformed substrate 90 can be manufactured in the same manner.

第１実施形態に係る半導体装置１の上面図，断面図および底面図である。1 is a top view, a cross-sectional view, and a bottom view of a semiconductor device 1 according to a first embodiment. 第１実施形態に係る半導体装置１を製造する方法を説明するフローチャートである。4 is a flowchart illustrating a method for manufacturing the semiconductor device 1 according to the first embodiment. 第１実施形態に係る半導体装置１を製造する方法を説明する工程図である。It is process drawing explaining the method to manufacture the semiconductor device 1 which concerns on 1st Embodiment. 第１実施形態に係る半導体装置１を製造する方法を説明する工程図である。It is process drawing explaining the method to manufacture the semiconductor device 1 which concerns on 1st Embodiment. 第２実施形態に係る半導体装置２の上面図，断面図および底面図である。FIG. 6 is a top view, a cross-sectional view, and a bottom view of a semiconductor device 2 according to a second embodiment. 第２実施形態に係る半導体装置２を製造する方法を説明する工程図である。It is process drawing explaining the method to manufacture the semiconductor device 2 which concerns on 2nd Embodiment. 第３実施形態に係る半導体装置３の上面図，断面図および底面図である。FIG. 6 is a top view, a cross-sectional view, and a bottom view of a semiconductor device 3 according to a third embodiment. 第３実施形態に係る半導体装置３を製造する方法を説明する工程図である。It is process drawing explaining the method to manufacture the semiconductor device 3 which concerns on 3rd Embodiment. 第４実施形態に係る半導体装置４の上面図，断面図および底面図である。FIG. 6 is a top view, a cross-sectional view, and a bottom view of a semiconductor device 4 according to a fourth embodiment. 第４実施形態に係る半導体装置４を製造する方法を説明する工程図である。It is process drawing explaining the method of manufacturing the semiconductor device 4 which concerns on 4th Embodiment. 第４実施形態に係る半導体装置４を製造する方法を説明する工程図である。It is process drawing explaining the method of manufacturing the semiconductor device 4 which concerns on 4th Embodiment. 第５実施形態に係る半導体装置５の断面図である。It is sectional drawing of the semiconductor device 5 which concerns on 5th Embodiment. 第５実施形態に係る半導体装置５を製造する方法を説明する工程図である。It is process drawing explaining the method to manufacture the semiconductor device 5 which concerns on 5th Embodiment. 第６実施形態に係る半導体装置６の上面図，XIV−XIV断面図および底面図である。It is a top view, XIV-XIV sectional view, and bottom view of a semiconductor device 6 according to a sixth embodiment. 第６実施形態の変形例に係る半導体装置６Ａの上面図，XV−XV断面図および底面図である。It is a top view, XV-XV sectional view, and bottom view of a semiconductor device 6A according to a modification of the sixth embodiment. 第６実施形態に係る半導体装置６を製造する方法における樹脂封止工程を説明する図である。It is a figure explaining the resin sealing process in the method of manufacturing the semiconductor device 6 which concerns on 6th Embodiment. 第７実施形態に係る半導体装置７の上面図，XVII−XVII断面図および底面図である。It is a top view, XVII-XVII sectional view, and bottom view of a semiconductor device 7 according to a seventh embodiment. 第７実施形態の変形例に係る半導体装置７Ａの上面図，XVIII−XVIII断面図および底面図である。It is a top view, XVIII-XVIII sectional view, and bottom view of a semiconductor device 7A according to a modification of the seventh embodiment. 第７実施形態に係る半導体装置７を製造する方法における樹脂封止工程を説明する図である。It is a figure explaining the resin sealing process in the method of manufacturing the semiconductor device 7 which concerns on 7th Embodiment. 第８実施形態に係る半導体装置８の断面図である。It is sectional drawing of the semiconductor device 8 which concerns on 8th Embodiment. 第９実施形態に係る半導体装置９の断面図である。It is sectional drawing of the semiconductor device 9 which concerns on 9th Embodiment.

符号の説明Explanation of symbols

１〜９…半導体装置、１０…光半導体素子、１１，１２…電極パッド、２１…フィルタ、２２…マスク、３１，３２…金属板、４１，４２…バンプ、５０…樹脂、５１…凸部、５２…凸部、９０…電鋳基板、９１，９２…レジスト、９３…上型。   DESCRIPTION OF SYMBOLS 1-9 ... Semiconductor device, 10 ... Optical semiconductor element, 11, 12 ... Electrode pad, 21 ... Filter, 22 ... Mask, 31, 32 ... Metal plate, 41, 42 ... Bump, 50 ... Resin, 51 ... Convex part, 52 ... convex portion, 90 ... electroformed substrate, 91, 92 ... resist, 93 ... upper mold.

Claims (8)

互いに対向する第１面および第２面を有し、該第２面に電極パッドが形成されており、該第２面の側へ発光または該第２面の側から受光する光半導体素子と、
互いに対向する第１面および第２面を有し、該第１面が前記光半導体素子の前記電極パッドと接続された金属板と、
を備え、
前記光半導体素子が前記金属板の第２面に対して一方の側に設けられた樹脂により覆われ、
前記金属板の第２面が前記樹脂により覆われることなく露出している、
ことを特徴とする半導体装置。 An optical semiconductor element having a first surface and a second surface facing each other, an electrode pad being formed on the second surface, and emitting light to or receiving light from the second surface;
A metal plate having a first surface and a second surface facing each other, wherein the first surface is connected to the electrode pad of the optical semiconductor element;
With
The optical semiconductor element is covered with a resin provided on one side with respect to the second surface of the metal plate,
The second surface of the metal plate is exposed without being covered with the resin,
A semiconductor device. 前記光半導体素子の第２面の側に設けられ、前記光半導体素子が発光または受光する光に対して波長選択性を有するフィルタを更に備えることを特徴とする請求項１記載の半導体装置。   The semiconductor device according to claim 1, further comprising a filter provided on the second surface side of the optical semiconductor element and having wavelength selectivity with respect to light emitted or received by the optical semiconductor element. 前記光半導体素子の第２面の側に設けられ、前記光半導体素子が発光または受光する光に対して空間選択性を有するマスクを更に備えることを特徴とする請求項１記載の半導体装置。   The semiconductor device according to claim 1, further comprising a mask provided on the second surface side of the optical semiconductor element and having a spatial selectivity with respect to light emitted or received by the optical semiconductor element. 前記光半導体素子の第２面の側に設けられ、前記光半導体素子が発光または受光する光に対して集光作用を有するレンズを更に備えることを特徴とする請求項１記載の半導体装置。   The semiconductor device according to claim 1, further comprising a lens provided on the second surface side of the optical semiconductor element and having a condensing function with respect to light emitted or received by the optical semiconductor element. 請求項１〜４の何れか１項に記載の半導体装置を製造する方法であって、
導電性を有する電鋳基板の主面上に所定のレジストパターンを形成するレジストパターン形成工程と、
前記レジストパターン形成工程において形成されたレジストパターンを除く前記電鋳基板の主面の露出部上に導電性金属を電着して、前記電鋳基板の主面上に金属板を形成する電着工程と、
前記電着工程の後に、前記電鋳基板から前記レジストパターンを除去するレジストパターン除去工程と、
前記レジストパターン除去工程の後に、互いに対向する第１面および第２面を有し該第２面に電極パッドが形成され該第２面の側へ発光または該第２面の側から受光する光半導体素子の該電極パッドを前記金属板に接続する光半導体素子搭載工程と、
前記光半導体素子搭載工程の後に前記光半導体素子を樹脂で覆う樹脂封止工程と、
前記樹脂封止工程の後に前記電鋳基板を除去する電鋳基板除去工程と、
を備えることを特徴とする半導体装置製造方法。 A method for manufacturing the semiconductor device according to claim 1,
A resist pattern forming step of forming a predetermined resist pattern on the main surface of the electroformed substrate having conductivity; and
Electrodeposition of electrodepositing a conductive metal on the exposed portion of the main surface of the electroformed substrate excluding the resist pattern formed in the resist pattern forming step, and forming a metal plate on the main surface of the electroformed substrate Process,
After the electrodeposition step, a resist pattern removal step of removing the resist pattern from the electroformed substrate,
After the resist pattern removing step, light that has a first surface and a second surface that face each other and an electrode pad is formed on the second surface and emits light to the second surface or receives light from the second surface. An optical semiconductor element mounting step of connecting the electrode pad of the semiconductor element to the metal plate;
A resin sealing step of covering the optical semiconductor element with a resin after the optical semiconductor element mounting step;
An electroformed substrate removing step of removing the electroformed substrate after the resin sealing step;
A method for manufacturing a semiconductor device, comprising: 前記光半導体素子搭載工程の前に、前記光半導体素子が発光または受光する光に対して波長選択性を有するフィルタを前記電鋳基板の主面上であって前記光半導体素子の搭載位置の下方に配置する工程を更に備えることを特徴とする請求項５記載の半導体装置製造方法。   Before the optical semiconductor element mounting step, a filter having wavelength selectivity with respect to light emitted or received by the optical semiconductor element is provided on the main surface of the electroformed substrate and below the mounting position of the optical semiconductor element. 6. The method of manufacturing a semiconductor device according to claim 5, further comprising a step of arranging the semiconductor device in the semiconductor device. 前記光半導体素子搭載工程の前に、前記光半導体素子が発光または受光する光に対して空間選択性を有するマスクを前記電鋳基板の主面上であって前記光半導体素子の搭載位置の下方に配置する工程を更に備えることを特徴とする請求項５記載の半導体装置製造方法。   Before the optical semiconductor element mounting step, a mask having spatial selectivity with respect to light emitted or received by the optical semiconductor element is provided on the main surface of the electroformed substrate and below the mounting position of the optical semiconductor element. 6. The method of manufacturing a semiconductor device according to claim 5, further comprising a step of arranging the semiconductor device in the semiconductor device. 前記電鋳基板が前記光半導体素子の搭載位置の領域に凹面を有する、ことを特徴とする請求項５記載の半導体装置製造方法。   6. The method of manufacturing a semiconductor device according to claim 5, wherein the electroformed substrate has a concave surface in a region where the optical semiconductor element is mounted.
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