JP2007281151A - Imaging apparatus and method for manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To inexpensively provide a compact imaging apparatus where a solid imaging element and an optical system component are attached to a circuit board. <P>SOLUTION: The circuit board 3 includes an element holding hole 9. The solid imaging element 5 is mounted on the circuit board 3 at a mounting position arranged in the element holding hole 9. The optical system component 7 is attached to the circuit board 3 at a position for forming a subject image in the solid imaging element 5. The element holding hole 9 is a through-opening with a step which is connected to an element storage 21 larger in size than the solid imaging element 5 and an imaging opening 23 smaller in size than the solid imaging element 5. The solid imaging element 5 is arranged inside the element storage 21 in a state where an imaging surface is directed toward the imaging opening 23, and the edge 27 of the solid imaging element 5 is mounted by flip-chip onto the step 29 between the element storage 21 and the imaging opening 23. The optical system component 7 is attached to the circuit board 3 at the outer side of the imaging opening 23. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、回路基板に固体撮像素子と光学系部品を取り付けた撮像装置に関する。   The present invention relates to an imaging apparatus in which a solid-state imaging device and optical system parts are attached to a circuit board.

従来、ＣＣＤやＣＭＯＳといった固体撮像素子を備えた小型の撮像装置が提案されている。例えば、特許文献１の図１は、回路基板に固体撮像素子と光学系部品を取り付けた撮像装置を開示している。回路基板の一方の面にレンズ等の光学系部品が取り付けられ、反対の面に固体撮像素子が実装される。被写体からの光は、光学系部品を通り、回路基板の貫通穴を通って、固体撮像素子の撮像面に像を形成する。   2. Description of the Related Art Conventionally, there has been proposed a small-sized imaging device including a solid-state imaging device such as a CCD or a CMOS. For example, FIG. 1 of Patent Document 1 discloses an imaging apparatus in which a solid-state imaging device and optical system parts are attached to a circuit board. An optical system component such as a lens is attached to one surface of the circuit board, and a solid-state imaging device is mounted on the opposite surface. The light from the subject passes through the optical system parts, passes through the through hole of the circuit board, and forms an image on the imaging surface of the solid-state imaging device.

また、同特許文献１の図７は、樹脂配線パッケージを備えた撮像装置を開示している。樹脂配線パッケージに固体撮像素子と光学系部品が備えられて、撮像モジュールが構成される。この撮像モジュールが回路基板に接続される。
特開平１１−３５４７６９号公報（図１、図７等） FIG. 7 of Patent Document 1 discloses an imaging device provided with a resin wiring package. An imaging module is configured by providing a resin wiring package with a solid-state imaging device and optical system components. This imaging module is connected to the circuit board.
Japanese Patent Application Laid-Open No. 11-354769 (FIGS. 1, 7, etc.)

しかしながら、従来の撮像装置においては、回路基板の両側に固体撮像素子と光学系部品が取り付けられるので、その分だけ厚さが大きく、撮像装置のサイズが大きくなるという問題がある。また、樹脂パッケージを備えた撮像装置においても、樹脂パッケージのスペースが必要なためにサイズが大きく、また、樹脂パッケージを備えるために部品数が多くなってコストも増大するという問題がある。   However, in the conventional imaging device, since the solid-state imaging device and the optical system parts are attached to both sides of the circuit board, there is a problem that the thickness is increased correspondingly and the size of the imaging device is increased. In addition, an imaging device including a resin package has a problem that the size is large because a space for the resin package is required, and the number of components increases because the resin package is provided, resulting in an increase in cost.

本発明は、従来の問題を解決するためになされたもので、その目的は、小型で低コストな撮像装置を提供することにある。   The present invention has been made to solve the conventional problems, and an object thereof is to provide a small-sized and low-cost imaging apparatus.

本発明の撮像装置は、素子保持穴部が設けられた回路基板と、前記素子保持穴部内に設けられた実装位置にて前記回路基板に実装された固体撮像素子と、前記固体撮像素子に被写体像を形成する位置にて前記回路基板に取り付けられた光学系部品と、を備えている。   An imaging apparatus according to the present invention includes a circuit board provided with an element holding hole, a solid-state imaging element mounted on the circuit board at a mounting position provided in the element holding hole, and a subject on the solid-state imaging element. And an optical system component attached to the circuit board at a position where an image is formed.

この構成により、回路基板の素子保持穴部に固体撮像素子が実装されるので、回路基板の厚さが小さくなる。また、樹脂パッケージを備えなくてよいので、部品点数が少なくてすむ。こうして、小型で低コストな撮像装置を提供できる。   With this configuration, since the solid-state imaging device is mounted in the element holding hole portion of the circuit board, the thickness of the circuit board is reduced. Further, since it is not necessary to provide a resin package, the number of parts can be reduced. Thus, a small and low-cost imaging device can be provided.

また、本発明の撮像装置において、前記素子保持穴部は、前記固体撮像素子より大きいサイズの素子収容部と前記固体撮像素子より小さいサイズの撮像開口とがつながった段差付き貫通開口であり、前記固体撮像素子は、撮像面が前記撮像開口を向いた状態で、前記素子収容部内に配置され、前記固体撮像素子の縁部が前記素子収容部と前記撮像開口の段差部へフリップチップ実装されており、前記光学系部品は、前記撮像開口の外側にて前記回路基板に取り付けられている。   Further, in the imaging device of the present invention, the element holding hole is a through opening with a step in which an element accommodating portion having a size larger than the solid-state imaging device and an imaging opening having a size smaller than the solid-state imaging device are connected, The solid-state imaging device is disposed in the element housing portion with the imaging surface facing the imaging opening, and the edge of the solid-state imaging device is flip-chip mounted on the step portion of the element housing portion and the imaging opening. The optical system component is attached to the circuit board outside the imaging aperture.

この構成により、固体撮像素子を回路基板へフリップチップ実装でき、素子保持穴部の壁面と固体撮像素子の隙間を小さくできる。したがって、素子保持穴部のサイズを小さくでき、撮像装置を小型化できる。   With this configuration, the solid-state imaging element can be flip-chip mounted on the circuit board, and the gap between the wall surface of the element holding hole and the solid-state imaging element can be reduced. Therefore, the size of the element holding hole can be reduced, and the imaging device can be downsized.

また、本発明の撮像装置において、前記回路基板は複数層基板であり、前記複数層基板は、前記素子収容部を形成する穴を有する１以上の層と、前記撮像開口を形成する穴を有する１以上の層とが積層された構造を有している。   In the imaging device according to the aspect of the invention, the circuit board may be a multi-layer board, and the multi-layer board may include one or more layers having holes that form the element housing portions and holes that form the imaging openings. It has a structure in which one or more layers are stacked.

この構成により、１以上の層に素子収容部の大きさの穴を設け、他の１以上の層に撮像開口の大きさの穴を設けることにより、段差付き貫通開口を撮像装置に設けることができる。したがって、層によって異なる大きさの穴を開けるという簡単な構成でもって容易に段差付き貫通開口を設けた撮像装置を提供できる。   With this configuration, a through opening with a step can be provided in the imaging device by providing a hole having the size of the element accommodating portion in one or more layers and providing a hole having the size of the imaging opening in the other one or more layers. it can. Therefore, it is possible to provide an imaging apparatus that is easily provided with a stepped through opening with a simple configuration in which holes of different sizes are formed depending on the layer.

また、本発明の撮像装置において、前記素子保持穴部は、前記回路基板に設けられた凹部であり、前記固体撮像素子は、前記素子保持穴部の前記凹部の入口を撮像面が向いた状態で前記凹部の底部に実装されており、前記光学系部品は前記素子保持穴部の前記入口に取り付けられて前記入口を塞いでいる。この構成により、素子保持穴部が凹部でよくなり、構造を簡素にできる。   In the imaging device of the present invention, the element holding hole is a recess provided in the circuit board, and the solid-state imaging device is in a state where the imaging surface faces the entrance of the recess of the element holding hole. The optical system component is attached to the entrance of the element holding hole to close the entrance. With this configuration, the element holding hole portion may be a concave portion, and the structure can be simplified.

また、本発明の別の態様は撮像装置製造方法であり、この方法は、１以上の中間層の穴からなる内部空間が設けられた複数層基板で構成された回路基板に対してザグリ加工を施して、前記内部空間を基板外部と連通させて素子保持穴部を形成する基板加工ステップと、前記素子保持穴部内に設けられた実装位置にて固体撮像素子を前記回路基板に実装する撮像素子実装ステップと、前記固体撮像素子の実装位置に対応し前記固体撮像素子に被写体像を形成する取付位置にて光学系部品を前記回路基板に取り付ける光学系取付ステップと、を有する。   Another aspect of the present invention is a method for manufacturing an imaging device, which performs counterboring on a circuit board formed of a multi-layer board provided with an internal space composed of holes in one or more intermediate layers. A substrate processing step for forming an element holding hole portion by communicating the internal space with the outside of the substrate, and an image pickup device for mounting a solid-state image pickup device on the circuit board at a mounting position provided in the element holding hole portion A mounting step, and an optical system mounting step of mounting an optical system component on the circuit board at a mounting position corresponding to a mounting position of the solid-state imaging device and forming a subject image on the solid-state imaging device.

この方法により、上述の他の態様と同様に、回路基板の素子保持穴部に固体撮像素子が実装されるので、回路基板の厚さが小さくなる。また、樹脂パッケージを備えなくてよいので、部品点数が少なくてすむ。また、複数層基板の中間層の穴からなる内部空間を回路基板に設け、この内部空間に対応する位置でザグリ加工を施すことにより、容易に素子保持穴部を備えた回路基板を製造でき、撮像装置の製造が容易になる。   By this method, the solid-state imaging device is mounted in the element holding hole portion of the circuit board, similarly to the other aspects described above, so that the thickness of the circuit board is reduced. Further, since it is not necessary to provide a resin package, the number of parts can be reduced. In addition, by providing an internal space consisting of holes in the intermediate layer of the multi-layer substrate in the circuit board and carrying out counterboring at a position corresponding to the internal space, a circuit board having an element holding hole portion can be easily manufactured, Manufacturing of the imaging device is facilitated.

また、本発明の撮像装置製造方法において、前記基板加工ステップは、前記回路基板の一方の側から前記内部空間へ向けて前記固体撮像素子より大きいサイズの穴を開けて素子収容部を形成し、前記回路基板の他方の側から前記内部空間へ向けて前記固体撮像素子より小さいサイズの穴を開けて撮像開口を形成し、前記素子収容部と前記撮像開口とがつながった段差付き貫通開口を形成し、前記撮像素子実装ステップは、前記固体撮像素子を、撮像面が前記撮像開口を向いた状態で前記素子収容部内に配置し、前記固体撮像素子の縁部を前記素子収容部と前記撮像開口の段差部へフリップチップ実装し、前記光学系取付ステップは、前記光学系部品を前記撮像開口の外側にて前記回路基板に取り付ける。この方法により、段差付き貫通開口を容易に製造でき、撮像装置の製造が容易になる。   In the imaging device manufacturing method of the present invention, the substrate processing step forms an element housing portion by opening a hole larger in size than the solid-state imaging element from one side of the circuit board toward the internal space, A hole having a size smaller than that of the solid-state image sensor is formed from the other side of the circuit board toward the internal space to form an image pickup opening, and a stepped through opening in which the element housing portion and the image pickup opening are connected is formed. In the imaging element mounting step, the solid-state imaging element is arranged in the element accommodating portion with an imaging surface facing the imaging aperture, and an edge portion of the solid-state imaging element is disposed in the element accommodating portion and the imaging aperture. In the step of attaching the optical system, the optical system component is attached to the circuit board outside the imaging opening. By this method, the stepped through opening can be easily manufactured, and the imaging device can be easily manufactured.

また、本発明の撮像装置製造方法において、前記基板加工ステップは、前記回路基板の一方の側から前記内部空間へ向けて穴を開けて、前記素子保持穴部としての凹部を形成し、前記撮像素子実装ステップは、前記素子保持穴部の前記凹部の入口を撮像面が向いた状態で前記凹部の底部に前記固体撮像素子を実装し、前記光学系取付ステップは、前記素子保持穴部の前記入口を塞ぐように前記光学系部品を前記入口に取り付ける。この方法により、一方の側からの加工で素子保持穴部を形成でき、撮像装置の製造が容易になる。   In the imaging apparatus manufacturing method of the present invention, in the substrate processing step, a hole is formed from one side of the circuit board toward the internal space to form a recess as the element holding hole, and the imaging The element mounting step mounts the solid-state imaging element on the bottom of the recess with the imaging surface facing the entrance of the recess of the element holding hole, and the optical system mounting step includes the step of mounting the optical system on the element holding hole. The optical system component is attached to the entrance so as to close the entrance. By this method, the element holding hole can be formed by processing from one side, and the imaging device can be easily manufactured.

本発明は、回路基板の素子保持穴部の内部に固体撮像素子を実装する構成を設けことにより、低コストで小型化可能という効果を有する撮像装置を提供することができる。   The present invention can provide an imaging apparatus having an effect of being able to be reduced in size at low cost by providing a configuration for mounting a solid-state imaging element inside an element holding hole portion of a circuit board.

以下、本発明の実施の形態に係る撮像装置について、図面を用いて説明する。   Hereinafter, imaging devices according to embodiments of the present invention will be described with reference to the drawings.

本発明の第１の実施の形態に係る撮像装置を図１に示す。   FIG. 1 shows an imaging apparatus according to the first embodiment of the present invention.

図１において、撮像装置１は、回路基板３、固体撮像素子５および光学系部品７を備えている。概略的には、回路基板３が素子保持穴部９を有しており、固体撮像素子５が素子保持穴部９内の実装位置にて回路基板３に実装されている。光学系部品７は、固体撮像素子５に対応し固体撮像素子５に被写体像を形成する取付位置にて回路基板３に取り付けられている。以下、撮像装置１の構成を詳細に説明していく。   In FIG. 1, the imaging apparatus 1 includes a circuit board 3, a solid-state imaging device 5, and an optical system component 7. Schematically, the circuit board 3 has an element holding hole 9, and the solid-state imaging device 5 is mounted on the circuit board 3 at a mounting position in the element holding hole 9. The optical system component 7 is attached to the circuit board 3 at an attachment position corresponding to the solid-state image sensor 5 and forming a subject image on the solid-state image sensor 5. Hereinafter, the configuration of the imaging apparatus 1 will be described in detail.

回路基板３（プリント配線板）は複数層基板である。図１の例では、回路基板３は、第１層１１、第２層１３、第３層１５の３層で構成される。第１層１１、第３層１５が基板の両面を構成し、第２層１３が第１層１１および第３層１５に挟まれている。第１層１１および第３層１５には、銅箔のパターン１７が形成されている。   The circuit board 3 (printed wiring board) is a multi-layer board. In the example of FIG. 1, the circuit board 3 is configured by three layers of a first layer 11, a second layer 13, and a third layer 15. The first layer 11 and the third layer 15 constitute both surfaces of the substrate, and the second layer 13 is sandwiched between the first layer 11 and the third layer 15. A copper foil pattern 17 is formed on the first layer 11 and the third layer 15.

回路基板３の素子保持穴部９は、図示のように段差付き貫通開口である。より詳細には、素子保持穴部９は、第１層１１および第２層１３に設けられた第１の穴と、第３層に設けられた第２の穴とがつながった貫通穴であり、第１の穴が第２の穴より大きい。この第１の穴を素子収容部２１と呼び、第２の穴を撮像開口２３と呼ぶ。   The element holding hole 9 of the circuit board 3 is a through opening with a step as shown in the figure. More specifically, the element holding hole 9 is a through hole in which the first hole provided in the first layer 11 and the second layer 13 and the second hole provided in the third layer are connected. The first hole is larger than the second hole. This first hole is referred to as an element accommodating portion 21, and the second hole is referred to as an imaging opening 23.

素子収容部２１は、固体撮像素子５よりも少し大きいサイズを有しており、素子収容部２１に固体撮像素子５が収容される。撮像開口２３のサイズは、固体撮像素子３より小さく、固体撮像素子３の受光部２５より大きく、撮像開口２３を通して撮像が行われる。図示されないが、光軸方向（回路基板３の面に垂直な方向）から見たとき、素子収容部２１の形状は例えば四角形であり、撮像開口２３の形状も例えば四角形である。素子収容部２１と撮像開口２３の中心は共に光軸とほぼ一致している。   The element accommodating portion 21 has a size slightly larger than that of the solid-state imaging element 5, and the solid-state imaging element 5 is accommodated in the element accommodating portion 21. The size of the imaging aperture 23 is smaller than that of the solid-state imaging device 3 and larger than the light receiving unit 25 of the solid-state imaging device 3, and imaging is performed through the imaging aperture 23. Although not shown, when viewed from the optical axis direction (direction perpendicular to the surface of the circuit board 3), the shape of the element accommodating portion 21 is, for example, a quadrangle, and the shape of the imaging opening 23 is also, for example, a quadrangle. The centers of the element accommodating portion 21 and the imaging opening 23 are substantially coincident with the optical axis.

固体撮像素子５は例えばＣＣＤまたはＣＭＯＳのチップ部品である。例えば、回路基板３の厚さが１．６ｍｍであるのに対して、固体撮像素子５の厚さが０．６〜０．７ｍｍである。固体撮像素子５の実装位置は、図示のように、素子収容部２１の中である。固体撮像素子５は、撮像面（受光部２５）が撮像開口２３を向いた状態で、素子収容部２１内に配置されている。そして、固体撮像素子５の縁部２７が、素子収容部２１と撮像開口２３の段差部２９へフリップチップ実装されている。段差部２９は、第３層１５の背面であり、同時に、凹形状の素子収容部２１の底部でもある。また、段差部２９は、素子収容部２１の壁面から内側に突き出した部分であり、同時に、撮像開口２３を囲む縁部でもある。   The solid-state imaging device 5 is a CCD or CMOS chip component, for example. For example, the thickness of the circuit board 3 is 1.6 mm, whereas the thickness of the solid-state imaging device 5 is 0.6 to 0.7 mm. The mounting position of the solid-state imaging device 5 is in the element accommodating portion 21 as illustrated. The solid-state imaging device 5 is disposed in the element housing portion 21 with the imaging surface (light receiving unit 25) facing the imaging opening 23. Then, the edge portion 27 of the solid-state imaging element 5 is flip-chip mounted on the element housing portion 21 and the stepped portion 29 of the imaging opening 23. The step portion 29 is the back surface of the third layer 15 and is also the bottom portion of the concave element housing portion 21. Further, the step portion 29 is a portion protruding inward from the wall surface of the element housing portion 21, and at the same time, is an edge portion surrounding the imaging opening 23.

図２は、固体撮像素子５の実装部位の拡大図である。図示のように、固体撮像素子５のパッド３１にはバンプ３３が形成されている。また、回路基板３の第３層１５にはパッド３５が形成されている。好適にはバンプ３３が金バンプであり、パッド３５には金めっきが施される。バンプ３３とパッド３５がフリップチップ実装によって接合されている。さらに、接合部には封止樹脂３７が充填されている。   FIG. 2 is an enlarged view of a mounting part of the solid-state imaging device 5. As illustrated, bumps 33 are formed on the pads 31 of the solid-state imaging device 5. A pad 35 is formed on the third layer 15 of the circuit board 3. Preferably, the bump 33 is a gold bump, and the pad 35 is plated with gold. The bump 33 and the pad 35 are joined by flip chip mounting. Further, a sealing resin 37 is filled in the joint portion.

図１に戻ると、光学系部品７は、撮像開口２３の外側に位置しており、撮像開口２３を塞いでいる。光学系部品７は、固体撮像素子５に対応し、固体撮像素子５に被写体像を形成する取付位置にて回路基板３に取り付けられている。光学系部品７は、光軸方向から見たときに回路基板３の受光部２５と位置合わせされている。   Returning to FIG. 1, the optical system component 7 is located outside the imaging aperture 23 and closes the imaging aperture 23. The optical system component 7 corresponds to the solid-state image sensor 5 and is attached to the circuit board 3 at an attachment position where a subject image is formed on the solid-state image sensor 5. The optical system component 7 is aligned with the light receiving portion 25 of the circuit board 3 when viewed from the optical axis direction.

光学系部品７は、レンズ４１と透光部材４３とを含む。透光部材４３は光学フィルタ等であり、この透光部材４３が回路基板３に接している。透光部材４３に鏡筒４５が取り付けられており、鏡筒４５の先端にレンズ４１が設けられている。その他、回路基板３には、チップ部品４７等の必要な部品が実装されている。   The optical system component 7 includes a lens 41 and a translucent member 43. The translucent member 43 is an optical filter or the like, and the translucent member 43 is in contact with the circuit board 3. A lens barrel 45 is attached to the translucent member 43, and a lens 41 is provided at the tip of the lens barrel 45. In addition, necessary components such as a chip component 47 are mounted on the circuit board 3.

以上に、本実施の形態に係る撮像装置１の構成を説明した。なお、上記構成では、回路基板３の第１層１１、第２層１３は、素子収容部（凹部）を形成する層なので、両層を収容層（または凹部層）と呼ぶことができ、さらに、第１層１１を入口層、第２層１３を中間層と分けて呼ぶことができる。また、第３層１５は、収容部の底を形成していることから、底部層と呼ぶことができる。これら入口層、中間層および底部層の各々は複数の層であってもよい。   The configuration of the imaging device 1 according to the present embodiment has been described above. In the above configuration, the first layer 11 and the second layer 13 of the circuit board 3 are layers that form element housing portions (concave portions), and therefore both layers can be referred to as housing layers (or concave layers). The first layer 11 can be referred to as an entrance layer, and the second layer 13 can be referred to as an intermediate layer. Further, since the third layer 15 forms the bottom of the accommodating portion, it can be called a bottom layer. Each of the inlet layer, intermediate layer, and bottom layer may be a plurality of layers.

次に、撮像装置１の動作としては、被写体からの光が、レンズ４１、透光部材４３といった光学系部品７を通過し、撮像開口２３を通過し、固体撮像素子５の受光部２５に達し、これにより被写体の像が形成される。この被写体像が固体撮像素子５にて電気的な画像信号に変換される。この画像信号が回路基板３の回路で処理される。   Next, as an operation of the imaging device 1, light from the subject passes through the optical system component 7 such as the lens 41 and the light transmitting member 43, passes through the imaging opening 23, and reaches the light receiving unit 25 of the solid-state imaging device 5. This forms an image of the subject. This subject image is converted into an electrical image signal by the solid-state imaging device 5. This image signal is processed by the circuit of the circuit board 3.

次に、本実施の形態に係る撮像装置１の製造方法を説明する。まず、図３（ａ）は、加工前の回路基板３を示している。回路基板３においては、第２層１３（中間層）が貫通穴５１を有している。第１層１１、第３層１５には貫通穴はまだ設けられていない。したがって、この状態では、第２層１３の貫通穴５１によって、回路基板３の内部空間５３が形成されている。第３層１５には既にフリップチップ実装のためのパッド３５が形成されている。パッド３５は、回路基板３の内部空間５３（第２層１３の貫通穴５１）内に位置している。   Next, a method for manufacturing the imaging device 1 according to the present embodiment will be described. First, FIG. 3A shows the circuit board 3 before processing. In the circuit board 3, the second layer 13 (intermediate layer) has a through hole 51. The first layer 11 and the third layer 15 are not yet provided with through holes. Therefore, in this state, the internal space 53 of the circuit board 3 is formed by the through hole 51 of the second layer 13. A pad 35 for flip chip mounting is already formed on the third layer 15. The pad 35 is located in the internal space 53 (the through hole 51 of the second layer 13) of the circuit board 3.

図３（ｂ）、図３（ｃ）に示されるように、回路基板３に対してドリルによってザグリ加工が施される。ザグリ加工は、回路基板３の内部空間５３に対応する位置にて、内部空間５３に向けて施されて、内部空間５３を基板外部と連通する。   As shown in FIGS. 3B and 3C, the circuit board 3 is counterbored by a drill. The counterbore processing is performed toward the internal space 53 at a position corresponding to the internal space 53 of the circuit board 3 so that the internal space 53 communicates with the outside of the substrate.

ここで、第２層１３の貫通穴５１は、固体撮像素子５より少し大きく、図１の素子収容部２１の大きさに予め形成されている。図３（ｂ）では、第１層１１に、第２層１３の貫通穴５１と同じ大きさの貫通穴５５が開けられて、回路基板３の内部空間５３（第２層１３の貫通穴５１）が基板外部と連通し、これにより素子収容部２１が形成される。図３（ｃ）では、第３層１３に、撮像開口２３の大きさの貫通穴５７が開けられて、これにより撮像開口２３が形成される。そして、図３（ｄ）に示されるように、回路基板３の全体としては、段差付き貫通開口が形成され、この段差付き貫通開口が素子保持穴部９となる。   Here, the through hole 51 of the second layer 13 is slightly larger than the solid-state imaging element 5 and is formed in advance in the size of the element accommodating portion 21 of FIG. In FIG. 3B, a through hole 55 having the same size as the through hole 51 of the second layer 13 is formed in the first layer 11, and the internal space 53 of the circuit board 3 (the through hole 51 of the second layer 13 is formed). ) Communicates with the outside of the substrate, whereby the element accommodating portion 21 is formed. In FIG. 3C, a through hole 57 having the size of the imaging opening 23 is formed in the third layer 13, thereby forming the imaging opening 23. As shown in FIG. 3D, the circuit board 3 as a whole has a through opening with a step, and this through opening with a step becomes the element holding hole 9.

次に図４（ａ）に示されるように、固体撮像素子５が素子保持穴部９内に設定された実装位置に配置され、回路基板３にフリップチップ実装される。ここでは、撮像面が撮像開口２３を向くように固体撮像素子５が配置される。固体撮像素子５の縁部２７が、素子保持穴部９の段差部２９と対面する。フリップチップ実装が行われ、固体撮像素子５のバンプ３３が回路基板３のパッド３５と接合される。例えば、回路基板３がヒートステージ上に配置されて加熱される。そして、固体撮像素子５がマウントツールを用いて実装位置に配置され、超音波と圧力が加えられて、バンプ３３とパッド３５が接合される。接合後、封止樹脂３７が接合部に充填される。   Next, as shown in FIG. 4A, the solid-state imaging device 5 is disposed at a mounting position set in the element holding hole 9 and is flip-chip mounted on the circuit board 3. Here, the solid-state imaging device 5 is arranged so that the imaging surface faces the imaging opening 23. The edge 27 of the solid-state imaging device 5 faces the stepped portion 29 of the element holding hole 9. Flip chip mounting is performed, and the bumps 33 of the solid-state imaging device 5 are bonded to the pads 35 of the circuit board 3. For example, the circuit board 3 is placed on a heat stage and heated. Then, the solid-state imaging device 5 is disposed at a mounting position using a mounting tool, and ultrasonic waves and pressure are applied to bond the bumps 33 and the pads 35. After the bonding, the sealing resin 37 is filled in the bonded portion.

さらに、図４（ｂ）に示されるように、光学系部品７が、固体撮像素子５と対応する位置で回路基板３に取り付けられる。光学系部品７は接着剤で接着されてよい。光学系部品７は撮像開口２３の外側に、撮像開口２３を塞ぐように取り付けられる。これにより、撮像開口が密封される。このとき、撮像開口２３内には防塵処理がなされた空気、窒素等の気体が入れられる。回路基板３には、チップ部品４７等の他の部品も実装される。こうして撮像装置１が完成する。   Further, as shown in FIG. 4B, the optical system component 7 is attached to the circuit board 3 at a position corresponding to the solid-state imaging device 5. The optical system component 7 may be bonded with an adhesive. The optical system component 7 is attached outside the imaging opening 23 so as to close the imaging opening 23. Thereby, the imaging opening is sealed. At this time, a gas such as air or nitrogen that has been dust-proofed is placed in the imaging opening 23. Other components such as a chip component 47 are also mounted on the circuit board 3. Thus, the imaging device 1 is completed.

以上に本発明の第１の実施の形態に係る撮像装置１について説明した。本実施の形態によれば、回路基板３の素子保持穴部９に固体撮像素子５が実装されるので、回路基板３の厚さが小さくなる。また、樹脂パッケージを備えなくてよいので、部品点数が少なくてすむ。こうして、小型で低コストな撮像装置１を提供できる。   The imaging apparatus 1 according to the first embodiment of the present invention has been described above. According to the present embodiment, since the solid-state imaging device 5 is mounted in the element holding hole 9 of the circuit board 3, the thickness of the circuit board 3 is reduced. Further, since it is not necessary to provide a resin package, the number of parts can be reduced. In this way, a small and low-cost imaging device 1 can be provided.

また、本実施の形態によれば、素子保持穴部９は、固体撮像素子５より大きいサイズの素子収容部２１と固体撮像素子５より小さいサイズの撮像開口２３とがつながった段差付き貫通開口であり、固体撮像素子５は、撮像面が撮像開口２３を向いた状態で、素子収容部内１１に配置され、固体撮像素子５の縁部２７が素子収容部２１と撮像開口２３の段差部２９へフリップチップ実装されており、光学系部品７は、撮像開口２３の外側にて回路基板３に取り付けられている。このような構成により、固体撮像素子５を回路基板３へフリップチップ実装でき、素子保持穴部２１の壁面と固体撮像素子５の隙間を小さくできる。したがって、素子保持穴部２１のサイズを小さくでき、基板面に沿った方向（厚さ方向と直角な方向）において撮像装置を小型化できる。   In addition, according to the present embodiment, the element holding hole 9 is a stepped through opening in which the element accommodating portion 21 having a size larger than that of the solid-state imaging element 5 and the imaging opening 23 having a size smaller than that of the solid-state imaging element 5 are connected. The solid-state imaging device 5 is arranged in the element housing portion 11 with the imaging surface facing the imaging opening 23, and the edge portion 27 of the solid-state imaging device 5 extends to the step portion 29 between the element housing portion 21 and the imaging opening 23. The optical system component 7 is mounted on the circuit board 3 outside the imaging opening 23. With such a configuration, the solid-state imaging element 5 can be flip-chip mounted on the circuit board 3, and the gap between the wall surface of the element holding hole 21 and the solid-state imaging element 5 can be reduced. Therefore, the size of the element holding hole 21 can be reduced, and the imaging device can be downsized in the direction along the substrate surface (direction perpendicular to the thickness direction).

また、本実施の形態によれば、回路基板３は複数層基板であり、複数層基板は、素子収容部２１を形成する穴を有する１以上の層（上記例では第１層１１、第２層１３）と、撮像開口２３を形成する穴を有する１以上の層（上記例では第３層１５）とが積層された構造を有している。このような構成においては、１以上の層に素子収容部２１の大きさの穴を設け、他の１以上の層に撮像開口２３の大きさの穴を設けることにより、段差付き貫通開口を撮像装置１に設けることができる。したがって、層によって異なる大きさの穴を開けるという簡単な構成でもって容易に段差付き貫通開口を設けた撮像装置１を提供できる。   Further, according to the present embodiment, the circuit board 3 is a multi-layer board, and the multi-layer board has one or more layers (in the above example, the first layer 11 and the second layer having holes for forming the element housing portion 21). The layer 13) and one or more layers (the third layer 15 in the above example) having a hole for forming the imaging opening 23 are stacked. In such a configuration, a through opening with a step is imaged by providing a hole having the size of the element accommodating portion 21 in one or more layers and providing a hole having the size of the imaging opening 23 in the other one or more layers. The device 1 can be provided. Therefore, it is possible to provide the imaging device 1 having a through opening with a step with a simple configuration in which holes of different sizes are formed depending on the layer.

また、本実施の形態の撮像装置製造方法は、図３（ｂ）、図３（ｃ）に示されたように、１以上の中間層（上記例では第２層１３）の穴５１からなる内部空間５３が設けられた複数層基板で構成された回路基板３に対してザグリ加工を施して、内部空間５３を基板外部と連通させて素子保持穴部９を形成する基板加工ステップを含む。さらに、この方法は、図４（ａ）、図４（ｂ）に示されたように、素子保持穴部９内に設けられた実装位置にて固体撮像素子５を回路基板３に実装する撮像素子実装ステップと、固体撮像素子５の実装位置に対応し固体撮像素子５に被写体像を形成する取付位置にて光学系部品７を回路基板３に取り付ける光学系取付ステップとを有する。このような方法により、小型で低コストな本実施の形態の撮像装置１を提供できる。複数層基板の中間層の穴５１からなる内部空間５３を回路基板３に設け、この内部空間５３に対応する位置でザグリ加工を施すことにより、容易に素子保持穴部９を備えた回路基板３を製造でき、撮像装置１の製造が容易になる。   In addition, as shown in FIGS. 3B and 3C, the imaging device manufacturing method according to the present embodiment includes holes 51 in one or more intermediate layers (second layer 13 in the above example). The substrate processing step includes forming a device holding hole portion 9 by subjecting the circuit board 3 formed of a multi-layer substrate provided with the internal space 53 to a counterbore process so that the internal space 53 communicates with the outside of the substrate. Further, in this method, as shown in FIGS. 4A and 4B, imaging in which the solid-state imaging device 5 is mounted on the circuit board 3 at the mounting position provided in the element holding hole 9. An element mounting step, and an optical system mounting step for mounting the optical system component 7 to the circuit board 3 at a mounting position corresponding to the mounting position of the solid-state image sensor 5 and forming a subject image on the solid-state image sensor 5. By such a method, it is possible to provide the imaging apparatus 1 of the present embodiment that is small and low in cost. The circuit board 3 provided with the element holding holes 9 can be easily formed by providing the circuit board 3 with an internal space 53 formed of the holes 51 in the intermediate layer of the multi-layer board and performing a counterboring process at a position corresponding to the internal space 53. The imaging device 1 can be easily manufactured.

また、本実施の形態によれば、基板加工ステップは、回路基板３の一方の側（上記例では第１層１１の側）から内部空間５３へ向けて固体撮像素子５より大きいサイズの穴５５を開けて素子収容部２１を形成し、回路基板３の他方の側（上記例の第３層１５の側）から内部空間５３へ向けて固体撮像素子５より小さいサイズの穴５７を開けて撮像開口２３を形成し、素子収容部２１と撮像開口２３とがつながった段差付き貫通開口を形成する。撮像素子実装ステップは、固体撮像素子５を、撮像面が撮像開口２３を向いた状態で素子収容部２１内に配置し、固体撮像素子５の縁部２７を素子収容部２１と撮像開口２３の段差部２９へフリップチップ実装する。光学系取付ステップは、光学系部品７を撮像開口２３の外側にて回路基板５に取り付ける。このような方法により、段差付き貫通開口を容易に製造でき、撮像装置１の製造が容易になる。   In addition, according to the present embodiment, the substrate processing step includes the hole 55 having a size larger than that of the solid-state imaging device 5 from the one side of the circuit board 3 (the first layer 11 side in the above example) toward the internal space 53. Is formed to form an element accommodating portion 21, and a hole 57 having a size smaller than that of the solid-state imaging element 5 is opened from the other side of the circuit board 3 (the third layer 15 side in the above example) toward the internal space 53. An opening 23 is formed, and a stepped through opening in which the element accommodating portion 21 and the imaging opening 23 are connected is formed. In the image pickup element mounting step, the solid-state image pickup element 5 is disposed in the element containing portion 21 with the image pickup surface facing the image pickup opening 23, and the edge 27 of the solid-state image pickup element 5 is arranged between the element containing portion 21 and the image pickup opening 23. Flip chip mounting is performed on the stepped portion 29. In the optical system attaching step, the optical system component 7 is attached to the circuit board 5 outside the imaging opening 23. By such a method, the stepped through opening can be easily manufactured, and the imaging device 1 can be easily manufactured.

なお、上記の実施の形態では、回路基板３の層の数が３であった。しかし、本発明はこれに限定されない。回路基板３の層数は２でもよく、４以上でもよい。素子収容部２１は、１以上の層の貫通穴で構成されてよい。撮像開口２３も１以上の層の貫通穴で構成されてよい。   In the above embodiment, the number of layers of the circuit board 3 is three. However, the present invention is not limited to this. The number of layers of the circuit board 3 may be two or four or more. The element accommodating part 21 may be comprised by the through-hole of one or more layers. The imaging opening 23 may also be configured by one or more layers of through holes.

次に、本発明の第２の実施の形態に係る撮像装置を図５に示す。概略的には、第１の実施の形態と異なり、第２の実施の形態では、素子保持穴部が回路基板の凹部であり、凹部の底は塞がっており、素子保持穴部は回路基板を貫通していない。固体撮像素子は、素子保持穴部の入口を撮像面が向くように、凹部の底部に配置され、実装される。光学系部品は素子保持穴部の入口に取り付けられ、凹部の入口を塞いでいる。したがって、固体撮像素子および光学系部品の配置は、第１の実施の形態と第２の実施の形態では上下逆さまになる。以下、第１の実施の形態と共通する事項の説明は適宜省略する。   Next, an imaging apparatus according to a second embodiment of the present invention is shown in FIG. Schematically, unlike the first embodiment, in the second embodiment, the element holding hole is a concave portion of the circuit board, the bottom of the concave portion is closed, and the element holding hole portion covers the circuit board. Not penetrated. The solid-state imaging device is disposed and mounted at the bottom of the recess so that the imaging surface faces the entrance of the element holding hole. The optical system component is attached to the entrance of the element holding hole and closes the entrance of the recess. Therefore, the arrangement of the solid-state imaging device and the optical system components is turned upside down in the first embodiment and the second embodiment. Hereinafter, description of matters common to the first embodiment will be omitted as appropriate.

図５に示すように、撮像装置１０１は、回路基板１０３、固体撮像素子１０５および光学系部品１０７を備えている。回路基板１０３が素子保持穴部１０９を有しており、固体撮像素子１０５が素子保持穴部１０９内に設けられた実装位置にて回路基板１０３に実装されている。光学系部品１０７は、固体撮像素子１０５に対応し固体撮像素子１０５に被写体像を形成する取付位置にて回路基板１０３に取り付けられている。   As shown in FIG. 5, the imaging apparatus 101 includes a circuit board 103, a solid-state imaging element 105, and an optical system component 107. The circuit board 103 has an element holding hole 109, and the solid-state imaging element 105 is mounted on the circuit board 103 at a mounting position provided in the element holding hole 109. The optical system component 107 is attached to the circuit board 103 at an attachment position corresponding to the solid-state image sensor 105 and forming a subject image on the solid-state image sensor 105.

本実施の形態においても、回路基板１０３（プリント配線板）は複数層基板であり、第１層１１１、第２層１１３、第３層１１５の３層で構成される。第１層１１１、第３層１１５が基板の両面を構成し、第２層１１３が第１層１１１および第３層１１５に挟まれている。第１層１１１および第３層１１５には、銅箔のパターン１１７が形成されている。   Also in the present embodiment, the circuit board 103 (printed wiring board) is a multi-layer board, and includes three layers of a first layer 111, a second layer 113, and a third layer 115. The first layer 111 and the third layer 115 constitute both surfaces of the substrate, and the second layer 113 is sandwiched between the first layer 111 and the third layer 115. A copper foil pattern 117 is formed on the first layer 111 and the third layer 115.

回路基板１０３の素子保持穴部１０９（素子収容部）は、本実施の形態では、回路基板３の凹部であり、回路基板３を貫通していない。より詳細には、素子保持穴部１０９は、第１層１１１および第２層１１３の貫通穴である。第３層１１５には開口が無い。第３層１１５は、素子保持穴部１０９の底部１２１を形成する。図示されないが、光軸方向から見たとき、素子保持穴部１０９の形状は例えば四角形である。   In the present embodiment, the element holding hole 109 (element accommodating portion) of the circuit board 103 is a recess of the circuit board 3 and does not penetrate the circuit board 3. More specifically, the element holding hole 109 is a through hole of the first layer 111 and the second layer 113. The third layer 115 has no opening. The third layer 115 forms the bottom 121 of the element holding hole 109. Although not shown, the shape of the element holding hole 109 is, for example, a quadrangle when viewed from the optical axis direction.

固体撮像素子１０５は例えばＣＣＤまたはＣＭＯＳのチップ部品である。例えば、回路基板１０３の厚さが１．６ｍｍであるのに対して、固体撮像素子１０５の厚さが０．６〜０．７ｍｍである。固体撮像素子１０５の実装位置は、図示のように、素子保持穴部１０９の中である。固体撮像素子１０５は、撮像面（受光部１２３）が、素子保持穴部１０９の凹部の入口１２５を向いた状態で、素子保持穴部１０９内に配置され、素子保持穴部１０９の底部１２１に実装される。本実施の形態では、固体撮像素子１０５がワイヤ１３１を用いて実装される。ワイヤ１３１は、固体撮像素子１０５の端子１３３を回路基板３のパターン１３５と接続する。ワイヤ１３１は好適には金ワイヤである。   The solid-state image sensor 105 is, for example, a CCD or CMOS chip part. For example, the thickness of the circuit board 103 is 1.6 mm, whereas the thickness of the solid-state imaging device 105 is 0.6 to 0.7 mm. The mounting position of the solid-state imaging element 105 is in the element holding hole 109 as illustrated. The solid-state imaging device 105 is disposed in the element holding hole 109 with the imaging surface (light receiving portion 123) facing the inlet 125 of the concave portion of the element holding hole 109, and is placed on the bottom 121 of the element holding hole 109. Implemented. In the present embodiment, the solid-state image sensor 105 is mounted using the wire 131. The wire 131 connects the terminal 133 of the solid-state image sensor 105 to the pattern 135 of the circuit board 3. The wire 131 is preferably a gold wire.

光学系部品１０７は、素子保持穴部１０９の入口１２５の外側に位置しており、入口１２５を塞いでいる。光学系部品１０７は、固体撮像素子１０５に対応し、固体撮像素子１０５に被写体像を形成する取付位置にて回路基板１０３に取り付けられている。光学系部品１０７は、光軸方向から見たときに回路基板１０３の受光部１２３と位置合わせされている。   The optical system component 107 is located outside the entrance 125 of the element holding hole 109 and closes the entrance 125. The optical system component 107 corresponds to the solid-state image sensor 105 and is attached to the circuit board 103 at an attachment position where a subject image is formed on the solid-state image sensor 105. The optical system component 107 is aligned with the light receiving portion 123 of the circuit board 103 when viewed from the optical axis direction.

光学系部品１０７の構成は第１の実施の形態と同様であり、レンズ１４１と透光部材１４３とを含む。透光部材１４３は光学フィルタ等であり、この透光部材１４３が回路基板１０３に接している。透光部材１４３に鏡筒１４５が取り付けられており、鏡筒１４５の先端にレンズ１４１が設けられている。その他、回路基板３には、チップ部品４７等の必要な部品が実装されている。   The configuration of the optical system component 107 is the same as that of the first embodiment, and includes a lens 141 and a translucent member 143. The translucent member 143 is an optical filter or the like, and the translucent member 143 is in contact with the circuit board 103. A lens barrel 145 is attached to the translucent member 143, and a lens 141 is provided at the tip of the lens barrel 145. In addition, necessary components such as a chip component 47 are mounted on the circuit board 3.

以上に、本実施の形態に係る撮像装置１０１の構成を説明した。なお、上記構成では、回路基板３の第１層１１１、第２層１１３は、素子収容部（凹部）を形成する層なので、両層を収容層（または凹部層）と呼ぶことができ、さらに、第１層１１１を入口層、第２層１１３を中間層と分けて呼ぶことができる。また、第３層１１５は、収容部の底を形成していることから、底部層と呼ぶことができる。これら入口層、中間層および底部層の各々は複数の層であってもよい。   The configuration of the imaging device 101 according to the present embodiment has been described above. In the above configuration, the first layer 111 and the second layer 113 of the circuit board 3 are layers that form an element housing portion (recessed portion), and therefore both layers can be called a housing layer (or a recessed layer). The first layer 111 can be referred to as an entrance layer, and the second layer 113 can be referred to as an intermediate layer. Further, since the third layer 115 forms the bottom of the accommodating portion, it can be called a bottom layer. Each of the inlet layer, intermediate layer, and bottom layer may be a plurality of layers.

次に、撮像装置１０１の動作としては、被写体からの光が、レンズ１４１、透光部材１４３といった光学系部品１０７を通過し、素子保持穴部１０９の入口１２５を通り、固体撮像素子１０５の受光部１２３に達し、これにより被写体の像が形成される。この被写体像が固体撮像素子１０５にて電気的な画像信号に変換される。この画像信号が回路基板１０３の回路で処理される。   Next, as an operation of the image pickup apparatus 101, light from the subject passes through the optical system component 107 such as the lens 141 and the translucent member 143, passes through the inlet 125 of the element holding hole 109, and receives light from the solid-state image pickup element 105. Thus, the image of the subject is formed. This subject image is converted into an electrical image signal by the solid-state imaging device 105. This image signal is processed by the circuit of the circuit board 103.

次に、本実施の形態に係る撮像装置１０１の製造方法を説明する。まず、図６（ａ）は、加工前の回路基板１０３を示している。回路基板１０３においては、第２層１１３（中間層）が貫通穴１５１を有している。第１層１１１、第３層１１５には貫通穴は設けられていない。したがって、この状態では、第２層１１３の貫通穴１５１によって、回路基板１０３の内部空間１５３が形成されている。第３層１１５には既にワイヤ１３１を接続するためのパターン１３５が形成されており、このパターン１３５は、回路基板１０３の内部空間１５３（第２層１１３の貫通穴１５１）内に位置している。   Next, a method for manufacturing the imaging device 101 according to the present embodiment will be described. First, FIG. 6A shows the circuit board 103 before processing. In the circuit board 103, the second layer 113 (intermediate layer) has a through hole 151. The first layer 111 and the third layer 115 are not provided with through holes. Therefore, in this state, the internal space 153 of the circuit board 103 is formed by the through hole 151 of the second layer 113. A pattern 135 for connecting the wire 131 is already formed in the third layer 115, and this pattern 135 is located in the internal space 153 (the through hole 151 of the second layer 113) of the circuit board 103. .

図６（ｂ）に示されるように、回路基板１０３に対して、ドリルによってザグリ加工が施される。ザグリ加工は、回路基板１０３の内部空間１５３に対応する位置にて、内部空間１５３に向けて施されて、内部空間１５３を基板外部と連通する。   As shown in FIG. 6B, the circuit board 103 is counterbored by a drill. The counterbore processing is performed toward the internal space 153 at a position corresponding to the internal space 153 of the circuit board 103 to communicate the internal space 153 with the outside of the substrate.

ここで、第２層１１３の貫通穴１５１は、固体撮像素子１０５より大きく、図１の素子保持穴部１０９の大きさに予め形成されている。図６（ｂ）では、第１層１１１に、第２層１１３の貫通穴１５１と同じ大きさの貫通穴１５５が開けられて、回路基板１０３の内部空間１５３（第２層１１３の貫通穴１５１）が基板外部と連通し、これにより素子保持穴部１０９（素子収容部）が形成される。そして、図６（ｃ）に示されるように、素子保持穴部１０９を備えた回路基板１０３が形成される。   Here, the through hole 151 of the second layer 113 is larger than the solid-state image sensor 105 and is formed in advance to the size of the element holding hole 109 of FIG. In FIG. 6B, a through hole 155 having the same size as the through hole 151 of the second layer 113 is formed in the first layer 111, and the internal space 153 of the circuit board 103 (the through hole 151 of the second layer 113 is formed). ) Communicates with the outside of the substrate, thereby forming an element holding hole 109 (element accommodating portion). Then, as shown in FIG. 6C, the circuit board 103 provided with the element holding holes 109 is formed.

次に図７（ａ）に示されるように、固体撮像素子１０５が素子保持穴部１０９内に設定された実装位置に配置され、回路基板１０３に実装される。ここでは、撮像面が素子保持穴部１０９の入口１２５を向くように固体撮像素子１０５が配置される。固体撮像素子１０５は素子保持穴部１０９の底部１２１の中央に実装される。このとき、固体撮像素子１０５の端子１３３と、凹部の底のパターン１３５がワイヤ１３１で接続される。   Next, as shown in FIG. 7A, the solid-state imaging device 105 is disposed at the mounting position set in the element holding hole 109 and mounted on the circuit board 103. Here, the solid-state imaging device 105 is disposed so that the imaging surface faces the inlet 125 of the element holding hole 109. The solid-state image sensor 105 is mounted at the center of the bottom 121 of the element holding hole 109. At this time, the terminal 133 of the solid-state image sensor 105 and the pattern 135 at the bottom of the recess are connected by the wire 131.

さらに、図７（ｂ）に示されるように、光学系部品１０７が、固体撮像素子１０５と対応する位置で回路基板１０３に取り付けられる。光学系部品１０７は接着剤で接着されてよい。光学系部品１０７は、素子保持穴部１０９の入口１２５の外側に、入口１２５を塞ぐように取り付けられる。これにより、素子保持穴部１０９が密封される。このとき、素子保持穴部１０９内には防塵処理がなされた空気、窒素等の気体が入れられる。回路基板３には、チップ部品１４７等の他の部品も実装される。こうして撮像装置１０１が完成する。   Further, as shown in FIG. 7B, the optical system component 107 is attached to the circuit board 103 at a position corresponding to the solid-state imaging element 105. The optical system component 107 may be bonded with an adhesive. The optical system component 107 is attached outside the inlet 125 of the element holding hole 109 so as to close the inlet 125. Thereby, the element holding hole 109 is sealed. At this time, a gas such as air or nitrogen that has been dust-proofed is placed in the element holding hole 109. Other components such as a chip component 147 are also mounted on the circuit board 3. Thus, the imaging device 101 is completed.

以上に、本発明の第２の実施の形態に係る撮像装置１０１について説明した。本実施の形態によっても、回路基板１０３の素子保持穴部１０９に固体撮像素子１０５が実装されるので、回路基板１０３の厚さが小さくなる。また、樹脂パッケージを備えなくてよいので、部品点数が少なくてすむ。こうして、小型で低コストな撮像装置１０１を提供できる。   The imaging apparatus 101 according to the second embodiment of the present invention has been described above. Also according to the present embodiment, the solid-state imaging element 105 is mounted in the element holding hole 109 of the circuit board 103, so that the thickness of the circuit board 103 is reduced. Further, since it is not necessary to provide a resin package, the number of parts can be reduced. In this way, a small and low-cost imaging device 101 can be provided.

また、本実施の形態によれば、素子保持穴部１０９は、回路基板１０３に設けられた凹部であり、固体撮像素子１０５は、素子保持穴部１０９の凹部の入口１２５を撮像面が向いた状態で凹部の底部１２１に実装されており、光学系部品１０７は素子保持穴部１０９の入口１２５に取り付けられて入口１２５を塞いでいる。このような構成により、素子保持穴部１０９が凹部でよくなり、構造を簡素にできる。   Further, according to the present embodiment, the element holding hole 109 is a recess provided in the circuit board 103, and the solid-state imaging device 105 has the imaging surface facing the entrance 125 of the recess of the element holding hole 109. The optical system component 107 is mounted on the inlet 125 of the element holding hole 109 to block the inlet 125. With such a configuration, the element holding hole 109 may be a recess, and the structure can be simplified.

また、本実施の形態も、撮像素子製造方法としては、図６（ｂ）に示されたように、１以上の中間層（上記例では第２層１１３）の穴１５１からなる内部空間１５３が設けられた複数層基板で構成された回路基板１０３に対してザグリ加工を施して、内部空間５３を基板外部と連通させて素子保持穴部１０９を形成する。さらに、この方法は、図７（ａ）、図７（ｂ）に示されたように、素子保持穴部１０９内に設けられた実装位置にて固体撮像素子１０５を回路基板１０３に実装し、固体撮像素子１０５の実装位置に対応し固体撮像素子１０５に被写体像を形成する取付位置にて光学系部品１０７を回路基板１０３に取り付ける。このような方法により、小型で低コストな本実施の形態の撮像装置１０１を提供できる。複数層基板の中間層の穴１５１からなる内部空間１５３を回路基板１０３に設け、この内部空間１５３に対応する位置でザグリ加工を施すことにより、容易に素子保持穴部１０９を備えた回路基板１０３を製造でき、撮像装置１９１の製造が容易になる。   Also in this embodiment, as an imaging device manufacturing method, as shown in FIG. 6B, an internal space 153 formed by holes 151 in one or more intermediate layers (second layer 113 in the above example) is provided. A counterbore process is performed on the circuit board 103 formed of the provided multi-layer substrate, and the internal space 53 is communicated with the outside of the substrate to form the element holding hole 109. Further, in this method, as shown in FIGS. 7A and 7B, the solid-state imaging element 105 is mounted on the circuit board 103 at a mounting position provided in the element holding hole 109, The optical system component 107 is attached to the circuit board 103 at an attachment position for forming a subject image on the solid-state image sensor 105 corresponding to the mounting position of the solid-state image sensor 105. By such a method, the imaging device 101 of the present embodiment that is small and low in cost can be provided. The circuit board 103 provided with the element holding hole 109 is easily formed by providing the circuit board 103 with an internal space 153 including the hole 151 of the intermediate layer of the multi-layer board and performing a counterboring process at a position corresponding to the internal space 153. The image pickup apparatus 191 can be easily manufactured.

また、本実施の形態によれば、基板加工ステップは、回路基板１０３の一方の側から内部空間１５３へ向けて穴を開けて、素子保持穴部１０９としての凹部を形成し、撮像素子実装ステップは、素子保持穴部１０９の凹部の入口１２５を撮像面が向いた状態で凹部の底部１２１に固体撮像素子１０５を実装し、光学系取付ステップは、素子保持穴部１０９の入口１２５を塞ぐように光学系部品１０７を入口１２５に取り付ける。このような方法により、一方の側からの加工で素子保持穴部１０９を形成でき、撮像装置１０１の製造が容易になる。   Further, according to the present embodiment, in the board processing step, a hole is formed from one side of the circuit board 103 toward the internal space 153 to form a recess as the element holding hole 109, and the imaging element mounting step Mount the solid-state imaging device 105 on the bottom 121 of the recess with the entrance 125 of the recess of the element holding hole 109 facing the imaging surface, and the optical system mounting step closes the entrance 125 of the element holding hole 109 The optical system component 107 is attached to the inlet 125. By such a method, the element holding hole 109 can be formed by processing from one side, and the imaging apparatus 101 can be easily manufactured.

なお、上記の実施の形態では、回路基板１０３の層の数が３であった。しかし、本発明はこれに限定されない。回路基板１０３の層数は２でもよく、４以上でもよい。素子保持穴部１０９の凹部が１以上の層の貫通穴で構成されてよい。   In the above embodiment, the number of layers of the circuit board 103 is three. However, the present invention is not limited to this. The number of layers of the circuit board 103 may be two or four or more. The concave portion of the element holding hole 109 may be configured by one or more layers of through holes.

上記の第１の実施の形態と第２の実施の形態を比較すると、第１の実施の形態では、固体撮像素子の受光部が撮像開口を向けられており、受光部の周囲を素子保持穴部の段差部分に実装できる。このことを利用して、固体撮像素子が回路基板にフリップチップ実装される。フリップチップ実装を行うので、素子保持穴部と固体撮像素子の隙間が小さくてよく、素子保持穴部を小さくできる。したがって、基板面方向（厚さ方向と直角な方向）において撮像装置を小型化でき、この点で第１の実施の形態は第２の実施の形態よりもさらに有利である。   When the first embodiment and the second embodiment are compared, in the first embodiment, the light receiving portion of the solid-state image sensor is directed to the imaging opening, and the periphery of the light receiving portion is surrounded by an element holding hole. It can be mounted on the step part of the part. By utilizing this fact, the solid-state imaging device is flip-chip mounted on the circuit board. Since flip chip mounting is performed, the gap between the element holding hole and the solid-state imaging element may be small, and the element holding hole can be made small. Therefore, the imaging device can be reduced in size in the substrate surface direction (direction perpendicular to the thickness direction), and in this respect, the first embodiment is more advantageous than the second embodiment.

以上に本発明の好適な実施の形態を説明した。しかし、本発明は上述の実施の形態に限定されず、当業者が本発明の範囲内で上述の実施の形態を変形可能なことはもちろんである。   The preferred embodiments of the present invention have been described above. However, the present invention is not limited to the above-described embodiments, and it goes without saying that those skilled in the art can modify the above-described embodiments within the scope of the present invention.

以上のように、本発明にかかる撮像装置は、回路基板の素子保持穴部の内部に固体撮像素子を実装する構成を設けことにより、小型化と低コスト化が可能という効果を有し、携帯機器用撮像装置等として有用である。   As described above, the image pickup apparatus according to the present invention has an effect that it is possible to reduce the size and cost by providing a configuration in which the solid-state image pickup element is mounted inside the element holding hole portion of the circuit board. It is useful as an imaging device for equipment.

本発明の第１の実施の形態における撮像装置の断面図Sectional drawing of the imaging device in the 1st Embodiment of this invention 実装部位を示す拡大図Enlarged view showing mounting site （ａ）加工前の回路基板を示す断面図 （ｂ）一方の貫通穴の加工工程を示す断面図 （ｃ）他方の貫通穴の加工工程を示す断面図 （ｄ）加工後の回路基板を示す断面図(A) Cross-sectional view showing the circuit board before processing (b) Cross-sectional view showing the processing step of one through hole (c) Cross-sectional view showing the processing step of the other through-hole (d) Shown circuit board after processing Cross section （ａ）固体撮像素子の実装工程を示す断面図 （ｂ）光学系部品の実装工程を示す断面図(A) Cross-sectional view showing mounting process of solid-state imaging device (b) Cross-sectional view showing mounting process of optical system component 本発明の第２の実施の形態における撮像装置の断面図Sectional drawing of the imaging device in the 2nd Embodiment of this invention （ａ）加工前の回路基板を示す断面図 （ｂ）貫通穴の加工工程を示す断面図 （ｃ）加工後の回路基板を示す断面図(A) Cross-sectional view showing the circuit board before processing (b) Cross-sectional view showing the through hole processing step (c) Cross-sectional view showing the circuit board after processing （ａ）固体撮像素子の実装工程を示す断面図 （ｂ）光学系部品の実装工程を示す断面図(A) Cross-sectional view showing mounting process of solid-state imaging device (b) Cross-sectional view showing mounting process of optical system component

符号の説明Explanation of symbols

１ 撮像装置
３ 回路基板
５ 固体撮像素子
７ 光学系部品
９ 素子保持穴部
１１ 第１層
１３ 第２層
１５ 第３層
２１ 素子収容部
２３ 撮像開口
２５ 受光部
２７ 縁部
２９ 段差部
３１ パッド
３３ バンプ
３５ パッド DESCRIPTION OF SYMBOLS 1 Imaging device 3 Circuit board 5 Solid-state image sensor 7 Optical system component 9 Element holding hole part 11 1st layer 13 2nd layer 15 3rd layer 21 Element accommodating part 23 Imaging opening 25 Light receiving part 27 Edge part 29 Step part 31 Pad 33 Bump 35 Pad

Claims (7)

素子保持穴部が設けられた回路基板と、
前記素子保持穴部内に設けられた実装位置にて前記回路基板に実装された固体撮像素子と、
前記固体撮像素子に被写体像を形成する位置にて前記回路基板に取り付けられた光学系部品と、
を備えたことを特徴とする撮像装置。 A circuit board provided with an element holding hole, and
A solid-state imaging device mounted on the circuit board at a mounting position provided in the element holding hole; and
Optical system components attached to the circuit board at a position where a subject image is formed on the solid-state imaging device;
An imaging apparatus comprising: 前記素子保持穴部は、前記固体撮像素子より大きいサイズの素子収容部と前記固体撮像素子より小さいサイズの撮像開口とがつながった段差付き貫通開口であり、
前記固体撮像素子は、撮像面が前記撮像開口を向いた状態で、前記素子収容部内に配置され、前記固体撮像素子の縁部が前記素子収容部と前記撮像開口の段差部へフリップチップ実装されており、
前記光学系部品は、前記撮像開口の外側にて前記回路基板に取り付けられていることを特徴とする請求項１に記載の撮像装置。 The element holding hole is a stepped through opening in which an element accommodating portion having a size larger than the solid-state imaging device and an imaging opening having a size smaller than the solid-state imaging device are connected.
The solid-state imaging device is disposed in the element housing portion with an imaging surface facing the imaging opening, and an edge portion of the solid-state imaging device is flip-chip mounted on the step portion of the element housing portion and the imaging opening. And
The imaging apparatus according to claim 1, wherein the optical system component is attached to the circuit board outside the imaging aperture. 前記回路基板は複数層基板であり、前記複数層基板は、前記素子収容部を形成する穴を有する１以上の層と、前記撮像開口を形成する穴を有する１以上の層とが積層された構造を有したことを特徴とする請求項２に記載の撮像装置。   The circuit board is a multi-layer board, and the multi-layer board is formed by laminating one or more layers having a hole for forming the element accommodating portion and one or more layers having a hole for forming the imaging opening. The imaging apparatus according to claim 2, wherein the imaging apparatus has a structure. 前記素子保持穴部は、前記回路基板に設けられた凹部であり、
前記固体撮像素子は、前記素子保持穴部の前記凹部の入口を撮像面が向いた状態で前記凹部の底部に実装されており、
前記光学系部品は前記素子保持穴部の前記入口に取り付けられて前記入口を塞いでいることを特徴とする請求項１に記載の撮像装置。 The element holding hole is a recess provided in the circuit board,
The solid-state imaging device is mounted on the bottom of the recess with the imaging surface facing the entrance of the recess of the element holding hole,
The image pickup apparatus according to claim 1, wherein the optical system component is attached to the entrance of the element holding hole to close the entrance. １以上の中間層の穴からなる内部空間が設けられた複数層基板で構成された回路基板に対してザグリ加工を施して、前記内部空間を基板外部と連通させて素子保持穴部を形成する基板加工ステップと、
前記素子保持穴部内に設けられた実装位置にて固体撮像素子を前記回路基板に実装する撮像素子実装ステップと、
前記固体撮像素子の実装位置に対応し前記固体撮像素子に被写体像を形成する取付位置にて光学系部品を前記回路基板に取り付ける光学系取付ステップと、
を有することを特徴とする撮像装置製造方法。 A circuit board made of a multi-layer substrate provided with an internal space composed of one or more intermediate layer holes is subjected to counterboring, and the internal space is communicated with the outside of the substrate to form an element holding hole portion. A substrate processing step;
An image sensor mounting step of mounting a solid-state image sensor on the circuit board at a mounting position provided in the element holding hole;
An optical system mounting step of mounting an optical system component on the circuit board at a mounting position corresponding to a mounting position of the solid-state image sensor and forming a subject image on the solid-state image sensor;
An image pickup apparatus manufacturing method comprising: 前記基板加工ステップは、前記回路基板の一方の側から前記内部空間へ向けて前記固体撮像素子より大きいサイズの穴を開けて素子収容部を形成し、前記回路基板の他方の側から前記内部空間へ向けて前記固体撮像素子より小さいサイズの穴を開けて撮像開口を形成し、前記素子収容部と前記撮像開口とがつながった段差付き貫通開口を形成し、
前記撮像素子実装ステップは、前記固体撮像素子を、撮像面が前記撮像開口を向いた状態で前記素子収容部内に配置し、前記固体撮像素子の縁部を前記素子収容部と前記撮像開口の段差部へフリップチップ実装し、
前記光学系取付ステップは、前記光学系部品を前記撮像開口の外側にて前記回路基板に取り付けることを特徴とする請求項５に記載の撮像装置製造方法。 In the substrate processing step, a hole having a size larger than that of the solid-state imaging device is formed from one side of the circuit board toward the internal space to form an element housing portion, and the internal space is formed from the other side of the circuit board. Forming a hole with a size smaller than the solid-state image sensor toward the image forming opening, forming a stepped through-opening in which the element housing portion and the image capturing opening are connected,
In the imaging element mounting step, the solid-state imaging element is arranged in the element accommodating portion with an imaging surface facing the imaging aperture, and an edge of the solid-state imaging element is a step between the element accommodating portion and the imaging aperture. Flip chip mounting to the part,
The imaging apparatus manufacturing method according to claim 5, wherein the optical system attaching step attaches the optical system component to the circuit board outside the imaging opening. 前記基板加工ステップは、前記回路基板の一方の側から前記内部空間へ向けて穴を開けて、前記素子保持穴部としての凹部を形成し、
前記撮像素子実装ステップは、前記素子保持穴部の前記凹部の入口を撮像面が向いた状態で前記凹部の底部に前記固体撮像素子を実装し、
前記光学系取付ステップは、前記素子保持穴部の前記入口を塞ぐように前記光学系部品を前記入口に取り付けることを特徴とする請求項５に記載の撮像装置製造方法。 In the substrate processing step, a hole is formed from one side of the circuit board toward the internal space to form a recess as the element holding hole,
In the imaging element mounting step, the solid-state imaging element is mounted on the bottom of the recess with the imaging surface facing the entrance of the recess of the element holding hole.
The imaging apparatus manufacturing method according to claim 5, wherein in the optical system attaching step, the optical system component is attached to the entrance so as to close the entrance of the element holding hole.

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