JP2007194183A - Dimmer of electrodeless inductive discharge lamp - Google Patents

Dimmer of electrodeless inductive discharge lamp Download PDF

Info

Publication number
JP2007194183A
JP2007194183A JP2006159502A JP2006159502A JP2007194183A JP 2007194183 A JP2007194183 A JP 2007194183A JP 2006159502 A JP2006159502 A JP 2006159502A JP 2006159502 A JP2006159502 A JP 2006159502A JP 2007194183 A JP2007194183 A JP 2007194183A
Authority
JP
Japan
Prior art keywords
voltage
signal
control signal
output
power factor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2006159502A
Other languages
Japanese (ja)
Other versions
JP4643496B2 (en
Inventor
Masaharu Oka
正治 岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
FORCE TO FORCE KK
Original Assignee
FORCE TO FORCE KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by FORCE TO FORCE KK filed Critical FORCE TO FORCE KK
Publication of JP2007194183A publication Critical patent/JP2007194183A/en
Application granted granted Critical
Publication of JP4643496B2 publication Critical patent/JP4643496B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/02—Input arrangements using manually operated switches, e.g. using keyboards or dials
    • G06F3/023—Arrangements for converting discrete items of information into a coded form, e.g. arrangements for interpreting keyboard generated codes as alphanumeric codes, operand codes or instruction codes
    • G06F3/0233—Character input methods
    • A—HUMAN NECESSITIES
    • A63—SPORTS; GAMES; AMUSEMENTS
    • A63F—CARD, BOARD, OR ROULETTE GAMES; INDOOR GAMES USING SMALL MOVING PLAYING BODIES; VIDEO GAMES; GAMES NOT OTHERWISE PROVIDED FOR
    • A63F13/00—Video games, i.e. games using an electronically generated display having two or more dimensions
    • A63F13/85—Providing additional services to players
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/018—Input/output arrangements for oriental characters
    • A—HUMAN NECESSITIES
    • A63—SPORTS; GAMES; AMUSEMENTS
    • A63F—CARD, BOARD, OR ROULETTE GAMES; INDOOR GAMES USING SMALL MOVING PLAYING BODIES; VIDEO GAMES; GAMES NOT OTHERWISE PROVIDED FOR
    • A63F13/00—Video games, i.e. games using an electronically generated display having two or more dimensions
    • A63F13/20—Input arrangements for video game devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Circuit Arrangements For Discharge Lamps (AREA)
  • Discharge-Lamp Control Circuits And Pulse- Feed Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a dimmer of an electrodeless inductive discharge lamp, in which the dimmer is controlled by regulating a DC line voltage by synchronizing the level of the DC line voltage used in an electrodeless inverter with the switching frequency of the inverter. <P>SOLUTION: The dimmer includes a power factor correction circuit member for outputting a first DC voltage being a high DC voltage that has improved a power factor so as to make the current and voltage of an AC input power source to become the same phase and a second DC voltage being a DC voltage lower than the first DC voltage by receiving a full wave rectified DC current; a dimmer controller for outputting a first drive control signal for controlling the brightness of a lamp by using a third DC voltage as the drive control signal of a switching transistor, and a second drive control signal having reversed the first drive control signal, wherein the third DC voltage being a variable DC voltage lower than the first DC voltage is outputted by a dimmer signal by receiving the first DC voltage outputted by the power force correction circuit; and an inverter circuit member for lighting the lamp by turning on or off according to the frequency of the first driving control signal and the second driving control signal by receiving the first driving control signal and the second drive control signal having reversed the first drive control signal. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、無電極放電ランプの調光装置に関するもので、無電極インバータで使われているＤＣライン電圧（ＤＬＶ：DC Line Voltage）のレベルとインバータでのスイッチング周波数を同期させてＤＬＶを調整することで調光制御が可能な無電極誘導放電ランプの調光装置に関する。   The present invention relates to a dimming device for an electrodeless discharge lamp, and adjusts a DLV by synchronizing a DC line voltage (DLV) level used in an electrodeless inverter with a switching frequency in the inverter. It is related with the light control apparatus of the electrodeless induction discharge lamp which can control light control by this.

無電極放電ランプはランプ内部に電極を持たずに、ランプ外部の両端に形成された外部電極に高電圧と高電流を認可して強い電気場によって点灯されることで、プラズマガスが満たされている放電管のまわりにコイルが絡められて交流が流れると電子誘導による電界が生じて管の内部の放電によって発光されるランプである。   The electrodeless discharge lamp does not have an electrode inside the lamp, and the external electrodes formed at both ends outside the lamp are lit by a strong electric field with high voltage and high current approved, so that the plasma gas is filled. When a coil is entangled around a discharge tube and an alternating current flows, an electric field is generated by electron induction and light is emitted by discharge inside the tube.

前記無電極放電ランプを点灯してランプから発光される光の強さを調節する装置は、調光装置と称される。   A device that turns on the electrodeless discharge lamp and adjusts the intensity of light emitted from the lamp is called a light control device.

従来の光源では調光をするためにさまざまな方法が使われている。その例として、白熱電球のような原理で発光する光源には供給される電圧の振幅を制御する方式と位相を制御する方式が代表的であり、一般蛍光灯のようにグロー放電を利用して発光する光源を周波数可変にして光源に供給されるエネルギーを制御して調光を行う方法を使う。   Conventional light sources use various methods for dimming. For example, a light source that emits light based on a principle such as an incandescent lamp is typically a method that controls the amplitude of the supplied voltage and a method that controls the phase, and uses a glow discharge like a general fluorescent lamp. A method is used in which the frequency of a light source that emits light is variable and the energy supplied to the light source is controlled to perform light control.

前記のような方法で無電極誘導放電ランプを調光するにはさまざまな問題点がある。例えば無電極誘導放電ランプはプラズマガスが満たされている放電管のまわりにコイルが絡められて交流を通電すれば電子誘導による電界が生じて管の内部に放電が形成される。   There are various problems in dimming an electrodeless induction discharge lamp by the method described above. For example, in an electrodeless induction discharge lamp, a coil is entangled around a discharge tube filled with plasma gas and an alternating current is applied, an electric field is generated by electron induction and a discharge is formed inside the tube.

また、放電の時、負荷特性を持っているので振幅制御をするのは難しいし、高周波を使って誘導放電をなすから位相制御が不可能である。周波数制御も使用するランプの電流周波数帯域幅が狭くて安定的で広い範囲の調光を行うことはできない。   In addition, it is difficult to control the amplitude because it has a load characteristic at the time of discharge, and phase control is impossible because induction discharge is performed using a high frequency. The current frequency bandwidth of a lamp that also uses frequency control is narrow and stable and cannot perform dimming in a wide range.

前記のような問題点を解決するための本発明の技術的課題は、無電極インバータで使われているＤＣライン電圧のレベルとインバータでのスイッチング周波数を同期させてＤＬＶを調整することで調光制御が可能な無電極誘導放電ランプの調光装置を提供することである。   The technical problem of the present invention for solving the above-mentioned problems is to adjust the DLV by synchronizing the DC line voltage level used in the electrodeless inverter and the switching frequency in the inverter. It is an object to provide a dimming device for an electrodeless induction discharge lamp that can be controlled.

前記目的を果たすための本発明による無電極誘導放電ランプの調光装置装置は、入力された交流入力電源を全波整流し、全波整流された電圧を出力する全波整流及び正電圧部と、前記全波整流された直流電圧が入力されて交流入力電源の電流と電圧が同位相になるように力率が改善された高電圧の直流電圧である第１直流電圧、及び、第１直流電圧より低い直流電圧である第２直流電圧を出力する力率補正回路部と、前記力率補正回路部によって出力された第１直流電圧を受信して所定の調光制御信号によって前記第１直流電圧より小さい可変の直流電圧である第３直流電圧を出力してスイッチングトランジスタの駆動電源に第３直流電圧を使ってランプの明るさを制御する第１駆動制御信号と、前記第１駆動制御信号が反転された第２駆動制御信号とを出力する調光制御部と、前記第１駆動制御信号と第１駆動制御信号が反転された第２駆動制御信号を受信して第１駆動制御信号と第２駆動制御信号との駆動周波数に応じてオン又はオフすることによってランプを点灯させるインバータ回路部とを備えることを特徴とする。   A dimmer device for an electrodeless induction discharge lamp according to the present invention for achieving the above-mentioned object is provided with a full-wave rectification and positive voltage unit for full-wave rectification of an input AC input power supply and outputting a full-wave rectified voltage; A first DC voltage that is a high-voltage DC voltage whose power factor has been improved so that the current and voltage of the AC input power supply are in phase with the input of the full-wave rectified DC voltage; A power factor correction circuit that outputs a second DC voltage, which is a DC voltage lower than the voltage, and a first dimming control signal that receives the first DC voltage output from the power factor correction circuit and receives the first DC voltage. A first drive control signal that outputs a third DC voltage, which is a variable DC voltage smaller than the voltage, and controls the brightness of the lamp by using the third DC voltage as a drive power source of the switching transistor; and the first drive control signal Second drive with inverted A dimming control unit that outputs a control signal, a first drive control signal, a second drive control signal obtained by inverting the first drive control signal, and a first drive control signal and a second drive control signal And an inverter circuit unit that lights the lamp by turning it on or off according to the driving frequency.

また、前記調光制御部は、調光信号を出力する調光信号部と、前記調光信号を受信して出力側のＤＣ電圧を所定の電圧で調節して、前記力率補正回路部の力率制御のためのトランジスタのオン／オフ時間を制御して入力側の力率を制御する力率制御部と、前記力率制御部の出力側のＤＣ電圧によって周波数を所定の周波数で発振させるＶＣＯ回路部と、前記ＶＣＯ回路の出力信号を位相分割して所定の周波数で変換した後ディレイ回路を利用してスイッチングのときに必要なデッドタイムを作る位相分割回路部と、前記位相分割回路部で作られた信号をスイッチを駆動させることができる信号に変換する増幅部とを含むことを特徴とする。   The dimming control unit includes a dimming signal unit that outputs a dimming signal, and receives the dimming signal and adjusts a DC voltage on an output side with a predetermined voltage, so that the power factor correction circuit unit A power factor control unit that controls an on / off time of a transistor for power factor control to control the power factor on the input side, and a frequency is oscillated at a predetermined frequency by a DC voltage on the output side of the power factor control unit A VCO circuit unit, a phase division circuit unit for phase-dividing and converting the output signal of the VCO circuit at a predetermined frequency, and then creating a dead time required for switching using a delay circuit, and the phase-division circuit unit And an amplifying unit that converts the signal generated in step 1 into a signal that can drive the switch.

また、前記力率制御部は、前記全波整流及び正電圧部から入力された直流電圧の入力電流の位相を感知する低域通過フィルター（ＬＰＦ）と、前記低域通過フィルター（ＬＰＦ）から出力された電圧を所定倍数昇圧された電圧で出力する電圧昇圧部と、前記全波整流及び正電圧部から入力された直流電圧と、前記電圧昇圧部によって出力された昇圧電圧と、ディミング信号と基準信号とが比較され出力された出力電圧とが印加されるマルチプレクサ（ＭＵＸ）と、前記マルチプレクサ（ＭＵＸ）の出力信号と前記力率補正回路部の力率制御のためのトランジスタのソースから出力された信号とを比較して前記トランジスタのゲートに入力される力率制御信号を出力する第１比較器とを備えることを特徴とする。   The power factor control unit outputs a low-pass filter (LPF) that senses a phase of an input current of a DC voltage input from the full-wave rectification and positive voltage unit, and an output from the low-pass filter (LPF). A voltage boosting unit that outputs a voltage that has been boosted by a predetermined multiple, a DC voltage input from the full-wave rectification and positive voltage unit, a boosted voltage output by the voltage boosting unit, a dimming signal, and a reference A multiplexer (MUX) to which an output voltage compared with a signal is applied, an output signal of the multiplexer (MUX), and a source of a transistor for power factor control of the power factor correction circuit unit are output And a first comparator for comparing a signal and outputting a power factor control signal input to the gate of the transistor.

さらに、前記ＶＣＯ回路部は、可変電圧によって周波数を５００ＫＨｚ〜５５０ＫＨｚで発振させることを特徴とし、前記位相分割回路部は、前記ＶＣＯ回路の出力信号が印加される第１Ｄ‐Ｆ／Ｆと、前記第１Ｄ‐Ｆ／Ｆから位相を２５０ＫＨｚ〜２７５ＫＨｚに分割する第２Ｄ‐Ｆ／Ｆと、第３Ｄ‐Ｆ／Ｆとを備えることを特徴とする。 Further, the VCO circuit unit oscillates at a frequency of 500 KHz to 550 KHz by a variable voltage, and the phase division circuit unit includes a first DF / F to which an output signal of the VCO circuit is applied, A second DF / F that divides the phase from 250 KHz to 275 KHz from the first DF / F and a third DF / F are provided.

本発明による無電極誘導放電ランプの調光装置によれば、無電極インバータで使われているＤＬＶ（ＤＣ Line Voltage）のレベルとインバータでのスイッチング周波数を同期させてＤＬＶを調整することで調光制御することができる。   According to the dimming device for the electrodeless induction discharge lamp according to the present invention, dimming is performed by adjusting the DLV by synchronizing the DLV (DC Line Voltage) level used in the electrodeless inverter and the switching frequency in the inverter. Can be controlled.

以下、図面を参照して本発明について詳しく説明する。   Hereinafter, the present invention will be described in detail with reference to the drawings.

図１は本発明による無電極誘導放電ランプ調光装置のブロック図で、全波整流及び正電圧部(１０）、力率補正回路部（２０）、インバータ回路部（３０）、ランプ（４０）及び調光制御部（５０）で構成される。   FIG. 1 is a block diagram of an electrodeless inductive discharge lamp dimmer according to the present invention. Full wave rectification and positive voltage section (10), power factor correction circuit section (20), inverter circuit section (30), lamp (40) And a light control unit (50).

全波整流及び正電圧部（１０）には交流入力電源が入力され、入力された交流入力電源を全波整流させて全波整流された直流電圧を出力する。   An AC input power supply is input to the full-wave rectification and positive voltage unit (10), and the input AC input power supply is subjected to full-wave rectification to output a full-wave rectified DC voltage.

力率補正回路部（２０）には、全波整流された直流電圧が入力されて交流入力電源の電流と電圧が同位相になるように力率が改善された高電圧の直流電圧である第１直流電圧及び第１直流電圧より低い直流電圧である第２直流電圧を出力する。   The power factor correction circuit unit (20) receives a full-wave rectified DC voltage and is a high-voltage DC voltage whose power factor is improved so that the current and voltage of the AC input power supply have the same phase. The first DC voltage and the second DC voltage that is lower than the first DC voltage are output.

インバータ回路部（３０）は、第１駆動制御信号と、第１駆動制御信号が反転された第２駆動制御信号とを受信して、第１駆動制御信号と第２駆動制御信号の駆動周波数によってオン又はオフされることによってランプ（４０）が点灯される。   The inverter circuit unit (30) receives the first drive control signal and the second drive control signal obtained by inverting the first drive control signal, and depends on the drive frequencies of the first drive control signal and the second drive control signal. The lamp (40) is turned on by being turned on or off.

ランプ（４０）は、プラズマガスが満たされている放電管のまわりにコイルが絡められて交流が印加されれば電子誘導による電界が生じて管の内部に放電が行われ発光される。   In the lamp (40), when an alternating current is applied around a discharge tube filled with plasma gas and an alternating current is applied, an electric field due to electron induction is generated, and the inside of the tube is discharged to emit light.

調光制御部（５０）は、調光信号と三角パルス信号を受信／比較して調光制御信号を出力し、前記調光制御信号と力率補正回路部（２０）によって出力された第１直流電圧が入力され、前記調光制御信号によって前記第１直流電圧より小さな可変の直流電圧である第３直流電圧を出力し、スイッチングトランジスタの駆動電源として第３直流電圧を使ってランプの明るさを制御する。   The dimming control unit (50) receives / compares the dimming signal and the triangular pulse signal to output a dimming control signal, and the first dimming control signal and the power factor correction circuit unit (20) output the first dimming control signal. A direct current voltage is input, a third direct current voltage, which is a variable direct current voltage smaller than the first direct current voltage, is output by the dimming control signal, and the brightness of the lamp using the third direct current voltage as a driving power source for the switching transistor. To control.

図２は、本発明による無電極誘導放電ランプ調光装置の調光制御部に対する詳細ブロック図で、力率制御部（５１）、調光制御信号部（５２）、ＶＣＯ回路部（５３）、位相分割回路部（５４）及び増幅部（５５）で構成される。   FIG. 2 is a detailed block diagram of the dimming control unit of the electrodeless induction discharge lamp dimming device according to the present invention. The power factor control unit (51), the dimming control signal unit (52), the VCO circuit unit (53), It consists of a phase division circuit part (54) and an amplification part (55).

力率制御部（５１）は、力率補正のためトランジスタのスイッチオン／オフ時間を制御して、入力側の力率を制御して、調光制御信号を受信して出力側のＤＣ電圧を３００Ｖ〜５０Ｖに調節し、調光信号部（５２）は調光信号を出力する。   The power factor control section (51) controls the switch on / off time of the transistor for power factor correction, controls the power factor on the input side, receives the dimming control signal, and adjusts the DC voltage on the output side. The dimming signal section (52) outputs a dimming signal by adjusting to 300V to 50V.

ＶＣＯ回路部（５３）は、力率制御部（５１）の出力側ＤＣ電圧によって周波数を５００ＫＨｚ〜５５０ＫＨｚで発振する。   The VCO circuit unit (53) oscillates at a frequency of 500 KHz to 550 KHz by the output side DC voltage of the power factor control unit (51).

位相分割回路部（５４）はＶＣＯ回路部（５３）の出力信号を位相分割して２５０ＫＨｚ〜２７５ＫＨｚに変換した後、ディレイ回路を利用してスイッチング時に必要なデッド‐タイムを作る。また、位相分割回路部（５４）は、前記ＶＣＯ回路部（５３）の出力信号が入力される第１Ｄ‐Ｆ／Ｆと、前記第１Ｄ‐Ｆ／Ｆから位相を２５０ＫＨｚ〜２７５ＫＨｚで分割する第２Ｄ‐Ｆ／Ｆと、第３Ｄ‐Ｆ／Ｆとを具備する。また、増幅部（５５）は位相分割回路部（５４）で作られた信号を、スイッチを駆動することができる信号に増幅する。   The phase division circuit unit (54) performs phase division on the output signal of the VCO circuit unit (53) and converts it to 250 KHz to 275 KHz, and then uses the delay circuit to create a dead time required for switching. The phase division circuit unit (54) divides the phase from 250 KHz to 275 KHz from the first DF / F to which the output signal of the VCO circuit unit (53) is input and the first DF / F. 2D-F / F and 3rd DF / F are provided. The amplification unit (55) amplifies the signal generated by the phase division circuit unit (54) into a signal that can drive the switch.

図３は本発明による無電極誘導放電ランプの調光装置の実施例を現した回路図で、ランプ照度制御のために力率を補正する第１トランジスタ（Ｑ１）はドレイン、ゲート及びソースを持ち、ドレインは全波整流及び正電圧部（１０）によって出力された直流電圧に繋がれて、またソースは第２抵抗（Ｒ２）及び力率制御部（５１）の第１比較器（５１５）の入力側に繋がれて、そしてゲートは力率制御部（５１）から出力される制御信号によってオン／オフされる。   FIG. 3 is a circuit diagram showing an embodiment of a dimming device for an electrodeless induction discharge lamp according to the present invention. The first transistor (Q1) for correcting the power factor for controlling the lamp illuminance has a drain, a gate and a source. , The drain is connected to the full-wave rectification and the DC voltage output by the positive voltage unit (10), and the source is the second resistor (R2) and the first comparator (515) of the power factor control unit (51). The gate is connected to the input side, and the gate is turned on / off by a control signal output from the power factor control unit (51).

前記力率制御部（５１）は低域通過フィルター（５１１）、電圧昇圧部（５１２）、マルチプレクサ（５１３）、ゼロ電流検出部（Zero current detector：５１４）、第１比較器（５１５）及び第２比較器（５１６）で構成される。   The power factor controller (51) includes a low-pass filter (511), a voltage booster (512), a multiplexer (513), a zero current detector (514), a first comparator (515), and a first comparator. It consists of two comparators (516).

全波整流及び正電圧部（１０）から直流電圧の入力電流の位相を感知する低域通過フィルター（ＬＰＦ：５１１）とマルチプレクサ（ＭＵＸ：５１３）に直流電圧が入力される。ここで、前記入力電流の位相は減衰された入力電圧の形態で感知されており、前記入力電圧は低域通過フィルター（５１１）から入力される。   A direct current voltage is inputted from a full-wave rectification and positive voltage section (10) to a low-pass filter (LPF: 511) and a multiplexer (MUX: 513) that sense the phase of the input current of the direct current voltage. Here, the phase of the input current is sensed in the form of an attenuated input voltage, and the input voltage is input from a low-pass filter (511).

低域通過フィルター（５１１）から出力された電圧は電圧昇圧部（５１２）によって２倍昇圧された電圧が出力されて、前記全波整流及び正電圧部（１０）から直流電圧のようにマルチプレクサ（５１３）に入力される。また、前記マルチプレクサ（ＭＵＸ：５１３）には、ディミングシグナル（Dimming Signal）と基準信号が入力される第２比較器（５１６）によって出力された信号も入力される。   The voltage output from the low-pass filter (511) is doubled by the voltage booster (512) and output from the full-wave rectifier and positive voltage unit (10) as a DC voltage. 513). The multiplexer (MUX: 513) also receives a signal output from the second comparator (516) to which a dimming signal and a reference signal are input.

従って、前記マルチプレクサ（５１３）は前記のような信号が印加されて新しい信号を出力しており、前記マルチプレクサ（５１３）の出力信号は前記第１トランジスタ（Ｑ１）のソースから出力された信号を第１比較器（５１５）によって比較されて出力される。   Accordingly, the multiplexer 513 outputs a new signal by applying the signal as described above, and the output signal of the multiplexer 513 is the signal output from the source of the first transistor Q1. One comparator (515) compares and outputs the result.

即ち、第１比較期（５１５）の出力信号は、ディレイとゼロ電流検出器（５１４）を通じて前記第１トランジスタ（Ｑ１）のゲートに入力される力率制御信号になる。   That is, the output signal of the first comparison period (515) becomes a power factor control signal input to the gate of the first transistor (Q1) through the delay and zero current detector (514).

図４は合成された信号とスイッチ電流とを比較してゲート信号を生成するタイミングチャートで、マルチプレクサ（５１３）によって合成された信号（３）と前記第１トランジスタ（Ｑ１）のスイッチ電流波形（２）が第１比較器（５１５）に入力されて、前記第１比較器（５１５）によって出力された非反転入力信号（４）がディレイ回路及びゼロ電流検出器（５１４）を通じて前記第１トランジスタ（Ｑ１）のゲート入力信号（１）が生成される。本発明でマルチプレクサ（５１３）は入力電圧が変化しても入力電力を一定に維持するために使う。   FIG. 4 is a timing chart for generating a gate signal by comparing the synthesized signal and the switch current. The signal (3) synthesized by the multiplexer (513) and the switch current waveform (2) of the first transistor (Q1). ) Is input to the first comparator (515), and the non-inverting input signal (4) output from the first comparator (515) is transmitted to the first transistor (514) through the delay circuit and the zero current detector (514). A gate input signal (1) of Q1) is generated. In the present invention, the multiplexer (513) is used to keep the input power constant even when the input voltage changes.

全波整流及び正電圧部（１０）から入力された直流電圧を可変に出力する第５抵抗（Ｒ５）及び一つの端子が第５抵抗（Ｒ５）の他の端子と繋がれて、他の端子が接地された第６抵抗（Ｒ６）で構成されており、前記第５抵抗（Ｒ５）と第６抵抗（Ｒ６）の間の接点で可変電圧を出力してＶＣＯ回路部（５３）に印加する。   The fifth resistor (R5) for variably outputting the direct-current voltage input from the full-wave rectification and positive voltage unit (10) and one terminal are connected to the other terminal of the fifth resistor (R5), and the other terminal Is constituted by a grounded sixth resistor (R6), and a variable voltage is output at a contact point between the fifth resistor (R5) and the sixth resistor (R6) and applied to the VCO circuit unit (53). .

ＶＣＯ回路部（５３）は前記可変電圧によって周波数５００ＫＨｚ〜５５０ＫＨｚで発振しており、位相分割回路部（５４）はＶＣＯ回路部（５３）の出力信号を位相分割して２５０ＫＨｚ〜２７５ＫＨｚに変換した後ディレイ回路を利用してスイッチング時に必要なデッドタイムを作る。   The VCO circuit unit (53) oscillates at a frequency of 500 KHz to 550 KHz by the variable voltage, and the phase division circuit unit (54) performs phase division on the output signal of the VCO circuit unit (53) and converts it to 250 KHz to 275 KHz. Use the delay circuit to create the necessary dead time during switching.

位相分割回路部（５４）は、前記ＶＣＯ回路部（５３）の出力信号が印加された第１Ｄ‐Ｆ／Ｆと、前記第１Ｄ‐Ｆ／Ｆからの位相を２５０ＫＨｚ〜２７５ＫＨｚに分割する第２Ｄ‐Ｆ／Ｆと、第３Ｄ‐Ｆ／Ｆとを具備して、第１駆動制御信号と第１駆動制御信号が反転された第２駆動制御信号とを増幅部（５５）で増幅してスイッチを駆動することができる信号に変換する。   The phase dividing circuit unit (54) is a first DF / F to which the output signal of the VCO circuit unit (53) is applied, and a second D for dividing the phase from the first DF / F into 250 KHz to 275 KHz. -F / F and 3D-F / F, the first drive control signal and the second drive control signal obtained by inverting the first drive control signal are amplified by the amplifying unit (55) and switched Is converted into a signal that can be driven.

前記増幅された第１駆動制御信号と第２駆動制御信号をインバータ回路部（３０）の第２トランジスタ（Ｑ２）と第３トランジスタ（Ｑ３）に印加して、前記第１駆動制御信号と第２駆動制御信号の駆動周波数によって第２トランジスタ（Ｑ２）及び第３トランジスタ（Ｑ３）がオン又はオフされ、ランプ（４０）を点灯又は消灯させる。   The amplified first drive control signal and the second drive control signal are applied to the second transistor (Q2) and the third transistor (Q3) of the inverter circuit unit (30), and the first drive control signal and the second drive control signal are applied. The second transistor (Q2) and the third transistor (Q3) are turned on or off according to the drive frequency of the drive control signal, and the lamp (40) is turned on or off.

以上、本発明の図面に図示された実施例を参照に説明したが、これは例示的なことに過ぎなくて、本発明の技術的思想の範囲内でいくらでも多様な変化及び変形が可能なことは本技術分野で通常的に熟練された当業者には明らかである。しかし、このような変化及び変形が本発明の範囲内に属するということは本願発明の特許請求範囲を通じて確認することができる。   Although the present invention has been described above with reference to the embodiments illustrated in the drawings, the present invention is only illustrative and various changes and modifications can be made within the scope of the technical idea of the present invention. Will be apparent to those of ordinary skill in the art. However, it can be confirmed through the claims of the present invention that such changes and modifications fall within the scope of the present invention.

図１は本発明による無電極誘導放電ランプ調光装置のブロック図、FIG. 1 is a block diagram of an electrodeless induction discharge lamp dimmer according to the present invention. 図２は本発明による無電極誘導放電ランプ調光装置の調光制御部に対する詳細ブロック図、FIG. 2 is a detailed block diagram of the dimming control unit of the electrodeless induction discharge lamp dimming device according to the present invention, 図３は本発明による無電極誘導放電ランプ調光装置の実施例を示す回路図、FIG. 3 is a circuit diagram showing an embodiment of an electrodeless induction discharge lamp dimmer according to the present invention, 図４は合成された信号とスイッチ電流を比較してゲート信号を生成するタイミングチャート。FIG. 4 is a timing chart for generating a gate signal by comparing the synthesized signal and the switch current.

Claims (5)

無電極誘導放電ランプを調光する調光装置において、
入力された交流入力電源を全波整流し、全波整流された電圧を出力する全波整流及び正電圧部と、
前記全波整流された直流電圧が入力されて交流入力電源の電流と電圧が同位相になるように力率が改善された高電圧の直流電圧である第１直流電圧、及び、第１直流電圧より低い直流電圧である第２直流電圧を出力する力率補正回路部と、
前記力率補正回路部によって出力された第１直流電圧を受信して調光制御信号によって前記第１直流電圧より小さい可変の直流電圧である第３直流電圧を出力してスイッチングトランジスタの駆動電源として第３直流電圧を使ってランプの明るさを制御する第１駆動制御信号と、前記第１駆動制御信号が反転された第２駆動制御信号とを出力する調光制御部と、
前記第１駆動制御信号と第１駆動制御信号が反転された第２駆動制御信号とを受信して第１駆動制御信号と第２駆動制御信号の駆動周波数に応じてオン又はオフすることによってランプを点灯させるインバータ回路部とを備えることを特徴とする無電極誘導放電ランプの調光装置。 In the dimming device for dimming the electrodeless induction discharge lamp,
Full-wave rectification and positive voltage unit for full-wave rectification of the input AC input power, and output full-wave rectified voltage,
A first DC voltage, which is a high DC voltage whose power factor has been improved so that the current and voltage of the AC input power supply are in phase with the input of the full-wave rectified DC voltage, and the first DC voltage A power factor correction circuit that outputs a second DC voltage that is a lower DC voltage;
The first DC voltage output by the power factor correction circuit unit is received, and a third DC voltage, which is a variable DC voltage smaller than the first DC voltage, is output by a dimming control signal to serve as a driving power source for the switching transistor. A dimming control unit that outputs a first drive control signal that controls the brightness of the lamp using a third DC voltage, and a second drive control signal obtained by inverting the first drive control signal;
The lamp is received by receiving the first drive control signal and the second drive control signal obtained by inverting the first drive control signal, and turning on or off according to the drive frequency of the first drive control signal and the second drive control signal. A dimming device for an electrodeless induction discharge lamp, comprising: an inverter circuit unit that lights the lamp. 前記調光制御部は、
調光信号を出力する調光信号部と、
前記調光信号を受信して出力側のＤＣ電圧を所定の電圧で調節して、前記力率補正回路部の力率制御のためのトランジスタのオン／オフ時間を制御して入力側の力率を制御する力率制御部と、
前記力率制御部の出力側のＤＣ電圧によって周波数を所定の周波数で発振させるＶＣＯ回路部と、
前記ＶＣＯ回路の出力信号を位相分割して所定の周波数に変換し、ディレイ回路を利用してスイッチングのときに必要なデッドタイムを作る位相分割回路部と、
前記位相分割回路部で作られた信号をスイッチを駆動させることができる信号に変換する増幅部とを含むことを特徴とする、請求項１に記載の無電極誘導放電ランプの調光装置。 The dimming controller is
A dimming signal unit for outputting a dimming signal;
The power factor on the input side is controlled by receiving the dimming signal and adjusting the DC voltage on the output side with a predetermined voltage to control the on / off time of the transistor for power factor control of the power factor correction circuit unit. A power factor control unit for controlling
A VCO circuit unit that oscillates at a predetermined frequency by a DC voltage on the output side of the power factor control unit;
A phase division circuit section for phase-dividing the output signal of the VCO circuit to convert the output signal to a predetermined frequency, and making a dead time required for switching using a delay circuit;
The dimming device for an electrodeless induction discharge lamp according to claim 1, further comprising: an amplifying unit that converts a signal generated by the phase division circuit unit into a signal that can drive a switch. 前記力率制御部は、
前記全波整流及び正電圧部から入力された直流電圧の入力電流の位相を感知する低域通過フィルター（ＬＰＦ）と、
前記低域通過フィルター（ＬＰＦ）から出力された電圧を所定倍数昇圧された電圧として出力する電圧昇圧部と、
前記全波整流及び正電圧部から入力された直流電圧と、前記電圧昇圧部によって出力された昇圧電圧と、ディミング信号と基準信号とが比較され出力された出力電圧とが印加されるマルチプレクサ（ＭＵＸ）と、
前記マルチプレクサ（ＭＵＸ）の出力信号と前記力率補正回路部の力率制御のためのトランジスタのソースから出力された信号とを比較して前記トランジスタのゲートに入力される力率制御信号を出力する第１比較器とを備えることを特徴とする、請求項２に記載の無電極誘導放電ランプの調光装置。 The power factor control unit
A low-pass filter (LPF) that senses the phase of the input current of the DC voltage input from the full-wave rectification and positive voltage unit;
A voltage booster that outputs the voltage output from the low-pass filter (LPF) as a voltage boosted by a predetermined multiple;
A multiplexer (MUX) to which a DC voltage input from the full-wave rectification and positive voltage unit, a boosted voltage output from the voltage boosting unit, and an output voltage output by comparing a dimming signal with a reference signal are applied. )When,
The output signal of the multiplexer (MUX) and the signal output from the source of the transistor for power factor control of the power factor correction circuit unit are compared, and the power factor control signal input to the gate of the transistor is output. A light control device for an electrodeless induction discharge lamp according to claim 2, further comprising a first comparator. 前記ＶＣＯ回路部は、可変電圧によって周波数を５００ＫＨｚ〜５５０ＫＨｚで発振させることを特徴とする、請求項２に記載の無電極誘導放電ランプの調光装置。   The dimmer of the electrodeless induction discharge lamp according to claim 2, wherein the VCO circuit unit oscillates at a frequency of 500 KHz to 550 KHz by a variable voltage. 前記位相分割回路部は、前記ＶＣＯ回路の出力信号が印加される第１Ｄ‐Ｆ／Ｆと、前記第１Ｄ‐Ｆ／Ｆから位相を２５０ＫＨｚ〜２７５ＫＨｚに分割する第２Ｄ‐Ｆ／Ｆと、第３Ｄ‐Ｆ／Ｆとを備えることを特徴とする、請求項２に記載の無電極誘導放電ランプ調光装置。   The phase division circuit unit includes a first DF / F to which an output signal of the VCO circuit is applied, a second DF / F that divides the phase from 250 KHz to 275 KHz from the first DF / F, 3. The electrodeless induction discharge lamp dimmer according to claim 2, comprising 3D-F / F.
JP2006159502A 2006-01-20 2006-06-08 Electrodeless induction discharge lamp dimmer Expired - Fee Related JP4643496B2 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020060006499A KR100675515B1 (en) 2006-01-20 2006-01-20 A dimmer of electrodeless induction discharge lamp

Publications (2)

Publication Number Publication Date
JP2007194183A true JP2007194183A (en) 2007-08-02
JP4643496B2 JP4643496B2 (en) 2011-03-02

Family

ID=38015104

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006159502A Expired - Fee Related JP4643496B2 (en) 2006-01-20 2006-06-08 Electrodeless induction discharge lamp dimmer

Country Status (2)

Country Link
JP (1) JP4643496B2 (en)
KR (1) KR100675515B1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010108842A (en) * 2008-10-31 2010-05-13 Kawamura Electric Inc Power-saving device for high pressure discharge lamp
CN105357805A (en) * 2015-12-02 2016-02-24 深圳市中孚能电气设备有限公司 Stepless dimming circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100815613B1 (en) 2007-07-12 2008-03-24 유승진 Driving circuit of induction lamp and the driving method of the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07169584A (en) * 1993-12-17 1995-07-04 Koito Mfg Co Ltd Discharge lamp lighting circuit
JP2003217887A (en) * 2002-01-23 2003-07-31 Harison Toshiba Lighting Corp Electrodeless discharge lamp
JP2004355864A (en) * 2003-05-27 2004-12-16 Matsushita Electric Works Ltd Discharge lamp lighting device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07296983A (en) * 1994-04-25 1995-11-10 Matsushita Electric Works Ltd Electrodeless discharge lamp lighting device
JPH11162690A (en) 1997-11-26 1999-06-18 Nec Home Electron Ltd Dimmer device for rare-gas discharge lamp
KR100457852B1 (en) * 2003-04-17 2004-11-26 (주)세광에너텍 electrodeless dimmer system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07169584A (en) * 1993-12-17 1995-07-04 Koito Mfg Co Ltd Discharge lamp lighting circuit
JP2003217887A (en) * 2002-01-23 2003-07-31 Harison Toshiba Lighting Corp Electrodeless discharge lamp
JP2004355864A (en) * 2003-05-27 2004-12-16 Matsushita Electric Works Ltd Discharge lamp lighting device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010108842A (en) * 2008-10-31 2010-05-13 Kawamura Electric Inc Power-saving device for high pressure discharge lamp
CN105357805A (en) * 2015-12-02 2016-02-24 深圳市中孚能电气设备有限公司 Stepless dimming circuit
CN105357805B (en) * 2015-12-02 2017-11-21 深圳市中孚能电气设备有限公司 A kind of non-pole light regulating circuit

Also Published As

Publication number Publication date
JP4643496B2 (en) 2011-03-02
KR100675515B1 (en) 2007-01-30

Similar Documents

Publication Publication Date Title
US8348437B2 (en) Discharge lamp lighting device and image display device that controls electric power converter output on a historical basis
EP1768468A2 (en) High intensity discharge lamp lighting device and illumination apparatus
JP2020513221A (en) Electronic ballast interface circuit
JP4853638B2 (en) High pressure discharge lamp lighting device
US7388335B2 (en) Apparatus for providing a sinusoidally amplitude-modulated operating voltage, lighting system and method for generating an amplitude-modulated voltage
JP2006511055A (en) Improvement of high frequency electronic ballast
JP4643496B2 (en) Electrodeless induction discharge lamp dimmer
JP5121517B2 (en) Discharge lamp lighting device, lighting device
JP2006202775A (en) Lighting device for high-pressure discharge lamp
WO2008155714A1 (en) Lamp driver, lighting system and method
JP2008153142A (en) High-pressure discharge lamp lighting device, and lighting method for the high-pressure discharge lamp
JP4406754B2 (en) Discharge lamp lighting device
JP2009289555A (en) Discharge lamp lighting device, and luminaire
WO2009130861A1 (en) Inverter device
WO2007138969A1 (en) Discharge lamp operation device and illumination instrument
JP3329172B2 (en) Discharge lamp lighting device
JP4239898B2 (en) Discharge lamp lighting device and lighting fixture
JP2005071921A (en) High-pressure discharge lamp lighting device and lighting apparatus
JP2002352990A (en) Lighting equipment for electric discharger lamp
JP2005327661A (en) Lighting device of high-pressure discharge lamp, and electronic apparatus using it
WO2013021565A1 (en) High-voltage discharge lamp lighting device and light source device
JP2006120502A (en) High-pressure discharge lamp
JP2007087821A (en) High-pressure discharge lamp lighting device and lighting system
JP2009158495A (en) Discharge lamp lighting device
JP3571126B2 (en) Discharge lamp lighting device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20071128

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20100628

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100713

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100913

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20101116

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20101202

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131210

Year of fee payment: 3

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees