JP2007166486A - Solid-state imaging apparatus - Google Patents

Solid-state imaging apparatus Download PDF

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JP2007166486A
JP2007166486A JP2005363147A JP2005363147A JP2007166486A JP 2007166486 A JP2007166486 A JP 2007166486A JP 2005363147 A JP2005363147 A JP 2005363147A JP 2005363147 A JP2005363147 A JP 2005363147A JP 2007166486 A JP2007166486 A JP 2007166486A
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Akira Honma
明 本間
Masanori Funaki
正紀 舟木
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Victor Company of Japan Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state imaging apparatus which reduces motion picture distortion on the basis of a line shutter operation and does not deteriorate an S/N. <P>SOLUTION: A photo-detection time of all pixels 1 is defined as one frame period. Furthermore, all the pixels 1 are divided into two sets alternately and read by different circuits, so that in comparison with a case where all the pixels 1 are read by one set of circuits for one frame period, the pixels can be read in a half time even at the same driving frequency. Outputs from a first signal output circuit 4 and a second signal output circuit 5 are written in a memory 9 in a half time of one frame period. Signals written in the memory 9 are separated into signals of odd-numbered pixels and signals of even-numbered pixels in a view of signals of one horizontal line, so that the arrangement of signals are corrected by a signal combining means 10 and outputted with one-frame time. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は固体撮像装置に係り、特に撮像画面の水平１ライン毎に光電変換信号の読み出しと光電変換領域のリセットを行う、いわゆるラインシャッタ（ローリングシャッタ、フォーカルプレーンシャッタ）動作を行う固体撮像装置に関する。   The present invention relates to a solid-state image pickup device, and more particularly to a solid-state image pickup device that performs a so-called line shutter (rolling shutter, focal plane shutter) operation for reading a photoelectric conversion signal and resetting a photoelectric conversion region for each horizontal line of an image pickup screen. .

固体撮像装置は、大別するとＣＣＤ（Charge Coupled Device：電荷転送素子）とＣＭＯＳ（Complementary MOS）センサの２種類に分けられる。ＣＣＤは、画素内のフォトダイオードで光電変換して得られた電荷を垂直電荷転送路、水平電荷転送路を通して読出し部に転送し、そこで電圧に変換して出力信号を得る構造である。全画素で光電変換された電荷を単一の読出し部で電圧に変換するため、ＣＣＤは画素間の信号のばらつきが少なく、低雑音であるという特徴を有する。また、フォトダイオードで光電変換された電荷を、全画素で同時に垂直電荷転送路に移してから順次転送して信号読出しを行うので、いわゆるグローバルシャッタ（一括シャッタ）動作が容易に実現できる。一方、ＣＣＤは、電荷の転送に数種類の高い電圧が必要で消費電力が大きくなり、また画素数が多くなると電荷の転送、特に水平電荷転送に時間がかかり高速で動作できないなどの不具合がある。   Solid-state imaging devices can be roughly classified into two types: CCD (Charge Coupled Device) and CMOS (Complementary MOS) sensors. The CCD has a structure in which charges obtained by photoelectric conversion by a photodiode in a pixel are transferred to a reading unit through a vertical charge transfer path and a horizontal charge transfer path, and converted into a voltage there to obtain an output signal. Since the charge photoelectrically converted in all pixels is converted into a voltage by a single reading unit, the CCD has a feature that there is little variation in signals between pixels and low noise. In addition, since the charges photoelectrically converted by the photodiodes are transferred to the vertical charge transfer path simultaneously in all pixels and then sequentially transferred to perform signal reading, a so-called global shutter (collective shutter) operation can be easily realized. On the other hand, the CCD requires several kinds of high voltages for charge transfer and consumes a large amount of power. When the number of pixels increases, the charge transfer, particularly horizontal charge transfer, takes time and cannot operate at high speed.

それに対してＣＭＯＳセンサは、フォトダイオードで光電変換して得られた電荷を画素内で電圧または電流信号に変換し、その信号を画素内に設けた増幅用トランジスタで増幅してから画素外に出力する構造をとる。マトリクス状に並べた複数の画素をスイッチで切り替えて信号を読み出すので、ＣＭＯＳセンサの動作速度は速く、また、各画素と周辺駆動回路をＣＭＯＳで構成するため、ＣＭＯＳセンサは低電圧で駆動できて低消費電力となり、さらに、ＡＤコンバータなどの信号処理回路も同一チップに搭載できる等々の特徴を持っている。   In contrast, a CMOS sensor converts a charge obtained by photoelectric conversion with a photodiode into a voltage or current signal within the pixel, amplifies the signal with an amplifying transistor provided within the pixel, and then outputs the signal outside the pixel. To take the structure. Since signals are read by switching a plurality of pixels arranged in a matrix with a switch, the operating speed of the CMOS sensor is high, and each pixel and the peripheral drive circuit are composed of CMOS, so the CMOS sensor can be driven at a low voltage. The power consumption is low, and further, a signal processing circuit such as an AD converter can be mounted on the same chip.

一方で、ＣＭＯＳセンサは、画素内に設けた個別の画素増幅トランジスタで信号を増幅するため画素間の信号ばらつきが大きく、ＣＣＤに比べて雑音特性が不利になる。また、ＣＣＤで容易に実現できるグローバルシャッタ動作をＣＭＯＳセンサで雑音特性を悪化させずに実現しようとすると、１画素あたりのトランジスタ数を５個に増やして画素内に一括転送用信号蓄積領域を設ける必要があり、チップ面積が大きくなってコスト高となる。このため、一般的な１画素に４個のトランジスタを持つＣＭＯＳセンサでは、撮像画面の水平１ライン毎に信号の読み出しと光電変換領域のリセットを行う、いわゆるラインシャッタ（ローリングシャッタ、フォーカルプレーンシャッタ）動作が基本となっている。   On the other hand, since the CMOS sensor amplifies a signal with an individual pixel amplification transistor provided in a pixel, signal variation between pixels is large, and noise characteristics are disadvantageous compared to a CCD. Further, if a global shutter operation that can be easily realized with a CCD is to be realized without deteriorating noise characteristics with a CMOS sensor, the number of transistors per pixel is increased to 5 and a signal storage area for batch transfer is provided in the pixel. It is necessary to increase the chip area and the cost. For this reason, in a general CMOS sensor having four transistors per pixel, a so-called line shutter (rolling shutter, focal plane shutter) that reads out signals and resets the photoelectric conversion area for each horizontal line of the imaging screen. Operation is basic.

ここで固体撮像装置によって撮影した画像とシャッタ動作の関係について説明する。動きの速い被写体をラインシャッタ動作の撮像装置で撮ると画像が歪む。例えば、図９（Ａ）に示すように、上下に動く円形のボール１０１を被写体として、画面の上端から１ラインずつ読み出す方式のＣＭＯＳセンサで撮像すると、ボール１０１が上に動く場合は同図（Ｂ）に１０２で示すように扁平になり、ボール１０１が下に動く場合は同図（Ｃ）に１０３で示すように楕円状に伸びる。   Here, the relationship between the image captured by the solid-state imaging device and the shutter operation will be described. When a fast-moving subject is taken with an imaging device that operates with a line shutter, the image is distorted. For example, as shown in FIG. 9A, when a circular ball 101 moving up and down is taken as an object and imaged with a CMOS sensor that reads out one line at a time from the upper end of the screen, B) becomes flat as indicated by 102, and when the ball 101 moves downward, it extends in an elliptical shape as indicated by 103 in FIG.

また、同じセンサで図９（Ｄ）に示すように左右に動く矩形の被写体１０４を撮ると、矩形の被写体１０４が左に動く場合は、撮像画像は同図（Ｅ）に１０５で示すように上辺に対して下辺が左方向にずれ、被写体１０４が右に動く場合は、撮像画像は同図（Ｆ）に示すように上辺に対して下辺が右方向にずれる。   Further, when a rectangular subject 104 moving left and right is taken with the same sensor as shown in FIG. 9D, if the rectangular subject 104 moves to the left, the captured image is as indicated by 105 in FIG. 9E. When the lower side is shifted to the left with respect to the upper side and the subject 104 moves to the right, the lower side of the captured image is shifted to the right with respect to the upper side as shown in FIG.

図９に示した撮像画像が被写体画像と異なる現象は、ラインシャッタ動作において１ライン毎の受光時間がずれていることに起因する。すなわち、１ラインの受光時間は、そのラインの読み出しが終わった直後から、次にそのラインを読み出すまでの間（１フィールド期間または１フレーム時間）であるが、最上端の１ラインと最下端の１ラインではその受光開始時間が１フィールド期間または１フレーム期間ずれており、動きの速い被写体では撮像位置の差が大きくなり画像が歪む。   The phenomenon in which the captured image shown in FIG. 9 is different from the subject image is due to a shift in the light reception time for each line in the line shutter operation. That is, the light receiving time of one line is from immediately after the reading of the line is finished until the next reading of the line (one field period or one frame time), but the uppermost one line and the lowermost line. In one line, the light reception start time is deviated by one field period or one frame period, and in a fast-moving subject, the difference in imaging position becomes large and the image is distorted.

これは、撮影した画像を静止画として読み出す場合に特に目立つ不具合である。一方、グローバルシャッタ動作の撮像装置では全画素の受光開始時間と受光終了時間が同じなので、動きの速い画像でも上述の歪みは発生しない。   This is a particularly noticeable problem when a captured image is read as a still image. On the other hand, in the imaging device of the global shutter operation, since the light reception start time and the light reception end time are the same for all pixels, the above-described distortion does not occur even in a fast moving image.

そこで、上記の動画歪を改善するため、ラインシャッタ動作のＣＭＯＳセンサを動画・静止画撮影カメラに応用するときは、メカニカルシャッタを全画素のフォトダイオードの入射側前方に設けて、垂直帰線期間中にメカニカルシャッタを開いて全画素同一時間だけ受光し、その後メカニカルシャッタを閉じてから全画素の信号を読み出すことが行われるが、メカニカルシャッタを入れることにより光学系が大きくなり、コストが上がり、また制御が複雑になり消費電力も増加するなどの問題がある。   Therefore, in order to improve the above-mentioned video distortion, when applying a CMOS sensor with line shutter operation to a video / still image camera, a mechanical shutter is provided in front of the incident side of the photodiodes of all pixels, and a vertical blanking period is provided. The mechanical shutter is opened and light is received for the same time for all pixels, and then the signals of all pixels are read after the mechanical shutter is closed, but the optical system becomes larger and the cost increases by inserting the mechanical shutter. There are also problems such as complicated control and increased power consumption.

また、通常はラインシャッタ動作が基本の１画素に４個のトランジスタを持つＣＭＯＳセンサでもグローバルシャッタ動作を行えるが、その場合は雑音特性が悪くなることが一般に知られている。すなわち、１画素が１個のフォトダイオードと４個のトランジスタ（画素増幅トランジスタ、画素選択トランジスタ、リセットトランジスタ、電荷転送トランジスタ）で構成される一般的なＣＭＯＳセンサでは、画素毎の増幅特性のばらつきに起因する雑音を除去するために、画素増幅トランジスタの入力をリセットした直後の出力（第１出力）と、フォトダイオードで光電変換した電荷を画素増幅トランジスタへ転送した直後の出力（第２出力）との差をとって信号出力としている。これを相関二重サンプリング（ＣＤＳ）と称する。   In addition, a global shutter operation can be performed even with a CMOS sensor having four transistors in one pixel, which is normally based on a line shutter operation, but it is generally known that noise characteristics deteriorate in that case. In other words, in a general CMOS sensor in which one pixel is composed of one photodiode and four transistors (pixel amplification transistor, pixel selection transistor, reset transistor, charge transfer transistor), variation in amplification characteristics for each pixel is caused. An output immediately after resetting the input of the pixel amplifying transistor (first output) and an output immediately after transferring the charge photoelectrically converted by the photodiode to the pixel amplifying transistor (second output) The signal output is obtained by taking the difference between the two. This is called correlated double sampling (CDS).

通常のラインシャッタ動作の場合、水平１ライン毎に画素増幅トランジスタの入力をリセットして第１出力を読み出し、その後に前記リセット状態の入力端子にフォトダイオードで光電変換した電荷を転送して第２出力を読み出すので、第１出力と第２出力の差をとると、画素増幅トランジスタの増幅特性に起因するノイズを正しく除去できる。   In a normal line shutter operation, the input of the pixel amplifying transistor is reset for each horizontal line to read the first output, and then the charge photoelectrically converted by the photodiode is transferred to the input terminal in the reset state, and the second output is performed. Since the output is read, if the difference between the first output and the second output is taken, noise caused by the amplification characteristics of the pixel amplification transistor can be correctly removed.

一方、この１画素４トランジスタのＣＭＯＳセンサでグローバルシャッタ動作を行う場合、まず全ての画素増幅トランジスタの入力をリセット（第１リセット）してから全画素一斉にフォトダイオードで光電変換した電荷を画素増幅トランジスタの入力に転送し、その後、水平１ライン毎に信号出力（第２出力）を読み出し、更にその水平１ラインをリセット（第２リセット）してからリセット出力（第１出力）を読み出し、これら第１出力と第２出力の差を取って信号出力とする。従って、このグローバルシャッタ動作では、それぞれの出力を読み出す前に別々のリセット（第１リセットと第２リセット）を行うので、リセット電圧に起因する雑音が取りきれず、ラインシャッタ動作に比べ雑音が大きくなる。   On the other hand, when a global shutter operation is performed with this one-pixel four-transistor CMOS sensor, first, the input of all the pixel amplification transistors is reset (first reset), and then the charges obtained by photoelectric conversion of all the pixels at once are pixel-amplified. Transfer to the transistor input, then read the signal output (second output) for each horizontal line, reset the horizontal one line (second reset), and then read the reset output (first output). The difference between the first output and the second output is taken as a signal output. Therefore, in this global shutter operation, separate resets (first reset and second reset) are performed before each output is read out, so noise due to the reset voltage cannot be completely removed and the noise is larger than that in the line shutter operation. Become.

以上の技術背景をもとに、ＣＭＯＳセンサの１画素あたりのトランジスタ数を増やさないで、なおかつ、ラインシャッタ動作の動画歪を減らす試みがいくつかなされている（例えば、特許文献１、特許文献２参照）。特許文献１には、１画素４トランジスタのＣＭＯＳセンサにおいて、通常の動作であるラインシャッタ動作（モード１）と、高雑音のグローバルシャッタ動作（モード２）を被写体の明るさによって切り換えて使う方法が開示されている。ここでは、被写体が暗い時は画素毎の固定パターン雑音が目立つので、低雑音のモード１で信号を読み出し、被写体が明るく動きが激しいときは雑音特性を犠牲にして動画歪を減らすモード２で信号を読み出すものである。   Based on the above technical background, some attempts have been made to reduce the video distortion of the line shutter operation without increasing the number of transistors per pixel of the CMOS sensor (for example, Patent Document 1 and Patent Document 2). reference). Patent Document 1 discloses a method in which a line shutter operation (mode 1), which is a normal operation, and a high-noise global shutter operation (mode 2) are switched according to the brightness of a subject in a CMOS sensor with one pixel and four transistors. It is disclosed. Here, when the subject is dark, the fixed pattern noise for each pixel is conspicuous, so the signal is read out in mode 1 with low noise, and when the subject is bright and the motion is intense, it is signaled in mode 2 that reduces video distortion at the expense of noise characteristics. Is read out.

また、特許文献２には、ラインシャッタ動作の基本はそのままで、読み出し速度を速めて、動画歪を減らす方法が開示されている。この方法では、１フレームの画素を１フレーム時間より短い時間で読み出し、水平１ライン毎の受光開始時間の差を少なくしている。通常は１フレームの画素を１フレーム時間で読み出すが、これを４分の１の時間で読み出せば、最上端の水平ラインと最下端の水平ラインとの受光開始時間の差も４分の１になり、画素歪が改善される。通常よりも高速で読み出した画像信号はメモリに蓄積し、通常の１フレーム時間をかけて外部に出力している。   Patent Document 2 discloses a method of reducing moving image distortion by increasing the reading speed while maintaining the basic line shutter operation. In this method, one frame of pixels is read out in a time shorter than one frame time, and the difference in light reception start time for each horizontal line is reduced. Normally, one frame pixel is read out in one frame time, but if this is read out in a quarter time, the difference in light reception start time between the uppermost horizontal line and the lowermost horizontal line is also reduced to a quarter. Thus, the pixel distortion is improved. Image signals read out at a higher speed than normal are accumulated in a memory and output to the outside over a normal one frame time.

特開２００２−３２０１４１号公報JP 2002-320141 A 特開平９−１８１９８６号公報Japanese Patent Laid-Open No. 9-181986

しかるに、特許文献１記載の従来の固体撮像装置では、被写体の明るさにより読み出しモードを切り換えて、暗い画像の低雑音読み出しと明るい画像の動画歪低減を達成しているが、暗い画像の動画歪と明るい画像の雑音悪化にはなんら対策がなされていない。また、ある一定の明るさを基準として読み出しモードを自動的に切り換える際、画像に雑音が発生するなどの不具合もある。   However, in the conventional solid-state imaging device described in Patent Document 1, the readout mode is switched depending on the brightness of the subject to achieve low-noise readout of a dark image and reduction of moving image distortion of a bright image. No countermeasures have been taken against the noise deterioration of bright images. In addition, when the reading mode is automatically switched based on a certain brightness, there is a problem that noise is generated in the image.

一方、特許文献２記載の従来の固体撮像装置では、１フィールド（フレーム）の画素を高速で読み出して動画歪を低減しているが、反面、高速読み出しに伴うＳ／Ｎの悪化が起こる。すなわち、特許文献２の実施の形態に記載されているように、１フィールドの画像を通常の４分の１の時間で読み出し、１フィールド時間で４回の読み出しを行う場合、各画素の受光時間は最長でも１フィールド時間の４分の１となり、信号出力の大きさも４分の１に低下する。一方、雑音レベルは、画素アンプのばらつきによる固定パターン雑音が主であり、画素の受光時間によっては変化しない。そのため、信号出力のＳ／Ｎが悪化する。また、読み出し周波数が高くなるので、回路設計がシビアになり特性ばらつきが増えるなどの不具合もある。   On the other hand, in the conventional solid-state imaging device described in Patent Document 2, pixels in one field (frame) are read at high speed to reduce moving image distortion. However, on the other hand, the S / N deteriorates due to high speed reading. That is, as described in the embodiment of Patent Document 2, when a one-field image is read out in a normal quarter time and read out four times in one field time, the light reception time of each pixel. Becomes a quarter of one field time at the longest, and the magnitude of the signal output is also reduced to a quarter. On the other hand, the noise level is mainly fixed pattern noise due to variations in pixel amplifiers, and does not change depending on the light reception time of the pixels. For this reason, the S / N of the signal output is deteriorated. In addition, since the read frequency becomes high, there is a problem that circuit design becomes severe and characteristic variation increases.

本発明は以上の点を鑑みてなされたもので、ラインシャッタ動作を基本としながら動画歪を低減し、なおかつ、Ｓ／Ｎを悪化させない固体撮像装置を提供することを目的とする。   The present invention has been made in view of the above points, and it is an object of the present invention to provide a solid-state imaging device that reduces moving image distortion and does not deteriorate S / N based on a line shutter operation.

上記目的を達成するため、第１の発明の固体撮像装置は、撮像領域に配列された、１フレーム（又は１フィールド）の一画面を構成する複数の画素から、１フレーム期間（又は１フィールド期間）よりも短い期間で信号を読み出す固体撮像装置であって、撮像領域に配列された複数の画素を複数の組に分け、各組の画素の受光時間を１フレーム期間（又は１フィールド期間）とすると共に、各組の画素を組別に独立して駆動して、各組の画素から信号を並行して読み出す読み出し手段と、読み出し手段により読み出された、各組の画素の出力信号を合成して一画面分の出力信号を出力する信号合成手段とを有することを特徴とする。   In order to achieve the above object, a solid-state imaging device according to a first aspect of the present invention includes one frame period (or one field period) from a plurality of pixels constituting one screen (or one field) arranged in an imaging region. ) Is a solid-state imaging device that reads out signals in a shorter period of time, and a plurality of pixels arranged in the imaging region are divided into a plurality of groups, and the light reception time of each group of pixels is defined as one frame period (or one field period). At the same time, each set of pixels is driven independently for each set, and the readout means for reading out signals from each set of pixels in parallel and the output signal of each set of pixels read out by the readout means are combined. And a signal synthesis means for outputting an output signal for one screen.

この発明では、各組の画素を組別に独立して駆動して、各組の画素から信号を並行して読み出すようにしたため、全画素から１フレーム期間（又は１フィールド期間）の組数分の１倍の期間で信号を読み出すことができ、また、全画素の受光時間は１フレーム期間（又は１フィールド期間）なので、信号出力の低下を回避できる。   In the present invention, since each set of pixels is driven independently for each set and signals are read out in parallel from each set of pixels, the number of sets in one frame period (or one field period) is obtained from all pixels. A signal can be read out in a period of 1 time, and the light reception time of all the pixels is one frame period (or one field period), so that a decrease in signal output can be avoided.

また、上記の目的を達成するため、第２の発明は、撮像領域に配列された、１フレーム（又は１フィールド）の一画面を構成する複数の画素から、１フレーム期間（又は１フィールド期間）よりも短い期間で信号を読み出す固体撮像装置であって、撮像領域に配列された複数の画素のそれぞれにおいて、１フレーム期間（又は１フィールド期間）よりも短い第１の受光時間で光電変換して得た第１の信号を複数の画素から読み出した後、第１の受光時間よりも短い第２の受光時間で光電変換して得た第２の信号を複数の画素から読み出す読み出し手段と、第１の信号を蓄積する第１の蓄積手段と、第２の信号を蓄積する第２の蓄積手段と、第１の蓄積手段に蓄積された第１の信号を１フレーム期間（又は１フィールド期間）かけて読み出した信号から、第２の蓄積手段に蓄積された第２の信号を１フレーム期間（又は１フィールド期間）かけて読み出した信号を、対応する画素単位で差し引いて差分信号を生成する差分処理手段とを有し、差分信号を撮像信号として出力することを特徴とする。   In order to achieve the above object, according to the second aspect of the present invention, one frame period (or one field period) is obtained from a plurality of pixels constituting one screen (or one field) arranged in the imaging region. A solid-state imaging device that reads out a signal in a shorter period, and performs photoelectric conversion in each of a plurality of pixels arranged in the imaging region in a first light receiving time shorter than one frame period (or one field period). Reading means for reading out a second signal obtained by photoelectric conversion in a second light receiving time shorter than the first light receiving time after reading out the obtained first signal from the plurality of pixels; A first storage means for storing one signal, a second storage means for storing a second signal, and a first signal stored in the first storage means for one frame period (or one field period). Read over A difference processing means for generating a difference signal by subtracting a signal obtained by reading out the second signal accumulated in the second accumulation means from the signal over one frame period (or one field period) in units of corresponding pixels. And a differential signal is output as an imaging signal.

この発明では、撮像領域に配列された複数の画素のそれぞれにおいて、１フレーム期間（又は１フィールド期間）よりも短い第１の受光時間で光電変換して得た第１の信号を複数の画素から読み出した後、第１の受光時間よりも短い第２の受光時間で光電変換して得た第２の信号を複数の画素から読み出し、それらを対応する画素単位で差し引いて差分信号を生成して、それを最終的な撮像信号とする。これにより、１フレーム期間（又は１フィールド期間）の受光時間の途中で電荷を排出する、いわゆる電子シャッタ動作を導入することができる。   In the present invention, in each of a plurality of pixels arranged in the imaging region, a first signal obtained by performing photoelectric conversion in a first light receiving time shorter than one frame period (or one field period) is obtained from the plurality of pixels. After reading, a second signal obtained by photoelectric conversion with a second light receiving time shorter than the first light receiving time is read from a plurality of pixels, and the difference signal is generated by subtracting them in corresponding pixel units. This is the final imaging signal. This makes it possible to introduce a so-called electronic shutter operation that discharges charges during the light receiving time of one frame period (or one field period).

また、上記の目的を達成するため、第３の発明の固体撮像装置は、第２の発明の構成に加えて、差分処理手段から出力される差分信号と、第１の蓄積手段から出力される第１の信号とのうち、任意に選択した一方の信号を出力する信号選択手段を有する。この発明では、信号選択手段により電子シャッタ動作による撮像信号を得る時は差分信号を選択し、通常の撮像信号を得るときは第１の信号を選択する。   In order to achieve the above object, in addition to the configuration of the second invention, the solid-state imaging device of the third invention is output from the difference signal output from the difference processing means and the first storage means. Signal selection means for outputting one signal arbitrarily selected from the first signal is provided. In the present invention, the difference signal is selected when the image selection signal is obtained by the electronic shutter operation by the signal selection means, and the first signal is selected when the normal image pickup signal is obtained.

本発明によれば、撮像領域の複数の画素を複数の組に分け、各組の画素を組別に独立して駆動して、各組の画素から信号を並行して読み出すことにより、全画素から１フレーム期間（又は１フィールド期間）の組数分の１倍の期間で信号を読み出すようにしたため、駆動周波数を高めなくても、全画素の読み出しが短時間ででき、その結果、画面の最上端のラインと最下端のラインの受光時間差が少なくなり、動きの速い被写体の画像歪みを低減できる。   According to the present invention, a plurality of pixels in the imaging region are divided into a plurality of groups, each group of pixels is driven independently for each group, and signals are read out in parallel from each group of pixels. Since signals are read out in a period that is one time the number of sets in one frame period (or one field period), all pixels can be read out in a short time without increasing the drive frequency. The difference in the light receiving time between the uppermost line and the lowermost line is reduced, and image distortion of a fast moving subject can be reduced.

また、本発明によれば、全画素の受光時間は１フレーム期間（又は１フィールド期間）なので、信号出力の低下を回避でき、その結果、画素から読み出される信号のＳ／Ｎの劣化を防止できる。   Further, according to the present invention, since the light reception time of all the pixels is one frame period (or one field period), it is possible to avoid a decrease in signal output, and as a result, it is possible to prevent the S / N deterioration of the signal read from the pixel. .

更に、本発明によれば、電子シャッタ動作を導入して画素の受光時間を１フレーム期間（又は１フィールド期間）より短くする場合は、１フレーム期間（又は１フィールド期間）よりも短い第１の受光時間で光電変換して得た画素読み出し信号である第１の信号を複数の画素から読み出した後、第１の受光時間よりも短い第２の受光時間で光電変換して得た第２の信号を複数の画素から読み出し、それらを対応する画素単位で差し引いて差分信号を生成することにより、第２の信号は受光時間が短いので画素に固有な雑音成分が主体であるダミー信号であるため、Ｓ／Ｎの改善された画素読み出し信号（差分信号）を得ることができると共に、電子シャッタ動作により感度調整や蛍光灯照明下の撮像で発生するフリッカの対策もできる。   Further, according to the present invention, when an electronic shutter operation is introduced to make the light reception time of a pixel shorter than one frame period (or one field period), the first shorter than one frame period (or one field period). A second signal obtained by performing photoelectric conversion with a second light receiving time shorter than the first light receiving time after reading a first signal, which is a pixel readout signal obtained by performing photoelectric conversion with the light receiving time, from a plurality of pixels. By reading out signals from multiple pixels and subtracting them in corresponding pixel units to generate a differential signal, the second signal is a dummy signal mainly consisting of noise components unique to the pixel because the light reception time is short Thus, a pixel readout signal (difference signal) with an improved S / N can be obtained, and sensitivity adjustment and countermeasures against flicker occurring in imaging under fluorescent lamp illumination can be performed by an electronic shutter operation.

次に、本発明の実施の形態について図面と共に説明する。   Next, embodiments of the present invention will be described with reference to the drawings.

（第１の実施の形態）
図１は本発明になる固体撮像装置の第１の実施の形態の構成図を示す。同図において、複数個の単位画素１が２次元マトリクス状に並んだ撮像領域（ここでは、図示の便宜上、１２個の単位画素１が３行４列に配置されている）があり、その左側には垂直走査回路２が、上側には第１水平走査回路３と第１信号出力回路４とが、又その下側には第２水平走査回路６と第２信号出力回路５とがそれぞれ設けられている。 (First embodiment)
FIG. 1 shows a configuration diagram of a first embodiment of a solid-state imaging device according to the present invention. In the figure, there is an imaging region in which a plurality of unit pixels 1 are arranged in a two-dimensional matrix (here, for convenience of illustration, twelve unit pixels 1 are arranged in 3 rows and 4 columns), on the left side Includes a vertical scanning circuit 2, a first horizontal scanning circuit 3 and a first signal output circuit 4 on the upper side, and a second horizontal scanning circuit 6 and a second signal output circuit 5 on the lower side, respectively. It has been.

単位画素１の出力を読み出す垂直信号線７、８は、１列おきに第１信号出力回路４と第２信号出力回路５に接続される。第１信号出力回路４は第１水平走査回路３により、また、第２信号出力回路５は第２水平走査回路６により、それぞれ水平方向の単位画素１の読み出しを制御する。ここでは、全画素を１列置きの２組に分け、単位画素１の受光期間を１フレーム期間とし、各単位画素１を別々の回路４，５で互いに独立して読み出すので、全画素を１組の回路で１フレーム期間をかけて読み出す場合に比べ、同じ駆動周波数でも、１フレーム期間の半分の時間で読み出すことができる。   The vertical signal lines 7 and 8 for reading out the output of the unit pixel 1 are connected to the first signal output circuit 4 and the second signal output circuit 5 every other column. The first signal output circuit 4 controls the reading of the unit pixel 1 in the horizontal direction by the first horizontal scanning circuit 3, and the second signal output circuit 5 controls the reading of the unit pixel 1 in the horizontal direction, respectively. Here, all the pixels are divided into two sets of every other column, the light receiving period of the unit pixel 1 is set as one frame period, and each unit pixel 1 is read out independently from each other by separate circuits 4 and 5. Compared to a case where reading is performed over one frame period by a set of circuits, reading can be performed in half the time of one frame period even at the same drive frequency.

第１信号出力回路４と第２信号出力回路５から、それぞれ並行して１フレーム期間の半分の時間で読み出された画素出力信号は、１フレーム期間の半分の時間でメモリ９に書き込まれる。メモリ９に書き込まれた信号は、１水平ラインの信号で見ると奇数番目の画素の信号と偶数番目の画素の信号に分離しているので、信号合成手段１０によって正しい配列に直され、１フレーム時間をかけて出力される。   The pixel output signals read from the first signal output circuit 4 and the second signal output circuit 5 in parallel in half the time of one frame period are written in the memory 9 in half the time of one frame period. The signal written in the memory 9 is separated into an odd-numbered pixel signal and an even-numbered pixel signal when viewed as a signal of one horizontal line. Output over time.

図２は図１に示した本発明になる固体撮像装置の第１の実施の形態におけるフォトダイオードの受光時間と信号読み出し期間の関係を示す。この図２はラインシャッタ動作の読み出しタイミングを表わすものであり、Ｎ本の水平走査ラインを上から順番に読み出して１フレームとしている。第１番目の水平ラインの読み出し開始と同時に１フレーム期間がスタートするが、第Ｎ番目の水平ラインの読み出しは１フレーム期間の途中で終了する。   FIG. 2 shows the relationship between the light receiving time of the photodiode and the signal readout period in the first embodiment of the solid-state imaging device according to the present invention shown in FIG. FIG. 2 shows the readout timing of the line shutter operation. N horizontal scanning lines are sequentially read from the top to form one frame. Although one frame period starts simultaneously with the start of reading of the first horizontal line, reading of the Nth horizontal line ends in the middle of one frame period.

すなわち、１フレーム期間より短い時間で１フレーム分の信号を読み出す。ラインシャッタ動作では、あるラインの読み出しが終わった直後にそのラインのフォトダイオードの受光が開始し、次にそのラインが読み出されるまでの時間がそのラインのフォトダイオードの受光時間となるので、図２のＮラインのフォトダイオードの受光時間は１フレーム期間である。   That is, a signal for one frame is read out in a time shorter than one frame period. In the line shutter operation, the light reception of the photodiode of the line starts immediately after the completion of the reading of the line, and the time until the line is read next is the light reception time of the photodiode of the line. The light receiving time of the N-line photodiode is one frame period.

また、第１ラインと第Ｎラインの受光開始時間の差は、１フレームの信号を読み出す時間であり、図２の場合は１フレーム時間より短い。このように、最上端と最下端のラインの受光時間差が少なくなるので、動きの速い被写体でも画像の歪が少なくなり、一方、各ラインの受光時間は１フレーム時間あるので、フォトダイオードの受光時間が短く信号出力が低下してＳ／Ｎが悪化するという不具合は発生しない。   Further, the difference between the light reception start times of the first line and the Nth line is a time for reading a signal of one frame, and is shorter than one frame time in the case of FIG. In this way, since the difference in light reception time between the uppermost line and the lowermost line is reduced, image distortion is reduced even in a fast-moving subject. On the other hand, since the light reception time of each line is one frame time, the light reception time of the photodiode. However, there is no problem that the signal output is lowered and the S / N is deteriorated.

図２のように１フレームの信号を１フレーム期間より短い時間で画素から読み出す場合は、図３に示すように、１フレーム期間をかけて外部へ出力しなければならない。通常は、フレームメモリに読み出し信号を書き込み、そこから１フレーム期間をかけて信号を読み出す方法をとる。   When a signal of one frame is read from a pixel in a time shorter than one frame period as shown in FIG. 2, it must be output to the outside over one frame period as shown in FIG. Usually, a method is used in which a read signal is written into the frame memory, and then the signal is read over one frame period.

図１の単位画素１は従来から実施されているような、４個のトランジスタで構成できる。この例を図４に示す。図４において、フォトダイオード２６のｎ側端子は電荷転送トランジスタ２７のソース及びドレインを通して、ソースフォロワを構成する画素増幅トランジスタ２８のゲートに接続されている。画素増幅トランジスタ２８のソースは垂直信号線３５に接続され、そのドレインは画素選択トランジスタ２９のソースに接続される。画素選択トランジスタ２９のドレインとリセットトランジスタ３０のドレインは電源３４に共通接続され、リセットトランジスタ３０のソースは画素増幅トランジスタ２８のゲートに接続されている。   The unit pixel 1 of FIG. 1 can be composed of four transistors as conventionally practiced. An example of this is shown in FIG. In FIG. 4, the n-side terminal of the photodiode 26 is connected to the gate of the pixel amplification transistor 28 constituting the source follower through the source and drain of the charge transfer transistor 27. The source of the pixel amplification transistor 28 is connected to the vertical signal line 35, and the drain thereof is connected to the source of the pixel selection transistor 29. The drain of the pixel selection transistor 29 and the drain of the reset transistor 30 are commonly connected to the power supply 34, and the source of the reset transistor 30 is connected to the gate of the pixel amplification transistor 28.

リセットトランジスタ３０のゲートはリセットバス３１に、画素選択トランジスタ２９のゲートは選択バス３２に、また電荷転送トランジスタ２７のゲートは転送バス３３にそれぞれ接続され、これらのバス配線３１〜３３は垂直走査回路３６（図１の垂直走査回路２に相当）に接続されていている。また、垂直信号線３５は信号出力回路３７（図１の信号出力回路４又は５に相当）に接続され、信号出力回路３７は水平走査回路３８（図１の水平走査回路３又は６に相当）で制御される。   The gate of the reset transistor 30 is connected to the reset bus 31, the gate of the pixel selection transistor 29 is connected to the selection bus 32, and the gate of the charge transfer transistor 27 is connected to the transfer bus 33. 36 (corresponding to the vertical scanning circuit 2 in FIG. 1). The vertical signal line 35 is connected to a signal output circuit 37 (corresponding to the signal output circuit 4 or 5 in FIG. 1), and the signal output circuit 37 is a horizontal scanning circuit 38 (corresponding to the horizontal scanning circuit 3 or 6 in FIG. 1). It is controlled by.

次に、図４に示す単位画素１の動作について図５のタイミングチャートと共に説明する。図５の時刻ｔ１で（Ａ）に示す選択バス３２の電位Ｖｓｅｌｅｃｔが高電位となり、特定の水平ラインが選択される。時刻ｔ２でリセットバス３１の電位Ｖｒｅｓｅｔが図５（Ｂ）に示すように高電位となって、画素増幅トランジスタ２８のゲートがリセットされ、その時の図５（Ｄ）に示すリセット出力Ｖｏｕｔが垂直信号線３５に読み出される。   Next, the operation of the unit pixel 1 shown in FIG. 4 will be described with reference to the timing chart of FIG. At time t1 in FIG. 5, the potential Vselect of the selection bus 32 shown in FIG. 5A becomes a high potential, and a specific horizontal line is selected. At time t2, the potential Vreset of the reset bus 31 becomes a high potential as shown in FIG. 5B, the gate of the pixel amplification transistor 28 is reset, and the reset output Vout shown in FIG. Read to line 35.

次の時刻ｔ３でリセットバス３１の電位Ｖｒｅｓｅｔが図５（Ｂ）に示すように低電位になった後、時刻ｔ４で転送バス３３の電位Ｖｔｒａｎｓが図５（Ｃ）に示すように高電位となって、転送トランジスタ２７がオンとされると、フォトダイオード２６から光電変換された電荷が転送トランジスタ２７のソース、ドレインを通して画素増幅トランジスタ２８のゲートに転送される。この電荷転送の際、フォトダイオード２６に蓄積した光電変換電荷がすべて電荷転送トランジスタ２７のドレイン側（画素増幅トランジスタ２８のゲート側）に移るように、フォトダイオード２６は埋め込み型とする。   After the potential Vreset of the reset bus 31 becomes low as shown in FIG. 5B at the next time t3, the potential Vtrans of the transfer bus 33 becomes high as shown in FIG. 5C at time t4. Thus, when the transfer transistor 27 is turned on, the charge photoelectrically converted from the photodiode 26 is transferred to the gate of the pixel amplification transistor 28 through the source and drain of the transfer transistor 27. At the time of this charge transfer, the photodiode 26 is of a buried type so that all the photoelectric conversion charges accumulated in the photodiode 26 are transferred to the drain side of the charge transfer transistor 27 (the gate side of the pixel amplification transistor 28).

上記光電変換電荷の転送と共に画素増幅トランジスタ２８のソースから信号出力が垂直信号線３５に図５（Ｄ）に示すようにＶｏｕｔとして読み出される。時刻ｔ５までにフォトダイオード２６の光電変換電荷はゼロとなってフォトダイオード２６のリセットが終わり、時刻ｔ５で転送バス３３の電位Ｖｔｒａｎｓが図５（Ｃ）に示すように低電位になって電荷転送トランジスタ１７がオフとなる。   Along with the transfer of the photoelectric conversion charge, the signal output from the source of the pixel amplification transistor 28 is read to the vertical signal line 35 as Vout as shown in FIG. By the time t5, the photoelectric conversion charge of the photodiode 26 becomes zero, and the reset of the photodiode 26 is completed. At time t5, the potential Vtrans of the transfer bus 33 becomes a low potential as shown in FIG. The transistor 17 is turned off.

時刻ｔ５から次のフレームの受光時間がスタートする。時刻ｔ６で選択バス３２の電位Ｖｓｅｌｅｃｔが図５（Ａ）に示すように低電位となって、水平１ラインの読み出し動作が終る。図５（Ｄ）に示した時刻ｔ２からｔ３で読み出されたリセット出力と、時刻ｔ４からｔ５で読み出された信号出力は、水平出力回路３７の中で差分処理されて、画素増幅特性のばらつきに起因する固定パターン雑音を除いてから外部に出力される（ＣＤＳ処理）。   The light reception time of the next frame starts from time t5. At time t6, the potential Vselect of the selected bus 32 becomes a low potential as shown in FIG. 5A, and the reading operation for one horizontal line ends. The reset output read from time t2 to t3 shown in FIG. 5D and the signal output read from time t4 to t5 are subjected to differential processing in the horizontal output circuit 37 to obtain pixel amplification characteristics. It is output to the outside after removing fixed pattern noise caused by variation (CDS processing).

以上説明してきたように、図１の第１の実施の形態では、図４のように４個のトランジスタ２７〜３０で構成した単位画素１を、縦１列毎の２組に分けて、別々の信号出力回路４，５と水平走査回路３，６で読み出すことにより、全画素を１組の回路で１フレーム期間をかけて読み出す場合に比べ、同じ駆動周波数でも半分の時間で読み出すことができる。   As described above, in the first embodiment of FIG. 1, the unit pixel 1 composed of four transistors 27 to 30 as shown in FIG. The signal output circuits 4 and 5 and the horizontal scanning circuits 3 and 6 can read out all the pixels at the same drive frequency in half the time compared to the case where all the pixels are read out over one frame period. .

その結果、最上端と最下端のラインの受光時間差が少なくなり、動きの速い被写体の画像歪みが減少する。また、各ラインのフォトダイオードの受光時間は１フレーム時間なので、信号出力は低下せずＳ／Ｎが悪化しない。また、信号の読み出しは通常のラインシャッタ動作と同じくＣＤＳ処理を行っているので低雑音を維持できる。なお、図１の第１の実施の形態では、単位画素１を縦１列おきの２組に分けたが、この撮像領域を中央で左右に２分割して別々の出力回路で読み出してもよい。   As a result, the difference in the light receiving time between the uppermost line and the lowermost line is reduced, and the image distortion of a fast moving subject is reduced. Further, since the light receiving time of the photodiodes in each line is one frame time, the signal output does not decrease and the S / N does not deteriorate. Further, since the signal is read out by CDS processing as in the normal line shutter operation, low noise can be maintained. In the first embodiment shown in FIG. 1, the unit pixel 1 is divided into two pairs every other vertical column. However, the imaging region may be divided into two at the center and read out by separate output circuits. .

（第２の実施の形態）
次に、本発明になる固体撮像装置の第２の実施の形態について説明する。図６は本発明になる固体撮像装置の第２の実施の形態の構成図を示す。同図中、図１と同一構成部分には同一符号を付し、その説明を省略する。図６に示す第２の実施の形態は、フレームメモリが１１、１２の２個あることと、差分処理回路１３と信号選択回路１４が加わった点が図１の第１の実施の形態と異なる。 (Second Embodiment)
Next, a second embodiment of the solid-state imaging device according to the present invention will be described. FIG. 6 shows a configuration diagram of a second embodiment of the solid-state imaging device according to the present invention. In the figure, the same components as those in FIG. The second embodiment shown in FIG. 6 differs from the first embodiment shown in FIG. 1 in that there are two frame memories 11 and 12 and that a difference processing circuit 13 and a signal selection circuit 14 are added. .

撮像領域の上下にある信号出力回路４、５からの１フレーム分の信号出力はそれぞれ第１のフレームメモリ１１に書き込まれ、信号出力を読み出した後、後述するダミー読み出しのダミー出力が第２のフレームメモリ１２に書き込まれる。１フレームの信号の読み出し時間が４分の１フレーム期間とした場合は、フレームメモリ１１とフレームメモリ１２へのデータ書き込み時間はそれぞれ４分の１フレーム期間となる。   The signal outputs for one frame from the signal output circuits 4 and 5 above and below the imaging area are respectively written in the first frame memory 11, and after reading the signal output, a dummy output for dummy reading described later is the second output. It is written in the frame memory 12. When the reading time of one frame signal is a quarter frame period, the data writing time to the frame memory 11 and the frame memory 12 is a quarter frame period, respectively.

フレームメモリ１１の信号出力とフレームメモリ１２のダミー出力とは画素毎に１フレーム期間をかけて読み出され、差分処理回路１３で両者の差がとられる。信号選択回路１４は、差分処理回路１３からの差分処理信号と通常の信号を切り換える回路である。電子シャッタを使わない場合は差分処理をしないフレームメモリ１１からの信号を選択出力し、電子シャッタを使う場合は、差分処理信号を選択出力する。信号合成手段１０によって、各画素のデータが正しい配列に直され出力される。   The signal output of the frame memory 11 and the dummy output of the frame memory 12 are read over one frame period for each pixel, and the difference between them is obtained by the difference processing circuit 13. The signal selection circuit 14 is a circuit that switches between the difference processing signal from the difference processing circuit 13 and a normal signal. When the electronic shutter is not used, a signal from the frame memory 11 that does not perform difference processing is selectively output. When the electronic shutter is used, a difference processing signal is selectively output. The signal composition means 10 corrects the data of each pixel into a correct arrangement and outputs it.

この実施の形態は、１フレーム期間の受光時間の途中で電荷を排出する、いわゆる電子シャッタを導入したものである。この電子シャッタ動作においては、水平１ライン毎に画素内のフォトダイオードの電荷を順次排出するが、その排出のタイミングは、電荷排出時から信号読み出し開始時までが受光時間となるように、信号の読み出し速度に同期させる。電子シャッタ動作を導入する場合も、画素信号の読み出しは通常のローリングシャッタ動作と同じく、最初に画素内の増幅トランジスタの入力をリセットして第１出力を読み出し、その後にリセット状態の入力端子にフォトダイオードで光電変換した電荷を転送して第２出力を読み出し、この第１出力と第２出力の差をとって信号出力とする（ＣＤＳ処理）。さらに、電子シャッタ動作を導入した場合は、１フレームの信号を上記の方法で１度読み出した直後に、２度目の信号読み出し（ダミー読み出し）を行い、その１度目と２度目の信号の差を差分処理回路１３でとって最終的な出力信号とするものである。   In this embodiment, a so-called electronic shutter that discharges charges in the middle of the light receiving time of one frame period is introduced. In this electronic shutter operation, the charges of the photodiodes in the pixels are sequentially discharged for each horizontal line. The discharge timing is such that the light reception time is from the charge discharge time to the signal read start time. Synchronize with the reading speed. Even when the electronic shutter operation is introduced, the pixel signal is read out in the same manner as in the normal rolling shutter operation. First, the input of the amplification transistor in the pixel is reset to read the first output, and then the photo signal is input to the input terminal in the reset state. The charge photoelectrically converted by the diode is transferred to read the second output, and the difference between the first output and the second output is taken as a signal output (CDS processing). Furthermore, when an electronic shutter operation is introduced, immediately after the signal of one frame is read once by the above method, the second signal read (dummy read) is performed, and the difference between the first and second signals is calculated. The difference processing circuit 13 takes the final output signal.

図７は図６に示した本発明になる固体撮像装置の第２の実施の形態におけるフォトダイオードの受光時間と信号読み出し期間の関係を示す。本実施の形態はラインシャッタ動作の読み出しタイミングを表わすものであり、Ｎ本の水平走査ラインを上から順番に読み出して１フレームとしている点は、図２と同じである。しかし、１ラインの受光時間が１フレーム期間より短い点と、１フレームの信号を読み出した直後にダミー読み出しを行う点が図２と異なる。   FIG. 7 shows the relationship between the light receiving time of the photodiode and the signal readout period in the second embodiment of the solid-state imaging device according to the present invention shown in FIG. This embodiment represents the readout timing of the line shutter operation, and is the same as FIG. 2 in that N horizontal scanning lines are sequentially read from the top to form one frame. However, it differs from FIG. 2 in that the light reception time for one line is shorter than one frame period and that dummy reading is performed immediately after reading one frame signal.

感度調整や蛍光灯照明下の撮像で発生するフリッカ対策として、電子シャッタ動作の導入が必要な場合がある。その場合は１フレーム期間の受光時間の途中で、フォトダイオードの電荷を排出する。図７に示した１ライン受光時間は、電子シャッタ動作による電荷排出後から信号電荷の読み出し開始までの時間に相当する。図７の場合も、第１番目の水平ラインの読み出し開始と同時に１フレーム期間がスタートするが、第Ｎ番目の水平ラインの読み出しは１フレーム期間の途中で終了する。   As a countermeasure against flicker that occurs during sensitivity adjustment or imaging under fluorescent lamp illumination, it may be necessary to introduce an electronic shutter operation. In this case, the charge of the photodiode is discharged during the light receiving time of one frame period. The one-line light receiving time shown in FIG. 7 corresponds to the time from the discharge of electric charge by the electronic shutter operation to the start of reading of the signal charge. Also in the case of FIG. 7, one frame period starts simultaneously with the start of reading of the first horizontal line, but reading of the Nth horizontal line ends in the middle of one frame period.

図７の例では、１フレーム期間の４分の１の時間で１フレーム分の信号を読み出す。第１ラインと第Ｎラインの受光開始時間の差は、１フレームの信号を読み出す時間であり、図７の場合は１フレーム期間の４分の１である。このように、最上端と最下端のラインの受光時間差が少なくなるので、動きの速い被写体でも画像の歪が減少する。   In the example of FIG. 7, a signal for one frame is read out in a quarter of a frame period. The difference between the light reception start times of the first line and the N-th line is a time for reading a signal of one frame, and in the case of FIG. 7, it is a quarter of one frame period. As described above, since the difference in the light receiving time between the uppermost line and the lowermost line is reduced, image distortion is reduced even in a fast-moving subject.

一方、図７の第２の実施の形態においては、各画素の受光時間は電子シャッタ動作のため１フレーム期間の数分の１となり、信号出力の大きさも数分の１に低下する。反面、雑音レベルは画素アンプのばらつきによる固定パターン雑音が主であり、画素の受光時間によっては変化しないので、何も対策しなければ信号出力のＳ／Ｎが悪化する。   On the other hand, in the second embodiment of FIG. 7, the light receiving time of each pixel is a fraction of one frame period due to the electronic shutter operation, and the signal output size is also reduced to a fraction. On the other hand, the noise level is mainly fixed pattern noise due to variations in pixel amplifiers, and does not change depending on the light reception time of the pixels. Therefore, if no countermeasure is taken, the signal output S / N deteriorates.

そこで、第２の実施の形態では、図７に示すように、１フレームの信号を読み出した後、すべてのラインで１度目よりも短い受光時間で受光した各画素から２度目の読み出し（ダミー読み出し）を行う。ダミー読み出しの際、読み出し速度は１フレームの信号を読み出す速度（図７はフレーム期間の４分の１）と同じであるが、１ラインの受光時間は最短となるように、電子シャッタのタイミングを調整する。受光時間が短いので、ダミー読み出しの出力は各画素に固有な雑音成分が主体である。このように読み出したダミー出力の値を、先に読み出した信号出力から図６に示した差分処理回路１３で差し引くことによって、画素毎の固定パターン雑音を減らせる。なお、これらの１度目の信号読み出しと２度目のダミー読み出しの両方とも、通常のＣＤＳ処理を行って低雑音化していることは勿論である。   Therefore, in the second embodiment, as shown in FIG. 7, after reading out the signal of one frame, the second reading (dummy reading) is performed from each pixel received in a light receiving time shorter than the first time in all lines. )I do. At the time of dummy reading, the reading speed is the same as the reading speed of one frame signal (FIG. 7 is a quarter of the frame period), but the timing of the electronic shutter is set so that the light receiving time of one line is the shortest. adjust. Since the light receiving time is short, the dummy readout output is mainly composed of noise components unique to each pixel. The fixed pattern noise for each pixel can be reduced by subtracting the read dummy output value from the previously read signal output by the difference processing circuit 13 shown in FIG. Of course, both the first signal reading and the second dummy reading are performed by performing normal CDS processing to reduce noise.

一般に、固体撮像装置の固定パターン雑音を減らす方法としては、撮像開始時に暗状態で全画素の出力を一度読み出してメモリに蓄積し、撮影時には明状態の信号出力から暗状態の出力（固定パターン雑音）を差し引く方法がとられるが、その方法では暗状態の出力を読み出した時刻と実際の撮像時刻との差が大きく、固体撮像装置の温度や電圧の時間的変化に影響される雑音成分を取りきれない。一方、第２の実施の形態で説明した、信号出力からダミー出力を差し引く方法では、信号読み出しとダミー読み出しがごく僅かな時間差で実施されるので、両者の雑音成分の一致性が良く、差分処理で雑音をキャンセルすることができる。   In general, as a method of reducing the fixed pattern noise of a solid-state image pickup device, the output of all pixels is read once in the dark state at the start of imaging and stored in the memory, and when shooting, the dark state output (fixed pattern noise) ) Is subtracted, but in this method, the difference between the time when the dark state output is read and the actual imaging time is large, and noise components that are affected by temporal changes in the temperature and voltage of the solid-state imaging device are removed. I can't. On the other hand, in the method of subtracting the dummy output from the signal output described in the second embodiment, since the signal reading and the dummy reading are performed with a very slight time difference, the coincidence of both noise components is good and the difference processing is performed. Can cancel the noise.

（第３の実施の形態）
次に、本発明になる固体撮像装置の第３の実施の形態について説明する。図８は本発明になる固体撮像装置の第３の実施の形態の構成図を示す。同図中、図６と同一構成部分には同一符号を付し、その説明を省略する。図６に示す第２の実施の形態において、図７に示すような、４分の１フレーム期間での読み出しを行うためには、撮像領域の上下にある２組の出力回路を、通常の２倍の周波数で駆動しなければならず、出力回路の動作がクリティカルになる。 (Third embodiment)
Next, a third embodiment of the solid-state imaging device according to the present invention will be described. FIG. 8 shows a configuration diagram of a third embodiment of a solid-state imaging device according to the present invention. In the figure, the same components as those in FIG. 6 are denoted by the same reference numerals, and the description thereof is omitted. In the second embodiment shown in FIG. 6, in order to perform readout in a quarter frame period as shown in FIG. It must be driven at twice the frequency, and the operation of the output circuit becomes critical.

そこで、図８に示す第３の実施の形態では、基本的な動作は第２の実施の形態と同様であるが、撮像領域の上下に設けられる信号出力回路と水平走査回路の組を２組ずつ、計４組、すなわち信号出力回路１６、１８と水平走査回路１５、１７を撮像領域の上側に設け、信号出力回路２０、２２と水平走査回路１９、２１を撮像領域の下側に設け、全画素を縦１列ずつ交互に分けて垂直信号線７ａ、７ｂ、８ａ、８ｂにより４組の出力回路に繋ぐことにより、全画素を１組の回路で１フレーム期間をかけて読み出す場合に比べ、同じ駆動周波数でも、４分の１の時間で読み出すことができ、これにより回路設計に余裕ができ特性ばらつきを減らすことができる。   Therefore, in the third embodiment shown in FIG. 8, the basic operation is the same as in the second embodiment, but two sets of signal output circuits and horizontal scanning circuits provided above and below the imaging region are provided. 4 sets in total, that is, signal output circuits 16 and 18 and horizontal scanning circuits 15 and 17 are provided on the upper side of the imaging region, and signal output circuits 20 and 22 and horizontal scanning circuits 19 and 21 are provided on the lower side of the imaging region, Compared to the case where all pixels are read out over one frame period by one set of circuits by dividing all the pixels alternately one column at a time and connecting them to four sets of output circuits by vertical signal lines 7a, 7b, 8a, 8b. Even with the same drive frequency, it can be read out in a quarter of the time, thereby allowing a margin in circuit design and reducing characteristic variations.

なお、図８では全画素を縦１列ずつ４組に分けたが、撮像領域を横方向に４分割してそれぞれを４組の出力回路で読み出しても、同様の効果が得られる。   In FIG. 8, all pixels are divided into four groups of vertical columns, but the same effect can be obtained by dividing the imaging region into four in the horizontal direction and reading each of them with four sets of output circuits.

なお、本発明は以上の実施の形態に限定されるものではなく、例えば、以上の実施の形態では１フレームの画素の出力信号を１フレーム期間よりも短い時間で読み出す場合について説明したが、１フィールドの画素の出力信号を１フィールド期間よりも短い時間で読み出す固体撮像装置にも適用できることは勿論である。   The present invention is not limited to the above embodiment. For example, in the above embodiment, the case where an output signal of a pixel of one frame is read out in a time shorter than one frame period has been described. Of course, the present invention can also be applied to a solid-state imaging device that reads an output signal of a pixel in a field in a time shorter than one field period.

本発明の固体撮像装置の第１の実施の形態の構成図である。1 is a configuration diagram of a first embodiment of a solid-state imaging device of the present invention. 本発明の固体撮像装置の第１の実施の形態における、受光時間と信号読み出し期間の関係を示す図である。It is a figure which shows the relationship between the light reception time and signal readout period in 1st Embodiment of the solid-state imaging device of this invention. 本発明の固体撮像装置の第１の実施の形態における、信号出力期間を示す図である。It is a figure which shows the signal output period in 1st Embodiment of the solid-state imaging device of this invention. 単位画素の一例の回路図である。It is a circuit diagram of an example of a unit pixel. 図４の動作説明用タイミングチャートである。5 is a timing chart for explaining the operation of FIG. 4. 本発明の固体撮像装置の第２の実施の形態の構成図である。It is a block diagram of 2nd Embodiment of the solid-state imaging device of this invention. 本発明の固体撮像装置の第２の実施の形態における、受光時間と信号読み出し期間の関係を示す図である。It is a figure which shows the relationship between the light reception time and signal readout period in 2nd Embodiment of the solid-state imaging device of this invention. 本発明の固体撮像装置の第３の実施の形態の構成図である。It is a block diagram of 3rd Embodiment of the solid-state imaging device of this invention. ラインシャッタ動作での動画歪を説明する図である。It is a figure explaining the animation distortion by line shutter operation | movement.

符号の説明Explanation of symbols

１ 単位画素
２ 垂直走査回路
３ 第１水平走査回路
４ 第１信号出力回路
５ 第２信号出力回路
６ 第２水平走査回路
７、７ａ、７ｂ、８、８ａ、８ｂ 垂直信号線
９ メモリ
１０ 信号合成手段
１１、１２ フレームメモリ
１３ 差分処理回路
１４ 信号選択回路



DESCRIPTION OF SYMBOLS 1 Unit pixel 2 Vertical scanning circuit 3 1st horizontal scanning circuit 4 1st signal output circuit 5 2nd signal output circuit 6 2nd horizontal scanning circuit 7, 7a, 7b, 8, 8a, 8b Vertical signal line 9 Memory 10 Signal composition Means 11, 12 Frame memory 13 Difference processing circuit 14 Signal selection circuit



Claims (3)

撮像領域に配列された、１フレーム（又は１フィールド）の一画面を構成する複数の画素から、１フレーム期間（又は１フィールド期間）よりも短い期間で信号を読み出す固体撮像装置であって、
前記撮像領域に配列された前記複数の画素を複数の組に分け、各組の画素の受光時間を１フレーム期間（又は１フィールド期間）とすると共に、前記各組の画素を組別に独立して駆動して、前記各組の画素から信号を並行して読み出す読み出し手段と、
前記読み出し手段により読み出された、前記各組の画素の出力信号を合成して一画面分の出力信号を出力する信号合成手段と
を有することを特徴とする固体撮像装置。 A solid-state imaging device that reads signals in a period shorter than one frame period (or one field period) from a plurality of pixels constituting one screen (or one field) arranged in an imaging region,
The plurality of pixels arranged in the imaging region are divided into a plurality of groups, and the light receiving time of each group of pixels is set to one frame period (or one field period), and the pixels of each group are independently grouped. Reading means for driving and reading out signals from the respective sets of pixels in parallel;
A solid-state imaging device comprising: signal combining means for combining the output signals of the respective sets of pixels read by the reading means and outputting an output signal for one screen. 撮像領域に配列された、１フレーム（又は１フィールド）の一画面を構成する複数の画素から、１フレーム期間（又は１フィールド期間）よりも短い期間で信号を読み出す固体撮像装置であって、
前記撮像領域に配列された前記複数の画素のそれぞれにおいて、１フレーム期間（又は１フィールド期間）よりも短い第１の受光時間で光電変換して得た第１の信号を前記複数の画素から読み出した後、前記第１の受光時間よりも短い第２の受光時間で光電変換して得た第２の信号を前記複数の画素から読み出す読み出し手段と、
前記第１の信号を蓄積する第１の蓄積手段と、
前記第２の信号を蓄積する第２の蓄積手段と、
前記第１の蓄積手段に蓄積された第１の信号を１フレーム期間（又は１フィールド期間）かけて読み出した信号から、前記第２の蓄積手段に蓄積された第２の信号を１フレーム期間（又は１フィールド期間）かけて読み出した信号を、対応する画素単位で差し引いて差分信号を生成する差分処理手段と
を有し、前記差分信号を撮像信号として出力することを特徴とする固体撮像装置。 A solid-state imaging device that reads signals in a period shorter than one frame period (or one field period) from a plurality of pixels constituting one screen (or one field) arranged in an imaging region,
In each of the plurality of pixels arranged in the imaging region, a first signal obtained by performing photoelectric conversion in a first light receiving time shorter than one frame period (or one field period) is read from the plurality of pixels. And reading means for reading out the second signal obtained by photoelectric conversion in the second light receiving time shorter than the first light receiving time from the plurality of pixels;
First storage means for storing the first signal;
Second storage means for storing the second signal;
From the signal read out from the first signal stored in the first storage means over one frame period (or one field period), the second signal stored in the second storage means is converted into one frame period ( Or a difference processing unit that generates a difference signal by subtracting a signal read out over one field period in a corresponding pixel unit, and outputs the difference signal as an imaging signal. 前記差分処理手段から出力される差分信号と、前記第１の蓄積手段から出力される前記第１の信号とのうち、任意に選択した一方の信号を出力する信号選択手段を有することを特徴とする請求項２記載の固体撮像装置。

It has a signal selection means for outputting one signal arbitrarily selected from the difference signal output from the difference processing means and the first signal output from the first accumulation means. The solid-state imaging device according to claim 2.

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