JP2007164162A - Display device and camera - Google Patents
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- JP2007164162A JP2007164162A JP2006310306A JP2006310306A JP2007164162A JP 2007164162 A JP2007164162 A JP 2007164162A JP 2006310306 A JP2006310306 A JP 2006310306A JP 2006310306 A JP2006310306 A JP 2006310306A JP 2007164162 A JP2007164162 A JP 2007164162A
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- 238000005401 electroluminescence Methods 0.000 description 55
- 239000010408 film Substances 0.000 description 32
- 239000010410 layer Substances 0.000 description 27
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- 238000002161 passivation Methods 0.000 description 9
- 238000007789 sealing Methods 0.000 description 6
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- 230000000903 blocking effect Effects 0.000 description 3
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- 238000009125 cardiac resynchronization therapy Methods 0.000 description 1
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- 229910010272 inorganic material Inorganic materials 0.000 description 1
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
- G09G3/3241—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
- G09G3/325—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
- H10K59/1315—Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Control Of El Displays (AREA)
- Viewfinders (AREA)
- Electroluminescent Light Sources (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
Description
本発明は表示装置及びカメラに関し、特に、基板上に電流駆動型の発光素子と前記発光素子の駆動電流を制御する画素回路（駆動回路とも言う）とを備えた単位画素が複数個配置された表示領域を有する表示装置に係わる。そして本発明は、特に電流を流して発光するエレクトロルミネッセンス（ＥＬ）素子をマトリクス状に配置した表示装置に好適に用いられるものである。 The present invention relates to a display device and a camera, and in particular, a plurality of unit pixels each including a current-driven light-emitting element and a pixel circuit (also referred to as a drive circuit) for controlling a drive current of the light-emitting element are arranged on a substrate. The present invention relates to a display device having a display area. The present invention is particularly suitable for a display device in which electroluminescence (EL) elements that emit light when a current is passed are arranged in a matrix.
近年、エレクトロルミネッセンス（EL）素子を用いた表示装置がCRTやLCDに替わる表示装置として注目され、その中でも素子に流れる電流によって発光輝度が制御される電流駆動型の発光素子である有機ＥＬ素子の応用開発が活発に行われている。 In recent years, display devices using electroluminescence (EL) elements have attracted attention as display devices that replace CRTs and LCDs. Among them, organic EL elements, which are current-driven light-emitting elements whose emission luminance is controlled by the current flowing through the elements, are known. Application development is active.
そして、有機ＥＬ素子と、有機ＥＬ素子に流す電流を制御する制御素子となる薄膜トランジスタ（TFT）と、を含む画素を複数配列して表示領域を構成した表示装置が検討されている。また周辺回路を含んだ有機EL表示装置では表示領域に限らず、周辺回路においても薄膜トランジスタ（TFT）が用いられている。 A display device in which a display region is configured by arranging a plurality of pixels including an organic EL element and a thin film transistor (TFT) serving as a control element for controlling a current flowing through the organic EL element has been studied. In addition, in an organic EL display device including a peripheral circuit, a thin film transistor (TFT) is used not only in the display area but also in the peripheral circuit.
近年の表示装置において、表示領域の大面積化、高精細化が進み、信号線や走査線等の配線の数及び配線の長さが増大し、表示領域の各画素に電流を流すための電力供給線や共通電位線の配線の長さも増大している。 In recent display devices, the display area has been increased in area and definition, and the number of lines such as signal lines and scanning lines and the length of the lines have increased, and the power for flowing current to each pixel in the display area. The lengths of the supply lines and common potential lines are also increasing.
配線長が長くなることにより配線抵抗が増大する。また表示装置の大面積化、高精細化により表示装置に流れる電流量も増大する。配線抵抗と電流量の増大に伴って、配線に沿った電位降下の影響が大きくなり、表示領域全域に一定の電源電位を供給できず、表示品質を低下させてしまうという問題がある。 As the wiring length becomes longer, the wiring resistance increases. In addition, the amount of current flowing through the display device increases as the display device increases in area and definition. As the wiring resistance and the amount of current increase, the influence of the potential drop along the wiring increases, and there is a problem that a constant power supply potential cannot be supplied to the entire display region, resulting in a deterioration in display quality.
上記問題を解決する手段として、外部接続端子と表示領域とをつなぐ電源配線の幅を広くして配線抵抗を低減し、更に幅広のコンタクトホールを形成して電源配線と画素電極とのコンタクト抵抗を低減して電位降下を抑制する手法が特許文献１に開示されている。しかし、電源配線幅を広げ、コンタクトホールを大きくすると、表示領域周辺、いわゆる額縁の面積が大きくなる。応用製品によっては額縁をできるだけ小さくすることが求められているので、配線の幅やコンタクトホールサイズを大きくするには限度がある。 As means for solving the above problems, the width of the power supply wiring connecting the external connection terminal and the display area is widened to reduce the wiring resistance, and further, a wide contact hole is formed to reduce the contact resistance between the power supply wiring and the pixel electrode. Patent Document 1 discloses a technique for reducing and suppressing the potential drop. However, when the power supply wiring width is increased and the contact hole is enlarged, the area around the display area, that is, the so-called frame area is increased. Depending on the application product, it is required to make the frame as small as possible, so there is a limit to increasing the wiring width and contact hole size.
有機ＥＬ表示装置は、水分が有機ＥＬ素子に侵入すると、発光しないエリア（ダークスポット）の発生や、輝度の劣化の問題を引き起こす。よって水分の侵入を抑えるための封止技術が求められる。特許文献２には、無機材料から成る水分遮断構造物で平面的に画素領域を取り囲んで、水分を遮断する技術が開示されている。 In the organic EL display device, when moisture enters the organic EL element, an area that does not emit light (dark spot) is generated, and a problem of deterioration in luminance occurs. Therefore, a sealing technique for suppressing intrusion of moisture is required. Patent Document 2 discloses a technique for blocking moisture by surrounding a pixel region in a plane with a moisture blocking structure made of an inorganic material.
また、水分を含む外気からＥＬ素子を保護するため、水分を通さないパッシベーション膜で表示部全体を被うことが行われている。水分通過を抑えるにはパッシベーション膜を一定以上の厚さにすることが望ましい。これによって表示領域は厚さ方向からの水分侵入を遮断することが出来る。 Further, in order to protect the EL element from the outside air containing moisture, the entire display portion is covered with a passivation film that does not allow moisture to pass therethrough. In order to suppress the passage of moisture, it is desirable that the passivation film has a certain thickness or more. As a result, the display area can block moisture intrusion from the thickness direction.
水分侵入は面方向からも起きる。これは、主として表示装置を構成する膜のうち水分を吸収しやすい膜を通って侵入する。特に有機ＥＬ素子の下層に形成される平坦化膜はアクリル樹脂などの有機化合物で形成されるため水分を通しやすい。 Moisture penetration also occurs from the surface direction. This penetrates mainly through a film that easily absorbs moisture among the films constituting the display device. In particular, since the planarization film formed in the lower layer of the organic EL element is formed of an organic compound such as an acrylic resin, it easily allows moisture to pass therethrough.
特許文献３には、周辺領域で電源配線と表示素子の電極とを接続するコンタクトホールを設け、これにより表示領域内の平坦化膜と、その外側の平坦化膜とを分離する発明が開示されている。外側の平坦化膜に浸入した水分は、コンタクト部で遮断され、内側の平坦化膜へ侵入することができない。これにより、水平方向の水分侵入が抑えられる。コンタクトホールで表示領域を囲むことによって、表示領域への横方向からの水分浸入を大部分遮断することができる。 Patent Document 3 discloses an invention in which a contact hole for connecting a power supply wiring and an electrode of a display element is provided in a peripheral region, thereby separating a planarizing film in the display region and a planarizing film outside thereof. ing. Moisture that has entered the outer planarization film is blocked by the contact portion and cannot enter the inner planarization film. Thereby, the horizontal water penetration | invasion is suppressed. By enclosing the display area with the contact hole, it is possible to largely block moisture intrusion into the display area from the lateral direction.
コンタクトホールによって平坦化膜を分断する方法に限らず、横方向の水分侵入を抑える手段がコンタクトホール部分に設けられているとき、パッシベーション膜は、少なくともコンタクトホールの上までは、表示領域と同じ縦方向の水分侵入を遮断するのに十分な厚さを有していなければならない。 Not only the method of dividing the planarization film by the contact hole but also a means for suppressing moisture intrusion in the lateral direction is provided in the contact hole portion, the passivation film is at least vertically above the contact hole in the same vertical direction as the display area. It must be thick enough to block directional moisture ingress.
通常パッシベーション膜は印刷またはマスク成膜によって形成されるので、端部までの一定の範囲で厚さが徐々に薄くなっている。このために、コンタクトホール上で所定の厚さを有するためには、コンタクトホールの外側から基板端まで、あるいは封止キャップの接着領域の内側の縁までの間に、厚さが漸減するためのある所定の距離が求められる。 Since the passivation film is usually formed by printing or mask film formation, the thickness is gradually reduced within a certain range up to the end. For this reason, in order to have a predetermined thickness on the contact hole, the thickness is gradually reduced from the outside of the contact hole to the substrate end or the inner edge of the sealing cap bonding region. A certain predetermined distance is determined.
一方、有機ＥＬ層もマスク成膜で形成されるので、その位置がずれることがある。これを吸収し、有機ＥＬ層がコンタクトホールに接触しないように、表示領域の外縁とコンタクトホールの内縁との間でも、一定の距離を確保することが求められる。 On the other hand, since the organic EL layer is also formed by mask film formation, the position may be shifted. It is required to secure a certain distance between the outer edge of the display area and the inner edge of the contact hole so as to absorb this and prevent the organic EL layer from contacting the contact hole.
このように、コンタクトホールは、基板端と表示領域の外縁とのそれぞれに一定の距離を確保して配置されていなければならない。この制約も額縁を小さくする上での障害となっている。
本発明は、表示領域の大型化に伴う配線長の増大とその結果の配線抵抗の増大、および高精細化のために必要な電流量の増大によって生じる、電源電位の変動を、額縁面積を大きくすることなく抑制するものである。 According to the present invention, fluctuations in the power supply potential caused by an increase in the wiring length accompanying the enlargement of the display area, an increase in the wiring resistance as a result, and an increase in the amount of current necessary for high definition are increased. It suppresses without doing.
本発明の表示装置は、基板上に、発光素子と、絶縁層を介して前記発光素子の下層に設けられ、前記発光素子を流れる電流を制御する駆動回路と、が各々行方向および列方向に配列して配置され、
前記発光素子は、前記駆動回路を被う絶縁層の上で、下層の第１電極と、上層の第２電極との間に設けられ、
前記第１電極は、前記駆動回路を介して、前記基板上の前記発光素子と前記駆動回路とが配置された領域の周辺に配置された第１の電源配線に接続され、
前記第２電極は、前記領域の周囲を取り囲んで前記絶縁層に開けられたコンタクトホールを介して第２の電源配線に接続されている表示装置であって、
前記基板の少なくとも１辺に沿って、前記コンタクトホールの片側に配置された前記第１の電源配線と、前記コンタクトホールの反対側に配置された前記第１の電源配線又は前記第２の電源配線の拡幅部とが並行に配置されていることを特徴とする。
In the display device of the present invention, a light-emitting element and a driving circuit that is provided in a lower layer of the light-emitting element via an insulating layer and controls a current flowing through the light-emitting element are arranged in a row direction and a column direction, respectively. Arranged and arranged
The light emitting element is provided on the insulating layer covering the driving circuit, between the lower first electrode and the upper second electrode,
The first electrode is connected to a first power supply wiring disposed around a region where the light emitting element and the driving circuit are disposed on the substrate via the driving circuit,
The second electrode is a display device that is connected to a second power supply line through a contact hole that surrounds the region and is opened in the insulating layer,
The first power supply wiring disposed on one side of the contact hole and the first power supply wiring or the second power supply wiring disposed on the opposite side of the contact hole along at least one side of the substrate The widened portion is arranged in parallel.
また本発明の表示装置は、基板上に、発光素子と前記発光素子の駆動電流を制御する駆動回路とが各々複数個配置された表示領域と、前記駆動回路に電流を供給する第１と第２の電源配線が設けられた周辺領域と、を有する表示装置であって、
前記発光素子は下層の第１電極と上層の第２電極との間に設けられ、
前記駆動回路は第１電源配線に接続され、前記第１電極を介して前記発光素子に駆動電流を供給し、
前記第２電極は、前記周辺領域に設けられたコンタクトホールを介して、前記第２電極より下層の第２電源配線に接続され、
前記基板の面内において、前記第１電源配線の少なくとも一部は、前記コンタクトホールを介して前記第２電極に接触している前記第２電源配線の両側に、前記第２電源配線に沿って配置されていることを特徴とする。
In the display device of the present invention, a display region in which a plurality of light emitting elements and a driving circuit for controlling the driving current of the light emitting elements are arranged on a substrate, and a first and a first for supplying current to the driving circuit. And a peripheral region provided with two power supply wirings,
The light emitting element is provided between a lower first electrode and an upper second electrode,
The drive circuit is connected to a first power supply wiring and supplies a drive current to the light emitting element through the first electrode;
The second electrode is connected to a second power wiring below the second electrode through a contact hole provided in the peripheral region,
Within the plane of the substrate, at least a part of the first power supply wiring is along the second power supply wiring on both sides of the second power supply wiring contacting the second electrode through the contact hole. It is arranged.
さらに本発明の表示装置は、基板上に、発光素子と前記発光素子の駆動電流を制御する駆動回路とが各々複数個配置された表示領域を有する表示装置であって、
前記発光素子は下層の第１電極と上層の第２電極との間に設けられ、
前記駆動回路は第１電源配線に接続され、前記第１電極を介して前記発光素子に駆動電流を供給し、
前記第２電極は、前記表示領域の周囲に設けられたコンタクトホールを介して、前記第２電極より下層の第２電源配線に接続され、
前記基板の面内において、前記第１電源配線は前記第２電源配線の片側に、前記第２電源配線に沿って配置され、前記第２電源配線は、前記コンタクトホールを介して前記第２電極に接触している部分から、前記第１電源配線が配置される側と反対側に延びて幅が広がっていることを特徴とする。
Further, the display device of the present invention is a display device having a display region in which a plurality of light emitting elements and a plurality of drive circuits for controlling the drive current of the light emitting elements are arranged on a substrate,
The light emitting element is provided between a lower first electrode and an upper second electrode,
The drive circuit is connected to a first power supply line and supplies a drive current to the light emitting element through the first electrode;
The second electrode is connected to a second power line below the second electrode through a contact hole provided around the display area,
In the plane of the substrate, the first power supply wiring is disposed along one side of the second power supply wiring along the second power supply wiring, and the second power supply wiring is connected to the second electrode through the contact hole. The width extends from the portion in contact with the first power supply wiring to the side opposite to the side where the first power supply wiring is disposed.
本発明によれば、発光素子と、発光素子に電流を流すための駆動回路（画素回路）とを備えた構成要素が複数個配置された領域に接続される電源配線の電位変動を、装置の額縁面積を増大させることなく低減させることが可能となる。表示領域の大面積化や高精細化が進んでも、電位変動の影響による表示品質の劣化を軽減させる表示装置を提供することが可能である。 According to the present invention, potential fluctuation of a power supply wiring connected to a region where a plurality of components including a light emitting element and a driving circuit (pixel circuit) for passing a current to the light emitting element are arranged can be detected. It is possible to reduce the frame area without increasing it. It is possible to provide a display device that can reduce deterioration in display quality due to the influence of potential fluctuations even when the display area is increased in area and definition.
以下、本発明の実施の形態について図面を用いて詳細に説明する。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
有機ＥＬ素子は電流駆動型の発光素子、すなわち流れる電流に応じた輝度で発光する素子である。本発明は、有機ＥＬ素子を用いたアクティブマトリクス型表示装置に好適に適用される。以下、本発明のいくつかの実施形態に共通するＥＬ素子の構造について説明する。 The organic EL element is a current-driven light-emitting element, that is, an element that emits light with luminance corresponding to a flowing current. The present invention is suitably applied to an active matrix display device using organic EL elements. Hereinafter, the structure of an EL element common to some embodiments of the present invention will be described.
図１は基板１０の上に構成された有機ＥＬ素子部２０とその駆動回路１９の断面図である。等価回路を図２に示す。 FIG. 1 is a cross-sectional view of an organic EL element section 20 formed on a substrate 10 and a drive circuit 19 thereof. An equivalent circuit is shown in FIG.
有機ＥＬ素子部２０は、下層の第１電極２２と、上層の第２電極２４と、第１電極２２と第１電極２２とに挟まれたいくつかの有機化合物の層（有機ＥＬ素子となる）２３からなっている。カラー表示装置の場合は異なる有機化合物層を含むＲＧＢ３色のＥＬ素子が並んでおり、隣同士の画素には異なる色の発光素子を構成する有機層２３ａと２３ｂが形成されている。 The organic EL element unit 20 includes a lower first electrode 22, an upper second electrode 24, and several organic compound layers sandwiched between the first electrode 22 and the first electrode 22 (becomes an organic EL element). ) 23. In the case of a color display device, EL elements of three colors RGB including different organic compound layers are arranged, and organic layers 23a and 23b constituting light emitting elements of different colors are formed in adjacent pixels.
有機ＥＬ素子部２０に供給される電流は下層の第１電極２２と上層の第２電極２４との間を流れる。第１電極２２は画素ごとに分離して設けられ、第２電極２４は各画素に対して共通に設けられる。画素間には隣接画素への電流漏れを防ぐために素子分離層２６が設けられている。 The current supplied to the organic EL element portion 20 flows between the lower first electrode 22 and the upper second electrode 24. The first electrode 22 is provided separately for each pixel, and the second electrode 24 is provided in common for each pixel. An element isolation layer 26 is provided between the pixels in order to prevent current leakage to adjacent pixels.
第２電極２４は全部の画素に共通の電極であって、表示領域全体にわたって有機ＥＬ層（有機ＥＬ素子となる）２３を被っている。光が上方に取り出されるトップエミッション型有機ＥＬ表示装置では第２電極は透明電極である。
第１電極２２は、駆動回路１９から絶縁するため絶縁膜（絶縁層）２８の上に設けられている。絶縁膜２８は、第１電極２２が形成される上面を平坦に保つために有機樹脂材料を用いて形成されている。以下、絶縁膜２８を平坦化膜ともいう。
The second electrode 24 is an electrode common to all pixels, and covers the organic EL layer (becomes an organic EL element) 23 over the entire display region. In the top emission type organic EL display device in which light is extracted upward, the second electrode is a transparent electrode.
The first electrode 22 is provided on an insulating film (insulating layer) 28 in order to insulate from the drive circuit 19. The insulating film 28 is formed using an organic resin material in order to keep the upper surface on which the first electrode 22 is formed flat. Hereinafter, the insulating film 28 is also referred to as a planarizing film.
図１では、駆動回路１９として、半導体層１１と、ゲート電極１２、ソース電極１３、ドレイン電極１４、絶縁膜１５からなる駆動ＴＦＴの断面が描かれている。駆動トランジスタ（ＴＦＴ）は、ドレイン電極１４が有機ＥＬ素子２０の第１電極２２に接続されている。駆動トランジスタ（ＴＦＴ）は図２のトランジスタ Ｍ１に対応する。駆動回路１９には、この他に、図２の回路に示されている（図１では不図示の）スイッチングトランジスタ（ＴＦＴ） Ｍ２，Ｍ３，Ｍ４とキャパシタＣ１が含まれている。 In FIG. 1, a cross section of a driving TFT including a semiconductor layer 11, a gate electrode 12, a source electrode 13, a drain electrode 14, and an insulating film 15 is depicted as the driving circuit 19. In the driving transistor (TFT), the drain electrode 14 is connected to the first electrode 22 of the organic EL element 20. The driving transistor (TFT) corresponds to the transistor M1 in FIG. In addition to this, the drive circuit 19 includes switching transistors (TFTs) M2, M3, M4 and a capacitor C1 (not shown in FIG. 1) shown in the circuit of FIG.
駆動回路１９の電源は、表示領域内に行方向または列方向に設けられた複数の電源線１６を通じて供給される。有機ＥＬ素子部２０の駆動電流は、電源線１６から駆動回路１９の駆動ＴＦＴを通り、第１電極２２から有機ＥＬ素子２３に供給され、第２電極２４へ流れ出る。図２においては、電源線１６は電源線１０３が対応する。 The power of the drive circuit 19 is supplied through a plurality of power supply lines 16 provided in the row direction or the column direction in the display area. The drive current of the organic EL element unit 20 is supplied from the first electrode 22 to the organic EL element 23 through the drive TFT of the drive circuit 19 from the power supply line 16 and flows out to the second electrode 24. In FIG. 2, the power supply line 16 corresponds to the power supply line 103.
有機ＥＬ素子２３の層構成によっては、電流は逆方向に流れる。そのときは図２の駆動トランジスタＭ１にＮＭＯＳトランジスタを用い、ＥＬ素子の陰極と陽極を入れ替え、電源ＶＣＣとＧＮＤを入れ替える。 Depending on the layer configuration of the organic EL element 23, the current flows in the opposite direction. At that time, an NMOS transistor is used as the drive transistor M1 in FIG. 2, the cathode and anode of the EL element are switched, and the power supplies VCC and GND are switched.
外気からの水分侵入を遮断するために、第２電極２４は全体が保護層（以下パッシベーション膜という）２５で覆われている。 The entire second electrode 24 is covered with a protective layer (hereinafter referred to as a passivation film) 25 in order to block moisture intrusion from the outside air.
以下の実施形態は有機ＥＬ素子を例にとって説明するが、有機ＥＬ層（有機ＥＬ素子）２３の代わりに、無機ＥＬ、ＬＥＤその他の発光材料が上下一対の電極に挟まれた電流駆動型の発光素子であってもよい。
（実施形態１）
図３は、本発明の第１の実施形態である有機ＥＬ表示装置の概略図である。図４（ａ）、図４（ｂ）、図４（ｃ）は図３のＡ部、Ｂ部、Ｃ部の拡大図である。
In the following embodiments, an organic EL element will be described as an example. Instead of the organic EL layer (organic EL element) 23, current-driven light emission in which an inorganic EL, an LED, or another light emitting material is sandwiched between a pair of upper and lower electrodes. It may be an element.
(Embodiment 1)
FIG. 3 is a schematic view of the organic EL display device according to the first embodiment of the present invention. 4A, 4B, and 4C are enlarged views of portions A, B, and C of FIG.
図３の表示装置１００は１枚の基板１０からなり、基板面は、表示領域６（内側の２点鎖線領域内）と周辺領域３（内側と外側の２点鎖線で囲まれた領域）とに分けられる。ＥＬ素子を外気から遮断するためにガラスまたは金属性のキャップで基板面を被う場合は、周辺領域３のさらに外側に、封止キャップを接着するための接着領域４が設けられる。 The display device 100 of FIG. 3 includes a single substrate 10, and the substrate surface includes a display region 6 (inside the inner two-dot chain line region) and a peripheral region 3 (region surrounded by the inner and outer two-dot chain lines). It is divided into. When the substrate surface is covered with a glass or metallic cap in order to shield the EL element from the outside air, an adhesive region 4 for adhering the sealing cap is provided on the outer side of the peripheral region 3.
表示領域６は、図１に示した有機ＥＬ素子部２０と駆動回路１９とが行方向及び列方向に配列して（マトリクス状に）配置された領域である。本実施形態では、電源線１６が行方向に設けられており、ゲート信号線と平行である。電源線１６を縦方向にゲート信号線に平行に設けることもできる。 The display area 6 is an area in which the organic EL element unit 20 and the drive circuit 19 shown in FIG. 1 are arranged in a row direction and a column direction (in a matrix). In the present embodiment, the power supply line 16 is provided in the row direction and is parallel to the gate signal line. The power supply line 16 can also be provided in the vertical direction in parallel with the gate signal line.
周辺領域３には、不図示の列制御回路、コラムシフトレジスタ、ロウシフトレジスタなどの周辺回路が配置されている。これらの回路は、駆動回路１９と同一プロセスで形成され、駆動回路１９のＴＦＴと同じ半導体層１１その他の層で形成される。 In the peripheral region 3, peripheral circuits such as a column control circuit, a column shift register, and a row shift register (not shown) are arranged. These circuits are formed by the same process as the drive circuit 19 and are formed by the same semiconductor layer 11 and other layers as the TFTs of the drive circuit 19.
映像信号、制御信号、電源などは、外部接続端子５を介して外部より供給される。図３では外部接続端子５は基板１０の下の１辺に配置されているが、左右の２辺に配置されていてもよい。 A video signal, a control signal, a power source, and the like are supplied from the outside via the external connection terminal 5. In FIG. 3, the external connection terminals 5 are arranged on one lower side of the substrate 10, but may be arranged on two left and right sides.
周辺領域３には、駆動回路（画素回路）に電力供給を行う第１の電源配線（以下電力供給線という）１と、第２の電源配線（以下共通電位線という）２１との２系統の電源配線が配置されている。 The peripheral region 3 includes two systems of a first power supply wiring (hereinafter referred to as a power supply line) 1 for supplying power to a drive circuit (pixel circuit) and a second power supply wiring (hereinafter referred to as a common potential line) 21. Power supply wiring is arranged.
電力供給線１と共通電位線２１は表示領域６の周囲に沿うように配置され、それぞれ外部接続端子５に終端される。 The power supply line 1 and the common potential line 21 are arranged along the periphery of the display area 6 and are terminated at the external connection terminals 5, respectively.
電力供給線１には電源線１６が共通に接続されており、外部接続端子５の１つまたは２以上に接続されている。電力供給線１は、外部接続端子５を通じて外部の電源（不図示）から与えられる一定電圧に保たれている。共通電位線２１は、有機ＥＬ素子部２０の第２電極２４を外部接続端子５まで導くために設けられた配線である。 A power supply line 16 is commonly connected to the power supply line 1 and is connected to one or more of the external connection terminals 5. The power supply line 1 is maintained at a constant voltage supplied from an external power source (not shown) through the external connection terminal 5. The common potential line 21 is a wiring provided to guide the second electrode 24 of the organic EL element unit 20 to the external connection terminal 5.
図５は周辺領域３のＡ−Ａ’に沿った断面図、図６はＢ−Ｂ’に沿った断面図である。 FIG. 5 is a cross-sectional view taken along A-A ′ of the peripheral region 3, and FIG. 6 is a cross-sectional view taken along B-B ′.
電力供給線１と共通電位線２１は、抵抗を小さくするために、ともに駆動回路（画素回路）１９のソース／ドレイン電極１３，１４と同じ金属で形成されている。ソース／ドレイン電極１３，１４の成膜とパタンニングの工程で、電力供給線１と共通電位線２１も同時に形成される。 The power supply line 1 and the common potential line 21 are both made of the same metal as the source / drain electrodes 13 and 14 of the drive circuit (pixel circuit) 19 in order to reduce the resistance. The power supply line 1 and the common potential line 21 are also formed at the same time in the process of forming and patterning the source / drain electrodes 13 and 14.
本実施形態では電源線１６はゲートメタルと同じプロセスで形成されるので、電源線１６と電力供給線１ａ，１ｂは、その交点近くで、図６と類似の構造で接続される。 In this embodiment, since the power supply line 16 is formed by the same process as the gate metal, the power supply line 16 and the power supply lines 1a and 1b are connected with a structure similar to that in FIG. 6 near the intersection.
共通電位線２１は、絶縁層（平坦化膜）２８を挟んで第２電極２４よりも下層に形成されているので、コンタクトホール２を介して、第２電極２４に接続されている。 Since the common potential line 21 is formed below the second electrode 24 with the insulating layer (planarization film) 28 interposed therebetween, the common potential line 21 is connected to the second electrode 24 through the contact hole 2.
パッシベーション膜２５はコンタクトホール２の上では、表示領域６と同じ厚さを持ち、その外側で徐々に薄くなる。封止キャップの接着される領域４までには到達しない。 The passivation film 25 has the same thickness as that of the display region 6 on the contact hole 2 and gradually becomes thinner on the outside thereof. It does not reach the region 4 to which the sealing cap is bonded.
コンタクトホール２は、周辺領域３に延長された第２電極２４の四辺に沿って連続して四角状に形成された開口である。コンタクトホール２は飛び飛びに複数設けられていてもよいが、その場合は平坦化膜２８の分離効果を保つ程度に間隔を狭くしておく。 The contact hole 2 is an opening formed continuously in a square shape along the four sides of the second electrode 24 extended to the peripheral region 3. A plurality of contact holes 2 may be provided in a flying manner, but in that case, the interval is made narrow enough to maintain the separation effect of the planarization film 28.
また、第２電極２４と共通電位線２１との接触抵抗を少なくするため、できるだけコンタクトホール２の面積を大きくする。そのため、共通電位線１の幅いっぱいにコンタクトホールを開けることが好ましい。 Further, in order to reduce the contact resistance between the second electrode 24 and the common potential line 21, the area of the contact hole 2 is increased as much as possible. Therefore, it is preferable to open the contact hole to the full width of the common potential line 1.
電力供給線１は共通電位線２１を挟んでその両側に（コンタクトホール２を挟んでその両側に配されるともいえる）並行に２本設けられる。電力供給線１は共通電位線２１に沿って配置される。 Two power supply lines 1 are provided in parallel on both sides of the common potential line 21 (which can be said to be arranged on both sides of the contact hole 2). The power supply line 1 is disposed along the common potential line 21.
図３では、左右の２辺の周辺領域３で、共通電位線２１を挟んで２本の電力供給線１ａと１ｂが設けられている。これ以外に、外部接続端子５が配置される下辺において、電力供給線１が共通電位線２を挟んで２本に分割されていても良い。また、外部接続端子５が配置されている辺と対向する上辺において分割されていてもよい。下辺および左右辺で、あるいは全辺で２本にしてもよい。 In FIG. 3, two power supply lines 1a and 1b are provided in the peripheral region 3 on the left and right sides with the common potential line 21 interposed therebetween. In addition to this, on the lower side where the external connection terminal 5 is disposed, the power supply line 1 may be divided into two with the common potential line 2 interposed therebetween. Moreover, you may divide | segment in the upper side facing the edge | side where the external connection terminal 5 is arrange | positioned. Two may be provided on the lower side and the left and right sides, or on all sides.
分割された電力供給線１は、図６に示す端部Ｂ−Ｂ’で下層の導電材５１を介して迂回接続される。また、電源線１６も同じ構造で２本の電力供給線１ａと１ｂに接続されている。下層の導電材５１はゲートメタル層１２と同時に形成されていることが好ましい。 The divided power supply line 1 is detoured via the lower conductive material 51 at the end B-B ′ shown in FIG. 6. The power supply line 16 is also connected to the two power supply lines 1a and 1b with the same structure. The lower conductive material 51 is preferably formed simultaneously with the gate metal layer 12.
コンタクトホール２は、平坦化膜２８を分断することによって平坦化膜を通した面方向の水分侵入路を遮断する役割も果たしている。 The contact hole 2 also plays a role of blocking the surface water intrusion path through the planarizing film by dividing the planarizing film 28.
コンタクトホール２によって平坦化膜２８は、表示領域側と基板端辺側の内外２つに分離される。これによって平坦化膜２８を通って侵入する水分を表示領域６内にまで侵入させず、コンタクトホール２のところで食い止めることができる。 The contact hole 2 separates the planarizing film 28 into two parts on the display region side and the substrate edge side. As a result, moisture that enters through the planarizing film 28 can be stopped at the contact hole 2 without entering the display region 6.
先にも述べたとおり、コンタクトホール２は、パッシベーション膜の厚さ確保のため、基板の端あるいは接着領域４の内縁から一定距離はなれて配置することが求められる。加えて、コンタクトホール２は、表示領域の有機ＥＬ層の位置ずれマージンを確保するために、表示領域６の外縁に対しても一定の距離を確保して配置することが求められる。 As described above, the contact hole 2 is required to be arranged at a predetermined distance from the edge of the substrate or the inner edge of the adhesion region 4 in order to secure the thickness of the passivation film. In addition, the contact hole 2 is required to be arranged with a certain distance from the outer edge of the display area 6 in order to ensure a margin of misalignment of the organic EL layer in the display area.
本実施形態は、電力供給線１を周辺領域３の少なくとも一部で２本設けて、一方を表示領域６の外縁と共通電位線２１の内縁の間に配置し、もう一方を共通電位線２１の外縁と封止キャップ接着領域４の内縁との間に配置する。後者はパッシベーション膜２５の厚さが薄くなる領域と重なっていてもよい。なお、キャップ封止をしないときは接着領域内縁は基板端に置き換えることができる。 In this embodiment, two power supply lines 1 are provided in at least a part of the peripheral region 3, one is arranged between the outer edge of the display region 6 and the inner edge of the common potential line 21, and the other is the common potential line 21. Between the outer edge of the sealing cap and the inner edge of the sealing cap bonding region 4. The latter may overlap with a region where the thickness of the passivation film 25 is reduced. When the cap is not sealed, the inner edge of the adhesion region can be replaced with the substrate end.
２本の電力供給線１を共通電位線２１の両側に配置することにより、電力供給線１全体としての幅を大きくすることができ、電力供給線１の配線抵抗が小さくなり、大きな電流が流れても電圧降下が少ない。 By arranging the two power supply lines 1 on both sides of the common potential line 21, the width of the power supply line 1 as a whole can be increased, the wiring resistance of the power supply line 1 is reduced, and a large current flows. But the voltage drop is small.
今、共通電位線２１の必要な最小配線幅をＡ、電力供給線１の必要な最小配線幅をＢとする。コンタクトホール２の面積をできるだけ広くすると、共通電位線２１とほぼ同じ幅Ａになる。その外側に必要な距離マージンをＭ１、内側に必要な距離マージンをＭ２とする。 Now, let A be the minimum wiring width required for the common potential line 21 and B be the minimum wiring width required for the power supply line 1. When the area of the contact hole 2 is made as large as possible, the width A becomes almost the same as the common potential line 21. A distance margin necessary for the outside is M1, and a distance margin necessary for the inside is M2.
従来のように電力供給線１を共通電位線２１の内側にのみ配置すると、コンタクトホール内側にＢの幅が必要で、これがＭ２より大きいときは全体としての額縁幅がＡ＋Ｂ＋Ｍ１になる。電力供給線１を共通電位線２１の外側にのみ配置したときはＡ＋Ｂ＋Ｍ２である。 When the power supply line 1 is disposed only inside the common potential line 21 as in the conventional case, the width of B is required inside the contact hole. When this is larger than M2, the frame width as a whole becomes A + B + M1. When the power supply line 1 is arranged only outside the common potential line 21, A + B + M2.
本実施形態のように電力供給線１をｂ１とｂ２（ｂ１＋ｂ２＝Ｂ）の幅の２本に分割し、これがそれぞれＭ１、Ｍ２より小さくなるようにすると、全体の額縁幅はＡ＋Ｍ１＋Ｍ２になり、上の２つの従来値より小さくなる。 If the power supply line 1 is divided into two lines having widths b1 and b2 (b1 + b2 = B) as in this embodiment, and these are made smaller than M1 and M2, respectively, the entire frame width becomes A + M1 + M2, It becomes smaller than these two conventional values.
このように電力供給線１を２本に分割することは額縁面積を小さくすることにも有効である。
（実施形態２）
図７は本発明の表示装置の第２の実施形態を示す概略図である。第１の実施形態と同じ部分には同じ符号をつけた。表示領域のＥＬ素子と駆動回路は第１の実施形態と同じである。
Dividing the power supply line 1 into two in this way is also effective in reducing the frame area.
(Embodiment 2)
FIG. 7 is a schematic view showing a second embodiment of the display device of the present invention. The same parts as those in the first embodiment are denoted by the same reference numerals. The EL element and the drive circuit in the display area are the same as those in the first embodiment.
周辺領域のＣ−Ｃ‘断面を図８に示す。 FIG. 8 shows a C-C ′ cross section of the peripheral region.
電力供給線１は実施形態１では２つに分割されていたが、本実施形態では１本にし、共通電位線２１の内側（共通電位線の片側）、すなわち表示領域６に近い側に、共通電位線２１に並列して（共通電位線２１に沿って）設ける。なお、共通電位線の片側とはコンタクトホールの片側ともいえる。 Although the power supply line 1 is divided into two in the first embodiment, the power supply line 1 is divided into one in the present embodiment, and is shared inside the common potential line 21 (one side of the common potential line), that is, on the side close to the display region 6. It is provided in parallel with the potential line 21 (along the common potential line 21). Note that one side of the common potential line can be said to be one side of the contact hole.
第２電極２４と共通電位線２１とは、直接には接触せず間に別のメタル層２９を挟んでいる。これは第２電極と共通電位線の接触抵抗を小さくするためである。もともと接触抵抗が小さければメタル層２９は必ずしも必要ではない。図８のように、メタル層２９は、第１電極２２と同じ面に、同じ材料で、かつ同じ工程で形成されることが好ましい。 The second electrode 24 and the common potential line 21 are not in direct contact with each other and sandwich another metal layer 29 therebetween. This is to reduce the contact resistance between the second electrode and the common potential line. If the contact resistance is originally low, the metal layer 29 is not always necessary. As shown in FIG. 8, the metal layer 29 is preferably formed on the same surface as the first electrode 22 with the same material and in the same process.
実施形態１で説明したように、コンタクトホール２の外縁から接着領域４までは一定以上の距離を開けておかねばならない。 As described in the first embodiment, it is necessary to keep a certain distance from the outer edge of the contact hole 2 to the bonding region 4.
メタル層２９を導入することにより接触抵抗が低くなると、コンタクトホール２の幅を共通電位線２１の幅よりも狭くすることができる。このとき、共通電位線２１の一部を、電力供給線１とは反対側つまり外側に幅を広げ、コンタクトホールよりはみ出した形で（外側に延びて幅が広がった形で）、電力供給線１と並行に配置する。つまり、この場合の第２の電源配線は、コンタクトホールで第２電極に接触した共通電位線２１ａと、コンタクトホールから拡幅された共通電位線２１ｂの２つの部分からなる。ただし、コンタクトホール２の幅は実施形態１よりも狭くするので、共通電位線２１ａの幅は狭くなるが、共通電位線２１ｂと合わせた幅は、配線抵抗が大きくならないよう、実施形態１と同じ幅に保たれている。 When the contact resistance is lowered by introducing the metal layer 29, the width of the contact hole 2 can be made narrower than the width of the common potential line 21. At this time, a part of the common potential line 21 is widened to the side opposite to the power supply line 1, that is, outside, and protrudes from the contact hole (extends outside and widens), and the power supply line 1 in parallel. In other words, the second power supply wiring in this case is composed of two parts: a common potential line 21a in contact with the second electrode through the contact hole, and a common potential line 21b widened from the contact hole. However, since the width of the contact hole 2 is narrower than that of the first embodiment, the width of the common potential line 21a is narrower, but the width combined with the common potential line 21b is the same as that of the first embodiment so that the wiring resistance does not increase. The width is kept.
共通電位線２１ａの幅ａ１はコンタクトホール幅と同じである。共通電位線２１ｂの幅をａ２、電力供給線１の最小配線幅をＢ、コンタクトホールの両側のマージンをＭ１,Ｍ２とする。コンタクトホールの幅ａはａ１に等しい。またａ１＋ａ２＝Ａである。 The width a1 of the common potential line 21a is the same as the contact hole width. The width of the common potential line 21b is a2, the minimum wiring width of the power supply line 1 is B, and the margins on both sides of the contact hole are M1 and M2. The width a of the contact hole is equal to a1. Further, a1 + a2 = A.
電力供給線１はコンタクトホール２に対して内側に配置されるので、内側では表示領域までの幅がＢだけ必要になり、最小マージンＭ２より広くなる。一方、コンタクトホールより外側では、接着領域までのマージンＭ１の範囲内で共通電位線２１ｂの幅ａ２を吸収できるとき、すなわちａ２＜Ｍ１の成り立つときは、外側の必要幅はＭ１である。 Since the power supply line 1 is disposed on the inner side with respect to the contact hole 2, only the width B to the display area is required on the inner side, which is wider than the minimum margin M2. On the other hand, outside the contact hole, when the width a2 of the common potential line 21b can be absorbed within the margin M1 up to the bonding region, that is, when a2 <M1, the required width outside is M1.
したがって全体の額縁幅はａ＋Ｂ＋Ｍ１となり、従来幅Ａ＋Ｂ＋Ｍ１よりも狭くできることがわかる。 Therefore, it can be seen that the entire frame width is a + B + M1, which can be narrower than the conventional width A + B + M1.
ａ２＞Ｍ１が成り立ち、Ｍ１の範囲内で共通電位線２１ｂの幅ａ２を吸収できないときは、外側の必要幅はａ２、全体の額縁幅はａ１＋ａ２＋ＢすなわちＡ＋Ｂである。これも従来幅より狭い。 When a2> M1 holds and the width a2 of the common potential line 21b cannot be absorbed within the range of M1, the outer required width is a2, and the entire frame width is a1 + a2 + B, that is, A + B. This is also narrower than the conventional width.
このように、本実施形態のようにコンタクトホール幅ａが共通電位線の幅Ａより狭くできるときは、共通電位線をコンタクトホールより外側に広げることによって、額縁を狭くすることができる。 As described above, when the contact hole width a can be narrower than the common potential line width A as in the present embodiment, the frame can be narrowed by widening the common potential line outside the contact hole.
上記の額縁幅ａ＋Ｂ＋Ｍ１またはＡ＋Ｂを、第１の実施形態の額縁幅Ａ＋Ｍ１＋Ｍ２と比較すると、Ｍ１の範囲内で共通電位線の幅Ａを吸収できて、かつａ２＞Ｂ−Ｍ２のときに、第１の実施形態の額縁幅より狭くなる。つまり、コンタクトホール幅ａが共通電位線の幅Ａより十分小さくなり、電力供給線１を１本にしたことによる増大を吸収できるなら、全体としての額縁幅が第１実施形態よりも狭くなる。 When the frame width a + B + M1 or A + B is compared with the frame width A + M1 + M2 of the first embodiment, the width A of the common potential line can be absorbed within the range of M1, and the first is satisfied when a2> B−M2. It becomes narrower than the frame width of the embodiment. That is, if the contact hole width a is sufficiently smaller than the width A of the common potential line and the increase due to the single power supply line 1 can be absorbed, the overall frame width becomes narrower than that of the first embodiment.
電力供給線１をコンタクトホール２に対して外側に配置し、共通電位線１をコンタクトホール２から内側に広げることも可能である。額縁幅は上記の結果でＭ１とＭ２を置き換えるだけであり、結論は変わらない。 It is also possible to dispose the power supply line 1 outside the contact hole 2 and extend the common potential line 1 from the contact hole 2 to the inside. The frame width only replaces M1 and M2 with the above results, and the conclusion remains the same.
外部接続端子５のある下辺では、電力供給線１に流れる電流が大きいために、電力供給線１の幅Ｂを左右辺のそれより大きくすることが好ましい。このような場合、上の条件ａ２＞Ｂ−Ｍ２が成り立たず、第２の実施形態の構成にすると額縁がかえって広がってしまう。そのような場合は、左右の２辺では第２の実施形態の構成を採用し、下辺では第１の実施形態の構成を採用するというように、辺によって第１と第２の実施形態の構成を使い分けることも有効である。 Since the current flowing through the power supply line 1 is large at the lower side where the external connection terminal 5 is located, the width B of the power supply line 1 is preferably larger than that of the left and right sides. In such a case, the above condition a2> B-M2 does not hold, and if the configuration of the second embodiment is adopted, the frame will instead spread. In such a case, the configuration of the first and second embodiments is adopted depending on the side, such as adopting the configuration of the second embodiment on the left and right sides and adopting the configuration of the first embodiment on the lower side. It is also effective to use different types.
以上の２つの実施形態で説明したように、本発明は、表示領域の周囲を取り囲み水分侵入経路を遮断するコンタクトホールの両サイドに、電力供給線と共通電位線のいずれかの電源配線を設ける。これにより電源配線の幅を広く取ることができて、電源配線の電圧降下を防ぐことができる。また、表示領域の周囲の部分、いわゆる額縁幅を小さくすることができる。
（画素回路）
以下、第１と第２の実施形態に共通の画素回路について、図２を用いて説明する。図２はＥＬ素子とその駆動回路（画素回路）である。
As described in the above two embodiments, in the present invention, either one of the power supply line and the common potential line is provided on both sides of the contact hole that surrounds the display area and blocks the moisture intrusion path. . As a result, the width of the power supply wiring can be increased, and a voltage drop in the power supply wiring can be prevented. Further, a portion around the display area, so-called frame width, can be reduced.
(Pixel circuit)
Hereinafter, a pixel circuit common to the first and second embodiments will be described with reference to FIG. FIG. 2 shows an EL element and its drive circuit (pixel circuit).
駆動トランジスタＭ１のソースは電源線１０３に接続され、ゲートは容量Ｃ１とトランジスタＭ２のソースとに接続され、ドレインはトランジスタＭ４を介してＥＬ素子ＥＬに繋がっている。 The source of the driving transistor M1 is connected to the power supply line 103, the gate is connected to the capacitor C1 and the source of the transistor M2, and the drain is connected to the EL element EL via the transistor M4.
制御線１０４、１０５は駆動回路（画素回路）をプログラミング動作と発光動作に切替えて、トランジスタＭ２−トランジスタＭ４の各スイッチングトランジスタをオン・オフする。プログラミング期間には、トランジスタＭ２，Ｍ３をオン、トランジスタＭ４をオフにして容量Ｃ１に電流値を書き込む。電流データＩ（ｄａｔａ）はデータ信号線１０２、トランジスタＭ３を介して、ゲート−ドレイン間が短絡されたＭ１に流れ、その結果容量Ｃ１に電流値が書き込まれる。 The control lines 104 and 105 switch the driving circuit (pixel circuit) between the programming operation and the light emitting operation, and turn on / off the switching transistors of the transistors M2 to M4. In the programming period, the transistors M2 and M3 are turned on, the transistor M4 is turned off, and a current value is written in the capacitor C1. The current data I (data) flows through the data signal line 102 and the transistor M3 to M1 in which the gate and the drain are short-circuited, and as a result, a current value is written in the capacitor C1.
発光期間には、トランジスタＭ２，Ｍ３はオフ、トランジスタＭ４はオンになる。容量Ｃ１に書き込まれた電流がトランジスタＭ１からＭ４を介してＥＬ素子ＥＬに流れ、流れた電流に応じてＥＬ素子が発光する。 During the light emission period, the transistors M2 and M3 are off and the transistor M4 is on. The current written in the capacitor C1 flows to the EL element EL through the transistors M1 to M4, and the EL element emits light according to the flowing current.
なお、ＥＬ素子の発光制御方法には図２の電流設定方式の他に電圧設定方式がある。本発明はそのいずれにも適用できる。 Note that the EL element emission control method includes a voltage setting method in addition to the current setting method shown in FIG. The present invention can be applied to any of them.
上記の実施形態１及び２の表示装置は、トップエミッション型のＥＬ表示装置であるが、駆動回路（画素回路）が形成された透明基板側から光を取り出すボトムエミッション型のＥＬ表示装置でも適用可能である。この場合、基板に対して下層の第１電極となる画素電極は透明電極が用いられる。上層の第２電極は透明電極であってもよいが、反射光を用いる場合にはアルミ等の金属の電極が用いられる。 The display devices of Embodiments 1 and 2 are top emission type EL display devices, but can also be applied to bottom emission type EL display devices that extract light from the transparent substrate side on which the drive circuit (pixel circuit) is formed. It is. In this case, a transparent electrode is used as the pixel electrode that is the first electrode below the substrate. The second electrode in the upper layer may be a transparent electrode, but a metal electrode such as aluminum is used when reflected light is used.
以上、ＥＬ素子を用いた表示装置を例にあげて説明したが、本発明はそれに限らず、例えばＰＤＰ（Plasma Display Panel）やＦＥＤ（Field Emission Display）等の電流駆動型の表示装置に適用可能である。 The display device using the EL element has been described above as an example. However, the present invention is not limited thereto, and can be applied to a current-driven display device such as a plasma display panel (PDP) or a field emission display (FED). It is.
上述した実施形態１及び２の表示装置は情報表示装置を構成できる。この情報表示装置は携帯電話、携帯コンピュータ、スチルカメラもしくはビデオカメラ等、もしくはそれらの各機能の複数を実現する装置である。情報表示装置は情報入力部を備えている。例えば、携帯電話の場合には情報入力部はアンテナを含んで構成される。ＰＤＡや携帯パソコンの場合には情報入力部はネットワークに対するインターフェース部を含んで構成される。スチルカメラやムービーカメラの場合には情報入力部はＣＣＤやＣＭＯＳなどによるセンサ部を含んで構成される。 The display devices of Embodiments 1 and 2 described above can constitute an information display device. This information display device is a mobile phone, a mobile computer, a still camera, a video camera, or the like, or a device that realizes a plurality of these functions. The information display device includes an information input unit. For example, in the case of a mobile phone, the information input unit includes an antenna. In the case of a PDA or a portable personal computer, the information input unit includes an interface unit for the network. In the case of a still camera or a movie camera, the information input unit includes a sensor unit such as a CCD or CMOS.
以下本発明の実施形態として、上述した本実施形態１又は２に記載の表示装置を用いたデジタルカメラについて説明する。 Hereinafter, as an embodiment of the present invention, a digital camera using the display device described in Embodiment 1 or 2 will be described.
図９は、本実施形態のデジタルスチルカメラシステムの一例のブロック図である。図中、５０はデジタルスチルカメラシステム、５１は撮影部（撮像部）、５２は映像信号処理回路、５３は表示パネル、５４はメモリ、５５はＣＰＵ、５６は操作部を示す。 FIG. 9 is a block diagram of an example of the digital still camera system of the present embodiment. In the figure, 50 is a digital still camera system, 51 is a photographing unit (imaging unit), 52 is a video signal processing circuit, 53 is a display panel, 54 is a memory, 55 is a CPU, and 56 is an operation unit.
図９において、撮像部５１で撮影した映像または、メモリ５４に記録された映像を、映像信号処理回路５２で信号処理し、表示パネル５３で見ることができる。ＣＰＵ５５では、操作部５６からの入力によって、撮影部５１、メモリ５４、映像信号処理回路５２などを制御して、状況に適した撮影、記録、再生、表示を行う。また、表示パネル５３は、この他にも各種電子機器の表示部として利用できる。 In FIG. 9, a video image captured by the imaging unit 51 or a video image recorded in the memory 54 can be signal-processed by the video signal processing circuit 52 and viewed on the display panel 53. The CPU 55 controls the photographing unit 51, the memory 54, the video signal processing circuit 52, and the like by input from the operation unit 56, and performs photographing, recording, reproduction, and display suitable for the situation. In addition, the display panel 53 can be used as a display unit of various electronic devices.
本発明は、基板上に電流駆動型の発光素子と発光素子の駆動電流を制御する画素回路（駆動回路）とを備えた単位画素が複数個配置された表示領域を有する表示装置に利用される。特に電流を流して発光するエレクトロルミネッセンス（ＥＬ）素子をマトリクス状に配置した表示装置に好適に用いられる。 INDUSTRIAL APPLICABILITY The present invention is used for a display device having a display area in which a plurality of unit pixels each including a current-driven light-emitting element and a pixel circuit (drive circuit) that controls a drive current of the light-emitting element are arranged on a substrate. . In particular, it is suitably used for a display device in which electroluminescence (EL) elements that emit light by passing a current are arranged in a matrix.
１ 電力供給線
２ コンタクトホール
３ 周辺領域
４ 接着領域
５ 外部接続端子
６ 表示領域
１０ 基板
２１ 共通電位線
２２ 第１電極
２３ 有機ＥＬ層
２４ 第２電極
２５ パッシベーション膜
２６ 素子分離膜
２８ 平坦化膜
２９ メタル層
DESCRIPTION OF SYMBOLS 1 Power supply line 2 Contact hole 3 Peripheral area | region 4 Adhesion area | region 5 External connection terminal 6 Display area 10 Substrate 21 Common potential line 22 1st electrode 23 Organic EL layer 24 2nd electrode 25 Passivation film 26 Element isolation film 28 Planarization film 29 Metal layer
Claims (4)
前記発光素子は、前記駆動回路を被う絶縁層の上で、下層の第１電極と、上層の第２電極との間に設けられ、
前記第１電極は、前記駆動回路を介して、前記基板上の前記発光素子と前記駆動回路とが配置された領域の周辺に配置された第１の電源配線に接続され、
前記第２電極は、前記領域の周囲を取り囲んで前記絶縁層に開けられたコンタクトホールを介して第２の電源配線に接続されている表示装置であって、
前記基板の少なくとも１辺に沿って、前記コンタクトホールの片側に配置された前記第１の電源配線と、前記コンタクトホールの反対側に配置された前記第１の電源配線又は前記第２の電源配線の拡幅部とが並行に配置されていることを特徴とする表示装置。 On the substrate, a light emitting element and a drive circuit that is provided in a lower layer of the light emitting element via an insulating layer and controls a current flowing through the light emitting element are arranged in a row direction and a column direction, respectively.
The light emitting element is provided on the insulating layer covering the driving circuit, between the lower first electrode and the upper second electrode,
The first electrode is connected to a first power supply wiring disposed around a region where the light emitting element and the driving circuit are disposed on the substrate via the driving circuit,
The second electrode is a display device that is connected to a second power supply line through a contact hole that surrounds the region and is opened in the insulating layer,
The first power supply wiring disposed on one side of the contact hole and the first power supply wiring or the second power supply wiring disposed on the opposite side of the contact hole along at least one side of the substrate The widening part of this is arrange | positioned in parallel, The display apparatus characterized by the above-mentioned.
前記発光素子は下層の第１電極と上層の第２電極との間に設けられ、
前記駆動回路は第１電源配線に接続され、前記第１電極を介して前記発光素子に駆動電流を供給し、
前記第２電極は、前記周辺領域に設けられたコンタクトホールを介して、前記第２電極より下層の第２電源配線に接続され、
前記基板の面内において、前記第１電源配線の少なくとも一部は、前記コンタクトホールを介して前記第２電極に接触している前記第２電源配線の両側に、前記第２電源配線に沿って配置されていることを特徴とする表示装置。 Provided on the substrate are a display area in which a plurality of light emitting elements and a driving circuit for controlling the driving current of the light emitting elements are arranged, and first and second power supply lines for supplying current to the driving circuit. A display device having a peripheral region,
The light emitting element is provided between a lower first electrode and an upper second electrode,
The drive circuit is connected to a first power supply line and supplies a drive current to the light emitting element through the first electrode;
The second electrode is connected to a second power line below the second electrode through a contact hole provided in the peripheral region,
Within the plane of the substrate, at least a part of the first power supply wiring is along the second power supply wiring on both sides of the second power supply wiring contacting the second electrode through the contact hole. A display device characterized by being arranged.
前記発光素子は下層の第１電極と上層の第２電極との間に設けられ、
前記駆動回路は第１電源配線に接続され、前記第１電極を介して前記発光素子に駆動電流を供給し、
前記第２電極は、前記表示領域の周囲に設けられたコンタクトホールを介して、前記第２電極より下層の第２電源配線に接続され、
前記基板の面内において、前記第１電源配線は前記第２電源配線の片側に、前記第２電源配線に沿って配置され、前記第２電源配線は、前記コンタクトホールを介して前記第２電極に接触している部分から、前記第１電源配線が配置される側と反対側に延びて幅が広がっていることを特徴とする表示装置。 A display device having a display region in which a plurality of light emitting elements and a plurality of driving circuits for controlling driving currents of the light emitting elements are arranged on a substrate,
The light emitting element is provided between a lower first electrode and an upper second electrode,
The drive circuit is connected to a first power supply line and supplies a drive current to the light emitting element through the first electrode;
The second electrode is connected to a second power line below the second electrode through a contact hole provided around the display area,
In the plane of the substrate, the first power supply wiring is disposed along one side of the second power supply wiring along the second power supply wiring, and the second power supply wiring is connected to the second electrode through the contact hole. A display device characterized in that the width extends from the portion in contact with the first power supply wiring to the side opposite to the side where the first power supply wiring is disposed.
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