JP2007010956A - 表示装置およびその製造方法。 - Google Patents
表示装置およびその製造方法。 Download PDFInfo
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- JP2007010956A JP2007010956A JP2005191364A JP2005191364A JP2007010956A JP 2007010956 A JP2007010956 A JP 2007010956A JP 2005191364 A JP2005191364 A JP 2005191364A JP 2005191364 A JP2005191364 A JP 2005191364A JP 2007010956 A JP2007010956 A JP 2007010956A
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- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 239000000758 substrate Substances 0.000 claims abstract description 30
- 239000000463 material Substances 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 10
- 238000001312 dry etching Methods 0.000 claims description 8
- 239000012212 insulator Substances 0.000 abstract 6
- 238000005530 etching Methods 0.000 description 22
- 239000004973 liquid crystal related substance Substances 0.000 description 10
- 230000002093 peripheral effect Effects 0.000 description 8
- 229910021417 amorphous silicon Inorganic materials 0.000 description 5
- 230000007547 defect Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 239000003566 sealing material Substances 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- LKJPSUCKSLORMF-UHFFFAOYSA-N Monolinuron Chemical compound CON(C)C(=O)NC1=CC=C(Cl)C=C1 LKJPSUCKSLORMF-UHFFFAOYSA-N 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005401 electroluminescence Methods 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
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Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
- H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Nonlinear Science (AREA)
- Optics & Photonics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Mathematical Physics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
Abstract
【解決手段】基板に設けられた第1導電層と、前記第1導電層上に2層以上の絶縁膜を介して設けられた第2導電層とを有し、前記第1導電層と第2導電層がスルーホールで接続された表示装置であって、前記スルーホール部で、前記2層以上の絶縁膜のうち前記第1導電層側に配置された絶縁膜の開口側面が、前記2層以上の絶縁膜のうち前記第2導電層側に配置された絶縁膜で覆われる部分と露出する部分を有する。
【選択図】 図5
Description
なお、実施例を説明するための全図において、同一機能を有するものは、同一符号を付け、その繰り返しの説明は省略する。
図1および図2において、1は基板(TFT基板)、2は基板(対向基板)、3はシール材、4は液晶材料である。また、図3乃至図7において、100は基板、101はゲート配線、102は第1絶縁膜、103はアモルファスシリコン膜、104はドレイン配線、105はソース電極、106は画素電極、107は第2絶縁膜、108は第3絶縁膜、109は保持容量配線である。
100,500…基板
101…ゲート配線
102,502…第1絶縁膜
103…アモルファスシリコン膜
104…ドレイン配線
105…ソース電極
106…画素電極
107,507…第2絶縁膜
107a…第2絶縁膜の開口底面の外周
107b…第2絶縁膜の開口側面
108,508…第3絶縁膜
108a…第3絶縁膜の開口底面の外周
109…保持容量配線
2…基板
3…シール材
4…液晶材料
502a…第1絶縁膜の開口底面の外周
502b…第1絶縁膜の開口側面
506…上層導電層
509…下層導電層
6…エッチングレジスト
Claims (8)
- 基板に設けられた第1導電層と、前記第1導電層上に2層以上の絶縁膜を介して設けられた第2導電層とを有し、前記第1導電層と第2導電層がスルーホールで接続された表示装置であって、
前記スルーホール部で、前記2層以上の絶縁膜のうち前記第1導電層側に配置された絶縁膜の開口側面は、前記2層以上の絶縁膜のうち前記第2導電層側に配置された絶縁膜で覆われる部分と露出する部分を有することを特徴とする表示装置。 - 前記第1導電層側に配置された絶縁膜の開口底面の外周と、前記第2導電層側に配置された絶縁膜の外周が交差していることを特徴とする請求項1に記載の表示装置。
- 前記基板が複数の画素を有する基板であり、前記第2導電層が画素電極であることを特徴とする請求項1または請求項2に記載の表示装置。
- 前記第1導電層側に配置された絶縁膜と、前記第2導電層側に配置された絶縁膜が異なる材料であることを特徴とする請求項1乃至請求項3のいずれか1項に記載の表示装置。
- 前記第1導電層側に配置された絶縁膜は無機絶縁膜であり、前記第2導電層側に配置された絶縁膜は有機絶縁膜であることを特徴とする請求項4に記載の表示装置。
- 基板上に形成された第1導電層上に絶縁膜を形成する工程と、前記絶縁膜上に第2導電層を形成して前記第1導電層と第2導電層を前記絶縁膜の開口部で接続する工程とを有する表示装置の製造方法であって、
前記絶縁膜を形成する工程は、前記第1導電層上に第1の開口部を有する第1絶縁膜を形成する工程と、
前記第1の開口部の側面を覆う部分と露出する部分があるように、前記第1絶縁膜上に第2絶縁膜を第2の開口部を有して形成する工程とを有することを特徴とする表示装置の製造方法。 - 前記第1の開口部はドライエッチングで形成されることを特徴とする請求項6に記載の表示装置の製造方法。
- 前記第2絶縁膜を第2の開口部を有して形成する工程は、第2絶縁膜の材料を塗布または印刷する工程と、その後開口を形成する工程とを有することを特徴とする請求項7に記載の表示装置の製造方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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JP2005191364A JP4757550B2 (ja) | 2005-06-30 | 2005-06-30 | 表示装置およびその製造方法 |
US11/473,265 US7656468B2 (en) | 2005-06-30 | 2006-06-23 | Display device and manufacturing method of the display device |
CN2006100959983A CN1892334B (zh) | 2005-06-30 | 2006-06-30 | 显示装置及其制造方法 |
Applications Claiming Priority (1)
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JP2005191364A JP4757550B2 (ja) | 2005-06-30 | 2005-06-30 | 表示装置およびその製造方法 |
Publications (3)
Publication Number | Publication Date |
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JP2007010956A true JP2007010956A (ja) | 2007-01-18 |
JP2007010956A5 JP2007010956A5 (ja) | 2008-03-13 |
JP4757550B2 JP4757550B2 (ja) | 2011-08-24 |
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US (1) | US7656468B2 (ja) |
JP (1) | JP4757550B2 (ja) |
CN (1) | CN1892334B (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014103922A1 (ja) * | 2012-12-27 | 2014-07-03 | シャープ株式会社 | 表示素子、表示装置、及び表示素子の製造方法 |
JP2014134659A (ja) * | 2013-01-10 | 2014-07-24 | Japan Display Inc | 配線基板及びその製造方法 |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8631503B2 (en) * | 2007-10-03 | 2014-01-14 | Ebay Inc. | System and methods for key challenge validation |
US8810488B2 (en) * | 2009-07-23 | 2014-08-19 | Sharp Kabushiki Kaisha | Display device and method for driving the same |
CN103048838B (zh) * | 2012-12-13 | 2015-04-15 | 北京京东方光电科技有限公司 | 一种阵列基板、液晶显示面板及驱动方法 |
JP2017162138A (ja) * | 2016-03-09 | 2017-09-14 | 富士ゼロックス株式会社 | 情報処理装置及び情報処理プログラム |
CN207165572U (zh) * | 2017-09-12 | 2018-03-30 | 京东方科技集团股份有限公司 | 一种阵列基板及显示装置 |
JP2024033405A (ja) * | 2022-08-30 | 2024-03-13 | 株式会社ジャパンディスプレイ | 表示装置 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10307305A (ja) * | 1997-03-07 | 1998-11-17 | Toshiba Corp | アレイ基板、液晶表示装置及びそれらの製造方法 |
JP2003195355A (ja) * | 2001-10-22 | 2003-07-09 | Samsung Electronics Co Ltd | 半導体素子の接触部及びその製造方法とそれを含む表示装置用薄膜トランジスタアレイ基板及びその製造方法 |
JP2006018225A (ja) * | 2004-06-30 | 2006-01-19 | Samsung Sdi Co Ltd | 有機電界発光表示装置 |
Family Cites Families (7)
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JP2897095B2 (ja) * | 1993-02-02 | 1999-05-31 | 富士通株式会社 | キャパシタの製造方法 |
JP4031105B2 (ja) | 1998-05-18 | 2008-01-09 | 東芝松下ディスプレイテクノロジー株式会社 | アクティブマトリクス型液晶表示素子 |
KR100697413B1 (ko) * | 1998-07-30 | 2007-03-19 | 마츠시타 덴끼 산교 가부시키가이샤 | 액정 표시 장치, 영상 디스플레이 장치, 정보 처리 장치, 및 그 제조 방법 |
JP4677654B2 (ja) * | 2000-04-19 | 2011-04-27 | 日本電気株式会社 | 透過型液晶表示装置及びその製造方法 |
CN100339953C (zh) * | 2003-02-24 | 2007-09-26 | 友达光电股份有限公司 | 形成接触孔的方法 |
KR100611152B1 (ko) * | 2003-11-27 | 2006-08-09 | 삼성에스디아이 주식회사 | 평판표시장치 |
KR101107682B1 (ko) * | 2004-12-31 | 2012-01-25 | 엘지디스플레이 주식회사 | 표시 소자용 박막 트랜지스터 기판 및 그 제조 방법 |
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- 2005-06-30 JP JP2005191364A patent/JP4757550B2/ja active Active
-
2006
- 2006-06-23 US US11/473,265 patent/US7656468B2/en active Active
- 2006-06-30 CN CN2006100959983A patent/CN1892334B/zh active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10307305A (ja) * | 1997-03-07 | 1998-11-17 | Toshiba Corp | アレイ基板、液晶表示装置及びそれらの製造方法 |
JP2003195355A (ja) * | 2001-10-22 | 2003-07-09 | Samsung Electronics Co Ltd | 半導体素子の接触部及びその製造方法とそれを含む表示装置用薄膜トランジスタアレイ基板及びその製造方法 |
JP2006018225A (ja) * | 2004-06-30 | 2006-01-19 | Samsung Sdi Co Ltd | 有機電界発光表示装置 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014103922A1 (ja) * | 2012-12-27 | 2014-07-03 | シャープ株式会社 | 表示素子、表示装置、及び表示素子の製造方法 |
JP2014134659A (ja) * | 2013-01-10 | 2014-07-24 | Japan Display Inc | 配線基板及びその製造方法 |
Also Published As
Publication number | Publication date |
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CN1892334A (zh) | 2007-01-10 |
US7656468B2 (en) | 2010-02-02 |
US20070002200A1 (en) | 2007-01-04 |
JP4757550B2 (ja) | 2011-08-24 |
CN1892334B (zh) | 2011-04-06 |
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