JP2006286417A - Electron emitting element - Google Patents

Electron emitting element Download PDF

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JP2006286417A
JP2006286417A JP2005105247A JP2005105247A JP2006286417A JP 2006286417 A JP2006286417 A JP 2006286417A JP 2005105247 A JP2005105247 A JP 2005105247A JP 2005105247 A JP2005105247 A JP 2005105247A JP 2006286417 A JP2006286417 A JP 2006286417A
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electron
nitride
compound semiconductor
emitting device
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Akihiro Ishida
明広 石田
Tasuku Inoue
翼 井上
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Shizuoka University NUC
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Abstract

<P>PROBLEM TO BE SOLVED: To provide an electron emitting element widely applicable to a next-generation electronic device such as an electron beam excited display, operable with high efficiency and low voltage, and easy to integrate. <P>SOLUTION: AIN layer/GaN layer/AIN layer three-layered structure in the atomic layer order is generated on an n-type GaN layer having C surface of a nitrogen atom surface on its surface, and thereby an enormous internal electric field by spontaneous polarization or piezopolarization generated in the quantum structure is used, and the electric field emitting electron emitting element drastically reducing a work function is obtained. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、高密度電子源や電子線励起ディスプレイなどに用いることが可能な電子放出素子に関する。   The present invention relates to an electron-emitting device that can be used for a high-density electron source, an electron beam excitation display, and the like.

電子放出源材料としては、タングステンフィラメントのほかに、ダイヤモンド、シリコン（Ｓｉ）、窒化ガリウム（ＧａＮ）を用いた電子放出源が知られている。又、カーボンナノチューブ等の電界放出素子も最近報告されている。更に、外部から電界を加える構成のダイヤモンドを用いた電界放出電子素子も提案されている（特許文献１参照。）。電子放出素子は電子顕微鏡等の電子源のみでなく、今後、電子線励起ディスプレイなど次世代の電子装置に広く応用される可能性があり、効率が良く、低電圧で動作し、且つ、容易に集積化できる電子放出素子が求められている。
特開２００１−２６６７３６号公報 As an electron emission source material, an electron emission source using diamond, silicon (Si), or gallium nitride (GaN) in addition to a tungsten filament is known. Also, field emission devices such as carbon nanotubes have recently been reported. Further, a field emission electronic device using diamond having a configuration in which an electric field is applied from the outside has been proposed (see Patent Document 1). The electron-emitting device may be widely applied not only to an electron source such as an electron microscope but also to next-generation electronic devices such as an electron beam excitation display in the future. It is efficient, operates at a low voltage, and easily There is a need for an electron-emitting device that can be integrated.
JP 2001-266736 A

Ｓｉを用いた電界放出電子素子はＳｉ集積回路技術を基盤として開発されてきているが、通常の電界放出素子の場合、電子親和力が大きく素子表面に高電界が必要である。カーボンナノチューブのようなナノメートルサイズの針では、印加電圧が小さくても針表面に高電界が加わるため比較的低い電圧でも電子放出が可能である。しかし、高い電界強度を用いて電子放出をさせる場合、素子の劣化につながり、低い電界により電子放出ができることが望ましい。   Field emission electronic devices using Si have been developed on the basis of Si integrated circuit technology. In the case of a normal field emission device, the electron affinity is large and a high electric field is required on the surface of the device. A nanometer-sized needle such as a carbon nanotube can emit electrons even at a relatively low voltage because a high electric field is applied to the needle surface even when the applied voltage is small. However, when electron emission is performed using a high electric field strength, it is desirable that the device be deteriorated and the electron emission can be performed with a low electric field.

上記問題点を鑑み、本発明は、高効率、低電圧で動作し、容易に集積化できる電子放出素子を提供することを目的とする。   In view of the above problems, an object of the present invention is to provide an electron-emitting device that operates at high efficiency and low voltage and can be easily integrated.

上記目的を達成するために、本発明の態様は、（イ）ウルツ鉱構造を有し、表面が窒素原子面のＣ面である第１の窒化物系III-V族化合物半導体からなる下地層と、（ロ）厚さ１０原子層未満で、第１の窒化物系III-V族化合物半導体よりも格子定数の小さく、ウルツ鉱構造を有する第２の窒化物系III-V族化合物半導体層からなる第１歪み層と、（ハ）厚さ１０原子層未満の第１の窒化物系III-V族化合物半導体からなる中間層と、（ニ）厚さ１０原子層未満で、第２の窒化物系III-V族化合物半導体層からなる第２歪み層とを含む繰り返し構造を備える電子放出素子であることを要旨とする。特に、この繰り返し構造の最上層を、厚さ１０原子層未満で、第２の窒化物系III-V族化合物半導体層からなる電子放出層としていることを特徴とする。   In order to achieve the above object, an embodiment of the present invention provides (i) an underlayer comprising a first nitride-based III-V group compound semiconductor having a wurtzite structure and the surface being a C-plane with a nitrogen atom plane. And (b) a second nitride-based III-V compound semiconductor layer having a thickness of less than 10 atomic layers and having a lattice constant smaller than that of the first nitride-based III-V compound semiconductor and having a wurtzite structure. (C) an intermediate layer made of a first nitride-based III-V compound semiconductor having a thickness of less than 10 atomic layers, and (d) a second thickness of less than 10 atomic layers, The gist of the present invention is an electron-emitting device having a repeating structure including a second strained layer made of a nitride III-V compound semiconductor layer. In particular, the uppermost layer of this repetitive structure is an electron emission layer having a thickness of less than 10 atomic layers and comprising a second nitride-based III-V compound semiconductor layer.

ＧａＮ等の窒化物系III-V族化合物半導体の結晶は、通常、六方晶系のウルツ鉱構造をとる。この結晶構造では、ｃ軸方向に関して対称面が無く、表面がガリウム（Ｇａ）原子面の場合を「＋Ｃ面」、表面が窒素（Ｎ）原子面の場合を「−Ｃ面」と称する。   A crystal of a nitride III-V compound semiconductor such as GaN usually has a hexagonal wurtzite structure. In this crystal structure, the case where there is no symmetry plane with respect to the c-axis direction and the surface is a gallium (Ga) atomic plane is referred to as “+ C plane”, and the case where the surface is a nitrogen (N) atomic plane is referred to as “−C plane”.

本発明の態様に係る電子放出素子では、第１の窒化物系III-V族化合物半導体と第２の窒化物系III-V族化合物半導体とのヘテロ接合に現れるピエゾ及び自発分極を利用し、電子放出層の電子親和力と仕事関数を大幅に低減できる。これにより、微弱な電界強度でも電子放出が可能となる。   In the electron-emitting device according to the aspect of the present invention, the piezoelectric and spontaneous polarization appearing at the heterojunction between the first nitride-based III-V compound semiconductor and the second nitride-based III-V compound semiconductor are used. The electron affinity and work function of the electron emission layer can be greatly reduced. Thereby, electrons can be emitted even with a weak electric field strength.

本発明によれば、高効率、低電圧で動作し、容易に集積化できる電子放出素子を提供できる。   According to the present invention, it is possible to provide an electron-emitting device that operates with high efficiency and low voltage and can be easily integrated.

本発明者は、既に、窒化物半導体の分極電界を利用するＧａＮ／窒化アルミニウム（ＡｌＮ）／ＧａＮ（より広義には、ＡｌｘＧａ（１−ｘ）Ｎ）３層構造電子放出素子及びＡｌＮ／ＧａＮ共鳴トンネル多重量子井戸層を用いる電子放出素子を提案した（特願２００４−２４７８３２号及び特願２００４−３０７７１９号。）。 The present inventor has already proposed a GaN / aluminum nitride (AlN) / GaN (more broadly, Al x Ga (1-x) N) three-layer electron-emitting device and AlN / Electron emitting devices using GaN resonant tunneling multiple quantum well layers have been proposed (Japanese Patent Application Nos. 2004-247832 and 2004-307719).

特願２００４−２４７８３２号及び特願２００４−３０７７１９号で提案した２種類の素子は、＋Ｃ面（ガリウム面）上に作製したＧａＮ／ＡｌＮ／ＧａＮ３層構造或いは、このＡｌＮ層の代わりにＡｌＮ／ＧａＮ多重量子井戸共鳴トンネル層を用いた構造を持ち、ＡｌＮ或いはＡｌＮ／ＧａＮ共鳴トンネル層に加わるピエゾ及び自発分極により表面付近を空乏層化し、表面電極によりＧａＮ表面に高電界を印加させ電子をバリスティックに放出させるものである。   The two types of devices proposed in Japanese Patent Application Nos. 2004-247832 and 2004-307719 have a GaN / AlN / GaN three-layer structure fabricated on the + C plane (gallium plane) or AlN / GaN instead of this AlN layer. It has a structure using a multiple quantum well resonant tunnel layer, and the surface is depleted by piezo and spontaneous polarization applied to the AlN or AlN / GaN resonant tunnel layer, and a high electric field is applied to the GaN surface by the surface electrode to ballistic electrons. To be released.

それに対し、以下に説明する本発明の第１及び第２の実施の形態は、例えば、ｎ型ＧａＮ上へＡｌＮ／ＧａＮ／ＡｌＮ３層構造を形成し、ＡｌＮに加わる分極電界により電子親和力と仕事関数を大幅に低減し、ＡｌＮ表面から電子を電界放出させるものであり、低い仕事関数により、低電界・高電子密度の電子放出を可能とするものである。但し、以下に示す第１及び第２の実施の形態は、本発明の技術的思想を具体化するための装置や方法を例示するものであって、本発明の技術的思想は、その構成や配置等を下記のものに特定するものでない。本発明の技術的思想は、特許請求の範囲に記載された技術的範囲内において、種々の変更を加えることができる。   On the other hand, in the first and second embodiments of the present invention described below, for example, an AlN / GaN / AlN three-layer structure is formed on n-type GaN, and an electron affinity and a work function are generated by a polarization electric field applied to AlN. The field emission of electrons from the AlN surface is significantly reduced, and the electron emission with a low electric field and high electron density is enabled by a low work function. However, the following first and second embodiments exemplify apparatuses and methods for embodying the technical idea of the present invention, and the technical idea of the present invention includes its configuration and The layout is not specified as follows. The technical idea of the present invention can be variously modified within the technical scope described in the claims.

（第１の実施の形態）
本発明の第１の実施の形態に係る電子放出素子のエネルギーバンド構造を図１に示す。図１に示した電子放出素子は、ｎ型ＧａＮ（第１の窒化物系III-V族化合物半導体）基板或いは下地層となるｎ型ＧａＮ（第１の窒化物系III-V族化合物半導体）薄膜上へ、厚さが４原子層のＡｌＮ（第２の窒化物系III-V族化合物半導体層）からなる第１歪み層、３原子層のＧａＮ（第１の窒化物系III-V族化合物半導体）からなる中間層及び４原子層のＡｌＮ層（第２の窒化物系III-V族化合物半導体層）からなる第２歪み層を成長させたものである。本発明では、ｎ型ＧａＮ（第１の窒化物系III-V族化合物半導体）基板及び下地層となるｎ型ＧａＮ（第１の窒化物系III-V族化合物半導体）薄膜を含んで、「下地層」と称することとする。 (First embodiment)
FIG. 1 shows the energy band structure of the electron-emitting device according to the first embodiment of the present invention. The electron-emitting device shown in FIG. 1 is an n-type GaN (first nitride III-V compound semiconductor) substrate or an n-type GaN (first nitride III-V compound semiconductor) serving as an underlayer. A first strained layer made of AlN (second nitride-based III-V compound semiconductor layer) having a thickness of 4 atomic layers is formed on the thin film, and GaN (first nitride-based III-V group) having a thickness of 4 atomic layers. A second strained layer made of an intermediate layer made of a compound semiconductor) and an AlN layer of a four-atom layer (second nitride-based III-V group compound semiconductor layer) is grown. The present invention includes an n-type GaN (first nitride III-V compound semiconductor) substrate and an n-type GaN (first nitride III-V compound semiconductor) thin film as an underlayer, It will be referred to as a “underlayer”.

第１の窒化物系III-V族化合物半導体としてのＧａＮのａ軸方向の３００Ｋにおける格子常数は０．３１８９ｎｍ、ｃ軸方向の格子常数は０．５１８２ｎｍである。一方、第２の窒化物系III-V族化合物半導体としてのＡｌＮのａ軸方向の３００Ｋにおける格子常数は０．３１１１ｎｍ、ｃ軸方向の格子常数は０．４９８０ｎｍである。このため、第１歪み層及び第２歪み層の面内格子定数は下地層のｎ型ＧａＮ層と同じ格子定数になるように、面に水平方向に引張られ、面に垂直な方向の格子間隔は小さくなる。こうして第１及び第２歪み層には１ｎｍ当り０．８Ｖ程度の巨大なピエゾ及び自発分極による電界が電子放出素子内部へ向かう方向に加わる。   The lattice constant at 300 K in the a-axis direction of GaN as the first nitride-based III-V group compound semiconductor is 0.3189 nm, and the lattice constant in the c-axis direction is 0.5182 nm. On the other hand, the lattice constant at 300 K in the a-axis direction of AlN as the second nitride-based III-V group compound semiconductor is 0.3111 nm, and the lattice constant in the c-axis direction is 0.4980 nm. For this reason, the in-plane lattice constants of the first strain layer and the second strain layer are pulled horizontally in the plane so that the lattice constant is the same as that of the n-type GaN layer of the underlying layer, and the lattice spacing in the direction perpendicular to the plane Becomes smaller. In this way, the first and second strained layers are applied with a giant piezo of about 0.8 V per nm and an electric field due to spontaneous polarization in a direction toward the inside of the electron-emitting device.

この電界は電子放出素子の表面の仕事関数と電子親和力を１．６ｅＶ程度低減する。これは電子放出層として機能する第２歪み層の表面層からの電子放出にたいへん有効に働く。   This electric field reduces the work function and electron affinity of the surface of the electron-emitting device by about 1.6 eV. This works very effectively for electron emission from the surface layer of the second strained layer functioning as an electron emission layer.

電子放出層の表面に１原子層程度のセシウム（Ｃｓ）を付着させたＧａＮ層表面の電子親和力は１．６ｅＶ程度となり、第２歪み層表面では負の値を持つ。表面を酸化セシウム（Ｃｓ2Ｏ）で処理しても同様な効果が得られる。こうして、本発明の第１の実施の形態に係る電子放出層の表面をセシウムや酸化セシウム処理することにより、電子の仕事関数をほぼゼロ付近まで低減することが可能となる。 The electron affinity of the surface of the GaN layer in which about 1 atomic layer of cesium (Cs) is attached to the surface of the electron emission layer is about 1.6 eV, and has a negative value on the surface of the second strained layer. A similar effect can be obtained by treating the surface with cesium oxide (Cs 2 O). Thus, by treating the surface of the electron emission layer according to the first embodiment of the present invention with cesium or cesium oxide, the work function of electrons can be reduced to nearly zero.

図２は、ホットウォールエピタキシー法により作製したＧａＮ層の−Ｃ面（窒素面）の走査型電子顕微鏡（ＳＥＭ）写真を示す。−Ｃ面にＧａＮ層を成長させると、図２中に見られるような六角錐（六角錐台形）構造が形成される。こうした六角錐の頂点に、ＡｌＮ層／ＧａＮ層／ＡｌＮ層構造を作製すれば、外部印加電界の集中が六角錐の頂上で生じるため、電子放出特性を更に改善することができる。   FIG. 2 shows a scanning electron microscope (SEM) photograph of the −C surface (nitrogen surface) of the GaN layer produced by the hot wall epitaxy method. When a GaN layer is grown on the −C plane, a hexagonal pyramid (hexagonal truncated pyramid) structure as shown in FIG. 2 is formed. If an AlN layer / GaN layer / AlN layer structure is formed at the apex of such a hexagonal pyramid, the concentration of an externally applied electric field occurs at the top of the hexagonal pyramid, so that the electron emission characteristics can be further improved.

図１に示した第１歪み層／中間層／第２歪み層構造の各層の厚さは、各層の厚さを１０原子層未満とすれば、様々な厚さでの設計が可能である。各層の厚さが１０原子層を越えて厚くなると、第１歪み層及び第２歪み層の面内格子定数は下地層のｎ型ＧａＮ層と同じ格子定数になるように、面に水平方向に引張られ、面に垂直な方向の格子間隔は小さくなる効果が緩和される。このため、各層の厚さが１０原子層を越える場合は、ピエゾ及び自発分極による電界弱まるので、好ましくない。   The thickness of each layer of the first strained layer / intermediate layer / second strained layer structure shown in FIG. 1 can be designed in various thicknesses if the thickness of each layer is less than 10 atomic layers. When the thickness of each layer exceeds 10 atomic layers, the in-plane lattice constants of the first strained layer and the second strained layer become the same lattice constant as that of the n-type GaN layer of the underlying layer in the horizontal direction on the surface. The effect of reducing the lattice spacing in the direction perpendicular to the surface is reduced. For this reason, when the thickness of each layer exceeds 10 atomic layers, the electric field is weakened due to piezo and spontaneous polarization, which is not preferable.

又、第１歪み層／中間層／第２歪み層の３層構造にこだわらず、第１歪み層／第１中間層／第２歪み層／第２中間層／第３歪み層からなる５層構造、第１歪み層／第１中間層／第２歪み層／第２中間層／第３歪み層／第３中間層／第４歪み層からなるからなる７層構造や、更には９層以上の構造とすることもできる。   In addition, regardless of the three-layer structure of the first strained layer / intermediate layer / second strained layer, five layers composed of the first strained layer / first intermediate layer / second strained layer / second intermediate layer / third strained layer Structure, 7-layer structure comprising first strain layer / first intermediate layer / second strain layer / second intermediate layer / third strain layer / third intermediate layer / fourth strain layer, or more than nine layers It can also be set as this structure.

より一般的には、図１に示したＡｌＮの第１歪み層／ＧａＮの中間層／ＡｌＮの第２歪み層構造の代わりに、Ａｌの組成をｘ，ｙ（１≧ｘ＞ｙ≧０）として、ＡｌｘＧａ（１−ｘ）Ｎの第１歪み層／ＡｌyＧａ（１−y）Ｎの中間層／ＡｌｘＧａ（１−ｘ）Ｎの第２歪み層としても、第２歪み層の面内格子定数は下地層のｎ型ＡｌyＧａ（１−y）Ｎ層と同じ格子定数になるように、面に水平方向に引張られ、面に垂直な方向の格子間隔は小さくなる。こうして第１及び第２歪み層にはピエゾ及び自発分極による電界が電子放出素子内部へ向かう方向に加わり、これにより電子の仕事関数をほぼゼロ付近まで低減し、高効率、低電圧で動作し、容易に集積化できる電子放出素子を実現できる。 More generally, instead of the AlN first strained layer / GaN intermediate layer / AlN second strained layer structure shown in FIG. 1, the composition of Al is x, y (1 ≧ x> y ≧ 0). As the first strained layer of Al x Ga (1-x) N / Al y Ga (1-y) N intermediate layer / Al x Ga (1-x) N second strained layer, The in-plane lattice constant of the layer is pulled in the horizontal direction so that the lattice constant is the same as that of the n-type Al y Ga (1-y) N layer of the underlayer, and the lattice spacing in the direction perpendicular to the surface is reduced. . In this way, an electric field due to piezo and spontaneous polarization is applied to the first and second strained layers in the direction toward the inside of the electron-emitting device, thereby reducing the work function of electrons to nearly zero, and operating at high efficiency and low voltage. An electron-emitting device that can be easily integrated can be realized.

本発明の第１の実施の形態に係る電子放出素子によれば、従来の電界放出型電子放出源に比べ、低い仕事関数を持つため、低駆動電圧で動作し、電子素子とのマッチングが良く集積化も容易である。又、本発明の第１の実施の形態に係る電子放出素子によれば、将来の低電圧動作電子線励起ディスプレイや電子線励起発光素子・照明機器の電子源として利用できる。したがって、将来のフラットパネルディスプレイや照明用電子放出源として利用できる電子放出素子を提供できる。又、高密度の電子放出も可能であり、自由電子レ−ザや加速器等での高密度電子源としても期待できる電子放出素子を提供できる。   The electron-emitting device according to the first embodiment of the present invention has a lower work function than the conventional field-emission electron emission source, and thus operates at a low driving voltage and has good matching with the electronic device. Integration is also easy. In addition, the electron-emitting device according to the first embodiment of the present invention can be used as an electron source for future low-voltage operation electron beam excitation displays, electron beam excitation light-emitting elements / illuminating devices. Therefore, an electron-emitting device that can be used as a future flat panel display or an electron emission source for illumination can be provided. Further, it is possible to emit an electron with a high density, and it is possible to provide an electron-emitting device that can be expected as a high-density electron source in a free electron laser or an accelerator.

（第２の実施の形態）
第１の実施の形態に係る電子放出素子で既に説明したように、図１に示した第１歪み層／中間層／第２歪み層構造の各層の厚さは、様々な厚さでの設計が可能であり、中間層としてのＧａＮ層の厚さを、キャリアのド・ブロイ波長（λ≒１０ｎｍ）程度以下にすれば、第１歪み層及び第２歪み層を障壁層とするＧａＮ層の量子井戸が構成できる。 (Second Embodiment)
As already described in the electron-emitting device according to the first embodiment, the thickness of each layer of the first strained layer / intermediate layer / second strained layer structure shown in FIG. 1 is designed with various thicknesses. If the thickness of the GaN layer as the intermediate layer is made to be about the de Broglie wavelength of carrier (λ≈10 nm) or less, the GaN layer having the first strain layer and the second strain layer as barrier layers A quantum well can be constructed.

より一般的には、第１の窒化物系III-V族化合物半導体層としてのＡｌyＧａ（１−y）Ｎ層の厚さをキャリアのド・ブロイ波長（λ≒１０ｎｍ）程度以下にし、第２の窒化物系III-V族化合物半導体層ＡｌｘＧａ（１−ｘ）Ｎ層を障壁層とするＡｌyＧａ（１−y）Ｎ層の量子井戸を構成すれば、第１の実施の形態に係る電子放出素子と同様に、ＡｌｘＧａ（１−ｘ）Ｎ障壁層としての歪み層にはピエゾ及び自発分極による電界が電子放出素子内部へ向かう方向に加わり、これにより、ＡｌｘＧａ（１−ｘ）Ｎ障壁層の電子の仕事関数をほぼゼロ付近まで低減し、高効率、低電圧で動作し、容易に集積化できる電子放出素子を実現できる。 More generally, the thickness of the Al y Ga (1-y) N layer as the first nitride-based III-V compound semiconductor layer is set to about the carrier de Broglie wavelength (λ≈10 nm) or less, If a quantum well of an Al y Ga (1-y) N layer having the second nitride III-V compound semiconductor layer Al x Ga (1-x) N layer as a barrier layer is configured, the first implementation of as with the electron-emitting device according to the embodiment, the strained layer as Al x Ga (1-x) N barrier layer applied in a direction of an electric field by the piezoelectric and spontaneous polarization is directed to the internal electron-emitting devices, thereby, Al x The electron work function of the Ga (1-x) N barrier layer can be reduced to almost zero, and the electron-emitting device that operates at high efficiency and low voltage and can be easily integrated can be realized.

更に、量子井戸構造を周期的に繰り返すことによって、多重量子井戸構造にしても、障壁層のＡｌｘＧａ（１−ｘ）Ｎ層には、巨大なピエゾ及び自発分極による電界が電子放出素子内部へ向かう方向に加わり、この電界は電子放出素子の表面の仕事関数と電子親和力を低減させ、これにより最上層のＡｌｘＧａ（１−ｘ）Ｎ障壁層である電子放出層からの電子放出が容易になる。特に、多重量子井戸構造の最上層である電子放出層の表面に１原子層程度のセシウム（Ｃｓ）を付着させれば、ＡｌｘＧａ（１−ｘ）Ｎ障壁層表面の電子親和力は低減され、電子放出層の表面では負の値を持つように設計できる。又、多重量子井戸構造の表面を酸化セシウム（Ｃｓ2Ｏ）で処理しても同様な効果が得られる。こうして、多重量子井戸構造の表面をセシウムや酸化セシウム処理することにより、電子の仕事関数をほぼゼロ付近まで低減し、高効率、低電圧で動作し、容易に集積化できる電子放出素子を実現できる。 Furthermore, even if a multi-quantum well structure is formed by periodically repeating the quantum well structure, an electric field due to giant piezo and spontaneous polarization is generated in the Al x Ga (1-x) N layer of the barrier layer. This electric field reduces the work function and electron affinity of the surface of the electron-emitting device, thereby reducing the electron emission from the uppermost Al x Ga (1-x) N barrier layer. It becomes easy. In particular, if about 1 atomic layer of cesium (Cs) is deposited on the surface of the electron emission layer, which is the uppermost layer of the multiple quantum well structure, the electron affinity of the Al x Ga (1-x) N barrier layer surface is reduced. The surface of the electron emission layer can be designed to have a negative value. The same effect can be obtained by treating the surface of the multiple quantum well structure with cesium oxide (Cs 2 O). Thus, by treating the surface of the multiple quantum well structure with cesium or cesium oxide, it is possible to realize an electron-emitting device that can be easily integrated by reducing the work function of electrons to nearly zero, operating with high efficiency and low voltage. .

特に、ＡｌyＧａ（１−y）Ｎ量子井戸層の量子効果によりｎ型ＡｌyＧａ（１−y）Ｎ量子井戸層から電子を共鳴トンネルさせることにより、ＡｌｘＧａ（１−ｘ）Ｎ障壁層表面から電子を電界放出させることにより、低い仕事関数と共鳴トンネル効果により、低電界・高電子密度の電子放出が可能となる。 In particular, Al y Ga by (1-y) n-type Al y Ga (1-y) due to the quantum effect of N quantum well layer N be resonant tunneling of electrons from the quantum well layer, Al x Ga (1-x ) N By field emission of electrons from the surface of the barrier layer, low field and high electron density electrons can be emitted due to the low work function and the resonant tunneling effect.

更に、図２中に示したような六角錐構造を形成し、こうした六角錐の頂点に、多重量子井戸構造構造を作製すれば、外部印加電界の集中が六角錐の頂上で生じるため、電子放出特性を更に改善することができる。   Furthermore, if a hexagonal pyramid structure as shown in FIG. 2 is formed and a multiple quantum well structure is formed at the apex of such a hexagonal pyramid, the concentration of an externally applied electric field occurs at the apex of the hexagonal pyramid. The characteristics can be further improved.

本発明の第２の実施の形態に係る電子放出素子によれば、従来の電界放出型電子放出源に比べ、低い仕事関数を持つため、低駆動電圧で動作し、電子素子とのマッチングが良く集積化も容易である。又、本発明の第２の実施の形態に係る電子放出素子によれば、将来の低電圧動作電子線励起ディスプレイや電子線励起発光素子・照明機器の電子源として利用できる。したがって、将来のフラットパネルディスプレイや照明用電子放出源として利用できる電子放出素子を提供できる。又、高密度の電子放出も可能であり、自由電子レ−ザや加速器等での高密度電子源としても期待できる電子放出素子を提供できる。   The electron-emitting device according to the second embodiment of the present invention has a lower work function than the conventional field emission type electron-emitting source, and thus operates at a low driving voltage and has good matching with the electronic device. Integration is also easy. In addition, the electron-emitting device according to the second embodiment of the present invention can be used as an electron source for future low-voltage operation electron beam excitation displays, electron beam excitation light-emitting elements / illuminating devices. Therefore, an electron-emitting device that can be used as a future flat panel display or an electron emission source for illumination can be provided. Further, it is possible to emit an electron with a high density, and it is possible to provide an electron-emitting device that can be expected as a high-density electron source in a free electron laser or an accelerator.

（その他の実施の形態）
上記のように、本発明は第１及び第２の実施の形態によって記載したが、この開示の一部をなす論述及び図面は本発明を限定するものであると理解すべきではない。この開示から当業者には様々な代替実施の形態、実施例及び運用技術が明らかとなろう。 (Other embodiments)
As described above, the present invention has been described according to the first and second embodiments. However, it should not be understood that the description and drawings constituting a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

例えば、（ＡｌｘＧａ（１−ｘ））zＩｎ（１−z）Ｎ層／（ＡｌyＧａ（１−y））zＩｎ（１−z）Ｎ層等の４元系窒化物系III-V族化合物半導体や、更には５元系以上の窒化物系III-V族化合物半導体により周期的繰り返しを構成しても、第１及び第２の実施の形態と同様に、最上層の窒化物系III-V族化合物半導体からなる電子放出層の電子放出が容易になり、高効率、低電圧で動作し、容易に集積化できる電子放出素子を実現できる。 For example, (Al x Ga (1- x)) z In (1-z) N layer / (Al y Ga (1- y)) z In (1-z) 4 -element nitride-based N layer or the like III Even if the periodic repetition is constituted by a -V group compound semiconductor or a ternary or higher nitride III-V group compound semiconductor, as in the first and second embodiments, the nitriding of the uppermost layer is performed. Electron emission from the electron-emitting layer made of a physical group III-V compound semiconductor is facilitated, and an electron-emitting device that operates at high efficiency and low voltage and can be easily integrated can be realized.

４元系以上の窒化物系III-V族化合物半導体の場合も、多重量子井戸構造にすれば、窒化物系III-V族化合物半導体量子井戸層の量子効果により窒化物系III-V族化合物半導体量子井戸層から電子を共鳴トンネルさせることにより、最上層の窒化物系III-V族化合物半導体障壁層からなる電子放出層の表面から電子を電界放出させることができるので、低い仕事関数と共鳴トンネル効果により、低電界・高電子密度の電子放出が可能となる。   Even in the case of a quaternary nitride III-V compound semiconductor, if a multi-quantum well structure is used, the nitride III-V compound compound is formed by the quantum effect of the nitride III-V compound semiconductor quantum well layer. By resonantly tunneling electrons from the semiconductor quantum well layer, electrons can be emitted from the surface of the electron emission layer consisting of the uppermost nitride-based III-V compound semiconductor barrier layer. The tunnel effect enables electron emission with a low electric field and high electron density.

この様に、本発明はここでは記載していない様々な実施の形態等を含むことは勿論である。したがって、本発明の技術的範囲は上記の説明から妥当な特許請求の範囲に係る発明特定事項によってのみ定められるものである。   As described above, the present invention naturally includes various embodiments not described herein. Therefore, the technical scope of the present invention is defined only by the invention specifying matters according to the scope of claims reasonable from the above description.

本発明における電子放出素子のエネルギーバンド構造図である。It is an energy band structure figure of the electron-emitting element in this invention. −Ｃ面成長ＧａＮ層の走査型電子顕微鏡写真である。It is a scanning electron micrograph of a -C plane growth GaN layer.

Claims (6)

ウルツ鉱構造を有し、表面が窒素原子面のＣ面である第１の窒化物系III-V族化合物半導体からなる下地層と、
厚さ１０原子層未満で、前記第１の窒化物系III-V族化合物半導体よりも格子定数の小さく、ウルツ鉱構造を有する第２の窒化物系III-V族化合物半導体層からなる第１歪み層と、
厚さ１０原子層未満の前記第１の窒化物系III-V族化合物半導体からなる中間層と、
厚さ１０原子層未満で、前記第２の窒化物系III-V族化合物半導体層からなる第２歪み層とを含む繰り返し構造を備え、該繰り返し構造の最上層を、厚さ１０原子層未満で、前記第２の窒化物系III-V族化合物半導体層からなる電子放出層としたことを特徴とする電子放出素子。 A base layer made of a first nitride-based III-V compound semiconductor having a wurtzite structure and the surface being a C-plane of a nitrogen atom plane;
A first nitride-based III-V compound semiconductor layer having a thickness of less than 10 atomic layers, a lattice constant smaller than that of the first nitride-based III-V compound semiconductor, and having a wurtzite structure. A strained layer;
An intermediate layer made of the first nitride-based III-V compound semiconductor having a thickness of less than 10 atomic layers;
A repeating structure including a second strained layer composed of the second nitride-based III-V compound semiconductor layer and having a thickness of less than 10 atomic layers, the uppermost layer of the repeating structure having a thickness of less than 10 atomic layers An electron-emitting device comprising the second nitride-based III-V compound semiconductor layer. 前記繰り返し構造は、前記第１の窒化物系III-V族化合物半導体を量子井戸層、前記第２の窒化物系III-V族化合物半導体を障壁層とする多層量子井戸構造をなすことを特徴とする請求項１に記載の電子放出素子。   The repeating structure has a multilayer quantum well structure in which the first nitride III-V compound semiconductor is a quantum well layer and the second nitride III-V compound semiconductor is a barrier layer. The electron-emitting device according to claim 1. 前記繰り返し構造は、前記下地層としての六角錐台形上に積層されたことを特徴とする請求項１又は２に記載の電子放出素子。   The electron-emitting device according to claim 1, wherein the repetitive structure is stacked on a hexagonal truncated pyramid shape as the base layer. Ａｌの組成をｘ，ｙ（１≧ｘ＞ｙ≧０）として、前記第１の窒化物系III-V族化合物半導体は、ＡｌyＧａ（１−y）Ｎであり、
前記第２の窒化物系III-V族化合物半導体は、ＡｌｘＧａ（１−ｘ）Ｎであることを特徴とする請求項１〜３のいずれか１項に記載の電子放出素子。 The composition of Al is x, y (1 ≧ x> y ≧ 0), and the first nitride-based III-V group compound semiconductor is Al y Ga (1-y) N,
4. The electron-emitting device according to claim 1, wherein the second nitride-based III-V group compound semiconductor is Al x Ga (1-x) N. 5. 前記電子放出層の表面にセシウム膜が形成されたことを特徴とする請求項１〜４のいずれか１項に記載の電子放出素子。   The electron-emitting device according to any one of claims 1 to 4, wherein a cesium film is formed on a surface of the electron-emitting layer. 前記電子放出層の表面に酸化セシウム膜が形成されたことを特徴とする請求項１〜４のいずれか１項に記載の電子放出素子。   The electron-emitting device according to any one of claims 1 to 4, wherein a cesium oxide film is formed on a surface of the electron-emitting layer.
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