JP2006269917A - Laminated wiring board and mounting method thereof - Google Patents

Laminated wiring board and mounting method thereof Download PDF

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JP2006269917A
JP2006269917A JP2005088392A JP2005088392A JP2006269917A JP 2006269917 A JP2006269917 A JP 2006269917A JP 2005088392 A JP2005088392 A JP 2005088392A JP 2005088392 A JP2005088392 A JP 2005088392A JP 2006269917 A JP2006269917 A JP 2006269917A
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brazing material
insulating substrate
wiring board
connection electrode
holding portion
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Kenjiro Fukuda
憲次郎 福田
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Kyocera Corp
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Kyocera Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15172—Fan-out arrangement of the internal vias
    • H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a low cost laminated wiring board having less failures and a structure capable of preventing the misregistration of a brazing material, and to provide a method for mounting the laminated wiring board having less misregistration of the brazing material even if a plurality of insulating substrates and electronic elements are simultaneously bonded together in one heat treatment. <P>SOLUTION: A first insulating substrate 1a, a second insulating substrate 1b, and a third insulating substrate 1c are laminated in this order. Junctions between a plurality of connecting electrodes 12b provided on the surface of the first insulating substrate 1a and a plurality of connecting electrodes 22a provided on the surface of the second insulating substrate 1b, and junctions between a plurality of connecting electrodes 22b provided on the other surface of the second insulating substrate 1b and a plurality of connecting electrodes 32 provided on the surface of the third insulating substrate 1c, are formed of brazing material 4, 5, 6, respectively. A brazing material retaining portion 3 for preventing the misregistration of the brazing material 4, 5, or 6 is formed in at least a part of the connecting electrode. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、電気装置と、絶縁基板の表裏面に配線層が形成された２つの積層配線基板をロウ材を介して上下に積層された積層配線基板に関し、高い実装信頼性と高速信号の伝送に適した実装方法、及び積層配線基板に関するものである。   The present invention relates to a multilayer wiring board in which an electrical device and two multilayer wiring boards having wiring layers formed on the front and back surfaces of an insulating substrate are stacked up and down via a brazing material, with high mounting reliability and high-speed signal transmission The present invention relates to a mounting method suitable for the above and a laminated wiring board.

例えば、Ｓｉを主成分とする半導体素子に代表されるような電気素子は、極めてミクロな配線回路層を有する多数のトランジスタが高度に集積されたものであるが、トランジスタ数のさらなる増加により電気素子は大型化を余儀なくされている。また、このような電気素子においては、信号処理の高速化に対応するために、配線回路層の微細配線化、低抵抗化、および、層間絶縁膜の低誘電率化が図られ、これにより電気素子を構成するこれら配線回路層および層間絶縁膜の機械的強度は低下する傾向にある。   For example, an electrical element represented by a semiconductor element having Si as a main component is a highly integrated structure of a large number of transistors having extremely fine wiring circuit layers. Has been forced to enlarge. Further, in such an electric element, in order to cope with the high speed of signal processing, the wiring circuit layer is miniaturized, the resistance is reduced, and the dielectric constant of the interlayer insulating film is reduced. The mechanical strength of these wiring circuit layers and interlayer insulating films constituting the element tends to decrease.

さらに、近年においては、電気素子の集積技術の発達により電気素子自体に立体構造物や可動部を有する機能部を形成することのできる工法が開発され、例えば、ＭＥＭＳ（Micro Electro Mechanical System）と呼ばれる微細な立体構造や可動部を有する電気素子も実用化されているが、こうした工法により作製された電気素子では立体構造や可動部が応力により破壊されやすいものとなっている。   Furthermore, in recent years, a method of forming a functional part having a three-dimensional structure or a movable part on the electric element itself has been developed due to the development of the integration technology of the electric element, for example, called MEMS (Micro Electro Mechanical System). An electric element having a fine three-dimensional structure and a movable part has been put into practical use. However, in an electric element manufactured by such a method, the three-dimensional structure and the movable part are easily broken by stress.

このような微細（ミクロ）な配線回路層を有する電気素子を、パソコンや携帯電話あるいは液晶表示装置などの電子機器に組み込む場合には、電子機器を作動させる電源線など、マクロな配線とのサイズの調整を図るために、電気素子を、電気素子収納用パッケージ等の積層配線基板やプリント基板等の外部回路基板を用いて階層的に実装する積層配線基板が採用されている。   When an electrical element having such a fine wiring circuit layer is incorporated in an electronic device such as a personal computer, a cellular phone, or a liquid crystal display device, the size of the macro wiring such as a power line for operating the electronic device In order to achieve this adjustment, a multilayer wiring board in which electrical elements are hierarchically mounted using a multilayer wiring board such as an electrical element storage package or an external circuit board such as a printed board is employed.

例えば、図１に示したように、積層配線基板１は、半導体素子等の電気素子２とプリント積層配線基板等の外部回路基板３との間に介装され、電気素子２側にセラミック積層配線基板１ａを配置し、その下層の外部回路基板３側に有機樹脂を含有する樹脂積層配線基板１ｂを配置させた２段構造のボールグリッドアレイパッケージとして提案されている（例えば、特許文献１参照）。   For example, as shown in FIG. 1, the multilayer wiring board 1 is interposed between an electric element 2 such as a semiconductor element and an external circuit board 3 such as a printed multilayer wiring board, and the ceramic multilayer wiring is provided on the electric element 2 side. It has been proposed as a two-stage ball grid array package in which a substrate 1a is disposed and a resin laminated wiring substrate 1b containing an organic resin is disposed on the lower external circuit substrate 3 side (see, for example, Patent Document 1). .

即ち、樹脂積層配線基板１ｂとセラミック積層配線基板１ａとをボール形状の半田５で接合し、次に、前記樹脂積層配線基板１ｂとセラミック積層配線基板１ａとの間に樹脂を注入してアンダーフィルを両基板１ａ、１ｂの間に形成する。しかる後に、電気素子２をセラミック積層配線基板１ａに搭載し、その後、セラミック積層配線基板１ａを介して電気素子２を搭載してなる樹脂積層配線基板１ｂを外部回路基板３へ搭載するために、加熱処理を行って半田ボール６で接合を行うものである。   That is, the resin laminated wiring board 1b and the ceramic laminated wiring board 1a are joined with the ball-shaped solder 5, and then the resin is injected between the resin laminated wiring board 1b and the ceramic laminated wiring board 1a to underfill. Is formed between the two substrates 1a and 1b. Thereafter, in order to mount the electric element 2 on the ceramic multilayer wiring board 1a and then mount the resin multilayer wiring board 1b on which the electric element 2 is mounted via the ceramic multilayer wiring board 1a, Heat treatment is performed to join with the solder balls 6.

前記ボール形状の半田５は、接続用電極間に載置されるが、このような接続用電極の表面は平面となっており、半田５を溶融させて前記接続用電極と接合せしめている。
特開平１０−２４７７０６号公報 The ball-shaped solder 5 is placed between the connection electrodes. The surface of such a connection electrode is flat, and the solder 5 is melted and joined to the connection electrode.
JP-A-10-247706

しかしながら、特許文献１に記載の積層配線基板は、樹脂積層配線基板１ｂとセラミック積層配線基板１ａとの接合、セラミック積層配線基板１ａへの電気素子２の搭載、及び外部回路基板３への樹脂積層配線基板１ｂの接合を、この順に行うため、位置ずれが少なくなるものの、異なる２種類以上のロウ材を用いる必要があり、工程が増えてコストが上昇し、製品の不良率が高まるという問題があった。   However, the multilayer wiring board disclosed in Patent Document 1 is bonded to the resin multilayer wiring board 1b and the ceramic multilayer wiring board 1a, mounted on the ceramic multilayer wiring board 1a, and resin laminated on the external circuit board 3. Since bonding of the wiring board 1b is performed in this order, the positional deviation is reduced, but it is necessary to use two or more different types of brazing materials, and there is a problem that the number of processes increases, the cost increases, and the defect rate of the product increases. there were.

そこで、これを改善するために、発明者らは、１回の熱処理によって半田ボールを用いた接合を行ったが、樹脂積層配線基板１ｂとセラミック積層配線基板１ａと外部回路基板３との接合を同時に行うと、ロウ材として用いたボール形状の半田が接合部の位置からずれるという問題が生じた。   Therefore, in order to improve this, the inventors performed the bonding using the solder balls by one heat treatment, but the bonding between the resin laminated wiring board 1b, the ceramic laminated wiring board 1a, and the external circuit board 3 is performed. At the same time, there arises a problem that the ball-shaped solder used as the brazing material is displaced from the position of the joint.

従って、本発明の目的は、ロウ材の位置ずれを防止できる構造を具備し、不良が少なく、低コストの積層配線基板を提供することである。   Accordingly, an object of the present invention is to provide a low-cost laminated wiring board having a structure capable of preventing the displacement of the brazing material, having few defects.

また、本発明の他の目的は、１回の熱処理によって複数の絶縁基板及び電子素子を同時に接合しても、ロウ材の位置ずれの少ない積層配線基板の実装方法を提供することである。   Another object of the present invention is to provide a method for mounting a laminated wiring board with little brazing material displacement even when a plurality of insulating substrates and electronic elements are simultaneously bonded by a single heat treatment.

本発明の積層配線基板は、第１の絶縁基板、第２の絶縁基板、及び第３の絶縁基板をこの順に積層し、前記第１の絶縁基板の表面に設けられた複数の接続用電極と前記第２の絶縁基板の表面に設けられた複数の接続用電極との間、及び前記第２の絶縁基板の他の表面に設けられた複数の接続用電極と前記第３の絶縁基板の表面に設けられた複数の接続用電極との間、をロウ材によってそれぞれ接合してなり、前記接続用電極の少なくとも一部に、接合時のロウ材のずれを防止するためのロウ材保持部を形成してなることを特徴とする。   The laminated wiring board of the present invention includes a first insulating substrate, a second insulating substrate, and a third insulating substrate laminated in this order, and a plurality of connection electrodes provided on the surface of the first insulating substrate. Between the plurality of connection electrodes provided on the surface of the second insulating substrate and between the plurality of connection electrodes provided on the other surface of the second insulating substrate and the surface of the third insulating substrate And a plurality of connection electrodes provided on each of the connection electrodes are joined by a brazing material, and at least a part of the connection electrodes is provided with a brazing material holding portion for preventing a displacement of the brazing material at the time of joining. It is formed.

特に、前記ロウ材保持部が、底部と、該底部の周囲に形成されたリング状突起と、を具備することが好ましい。   In particular, it is preferable that the brazing material holding portion includes a bottom portion and a ring-shaped protrusion formed around the bottom portion.

前記ロウ材保持部の底部からの前記突起の高さが、該ロウ材保持部の周囲の接続用電極表面からの前記突起の高さよりも大きいことが好ましい。   It is preferable that the height of the protrusion from the bottom of the brazing material holding part is larger than the height of the protrusion from the connection electrode surface around the brazing material holding part.

前記ロウ材保持部の底部からの前記突起の高さが１０μｍ以下であるが好ましい。   The height of the protrusion from the bottom of the brazing material holding part is preferably 10 μm or less.

前記ロウ材の最大径が前記リング状突起の最小径よりも大きいが好ましい。   The maximum diameter of the brazing material is preferably larger than the minimum diameter of the ring-shaped protrusion.

前記ロウ材の全てが、ロウ材保持部によって保持されてなることが好ましい。   It is preferable that all of the brazing material is held by a brazing material holding portion.

本発明の積層配線基板の実装方法は、第１の絶縁基板の主面に設けられた第１接続用電極と、第２の絶縁基板の主面に設けられた第２表側接続用電極とでロウ材を挟持するように第１及び第２の絶縁基板を載置し、さらに該第２の絶縁基板の対向主面に設けられた第２裏側接続用電極と、第３の絶縁基板の主面に設けられた第３接続用電極とでロウ材を挟持するように第２及び第３の絶縁基板を載置し、前記ロウ材の少なくとも一部が、前記接続用電極に設けられたロウ材保持部によって保持され、１回の熱処理によって前記第１、第２及び第３の絶縁基板を同時に接合することを特徴とする。   The method for mounting a multilayer wiring board according to the present invention includes a first connection electrode provided on the main surface of the first insulating substrate and a second front-side connection electrode provided on the main surface of the second insulating substrate. The first and second insulating substrates are placed so as to sandwich the brazing material, and the second backside connection electrode provided on the opposing main surface of the second insulating substrate, and the third insulating substrate main The second and third insulating substrates are placed so that the brazing material is sandwiched between the third connecting electrodes provided on the surface, and at least a part of the brazing material is provided on the connecting electrode. The first insulating substrate is held by a material holding portion, and the first, second, and third insulating substrates are simultaneously bonded by one heat treatment.

特に、対向する第１接続用電極及び第２表側接続用電極の少なくとも一方に前記ロウ材保持部を形成するとともに、対向する第２裏側接続用電極及び第３接続用電極の少なくとも一方に前記ロウ材保持部を形成してなることが好ましい。   In particular, the brazing material holding portion is formed on at least one of the opposing first connection electrode and the second front side connection electrode, and the brazing material is provided on at least one of the opposing second back side connection electrode and the third connection electrode. It is preferable to form a material holding part.

前記ロウ材保持部が、底部と、該底部の周囲に形成されたリング状突起と、を具備し、前記底部からの前記リング状突起の高さが１０μｍ以下であることが好ましい。   It is preferable that the brazing material holding portion includes a bottom portion and a ring-shaped protrusion formed around the bottom portion, and the height of the ring-shaped protrusion from the bottom portion is 10 μm or less.

前記第１と第２の絶縁基板の接合に用いるロウ材の融点と、前記第２と第３の絶縁基板の接合に用いるロウ材の融点とが、略同一であることが好ましい。   It is preferable that the melting point of the brazing material used for joining the first and second insulating substrates is substantially the same as the melting point of the brazing material used for joining the second and third insulating substrates.

本発明は、接続用電極にロウ材保持部を設けることによって、ロウ材をロウ材載置部に保持することができ、１回の熱処理によって複数の絶縁基板及び電子素子を同時に接合しても、ロウ材の位置ずれの少ない積層配線基板の実装方法を実現でき、高歩留り、低コスト、短製造時間の絶縁基板の実装が可能となる。   In the present invention, the brazing material holding portion is provided in the connection electrode, so that the brazing material can be held on the brazing material mounting portion, and a plurality of insulating substrates and electronic elements can be bonded simultaneously by one heat treatment. Therefore, it is possible to realize a method for mounting a multilayer wiring board with little misalignment of the brazing material, and it is possible to mount an insulating substrate with high yield, low cost, and short manufacturing time.

また、このようなロウ材の位置ずれ防止構造を具備することによって、不良が少なく、低コストの積層配線基板を実現できる。   Further, by providing such a brazing material misalignment prevention structure, a low-cost multilayer wiring board with few defects can be realized.

本発明を、図を用いて説明する。図１は、本発明の一実施様態である積層配線基板の実装構造を示す概略断面図である。   The present invention will be described with reference to the drawings. FIG. 1 is a schematic sectional view showing a laminated wiring board mounting structure according to an embodiment of the present invention.

図１によれば、本発明の積層配線基板は、前記第１の絶縁基板、第２の絶縁基板、及び第３の絶縁基板が、上からこの順に積層してなるものである。即ち、積層配線基板１は、第１の絶縁基板１ａと第２の絶縁基板１ｂとが半田ボール５を介して接合されてなるとともに、第２の絶縁基板１ｂと第３の絶縁基板１ｃとが半田ボール６を介して接合されてなるものである。   According to FIG. 1, the laminated wiring board of the present invention is formed by laminating the first insulating substrate, the second insulating substrate, and the third insulating substrate in this order from the top. That is, the multilayer wiring board 1 is formed by bonding the first insulating substrate 1a and the second insulating substrate 1b via the solder balls 5, and the second insulating substrate 1b and the third insulating substrate 1c. It is joined through solder balls 6.

第１の絶縁基板１ａは、例えば、アルミナ、窒化アルミニウム、ジルコニア、窒化珪素等のセラミックスで構成することができるが、電気素子２が脆いシリコンチップ等の場合、シリコンと熱膨張係数が近い材料、例えば熱膨張率３〜５×１０−６/℃の低熱膨張ガラスセラミックなどが望ましい。 The first insulating substrate 1a can be made of ceramics such as alumina, aluminum nitride, zirconia, and silicon nitride, for example. For example, a low thermal expansion glass ceramic having a thermal expansion coefficient of 3 to 5 × 10 −6 / ° C. is desirable.

第２の絶縁基板１ｂは、樹脂基板、アルミナ、窒化アルミニウム、ジルコニア、窒化珪素等のセラミックスで構成することができるが、第１の絶縁基板と第３の絶縁基板の熱膨張率の中間の値を持つものが望ましい。例えば第1の絶縁基板の熱膨張率が３〜５×１０−６/℃であるセラミックス又はガラスセラミックが望ましい。 The second insulating substrate 1b can be made of a ceramic such as a resin substrate, alumina, aluminum nitride, zirconia, silicon nitride, etc., but has an intermediate value of the coefficient of thermal expansion between the first insulating substrate and the third insulating substrate. A thing with is desirable. For example, a ceramic or glass ceramic whose thermal expansion coefficient of the first insulating substrate is 3 to 5 × 10 −6 / ° C. is desirable.

第３の絶縁基板は、樹脂製のプリント基板を用いることができる。樹脂製のプリント基板の熱膨張率が、小さいものが望ましいが、１５〜２０×１０−６/℃であっても良い。 A resin printed board can be used as the third insulating board. Although the thing with a small thermal expansion coefficient of the resin-made printed circuit boards is desirable, 15-20 * 10 < -6 > / degreeC may be sufficient.

第１の絶縁基板１ａは、例えば、図２（ａ）に示したように、主面１１ａ及び対向主面１１ｂに接続用電極１２ａ、１２ｂがそれぞれ設けられ、接続用電極１２ａ、１２ｂ間を電気的に連結するために、ビアホール導体１３が形成されている。さらに、所望により、内部電極１２ｃを形成することもできる。応力緩和による電気素子の保護を主目的とする基板であるため、上部電極と下部電極を最短で結ぶ配線にすることが、最も電気特性上望ましい。   For example, as shown in FIG. 2A, the first insulating substrate 1a is provided with connection electrodes 12a and 12b on the main surface 11a and the opposed main surface 11b, respectively, and the connection electrodes 12a and 12b are electrically connected. A via-hole conductor 13 is formed for the purpose of connection. Furthermore, the internal electrode 12c can be formed if desired. Since it is a substrate whose main purpose is protection of electrical elements by stress relaxation, it is most desirable in terms of electrical characteristics to use a wiring that connects the upper electrode and the lower electrode in the shortest distance.

第２の絶縁基板１ｂは、例えば図２（ｂ）に示したように、主面２１ａ及び対向主面２１ｂに表側接続用電極２２ａ及び裏側接続用電極２２ｂがそれぞれ設けられ、これらの接続用電極２２ａ、２２ｂ間を電気的に連結するために、ビアホール導体２３が形成されている。さらに、所望により、内部電極２２ｃを形成することもできる。近年の小型化、高機能化に伴い、基板の高密度化要求が高まり、それに必要な技術として微細配線、微細ピッチ、薄テープ積層技術が必要である。また、コンデンサー等の機能を内蔵した基板も、実用化されている。   For example, as shown in FIG. 2B, the second insulating substrate 1b is provided with a front-side connection electrode 22a and a back-side connection electrode 22b on the main surface 21a and the opposing main surface 21b, respectively. A via-hole conductor 23 is formed to electrically connect 22a and 22b. Furthermore, the internal electrode 22c can be formed as desired. With recent miniaturization and higher functionality, the demand for higher density of substrates has increased, and fine wiring, fine pitch, and thin tape lamination technology are required as necessary techniques. In addition, a substrate with a built-in function such as a capacitor has been put into practical use.

第３の絶縁基板１ｃは、広く用いられている有機プリント積層配線基板を使用することができる。   As the third insulating substrate 1c, a widely used organic printed wiring board can be used.

これらの基板は、例えば図３のように、電気素子２を第１の絶縁基板１ａの上に半田ボール４を介して実装し、第１の絶縁基板１ａを第２の絶縁基板１ｂの上に半田ボール５を介して実装し、さらに第２の絶縁基板１ｂを第３の絶縁基板１ｃの上に半田ボール６を介して実装している。   For example, as shown in FIG. 3, these substrates have the electric element 2 mounted on a first insulating substrate 1a via solder balls 4, and the first insulating substrate 1a is mounted on the second insulating substrate 1b. The second insulating substrate 1b is mounted on the third insulating substrate 1c via the solder ball 6, and the second insulating substrate 1b is mounted on the third insulating substrate 1c.

電気素子２はシリコン半導体等からなる半導体チップで、第1の絶縁基板は熱膨張率３〜５×１０−６/℃のガラスセラミックスで、第２の絶縁基板は熱膨張率８〜１３×１０−６/℃のセラミック、もしくはガラスセラミックス、第３の絶縁基板は熱膨張率１５〜２０×１０−６/℃の有機プリント基板であることが望ましい。 The electric element 2 is a semiconductor chip made of a silicon semiconductor or the like, the first insulating substrate is a glass ceramic having a thermal expansion coefficient of 3 to 5 × 10 −6 / ° C., and the second insulating substrate is a thermal expansion coefficient of 8 to 13 × 10. It is desirable that the −6 / ° C. ceramic, the glass ceramic, or the third insulating substrate is an organic printed circuit board having a thermal expansion coefficient of 15 to 20 × 10 −6 / ° C.

いずれかの絶縁基板の接続用電極にロウ材保持部３を形成すること、特に対向する接続用電極のうち一方の接続用電極にロウ材保持部３を形成することにより、すべての接合箇所を一回のリフローにて実装することが可能となる。   By forming the brazing material holding part 3 on the connection electrode of any of the insulating substrates, particularly by forming the brazing material holding part 3 on one of the opposing connection electrodes, It becomes possible to mount by one reflow.

本発明によれば、ロウ材保持部３はロウ材のずれを防止できる構造であることが重要である。例えば、図４に示した構造のように、ロウ材保持部３が底部７と、底部７の周囲に形成されたリング状突起とを有する構造であることが好ましい。上部接続用電極４１と下部接続用電極４２とにリング状突起を有する本発明の構造を具備している場合、半田ボール６が位置ずれしないように保持することができる。   According to the present invention, it is important that the brazing material holding portion 3 has a structure capable of preventing the displacement of the brazing material. For example, as in the structure shown in FIG. 4, it is preferable that the brazing material holding portion 3 has a bottom portion 7 and a ring-shaped protrusion formed around the bottom portion 7. When the upper connection electrode 41 and the lower connection electrode 42 have the structure of the present invention having ring-shaped protrusions, the solder balls 6 can be held so as not to be displaced.

このように、接続用電極に設けられたロウ材保持部３が、半田ボール６を保持することが可能となり、接合時にロウ材のずれを防止することができ、半田ボール６のずれによる不良を低減することができ、また、不良低減と工程低減により低コストの積層配線基板を実現できる。さらに、半田ボール６と絶縁基板との接合強度を強めることも可能となる。   As described above, the brazing material holding portion 3 provided on the connection electrode can hold the solder ball 6, and the brazing material can be prevented from being displaced at the time of joining. In addition, a low-cost multilayer wiring board can be realized by reducing defects and reducing processes. Further, it is possible to increase the bonding strength between the solder ball 6 and the insulating substrate.

ロウ材保持部３の底部７からの突起８の高さｈが、突起８の周囲の接続用電極表面からの突起８の高さＨ０よりも大きいことが好ましい。底部７の空間を大きくすることにより、半田ボール６をリング状突起８の内部に十分に保持することが容易になる。なお、突起８の形状や半田ボール６の断面形状が円形でなく、楕円形状、四角形形状やそれらに近似した形状である場合には、突起８の最小径Dが半田ボールの最小径ｄよりも小さくすることにより、同様の効果を得ることができる。 The height h of the protrusion 8 from the bottom 7 of the brazing material holding portion 3 is preferably larger than the height H 0 of the protrusion 8 from the connection electrode surface around the protrusion 8. By enlarging the space of the bottom portion 7, it becomes easy to sufficiently hold the solder ball 6 inside the ring-shaped protrusion 8. In addition, when the shape of the protrusion 8 and the cross-sectional shape of the solder ball 6 are not circular, but are an oval shape, a square shape, or a shape similar thereto, the minimum diameter D of the protrusion 8 is larger than the minimum diameter d of the solder ball. By making it smaller, the same effect can be obtained.

一般の半導体素子を搭載する積層配線基板の場合、ロウ材保持部３の底部からの前記突起の高さが１０μｍ以下であることが好ましい。これにより、配線を高密度に形成することが容易になり、さらにロウ材の保持力を高め、かつ接合強度を高めることができる。   In the case of a multilayer wiring board on which a general semiconductor element is mounted, the height of the protrusion from the bottom of the brazing material holding part 3 is preferably 10 μm or less. As a result, it becomes easy to form wirings at a high density, and it is possible to further increase the holding power of the brazing material and increase the bonding strength.

ロウ材として略球形状の半田ボール６を使用する場合、半田ボール６を保持するために、リング状突起８を形成できるが、リング状突起が図４（ｂ）に示したように略円形形状の場合には、その直径Ｄが、半田ボール６の直径ｄよりも小さく、例えばＤ／ｄ＝０．６〜０．９５、特に０．７〜０．８５とすることが、半田ボール６を保持しやするするために好ましい。   When a substantially spherical solder ball 6 is used as the brazing material, a ring-shaped protrusion 8 can be formed to hold the solder ball 6, but the ring-shaped protrusion has a substantially circular shape as shown in FIG. In this case, the diameter D is smaller than the diameter d of the solder ball 6, for example, D / d = 0.6 to 0.95, particularly 0.7 to 0.85. It is preferable for holding.

なお、図４（ｄ）には、半田ボール６を挟持する上部接続用電極４１と下部接続用電極４２との両方にロウ材保持部３を設けているが、上部接続用電極４１と下部接続用電極４２との一方にロウ材保持部３を設けた構造であっても同様の効果を期待することができる。   In FIG. 4D, the brazing material holding portion 3 is provided on both the upper connection electrode 41 and the lower connection electrode 42 that sandwich the solder ball 6, but the upper connection electrode 41 and the lower connection electrode are provided. The same effect can be expected even in the structure in which the brazing material holding portion 3 is provided on one side of the electrode 42 for use.

また、ロウ材保持部３は、図５（ａ）に示したように、凹部が中央に形成され、底部７が平面でなく斜めに傾斜する構造であっても良い。さらに、図５（ｂ）に示したように、複数の突起８をリング状に配列し、半田ボール６を保持しても良い。   Further, as shown in FIG. 5A, the brazing material holding portion 3 may have a structure in which a concave portion is formed in the center and the bottom portion 7 is inclined not diagonally. Further, as shown in FIG. 5B, a plurality of protrusions 8 may be arranged in a ring shape to hold the solder balls 6.

さらに、前記ロウ材の全てが、ロウ材保持部３によって保持することが、ロウ材の位置ずれを防止しやくできるてんで、好適であることは言うまでもない。   Further, it is needless to say that it is preferable that all of the brazing material is held by the brazing material holding portion 3 because it is easy to prevent the displacement of the brazing material.

次に、本発明の積層配線基板の実装方法を、図１及び図３の実装構造を用いた場合について説明する。   Next, a method for mounting the multilayer wiring board according to the present invention will be described in the case of using the mounting structure shown in FIGS.

本発明の実装方法は、第１の絶縁基板と、第２の絶縁基板と、第３の絶縁基板構造とを半田ボールを用いて１回で接合するものである。まず、第１の絶縁基板１ａの主面に設けられた第１接続用電極１２ｂと、第２の絶縁基板１ｂの主面に設けられた第２表側接続用電極２２ａとで半田ボール５を挟持するように第１及び第２の絶縁基板１ａ、１ｂを載置するとともに、第２の絶縁基板１ｂの対向主面に設けられた第２裏側接続用電極２２ｂと、第３の絶縁基板１ｃの主面に設けられた第３接続用電極３２とで半田ボール６を挟持するように第２及び第３の絶縁基板１ｂ、１ｃを載置する。   According to the mounting method of the present invention, a first insulating substrate, a second insulating substrate, and a third insulating substrate structure are joined at once using solder balls. First, the solder ball 5 is sandwiched between the first connection electrode 12b provided on the main surface of the first insulating substrate 1a and the second front connection electrode 22a provided on the main surface of the second insulating substrate 1b. The first and second insulating substrates 1a and 1b are placed so that the second backside connection electrode 22b provided on the opposing main surface of the second insulating substrate 1b and the third insulating substrate 1c The second and third insulating substrates 1b and 1c are placed so that the solder balls 6 are sandwiched between the third connection electrodes 32 provided on the main surface.

本発明によれば、上記第１の絶縁基板１ａの主面に設けられた第１接続用電極１２ｂ、第２の絶縁基板１ｂの主面及び対向主面に設けられた第２表側接続用電極２２ａ、第２裏側接続用電極２２ｂ、及び第３の絶縁基板１ｃの主面に設けられた第３接続用電極３２等の接続用電極が、例えば図４又は図５に記載されたロウ材保持部３を具備することが重要である。   According to the present invention, the first connection electrode 12b provided on the main surface of the first insulating substrate 1a, the second front-side connection electrode provided on the main surface and the opposing main surface of the second insulating substrate 1b. The connection electrodes such as 22a, the second back side connection electrode 22b, and the third connection electrode 32 provided on the main surface of the third insulating substrate 1c are, for example, held in the brazing material shown in FIG. It is important to have part 3.

なお、図３における電気素子２も、半田ボール４を用いて積層配線基板１と同時に実装することができる。   Note that the electric element 2 in FIG. 3 can also be mounted simultaneously with the multilayer wiring board 1 using the solder balls 4.

例えば、電気素子２を第１の絶縁基板１ａの上に積層する。第１の絶縁基板１ａ上部の接続用電極１２ａのロウ材保持部３に、所望により治具等を用いて、半田ボール４をそれぞれ載置する。次いで、電気素子を、各接続用電極３１が各接続用電極１２ａと対向するように配置する。ここで、半田ボール４と接続用電極の間にフラックスを用いると、半田ボール４の濡れがよくなり、さらには、半田ボール４の保持力を高めることができる。   For example, the electric element 2 is laminated on the first insulating substrate 1a. Solder balls 4 are mounted on the brazing material holding portion 3 of the connection electrode 12a on the first insulating substrate 1a using a jig or the like as desired. Next, the electric element is arranged so that each connection electrode 31 faces each connection electrode 12a. Here, when a flux is used between the solder ball 4 and the connection electrode, the solder ball 4 is better wetted, and the holding force of the solder ball 4 can be increased.

次に、第１の絶縁基板１ａと第２の絶縁基板１ｂの上に積層する。第２の絶縁基板１ｂ上部の表側接続用電極２２ａのロウ材保持部３に、所望により治具等を用いて、半田ボール５をそれぞれ載置する。次いで、第１の絶縁基板１ａの接続用電極１２ｂを、各接続用電極１２ｂが各表側接続用電極２２ａと対向するように配置する。この場合にも、フラックスを用いるのが望ましい。なお、第１の絶縁基板１ａの上に、既に載置してある電気素子２及び半田ボール４がずれないように注意する。   Next, it is laminated on the first insulating substrate 1a and the second insulating substrate 1b. Solder balls 5 are respectively placed on the brazing material holding portion 3 of the front-side connection electrode 22a on the second insulating substrate 1b using a jig or the like as desired. Next, the connection electrodes 12b of the first insulating substrate 1a are arranged so that each connection electrode 12b faces each front-side connection electrode 22a. Also in this case, it is desirable to use a flux. Note that the electric elements 2 and the solder balls 4 already placed on the first insulating substrate 1a are not displaced.

最後に、第２の絶縁基板１ｂと第３の絶縁基板１ｃの上に積層する。第３の絶縁基板１ｃの接続電極３２のロウ材保持部３に、所望により治具等を用いて、半田ボール６をそれぞれ載置する。次いで、第２の絶縁基板１ｂの裏側接続用電極２２ｂを、各裏側接続用電極２２ｂが各表側接続用電極３２と対向するように配置する。この場合にも、フラックスを用いるのが望ましい。なお、第２の絶縁基板１ｂの上に、既に載置してある電気素子２、第１の絶縁基板１ａ及び半田ボール４、５がずれないように注意する。   Finally, it is laminated on the second insulating substrate 1b and the third insulating substrate 1c. Solder balls 6 are respectively placed on the brazing material holder 3 of the connection electrode 32 of the third insulating substrate 1c using a jig or the like as desired. Next, the back side connection electrodes 22b of the second insulating substrate 1b are arranged so that each back side connection electrode 22b faces each front side connection electrode 32. Also in this case, it is desirable to use a flux. Note that the electric element 2, the first insulating substrate 1a, and the solder balls 4 and 5 that are already placed on the second insulating substrate 1b are not displaced.

このようにして得られた積層体を、リフロー用の治具に乗せて、リフロー炉に投入する。この時、これまで用いた半田ボール４、５、６の融点が略同一に設定することが好ましい。これにより、単純な温度プロファイルのリフローを１回行うだけで実装が可能となる。   The laminate thus obtained is placed on a reflow jig and placed in a reflow furnace. At this time, it is preferable that the melting points of the solder balls 4, 5, 6 used so far are set to be substantially the same. As a result, mounting is possible by performing a simple reflow of the temperature profile once.

本発明によれば、本発明の積層配線基板の実装方法は、接続用電極がロウ材保持部３を具備しているため、各絶縁基板を積層する際に、半田ボール４、５及び６のずれを防止することができ、熱処理でロウ材が溶融した際に、各接合部の位置ずれが発生することなく保持されることから、このような１回の熱処理による４段実装が可能となる。   According to the present invention, in the method for mounting a laminated wiring board according to the present invention, since the connecting electrode includes the brazing material holding portion 3, the solder balls 4, 5 and 6 are stacked when the respective insulating boards are laminated. Misalignment can be prevented, and when the brazing material is melted by the heat treatment, each joint is held without being displaced, so that four-stage mounting by such a single heat treatment becomes possible. .

ここで、ロウ材保持部３の底部７から突起８の高さｈは、１０μｍ以下であることが好ましい。これにより、配線を高密度に形成することが容易になり、さらにロウ材の保持力を高め、かつ接合強度を高めることができる。   Here, the height h of the protrusion 8 from the bottom 7 of the brazing material holding part 3 is preferably 10 μm or less. As a result, it becomes easy to form wirings at a high density, and it is possible to further increase the holding power of the brazing material and increase the bonding strength.

なお、積層配線基板を実装する際に、半田ボールを挟持する一対の接続用電極、換言すれば、対向する接続用電極の少なくとも一方にロウ材保持部３を形成して半田ボールを保持すれば良いが、対向する接続用電極の双方にロウ材保持部３材を形成すると本発明の効果をさらに高めることができる。   When the multilayer wiring board is mounted, if the solder ball is held by forming the brazing material holding portion 3 on at least one of the pair of connection electrodes that sandwich the solder ball, in other words, the opposite connection electrode. Although it is good, the effect of the present invention can be further enhanced by forming the brazing material holding member 3 on both of the connecting electrodes facing each other.

本発明の積層配線基板の効果を確認すべく、厚さ０．４ｍｍの第１積層配線基板、および厚さ１ｍｍの第２積層配線基板を作製し、第１積層配線基板の主面にφ０．２ｍｍ、第１積層配線基板の対向主面、第２積層配線基板の主面および対向主面にφ０．９ｍｍの接続用電極パッドをマトリックス状に配設した。続いて、シリコンを主体とし低誘電率の多孔質の絶縁膜を有する、表面積が１００ｍｍ２の評価用の半導体素子を準備した。 In order to confirm the effect of the multilayer wiring board of the present invention, a first multilayer wiring board having a thickness of 0.4 mm and a second multilayer wiring board having a thickness of 1 mm are manufactured, and φ0. 2 mm of connecting electrode pads having a diameter of 0.9 mm were arranged in a matrix on the opposing main surface of the first multilayer wiring substrate, the main surface of the second multilayer wiring substrate, and the opposing main surface. Subsequently, a semiconductor element for evaluation having a surface area of 100 mm 2 and having a porous insulating film mainly composed of silicon and having a low dielectric constant was prepared.

さらに、有機樹脂を主体としたプリント板を準備し、主面にφ０．９ｍｍの接続パッドを配設した。   Furthermore, a printed board mainly composed of an organic resin was prepared, and a connection pad having a diameter of 0.9 mm was disposed on the main surface.

次に、各接続用電極パッドに、表１に示すロウ材ペーストを印刷法にて印刷した。   Next, the solder paste shown in Table 1 was printed on each connection electrode pad by a printing method.

次に、第１積層配線基板の主面上の接続用電極パッド（φ０．２ｍｍ）上に、印刷で用いたのと同様な半田ボール実装用の搭載治具を設置し、φ０．２ｍｍのロウ材ボールを印刷されたロウ材ペースト部に載置した。ボールが乗ったら治具を外し、その上から評価用の半導体素子のロウ材ペーストを印刷された部分が接触するように載置した。   Next, a mounting jig for mounting a solder ball similar to that used for printing is placed on the connection electrode pad (φ0.2 mm) on the main surface of the first multilayer wiring board, and a φ0.2 mm solder The material balls were placed on the printed brazing paste part. When the ball got on the jig, the jig was removed and placed thereon so that the printed portion of the brazing paste of the semiconductor element for evaluation was in contact.

同様にφ０．９ｍｍのパッドには表１の共晶半田ボールＡを用いて、第２積層配線基板の主面にボールを載せ、半導体素子をセットした第１の積層配線基板の対向主面の接続用電極パッドに印刷されたロウ材ペーストの部分が接触するように載置した。   Similarly, the eutectic solder ball A shown in Table 1 is used for the φ0.9 mm pad, the ball is placed on the main surface of the second multilayer wiring board, and the opposing main surface of the first multilayer wiring board on which the semiconductor element is set is formed. The brazing material paste printed on the connecting electrode pad was placed in contact with the pad.

最後に同様にしてプリント板の主面の接続用電極パッドのロウ材ペースト部分に表１のロウ材ボールＢを載せ、半導体素子、第１の積層配線基板が載置された第２の積層配線基板の対向主面のロウ材ペーストが印刷された部分がボールに接触するように載置した。   Finally, in the same manner, the second laminated wiring in which the brazing material balls B shown in Table 1 are placed on the brazing paste portion of the connection electrode pads on the main surface of the printed board, and the semiconductor element and the first laminated wiring board are placed thereon. The part on which the brazing material paste on the opposite main surface of the substrate was printed was placed in contact with the ball.

図１のように配置されたものを、リフロー用の金網治具に載せ、ベルトコンベア−式のリフロー炉に流して実装熱処理を行った。この時のリフロー条件は、窒素雰囲気で、２時間で表１のキープ温度に昇温し、５分キープした後、2時間で降温とした。ロウ材の融点から、溶融不良が出ないように＋２０℃で、ピーク温度を設定している。   The one arranged as shown in FIG. 1 was placed on a reflow wire mesh jig and passed through a belt conveyor type reflow furnace to perform mounting heat treatment. The reflow conditions at this time were as follows. In a nitrogen atmosphere, the temperature was raised to the keeping temperature shown in Table 1 in 2 hours, kept for 5 minutes, and then lowered in 2 hours. From the melting point of the brazing material, the peak temperature is set at + 20 ° C. so as not to cause poor melting.

第１と第２絶縁基板のロウ材をＡ、第２と第３絶縁基板のロウ材をＢとしてその融点を表１に記載した。   Table 1 shows the melting point of the brazing material for the first and second insulating substrates as A and the brazing material for the second and third insulating substrates as B.

実装したものを樹脂埋めし、クロスセクションにより各接合部の最外周の断面を観察し、すべての断面が接合されており、基板の位置ずれがパッド径に対し１０％以下のものを合格とした。接合の合否については、半田とパッドの接触部分がわずかでも欠けているものを不良として不合格と判定した。基板ずれに対しては、パッドピッチ、パッド径の要求スペックから、電気接続性の限度を考慮し、１０％を判定基準とした。

Figure 2006269917
The mounted one is filled with resin, the cross section of the outermost periphery of each joint is observed with a cross section, all cross sections are joined, and the substrate displacement is 10% or less with respect to the pad diameter. . Regarding the acceptance / rejection of the joining, the part where the contact portion between the solder and the pad was slightly missing was judged as a failure. For substrate displacement, 10% was determined as a criterion based on the required specifications of pad pitch and pad diameter in consideration of the limit of electrical connectivity.
Figure 2006269917

本発明の試料Ｎｏ．２〜４、６、７及び９〜１３は、位置ずれ不良率が８％以下、接合不良が０％であった。   Sample No. of the present invention. 2 to 4, 6, 7, and 9 to 13 had a misalignment failure rate of 8% or less and a bonding failure of 0%.

これに対して、ロウ材保持部を具備しない本発明の範囲外の試料Ｎｏ．１，５及び８は、位置ずれ不良率が１５％以上、接合不良が１００％であった。   On the other hand, the sample no. 1, 5 and 8 had a misalignment defect rate of 15% or more and a bonding defect of 100%.

積層配線基板を示す概略断面図である。It is a schematic sectional drawing which shows a laminated wiring board. 積層配線基板に用いられる絶縁基板の構造を示すもので、（ａ）は第１の絶縁基板の概略断面図、（ｂ）は第２の絶縁基板の概略断面図である。The structure of the insulated substrate used for a laminated wiring board is shown, (a) is a schematic sectional drawing of a 1st insulated substrate, (b) is a schematic sectional drawing of a 2nd insulated substrate. 積層配線基板を電気素子及び第３の絶縁基板に接合した状態を示す概略断面図である。It is a schematic sectional drawing which shows the state which bonded the laminated wiring board to the electric element and the 3rd insulating substrate. 本発明の積層配線基板の接続用電極に形成されたロウ材保持部の構造を示すもので、（ａ）は斜視図、（ｂ）は平面図、（ｃ）は概略断面図、（ｄ）は熱処理前の半田ボールを一対の接合用電極が挟持した状態を示す概略断面図である。1 shows a structure of a brazing material holding portion formed on a connection electrode of a laminated wiring board according to the present invention, wherein (a) is a perspective view, (b) is a plan view, (c) is a schematic cross-sectional view, and (d). FIG. 3 is a schematic cross-sectional view showing a state in which a solder ball before heat treatment is sandwiched between a pair of bonding electrodes. 本発明の積層配線基板の接続用電極に形成されたロウ材保持部の他の構造を示すもので、（ａ）は凹部が形成された構造、（ｂ）は突起を有する構造を示す概略断面図である。4A and 4B show another structure of the brazing material holding portion formed on the connection electrode of the multilayer wiring board of the present invention, where FIG. 5A is a schematic cross-sectional view showing a structure in which a recess is formed, and FIG. FIG.

符号の説明Explanation of symbols

１・・・積層配線基板
１ａ・・・第１の絶縁基板
１ｂ・・・第２の絶縁基板
１ｃ・・・第３の絶縁基板
２・・・電気素子
３・・・ロウ材保持部
４、５、６・・・半田ボール
７・・・底部
８・・・突起
１１ａ、２１ａ・・・主面
１１ｂ、２１ｂ・・・対向主面
１２ａ、１２ｂ、２２ａ、２２ｂ・・・接続用電極
１２ｃ、２２ｃ・・・内部電極
１３、２３・・・ビアホール導体
３１・・・電気素子の接続用電極
３２・・・第３の絶縁基板の接続用電極
４１・・・上部接続用電極
４２・・・下部接続用電極
Ｄ・・・突起の直径
ｈ・・・ロウ材保持部の底部からの突起の高さ
Ｈ０・・・突起の周囲の接続用電極表面からの突起の高さ DESCRIPTION OF SYMBOLS 1 ... Laminated wiring board 1a ... 1st insulating substrate 1b ... 2nd insulating substrate 1c ... 3rd insulating substrate 2 ... Electrical element 3 ... Brazing material holding | maintenance part 4, 5, 6 ... solder balls 7 ... bottom 8 ... projections 11a, 21a ... main surfaces 11b, 21b ... opposing main surfaces 12a, 12b, 22a, 22b ... connection electrodes 12c, 22c: internal electrodes 13, 23 ... via-hole conductor 31 ... connection electrode 32 for electrical element ... connection electrode 41 for third insulating substrate ... upper connection electrode 42 ... lower part the height of the protrusions from the connecting electrode D · · · connecting electrode surface of the periphery of the height H 0 · · · projections projecting from the bottom of the diameter h · · · braze holding portion of the projection

Claims (10)

第１の絶縁基板、第２の絶縁基板、及び第３の絶縁基板をこの順に積層し、前記第１の絶縁基板の表面に設けられた複数の接続用電極と前記第２の絶縁基板の表面に設けられた複数の接続用電極との間、及び前記第２の絶縁基板の他の表面に設けられた複数の接続用電極と前記第３の絶縁基板の表面に設けられた複数の接続用電極との間、をロウ材によってそれぞれ接合してなり、前記接続用電極の少なくとも一部に、接合時のロウ材のずれを防止するためのロウ材保持部を形成してなることを特徴とする積層配線基板。 A first insulating substrate, a second insulating substrate, and a third insulating substrate are stacked in this order, and a plurality of connection electrodes provided on the surface of the first insulating substrate and the surface of the second insulating substrate And a plurality of connection electrodes provided on the surface of the third insulating substrate and a plurality of connection electrodes provided on the other surface of the second insulating substrate. It is characterized in that a brazing material holding part for preventing displacement of the brazing material at the time of joining is formed on at least a part of the connecting electrode. Laminated wiring board. 前記ロウ材保持部が、底部と、該底部の周囲に形成されたリング状突起と、を具備することを特徴とする請求項１記載の積層配線基板。 The multilayer wiring board according to claim 1, wherein the brazing material holding portion includes a bottom portion and a ring-shaped protrusion formed around the bottom portion. 前記ロウ材保持部の底部からの前記突起の高さが、該ロウ材保持部の周囲の接続用電極表面からの前記突起の高さよりも大きいことを特徴とする請求項２記載の積層配線基板。 3. The multilayer wiring board according to claim 2, wherein the height of the protrusion from the bottom of the brazing material holding portion is larger than the height of the protrusion from the connection electrode surface around the brazing material holding portion. . 前記ロウ材保持部の底部からの前記突起の高さが１０μｍ以下であることを特徴とする請求項２又は３記載の積層配線基板。 4. The multilayer wiring board according to claim 2, wherein the height of the protrusion from the bottom of the brazing material holding portion is 10 [mu] m or less. 前記ロウ材の最大径が前記リング状突起の最小径よりも大きいことを請求項１〜４のいずれかに記載の積層配線基板。 The multilayer wiring board according to claim 1, wherein a maximum diameter of the brazing material is larger than a minimum diameter of the ring-shaped protrusion. 前記ロウ材の全てが、ロウ材保持部によって保持されてなることを請求項１〜４のいずれかに記載の積層配線基板。 The laminated wiring board according to claim 1, wherein all of the brazing material is held by a brazing material holding portion. 第１の絶縁基板の主面に設けられた第１接続用電極と、第２の絶縁基板の主面に設けられた第２表側接続用電極とでロウ材を挟持するように第１及び第２の絶縁基板を載置し、さらに該第２の絶縁基板の対向主面に設けられた第２裏側接続用電極と、第３の絶縁基板の主面に設けられた第３接続用電極とでロウ材を挟持するように第２及び第３の絶縁基板を載置し、前記ロウ材の少なくとも一部が、前記接続用電極に設けられたロウ材保持部によって保持され、１回の熱処理によって前記第１、第２及び第３の絶縁基板を同時に接合することを特徴とする積層配線基板の実装方法。 First and second brazing members are sandwiched between a first connecting electrode provided on the main surface of the first insulating substrate and a second front-side connecting electrode provided on the main surface of the second insulating substrate. A second backside connection electrode provided on the opposing main surface of the second insulating substrate; a third connection electrode provided on the main surface of the third insulating substrate; The second and third insulating substrates are placed so as to sandwich the brazing material, and at least a part of the brazing material is held by the brazing material holding portion provided in the connection electrode. And mounting the first, second and third insulating substrates simultaneously. 対向する第１接続用電極及び第２表側接続用電極の少なくとも一方に前記ロウ材保持部を形成するとともに、対向する第２裏側接続用電極及び第３接続用電極の少なくとも一方に前記ロウ材保持部を形成してなることを特徴とする請求項７記載の積層配線基板の実装方法。 The brazing material holding portion is formed on at least one of the opposing first connection electrode and the second front side connection electrode, and the brazing material is held on at least one of the opposing second back side connection electrode and the third connection electrode. The method for mounting a laminated wiring board according to claim 7, wherein a portion is formed. 前記ロウ材保持部が、底部と、該底部の周囲に形成されたリング状突起と、を具備し、前記底部からの前記リング状突起の高さが１０μｍ以下であることを特徴とする請求項７又は８記載の積層配線基板の実装方法。 The brazing material holding portion includes a bottom portion and a ring-shaped protrusion formed around the bottom portion, and the height of the ring-shaped protrusion from the bottom portion is 10 μm or less. 9. A method for mounting a laminated wiring board according to 7 or 8. 前記第１と第２の絶縁基板の接合に用いるロウ材の融点と、前記第２と第３の絶縁基板の接合に用いるロウ材の融点とが、略同一であることを特徴とする請求項７〜９のいずれかに記載の積層配線基板の実装方法。

The melting point of the brazing material used for joining the first and second insulating substrates is substantially the same as the melting point of the brazing material used for joining the second and third insulating substrates. The mounting method of the laminated wiring board in any one of 7-9.

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Publication number Priority date Publication date Assignee Title
CN110906053A (en) * 2019-11-12 2020-03-24 上海交通大学 Gas flow regulating valve driven by phase change material based on micro-electro-mechanical system

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