JP2006261463A - Mounting structure of electronic component, recording device provided with this mounting structure, electronic equipment and method of mounting electronic component - Google Patents

Mounting structure of electronic component, recording device provided with this mounting structure, electronic equipment and method of mounting electronic component Download PDF

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JP2006261463A
JP2006261463A JP2005078253A JP2005078253A JP2006261463A JP 2006261463 A JP2006261463 A JP 2006261463A JP 2005078253 A JP2005078253 A JP 2005078253A JP 2005078253 A JP2005078253 A JP 2005078253A JP 2006261463 A JP2006261463 A JP 2006261463A
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solder
electronic component
mounting
hole
asic
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Yukitoshi Yokoyama
幸俊 横山
Teruo Nakayama
照夫 中山
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Seiko Epson Corp
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Seiko Epson Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
    • H01L2224/1751—Function
    • H01L2224/17515—Bump connectors having different functions
    • H01L2224/17517—Bump connectors having different functions including bump connectors providing primarily mechanical support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81007—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting the bump connector during or after the bonding process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Abstract

<P>PROBLEM TO BE SOLVED: To provide a mounting structure in which an electronic component having solder balls, such as an ASIC is mounted by interposition of a dummy cream solder between the electronic component and a mounting surface such as a main control substrate, and to provide a recording device provided with the mounting structure, electronic equipment and a method of mounting the electronic component. <P>SOLUTION: The structure includes the ASIC 10 having a plurality of solder balls 12 formed thereon and the main control substrate 11 having a plurality of electrode pads 13 formed on a predetermined region corresponding to the solder balls 12 on the mounting surface. A plurality of cream solders 14 are formed on the electrode pads 13 on the mounting surface of the main control substrate 11, and the ASIC 10 is surface-mounted on the main control substrate 11 so that the solder balls 12 may be each connected to each of the cream solders 14. Further, a dummy solder 100 is formed on a portion outside a predetermined region of the mounting surface of the main control substrate 11, and is provided between the ASIC 10 and the mounting surface of the main control substrate 11. Accordingly, the dummy solder 100 can support the own weight of the ASIC 10. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、記録装置等の電子機器に用いられる回路基板等に実装される電子部品の実装技術に関する。   The present invention relates to a technique for mounting electronic components mounted on a circuit board or the like used in an electronic apparatus such as a recording apparatus.

従来、半導体素子のリード端子のファインピッチ化や多ピン化に対応した実装方法として、プリント配線基板上に、ＢＧＡ（ボールグリッドアレイ）を用いた実装方法や、それらを実装するプリント配線基板が提案されている。従来、ＢＧＡを備えた電子部品（以下、ＢＧＡパッケージという。）を実装するため、プリント配線基板には、パッドと呼ばれる円形のパターンを形成し、このパッドとＢＧＡパッケージの半田ボールがクリーム半田により、リフロー半田付けされている（例えば、特許文献１参照）。具体的には、パッドの位置に対応する位置に貫通穴が形成されたメタルマスクをプリント配線基板上に載置・位置決めし、メタルマスク越しにクリーム半田を形成する。メタルマスクを外すと、パッド上にクリーム半田が形成されているので、クリーム半田上に、ＢＧＡパッケージを載置する。更に、リフロー炉に搬入して、半田ボール及びクリーム半田を溶融・固化することで、パッドとＢＧＡパッケージを半田付けしていた（例えば、特許文献２参照）。   Conventionally, mounting methods using BGA (Ball Grid Array) on printed wiring boards and printed wiring boards for mounting them have been proposed as mounting methods that support fine pitch and multi-pin semiconductor device lead terminals. Has been. Conventionally, in order to mount an electronic component including a BGA (hereinafter referred to as a BGA package), a circular pattern called a pad is formed on a printed wiring board, and the solder balls of the pad and the BGA package are formed by cream soldering. Reflow soldering is performed (see, for example, Patent Document 1). Specifically, a metal mask having through holes formed at positions corresponding to the positions of the pads is placed and positioned on the printed wiring board, and cream solder is formed over the metal mask. When the metal mask is removed, cream solder is formed on the pad, so the BGA package is placed on the cream solder. Furthermore, the pad and the BGA package were soldered by carrying them into a reflow furnace and melting and solidifying the solder balls and cream solder (for example, see Patent Document 2).

特開平７−２１１８５４号公報Japanese Patent Laid-Open No. 7-211184 特開２００４−２８８８２０号公報JP 2004-288820 A

上述した従来のリフロー半田付けによるＢＧＡパッケージの実装構造では、ＢＧＡパッケージの大型化に伴い、ＢＧＡパッケージが重くなり、リフロー炉で半田ボール及びクリーム半田を溶融する際に、ＢＧＡパッケージの自重により、半田ボールが潰れる虞れを否定できなかった。そのため、潰れた半田ボールが他の半田ボールに到達し、ブリッジを形成する虞れがあった。   In the BGA package mounting structure by the conventional reflow soldering described above, the BGA package becomes heavier as the size of the BGA package increases, and when the solder balls and cream solder are melted in the reflow furnace, I couldn't deny the fear that the ball would collapse. Therefore, there is a possibility that the crushed solder ball reaches another solder ball and forms a bridge.

また、ＢＧＡパッケージの自重により、半田ボールが潰れた場合、プリント配線基板に対して、ＢＧＡパッケージが傾いた状態で固化されることがあった。ＢＧＡパッケージが傾くと、傾いた側の半田ボールが、他の半田ボールに到達し、ブリッジを形成し易いといった問題もあった。   Further, when the solder ball is crushed by the weight of the BGA package, the BGA package may be solidified in a state of being inclined with respect to the printed wiring board. When the BGA package is tilted, the solder ball on the tilted side reaches another solder ball, and it is easy to form a bridge.

また、上記ＢＧＡパッケージの形態が、ＢＧＡパッケージの実装中に起こる温度変化等によりプリント配線基板に発生する反りと逆方向の反りをＢＧＡパッケージに発生させ易い。更に、ＢＧＡパッケージの逆方向の反りに、温度変化等によりプリント配線基板に発生する反りが加わることで、半田ボールと、パッドに形成されたクリーム半田とが引き剥がされる方向に応力が加わる。このため、接触不良を発生させる虞れを否定できなかった。特に、パッドの角部に対応する半田ボールの角部は、ＢＧＡパッケージに発生した逆方向の反りが大きくなるので、このような接触不良の問題が大きくなる。   Further, the BGA package is likely to generate warpage in the opposite direction to the warpage generated in the printed wiring board due to a temperature change or the like that occurs during mounting of the BGA package. Furthermore, a warp generated in the printed wiring board due to a temperature change or the like is added to the reverse warp of the BGA package, so that a stress is applied in a direction in which the solder balls and the cream solder formed on the pads are peeled off. For this reason, the possibility of causing poor contact could not be denied. In particular, the corner of the solder ball corresponding to the corner of the pad has a large amount of warpage in the reverse direction generated in the BGA package, and thus the problem of such contact failure is increased.

本発明は、上記のような種々の課題に鑑みなされたものであり、その目的は、従来のリフロー半田付けによる実装方法の工程に影響を与えること無く、電子部品の自重を支えて、第１の半田部材が潰れて、他の第１の半田部材に到達し、ブリッジを形成することを容易に防止できる電子部品の実装構造、その実施構造を備えた記録装置及び電子機器を提供することにある。   The present invention has been made in view of the various problems as described above. The object of the present invention is to support the weight of the electronic component without affecting the steps of the conventional reflow soldering mounting method. To provide a mounting structure of an electronic component that can easily prevent a solder member from being crushed and reaching another first solder member to form a bridge, and a recording apparatus and an electronic apparatus having the implementation structure is there.

また、本発明の他の目的は、基板に対して，電子部品が傾いた状態で実装されることを容易に防止することができる電子部品の実施構造、その実施構造を備えた記録装置及び電子機器を提供することにある。   Another object of the present invention is to provide an electronic component implementation structure that can easily prevent the electronic component from being mounted in an inclined state with respect to the substrate, a recording apparatus and an electronic device having the implementation structure. To provide equipment.

また、本発明の更に他の目的は、電子部品の実装中に起こる温度変化等により発生する応力で接触不良が発生することを容易に防止することができる電子部品の実装構造及び該電子部品の実装構造を実施可能とするメタルマスクを提供することにある。   Still another object of the present invention is to provide an electronic component mounting structure capable of easily preventing contact failure due to stress generated by a temperature change or the like occurring during mounting of the electronic component, and the electronic component. An object of the present invention is to provide a metal mask capable of implementing a mounting structure.

上記目的達成のため、本発明の電子部品の実装構造では、複数の第１の半田部材が形成された電子部品と、実装面の前記第１の半田部材と対応する所定の領域に複数の電極パッドが形成された基板とを含み、前記基板の実装面の前記複数の電極パッド上に複数の第２の半田部材をそれぞれ形成し、前記各第１の半田部材と各第２の半田部材とを接続させるように前記電子部品を前記基板に面実装する電子部品の実装構造において、更に、前記基板の実装面の前記所定の領域外にダミーとして前記第２の半田部材を形成し、前記電子部品と前記基板の実装面との間に介在させることを特徴としている。   To achieve the above object, in the electronic component mounting structure of the present invention, an electronic component in which a plurality of first solder members are formed, and a plurality of electrodes in a predetermined region corresponding to the first solder members on the mounting surface. A plurality of second solder members formed on the plurality of electrode pads on the mounting surface of the substrate, and each of the first solder members and the second solder members; In the electronic component mounting structure in which the electronic component is surface-mounted on the substrate so as to be connected, the second solder member is formed as a dummy outside the predetermined region of the mounting surface of the substrate, and the electronic It is characterized by being interposed between the component and the mounting surface of the substrate.

これにより、複数の第１の半田部材が形成された電子部品を基板に実装する際に、ダミーとして形成された第２の半田部材が、上記電子部品の自重を支えることができる。従って、第１の半田部材が、他の第１の半田部材に到達してブリッジを形成することを有効に防止できる。   Thereby, when mounting the electronic component in which the some 1st solder member was formed in a board | substrate, the 2nd solder member formed as a dummy can support the dead weight of the said electronic component. Therefore, it is possible to effectively prevent the first solder member from reaching the other first solder member and forming a bridge.

また、本発明の電子部品の実装構造では、前記ダミーとして形成される第２の半田部材の高さは、前記各第１の半田部材と接続させる第２の半田部材の高さよりも高いことを特徴としている。これにより、第１の半田部材が、他の第１の半田部材に到達してブリッジを形成することを有効に防止できる。   In the electronic component mounting structure according to the present invention, the height of the second solder member formed as the dummy is higher than the height of the second solder member connected to each of the first solder members. It is a feature. Accordingly, it is possible to effectively prevent the first solder member from reaching the other first solder member and forming a bridge.

また、本発明の電子部品の実装構造では、前記ダミーとして形成される第２の半田部材は、少なくとも前記電子部品の角部に対応する位置に形成されることを特徴としている。これにより、上記電子部品の自重を角部で支えることになるので、上記電子部品が基板に対して傾いた状態で実装されることを防ぐことができる。   In the electronic component mounting structure of the present invention, the second solder member formed as the dummy is formed at a position corresponding to at least a corner of the electronic component. Thereby, since the weight of the electronic component is supported by the corner portion, it is possible to prevent the electronic component from being mounted in a tilted state with respect to the substrate.

また、本発明の電子部品の実装構造では、前記第２の半田部材はクリーム半田であることを特徴としている。これにより、従来どおりクリーム半田を使用したリフロー半田付けを実施できる。すなわち、従来のリフロー半田付けによる実装方法の工程に影響を与えること無く、複数の第１の半田部材が形成された電子部品を基板に実装する際に、上記電子部品の自重により第１の半田部材が潰れて、他の第１の半田部材に到達してブリッジを形成することを防止できる。   In the electronic component mounting structure of the present invention, the second solder member is cream solder. Thereby, reflow soldering using cream solder can be implemented as usual. That is, when mounting an electronic component on which a plurality of first solder members are formed on a substrate without affecting the steps of the conventional mounting method by reflow soldering, the first solder is caused by the weight of the electronic component. It is possible to prevent the member from being crushed and reaching the other first solder member to form a bridge.

また、本発明の記録装置では、記録媒体に記録する記録装置であって、上記電子部品の実装構造を備えたことを特徴としている。これにより、複数の第１の半田部材が形成された電子部品を基板に実装する際に、上記電子部品の自重により第１の半田部材が潰れて、他の第１の半田部材に到達してブリッジを形成することを防止できる電子部品の実装構造を備えた記録装置を提供することができる。   The recording apparatus of the present invention is a recording apparatus for recording on a recording medium, and is characterized by including the above-described electronic component mounting structure. Thereby, when mounting an electronic component on which a plurality of first solder members are formed on a substrate, the first solder member is crushed by the weight of the electronic component and reaches the other first solder member. It is possible to provide a recording apparatus including an electronic component mounting structure that can prevent the formation of a bridge.

また、本発明の電子機器では、上記の電子部品の実装構造を備えたことを特徴としている。これにより、複数の第１の半田部材が形成された電子部品を基板に実装する際に、上記電子部品の自重により第１の半田部材が潰れて、他の第１の半田部材に到達してブリッジを形成することを防止できる電子部品の実装構造を備えた電子機器を提供することができる。   In addition, an electronic apparatus according to the present invention is characterized by including the above-described electronic component mounting structure. Thereby, when mounting an electronic component on which a plurality of first solder members are formed on a substrate, the first solder member is crushed by the weight of the electronic component and reaches the other first solder member. It is possible to provide an electronic apparatus having an electronic component mounting structure that can prevent the formation of a bridge.

また、本発明の電子部品の実装方法では、複数の第１の半田部材が形成された電子部品と、前記第１の半田部材と対応する基板の実装面の所定の領域に形成された複数の電極パッドと、前記電極パッド上に形成された複数の第２の半田部材と、を半田付けする電子部品の実装方法において、前記基板の実装面の前記所定の領域外にダミーとして第２の半田部材を形成するメタルマスクを前記基板に載置・位置決めする工程と、前記メタルマスク越しに前記複数の電極パッドに第２の半田部材を形成する工程と、前記メタルマスクを取り外す工程と、前記基板の所定の場所に前記電子部品を載置する工程と、前記電極パッドに形成された前記第２の半田部材及び前記電子部品に形成された前記第１の半田部材をリフロー半田付けする工程と、を有することを特徴としている。   In the electronic component mounting method of the present invention, the electronic component on which a plurality of first solder members are formed and a plurality of regions formed on a predetermined region of the mounting surface of the substrate corresponding to the first solder members. In an electronic component mounting method for soldering an electrode pad and a plurality of second solder members formed on the electrode pad, a second solder as a dummy outside the predetermined region of the mounting surface of the substrate Placing and positioning a metal mask for forming a member on the substrate; forming a second solder member on the plurality of electrode pads through the metal mask; removing the metal mask; and the substrate Placing the electronic component at a predetermined location, reflow soldering the second solder member formed on the electrode pad and the first solder member formed on the electronic component, The It is characterized in that.

これにより、メタルマスク以外、従来のリフロー半田付けによる実装方法と変更点が無いので、上記の実装方法の工程に与える影響を最小にすることができる。また、上記基板の実装面の所定の領域外に対応するメタルマスクの位置に貫通穴を形成しさえすれば、所定の領域外にダミーとして第２の半田部材を形成することができる。以上より、従来のリフロー半田付けによる実装方法の工程に影響を与えること無く、複数の第１の半田部材が形成された電子部品を基板に実装する際に、上記電子部品の自重により第１の半田部材が潰れて、他の第１の半田部材に到達してブリッジを形成することを防止できる。   Thereby, since there is no change point from the mounting method by the conventional reflow soldering other than the metal mask, the influence on the process of the mounting method can be minimized. Further, the second solder member can be formed as a dummy outside the predetermined region as long as the through hole is formed at the position of the metal mask corresponding to the predetermined region outside the mounting surface of the substrate. As described above, when mounting an electronic component on which a plurality of first solder members are formed on a substrate without affecting the steps of the conventional mounting method by reflow soldering, the first weight is caused by the weight of the electronic component. It is possible to prevent the solder member from being crushed and reaching another first solder member to form a bridge.

また、本発明のメタルマスクでは、複数の第１の半田部材が形成された電子部品を、実装面の前記第１の半田部材と対応する所定の領域に複数の電極パッドが形成された基板に面実装する工程で、前記複数の電極パッド以外の領域を、第２の半田部材から防護するメタルマスクにおいて、前記複数の電極パッドに対応する位置に形成された第１の貫通穴と、少なくとも前記基板の実装面の前記所定の領域外に対応する位置に形成された第２の貫通穴とを有し、前記第２の貫通穴の穴径は、前記第１の貫通穴の穴径よりも大きいことを特徴としている。   In the metal mask of the present invention, an electronic component on which a plurality of first solder members are formed is placed on a substrate on which a plurality of electrode pads are formed in a predetermined region corresponding to the first solder member on the mounting surface. In the surface mounting step, in the metal mask that protects the region other than the plurality of electrode pads from the second solder member, at least the first through hole formed at a position corresponding to the plurality of electrode pads, A second through hole formed at a position corresponding to the outside of the predetermined region of the mounting surface of the substrate, and the hole diameter of the second through hole is larger than the hole diameter of the first through hole. It is characterized by being large.

これにより、上記第２の貫通穴の穴径を上記第１の貫通穴の穴径よりも大きくすることで、ダミーとして形成される前記第２の半田部材の量を、前記複数の電極パッド上に形成される第２の半田部材の量より多くすることができる。よって、上記ダミーとして形成される第２の半田部材の高さを、各第１の半田部材と接続させる第２の半田部材の高さよりも高くすることができる。   Thus, by making the hole diameter of the second through hole larger than the hole diameter of the first through hole, the amount of the second solder member formed as a dummy can be set on the plurality of electrode pads. It is possible to increase the amount of the second solder member to be formed on. Therefore, the height of the second solder member formed as the dummy can be made higher than the height of the second solder member connected to each first solder member.

また、本発明のメタルマスクでは、複数の第１の半田部材が形成された電子部品を、実装面の前記第１の半田部材と対応する所定の領域に複数の電極パッドが形成された基板に面実装する工程で、前記複数の電極パッド以外の領域を、第２の半田部材から防護するメタルマスクにおいて、少なくとも前記複数の電極パッドの角部に対応する位置に形成された第２の貫通穴と、前記第２の貫通穴以外の電極パッドに対応する位置に形成された第１の貫通穴と、を有し、前記第２の貫通穴の穴径は、前記第１の貫通穴の穴径よりも大きいことを特徴としている。   In the metal mask of the present invention, an electronic component on which a plurality of first solder members are formed is placed on a substrate on which a plurality of electrode pads are formed in a predetermined region corresponding to the first solder member on the mounting surface. A second through hole formed at a position corresponding to at least a corner of the plurality of electrode pads in a metal mask that protects a region other than the plurality of electrode pads from the second solder member in the surface mounting step. And a first through hole formed at a position corresponding to the electrode pad other than the second through hole, and the diameter of the second through hole is the hole of the first through hole It is characterized by being larger than the diameter.

これにより、上記第２の貫通穴の穴径を上記第１の貫通穴の穴径よりも大きくすることで、上記電極パッドに形成する第２の半田部材の量を、他の電極パッドに形成する第２の半田部材の量より、多くすることができる。よって、上記電極パッドに形成された第２の半田部材と、第１の半田部材とが引き剥がされる方向に応力が加わっても、第２の半田部材の量を多くすることで、上記電極パッドと上記電子部品の第１の半田部材との上記接触不良を防止することができる。   Thereby, the amount of the second solder member formed on the electrode pad is formed on the other electrode pad by making the hole diameter of the second through hole larger than the hole diameter of the first through hole. The amount of the second solder member can be increased. Therefore, even if stress is applied in the direction in which the second solder member formed on the electrode pad and the first solder member are peeled off, the amount of the second solder member is increased, so that the electrode pad And the contact failure between the electronic component and the first solder member.

本発明に係る「電子機器」の一例として、記録装置１を取り上げて、本発明の実施形態について、図１乃至図１０を参照しながら説明する。なお、以下に説明する実施形態は特許請求の範囲にかかる発明を限定するものではなく、また、本実施形態の中で説明されている特徴の組み合わせの全てが発明の解決手段に必須であるとは限らない。   The recording apparatus 1 will be taken up as an example of the “electronic device” according to the present invention, and an embodiment of the present invention will be described with reference to FIGS. The embodiments described below do not limit the invention according to the scope of claims, and all combinations of features described in the present embodiment are essential to the solution means of the invention. Is not limited.

図１は、本発明の実施形態に係る記録装置１の外観を示す斜視図である。図１に示す記録装置１は、上部カバー２、上部ハウジング３及び下部ハウジング４を有し、前面には、開口した挿入口５が設けられている。この挿入口５へ被記録物８が挿入されると、記録装置１により被記録物８に記録が行われ、被記録物８が挿入口５から排出される。   FIG. 1 is a perspective view showing an appearance of a recording apparatus 1 according to an embodiment of the present invention. A recording apparatus 1 shown in FIG. 1 includes an upper cover 2, an upper housing 3, and a lower housing 4, and an insertion slot 5 that is opened is provided on the front surface. When the recording material 8 is inserted into the insertion port 5, recording is performed on the recording material 8 by the recording device 1, and the recording material 8 is discharged from the insertion port 5.

図２は、記録装置１に内蔵された主制御基板１１と電源基板９及びその周辺付近を示す斜視図である。図２の中央右付近には、パワー系部品やロジック系部品が実装され、記録装置１に内蔵されている各装置を制御する主制御基板１１が配設されている。更に、主制御基板１１の左隣りには、電源の１次側部品群５１が実装される電源基板９が水平方向に配設されている。   FIG. 2 is a perspective view showing the main control board 11 and the power supply board 9 built in the recording apparatus 1 and the vicinity thereof. Near the center right in FIG. 2, a power control component and a logic control component are mounted, and a main control board 11 that controls each device built in the recording apparatus 1 is disposed. Further, on the left side of the main control board 11, the power supply board 9 on which the power source primary part group 51 is mounted is disposed in the horizontal direction.

主制御基板１１は、各種コネクタが配設されるコネクタ領域４１、パワー系部品が実装されるパワー系部品実装領域４２、ロジック系部品が実装されるロジック系部品実装領域４３を含む。   The main control board 11 includes a connector area 41 in which various connectors are disposed, a power system component mounting area 42 in which power system parts are mounted, and a logic system component mounting area 43 in which logic system parts are mounted.

パワー系部品実装領域４２には、例えば、図示しないモータードライバ、ヘッドドライバ等のパワー系部品、これらより発生する熱を放出させるためのヒートシンク４２ａ、４２ｂが実装されている。   In the power system component mounting area 42, for example, power system components such as a motor driver and a head driver (not shown) and heat sinks 42a and 42b for releasing heat generated from these are mounted.

ロジック系部品実装領域４３には、ＣＰＵ、ＡＳＩＣ１０等のロジック系部品が実装され、記録装置１の背面に配設されたインターフェイス部４４とアクセスが容易な位置にロジック系部品実装領域４３は設けられている。   In the logic component mounting area 43, logic components such as a CPU and ASIC 10 are mounted, and the logic component mounting area 43 is provided at a position where the interface unit 44 provided on the back surface of the recording apparatus 1 is easily accessible. ing.

コネクタ領域４１、パワー系部品実装領域４２、ロジック系部品実装領域４３に実装された各種部品は、主制御基板１１に設けられた図示しない回路パターンを介して接続されている。   Various components mounted on the connector area 41, the power system component mounting area 42, and the logic system component mounting area 43 are connected via a circuit pattern (not shown) provided on the main control board 11.

図３は、図２に示す主制御基板１１のＡＳＩＣ１０周辺の拡大平面図である。図２に示したように、主制御基板１１は、電子部品として、ＢＧＡパッケージであるＡＳＩＣ１０を面実装している。   FIG. 3 is an enlarged plan view around the ASIC 10 of the main control board 11 shown in FIG. As shown in FIG. 2, the main control board 11 is surface-mounted with an ASIC 10 that is a BGA package as an electronic component.

図４は、図２に示す主制御基板１１のＡＳＩＣ１０周辺の拡大正面図である。本実施形態では、主制御基板１１上の電極パッド１３（図６参照）に形成されたクリーム半田１４と、ＡＳＩＣ１０に形成された半田ボール１２をリフロー半田付けしている。更に、後述するが、本発明の特徴部分の一つであるダミー半田１００が、主制御基板１１とＡＳＩＣ１０間に形成されている。よって、半田ボール１２及びクリーム半田１４が溶融する際に、ＡＳＩＣ１０の自重をダミー半田１００が支えることができる。尚、ダミー半田１００は、ダミー半田固定用パッド１９に形成されたクリーム半田１４であるが、他のクリーム半田１４と区別するため、ダミー半田１００としている。   FIG. 4 is an enlarged front view around the ASIC 10 of the main control board 11 shown in FIG. In this embodiment, the cream solder 14 formed on the electrode pad 13 (see FIG. 6) on the main control board 11 and the solder ball 12 formed on the ASIC 10 are reflow soldered. Further, as will be described later, a dummy solder 100 which is one of the characteristic portions of the present invention is formed between the main control board 11 and the ASIC 10. Therefore, when the solder ball 12 and the cream solder 14 are melted, the dummy solder 100 can support the weight of the ASIC 10. The dummy solder 100 is the cream solder 14 formed on the dummy solder fixing pad 19, but is used as the dummy solder 100 in order to distinguish it from other cream solders 14.

次に、主制御基板１１にＡＳＩＣ１０を実装する前のＡＳＩＣ１０の半田ボール１２及び主制御基板１１に形成された電極パッド１３（図６参照）について説明する。   Next, the solder balls 12 of the ASIC 10 and the electrode pads 13 (see FIG. 6) formed on the main control board 11 before mounting the ASIC 10 on the main control board 11 will be described.

図５は、図２に示すＡＳＩＣ１０を実装する前のＡＳＩＣ１０の半田ボール１２の配置を表す裏面図である。図５に示すように、本実施形態のＡＳＩＣ１０は９個の半田ボール１２を備えている。９個の半田ボール１２の大きさは同じである。９個の半田ボール１２は全て、クリーム半田１４（図４参照）を介して、それぞれ対応する電極パッド１３（図６参照）と導通している。また、半田ボール１２が形成されていないＡＳＩＣ１０の領域は、絶縁材１５で覆われている。そのため、後述するが、ダミー半田１００が、半田ボール１２が形成されていない領域と接触しても導通しない構造となっている。   FIG. 5 is a back view showing the arrangement of the solder balls 12 of the ASIC 10 before the ASIC 10 shown in FIG. 2 is mounted. As shown in FIG. 5, the ASIC 10 of the present embodiment includes nine solder balls 12. The nine solder balls 12 have the same size. All nine solder balls 12 are electrically connected to corresponding electrode pads 13 (see FIG. 6) via cream solder 14 (see FIG. 4). The region of the ASIC 10 where the solder ball 12 is not formed is covered with an insulating material 15. Therefore, as will be described later, the dummy solder 100 has a structure that does not conduct even if it contacts a region where the solder ball 12 is not formed.

図６は、図３に示すＡＳＩＣ１０を実装する前の主制御基板１１のＡＳＩＣ１０周辺の拡大平面図である。図６に示すように、主制御基板１１の実装面には、９個の電極パッド１３及び本発明の特徴部分の一つである４個のダミー半田固定用パッド１９が形成されている。９個の電極パッド１３は、説明の便宜上、５個の電極パッド１３ａ及び４個の電極パッド１３ｂに分けられているが、電極パッド１３ａ及び１３ｂは、同じパッドである。電極パッド１３ｂは、９個の電極パッド１３の内、角部に形成された電極パッドである。一方、電極パッド１３ａは、角部以外に形成された電極パッドである。後述するが、電極パッド１３ａは、クリーム半田１４（図４参照）を形成する際に使用する、本発明の特徴部分の一つであるメタルマスク３０（図７参照）の貫通穴１７ａ（図７参照）と対応し、電極パッド１３ｂは貫通穴１７ｂ（図７参照）と対応する。貫通穴１７ｂ（図７参照）は貫通穴１７ａ（図７参照）より穴径が大きいため、電極パッド１３ｂに形成されるクリーム半田１４（図４参照）の量は、電極パッド１３ａに形成されるクリーム半田１４（図４参照）の量よりも多くなる。これにより、半田ボール１２（図４参照）と、電極パッド１３ｂに形成されたクリーム半田１４（図４参照）とが引き剥がされる方向に応力が加わっても、半田ボール１２と電極パッド１３ｂが接触不良になることを容易に防止できる。   FIG. 6 is an enlarged plan view around the ASIC 10 of the main control board 11 before the ASIC 10 shown in FIG. 3 is mounted. As shown in FIG. 6, on the mounting surface of the main control board 11, nine electrode pads 13 and four dummy solder fixing pads 19 which are one of the features of the present invention are formed. The nine electrode pads 13 are divided into five electrode pads 13a and four electrode pads 13b for convenience of explanation, but the electrode pads 13a and 13b are the same pads. The electrode pad 13 b is an electrode pad formed at a corner portion of the nine electrode pads 13. On the other hand, the electrode pad 13a is an electrode pad formed at a portion other than the corner portion. As will be described later, the electrode pad 13a is used when forming the cream solder 14 (see FIG. 4), and the through hole 17a (see FIG. 7) of the metal mask 30 (see FIG. 7), which is one of the features of the present invention. The electrode pad 13b corresponds to the through hole 17b (see FIG. 7). Since the through hole 17b (see FIG. 7) has a larger diameter than the through hole 17a (see FIG. 7), the amount of cream solder 14 (see FIG. 4) formed on the electrode pad 13b is formed on the electrode pad 13a. More than the amount of cream solder 14 (see FIG. 4). Thereby, even if stress is applied in the direction in which the solder ball 12 (see FIG. 4) and the cream solder 14 (see FIG. 4) formed on the electrode pad 13b are peeled off, the solder ball 12 and the electrode pad 13b are in contact with each other. It can be easily prevented from becoming defective.

また、ダミー半田固定用パッド１９は、主制御基板１１とＡＳＩＣ１０の間に形成されるダミー半田１００（図４参照）を固定するために形成されている。ダミー半田固定用パッド１９は、クリーム半田１４（図４参照）を形成する際に使用するメタルマスク３０（図７参照）の貫通穴１７ｃ（図７参照）と対応する。貫通穴１７ｃ（図７参照）は、後述するが、他の貫通穴１７ａ（図７参照）及び１７ｂ（図７参照）よりも穴径が大きくなっている。そのため、ダミー半田１００（図４参照）の量は、クリーム半田１４の量より多くなる。一方、ダミー半田固定用パッド１９は、電極パッド１３ａ及び１３ｂに比べて、小さく形成されている。これにより、ダミー半田固定用パッド１９に形成されたダミー半田１００は、ダミー半田固定用パッド１９に接触しつつ、表面張力によって略球状になるので、クリーム半田１４（図４参照）の高さよりも、ダミー半田１００（図４参照）は高くなり、半田ボール１２（図４参照）及びクリーム半田１４（図４参照）の溶融時に、確実にＡＳＩＣ１０を支えることができる。なお、電極パッド１３及びダミー半田固定用パッド１９が形成されていない主制御基板１１の領域は、絶縁材１５で覆われている。   The dummy solder fixing pads 19 are formed to fix the dummy solder 100 (see FIG. 4) formed between the main control board 11 and the ASIC 10. The dummy solder fixing pads 19 correspond to the through holes 17c (see FIG. 7) of the metal mask 30 (see FIG. 7) used when forming the cream solder 14 (see FIG. 4). As will be described later, the through hole 17c (see FIG. 7) has a larger hole diameter than the other through holes 17a (see FIG. 7) and 17b (see FIG. 7). Therefore, the amount of dummy solder 100 (see FIG. 4) is larger than the amount of cream solder 14. On the other hand, the dummy solder fixing pad 19 is formed smaller than the electrode pads 13a and 13b. As a result, the dummy solder 100 formed on the dummy solder fixing pad 19 becomes substantially spherical due to surface tension while being in contact with the dummy solder fixing pad 19, so that it is higher than the height of the cream solder 14 (see FIG. 4). The dummy solder 100 (see FIG. 4) is high, and the ASIC 10 can be reliably supported when the solder ball 12 (see FIG. 4) and the cream solder 14 (see FIG. 4) are melted. A region of the main control board 11 where the electrode pad 13 and the dummy solder fixing pad 19 are not formed is covered with an insulating material 15.

次に、本発明の特徴部分の一つである主制御基板１１にＡＳＩＣ１０を実装する工程及び上記の工程で使用するメタルマスク３０について説明する。図７及び図８は、図６に示す主制御基板１１にＡＳＩＣ１０を実装する工程を示す矢視ＡＡにおける断面図である。また、図９は図７に示すメタルマスク３０の平面図、図１０は図９に示すメタルマスク３０の矢視ＢＢにおける断面図である。   Next, the process of mounting the ASIC 10 on the main control board 11 which is one of the characteristic parts of the present invention and the metal mask 30 used in the above process will be described. 7 and 8 are cross-sectional views taken along the line AA showing the process of mounting the ASIC 10 on the main control board 11 shown in FIG. 9 is a plan view of the metal mask 30 shown in FIG. 7, and FIG. 10 is a cross-sectional view of the metal mask 30 shown in FIG.

まず、主制御基板１１に電極パッド１３及びダミー半田固定用パッド１９を形成する。更に、主制御基板１１の電極パッド１３及びダミー半田固定用パッド１９以外の領域を絶縁材１５で覆う。次に、図７（ａ）に示すように、主制御基板１１にメタルマスク３０を載置・位置決めする。本実施形態のメタルマスク３０には、図９及び図１０に示すように、エッチングやレーザー加工等によって、貫通穴１７ａ、１７ｂ及び１７ｃが形成されている。貫通穴１７ａは、主制御基板１１の電極パッド１３ａと対応する位置に形成されている。また、貫通穴１７ｂは、電極パッド１３ｂと対応する位置に、貫通穴１７ｃはダミー半田固定用パッド１９に対応する位置に形成されている。   First, the electrode pad 13 and the dummy solder fixing pad 19 are formed on the main control board 11. Further, an area other than the electrode pad 13 and the dummy solder fixing pad 19 of the main control board 11 is covered with an insulating material 15. Next, as shown in FIG. 7A, the metal mask 30 is placed and positioned on the main control board 11. As shown in FIGS. 9 and 10, through holes 17a, 17b and 17c are formed in the metal mask 30 of this embodiment by etching, laser processing, or the like. The through hole 17 a is formed at a position corresponding to the electrode pad 13 a of the main control board 11. The through hole 17b is formed at a position corresponding to the electrode pad 13b, and the through hole 17c is formed at a position corresponding to the dummy solder fixing pad 19.

次に、図７（ｂ）に示すように、スキージ１８とクリーム半田１４をメタルマスク３０上に載置し、スキージ１８を移動させる。これにより、図７（ｃ）に示すように、メタルマスク３０の貫通穴１７ａ、１７ｂ及び１７ｃにクリーム半田１４が充填される。よって、メタルマスク３０の貫通穴１７ａに対応する電極パッド１３ａ上にクリーム半田１４が形成される。同様に、貫通穴１７ｂに対応する電極パッド１３ｂ上にクリーム半田１４が形成される。更に、貫通穴１７ｃに対応するダミー半田固定用パッド１９上にダミー半田１００（クリーム半田１４）が形成される。   Next, as shown in FIG. 7B, the squeegee 18 and the cream solder 14 are placed on the metal mask 30, and the squeegee 18 is moved. As a result, as shown in FIG. 7C, the cream solder 14 is filled into the through holes 17a, 17b, and 17c of the metal mask 30. Therefore, the cream solder 14 is formed on the electrode pad 13 a corresponding to the through hole 17 a of the metal mask 30. Similarly, the cream solder 14 is formed on the electrode pad 13b corresponding to the through hole 17b. Further, the dummy solder 100 (cream solder 14) is formed on the dummy solder fixing pad 19 corresponding to the through hole 17c.

ここで、貫通穴１７ｂの穴径は貫通穴１７ａの穴径よりも大きく形成されている。そのため、電極パッド１３ｂに形成されるクリーム半田１４の量は、電極パッド１３ａに形成されるクリーム半田１４の量よりも多くなる。従来、ＡＳＩＣ１０の形態が、ＡＳＩＣ１０の実装中に起こる温度変化等により主制御基板１１に発生する反りと逆方向の反りをＡＳＩＣ１０に発生させ易い。更に、ＡＳＩＣ１０の逆方向の反りに、温度変化等により主制御基板１１に発生する反りが加わることで、半田ボール１２と、電極パッド１３ｂに形成されたクリーム半田１４とが引き剥がされる方向に応力が加わる。そのため、接触不良を発生させる場合があった。しかし、電極パッド１３ｂに形成されるクリーム半田１４の量が、電極パッド１３ａに形成されるクリーム半田１４の量よりも多くなるため、上記の接触不良を容易に防止することができる。   Here, the hole diameter of the through hole 17b is formed larger than the hole diameter of the through hole 17a. Therefore, the amount of cream solder 14 formed on the electrode pad 13b is larger than the amount of cream solder 14 formed on the electrode pad 13a. Conventionally, the ASIC 10 easily causes the ASIC 10 to generate a warp in the opposite direction to the warp that occurs in the main control board 11 due to a temperature change or the like that occurs during mounting of the ASIC 10. Furthermore, a warp generated in the main control board 11 due to a temperature change or the like is added to the warp in the reverse direction of the ASIC 10, thereby causing stress in a direction in which the solder balls 12 and the cream solder 14 formed on the electrode pads 13 b are peeled off. Will be added. As a result, poor contact may occur. However, since the amount of the cream solder 14 formed on the electrode pad 13b is larger than the amount of the cream solder 14 formed on the electrode pad 13a, the above contact failure can be easily prevented.

また、図９及び図１０に示したように、貫通穴１７ｃの穴径は貫通穴１７ｂの穴径よりも大きく形成されている。そのため、ダミー半田固定用パッド１９に形成されるダミー半田１００の量は、電極パッド１３ａ及び１３ｂに形成されるクリーム半田１４の量よりも多くなる。一方、上述したように、ダミー半田固定用パッド１９は、電極パッド１３ａ及び１３ｂに比べて、小さく形成されているので、ダミー半田固定用パッド１９に形成されたダミー半田１００は、ダミー半田固定用パッド１９に接触しつつ、表面張力によって略球状になる。そのため、電極パッド１３ａ及び１３ｂに形成されたクリーム半田１４の高さよりも、ダミー半田１００は高くなり、半田ボール１２及びクリーム半田１４の溶融時に、確実にＡＳＩＣ１０を支えることができる。   Further, as shown in FIGS. 9 and 10, the diameter of the through hole 17c is formed larger than the diameter of the through hole 17b. Therefore, the amount of dummy solder 100 formed on the dummy solder fixing pad 19 is larger than the amount of cream solder 14 formed on the electrode pads 13a and 13b. On the other hand, since the dummy solder fixing pad 19 is formed smaller than the electrode pads 13a and 13b as described above, the dummy solder 100 formed on the dummy solder fixing pad 19 is used for dummy solder fixing. While contacting the pad 19, it becomes substantially spherical due to surface tension. Therefore, the dummy solder 100 becomes higher than the height of the cream solder 14 formed on the electrode pads 13a and 13b, and the ASIC 10 can be reliably supported when the solder ball 12 and the cream solder 14 are melted.

次に、図７（ｃ）に示すように、メタルマスク３０の貫通穴１７ａ、１７ｂ及び１７ｃにクリーム半田１４を充填して、クリーム半田１４及びダミー半田１００を形成した後、メタルマスク３０を取り外す。その後、図８（ｄ）に示すように、半田ボール１２を備えたＡＳＩＣ１０を載置する。次に、図８（ｅ）に示す状態で、主制御基板１１及びＡＳＩＣ１０を図示しないリフロー炉に搬入し、このリフロー炉で半田ボール１２及びクリーム半田１４を溶融・固化する。よって、図８（ｆ）に示すように、主制御基板１１にＡＳＩＣ１０を面実装している。   Next, as shown in FIG. 7C, the cream solder 14 is filled in the through holes 17a, 17b, and 17c of the metal mask 30 to form the cream solder 14 and the dummy solder 100, and then the metal mask 30 is removed. . Thereafter, as shown in FIG. 8D, the ASIC 10 including the solder balls 12 is placed. Next, in the state shown in FIG. 8E, the main control board 11 and the ASIC 10 are carried into a reflow furnace (not shown), and the solder balls 12 and the cream solder 14 are melted and solidified in the reflow furnace. Therefore, as shown in FIG. 8 (f), the ASIC 10 is surface-mounted on the main control board 11.

従来、リフロー炉で半田ボール１２及びクリーム半田１４を溶融する際、ＡＳＩＣ１０の自重により、半田ボール１２が潰れる虞れがあった。半田ボール１２が潰れると、他の半田ボール１２に到達し、ブリッジを形成し、主制御基板１１上の回路をショートさせる虞れがあった。しかし、図８（ｆ）に示したように、ダミー半田１００及びダミー半田固定用パッド１９を形成することで、リフロー炉で半田ボール１２及びクリーム半田１４を溶融する際、ＡＳＩＣ１０の自重をダミー半田１００が支えることができる。よって、半田ボール１２が潰れて、他の半田ボール１２とブリッジを形成することを防止できる。
また、本実施形態のダミー半田１００及びダミー半田固定用パッド１９は、主制御基板１１に形成された電極パッド１３の領域外、すなわち、ＡＳＩＣ１０の角部に対応する位置に形成されている。そのため、リフロー炉で半田ボール１２及びクリーム半田１４を溶融する際、ＡＳＩＣ１０の自重をＡＳＩＣ１０の角部で支えているので、ＡＳＩＣ１０が主制御基板１１に対して傾いた状態で実装されることを防ぐことができる。よって、傾いた側の半田ボール１２が、他の半田ボール１２に到達し、ブリッジを形成し易くなることも防止できる。また、上述したように、ＡＳＩＣ１０の角部は絶縁材１５で覆われている。そのため、半田ボール１２が形成されていないＡＳＩＣ１０の領域と、ダミー半田１００が接触しても導通しないので、ダミー半田１００をＡＳＩＣ１０の自重を支えるためだけに使用できる。 Conventionally, when the solder ball 12 and the cream solder 14 are melted in a reflow furnace, the solder ball 12 may be crushed by the weight of the ASIC 10. When the solder ball 12 is crushed, it may reach another solder ball 12 to form a bridge and short circuit on the main control board 11. However, as shown in FIG. 8 (f), by forming the dummy solder 100 and the dummy solder fixing pad 19, when the solder ball 12 and the cream solder 14 are melted in the reflow furnace, the weight of the ASIC 10 is reduced to the dummy solder. 100 can support. Therefore, it is possible to prevent the solder ball 12 from being crushed and forming a bridge with another solder ball 12.
Further, the dummy solder 100 and the dummy solder fixing pad 19 according to the present embodiment are formed outside the region of the electrode pad 13 formed on the main control board 11, that is, at a position corresponding to the corner of the ASIC 10. Therefore, when the solder balls 12 and the cream solder 14 are melted in the reflow furnace, the ASIC 10 is supported by the corners of the ASIC 10 to prevent the ASIC 10 from being mounted in an inclined state with respect to the main control board 11. be able to. Therefore, it is possible to prevent the solder ball 12 on the inclined side from reaching another solder ball 12 and easily forming a bridge. Further, as described above, the corners of the ASIC 10 are covered with the insulating material 15. Therefore, even if the dummy solder 100 comes into contact with the area of the ASIC 10 where the solder ball 12 is not formed, the dummy solder 100 can be used only to support the weight of the ASIC 10.

更に、ダミー半田固定用パッド１９は、電極パッド１３と同じ工程で主制御基板１１に形成されている。また、上述したように、ダミー半田１００は、メタルマスク３０を主制御基板１１に載置・位置決めした後、メタルマスク３０の貫通穴１７ｃにクリーム半田１４を充填することで、形成している。よって、電極パッド１３上のクリーム半田１４と同じ工程で形成されている。これから、ダミー半田１００、ダミー半田固定用パッド１９を形成するために、従来のリフロー半田付けによる実装方法の工程に影響を与えること無く、上記の実装方法の工程と同じ工程で、ダミー半田１００を形成することができる。
以上のように、本実施形態の電子部品の実装構造によれば、複数の第１の半田部材である半田ボール１２が形成された電子部品であるＡＳＩＣ１０と、実装面の半田ボール１２と対応する所定の領域に複数の電極パッド１３が形成された主制御基板１１とを含み、主制御基板１１の実装面の複数の電極パッド１３上に複数の第２の半田部材であるクリーム半田１４をそれぞれ形成し、各半田ボール１２と各クリーム半田１４とを接続させるようにＡＳＩＣ１０を主制御基板１１に面実装している。更に、主制御基板１１の実装面の所定の領域外にダミーとして第２の半田部材であるダミー半田１００を形成し、ＡＳＩＣ１０と主制御基板１１の実装面との間に介在させている。 Further, the dummy solder fixing pads 19 are formed on the main control board 11 in the same process as the electrode pads 13. Further, as described above, the dummy solder 100 is formed by filling the through hole 17c of the metal mask 30 with the cream solder 14 after placing and positioning the metal mask 30 on the main control board 11. Therefore, it is formed in the same process as the cream solder 14 on the electrode pad 13. From now on, in order to form the dummy solder 100 and the dummy solder fixing pad 19, the dummy solder 100 is formed in the same process as the above mounting method without affecting the process of the conventional mounting method by reflow soldering. Can be formed.
As described above, according to the electronic component mounting structure of the present embodiment, the ASIC 10 that is an electronic component in which the solder balls 12 that are the plurality of first solder members are formed, and the solder balls 12 on the mounting surface correspond to each other. A plurality of electrode pads 13 formed in a predetermined region, and a plurality of second solder members cream solder 14 on the plurality of electrode pads 13 on the mounting surface of the main control substrate 11, respectively. The ASIC 10 is surface-mounted on the main control board 11 so that the solder balls 12 and the cream solders 14 are connected. Furthermore, a dummy solder 100 as a second solder member is formed as a dummy outside a predetermined region of the mounting surface of the main control board 11 and is interposed between the ASIC 10 and the mounting surface of the main control board 11.

これにより、複数の半田ボール１２が形成されたＡＳＩＣ１０を主制御基板１１に実装する際に、ダミー半田１００が、ＡＳＩＣ１０の自重を支えることができる。従って、半田ボール１２が、他の半田ボール１２に到達してブリッジを形成することを有効に防止できる。   Thereby, when mounting the ASIC 10 in which the plurality of solder balls 12 are formed on the main control board 11, the dummy solder 100 can support the weight of the ASIC 10. Therefore, it is possible to effectively prevent the solder balls 12 from reaching the other solder balls 12 to form a bridge.

また、本実施形態の電子部品の実装構造によれば、ダミー半田１００の高さは、各半田ボール１２と接続させるクリーム半田１４の高さよりも高くなっている。これにより、半田ボール１２が、他の半田ボール１２に到達してブリッジを形成することを有効に防止できる。   Further, according to the electronic component mounting structure of the present embodiment, the height of the dummy solder 100 is higher than the height of the cream solder 14 connected to each solder ball 12. Thereby, it is possible to effectively prevent the solder balls 12 from reaching the other solder balls 12 to form a bridge.

また、本実施形態の電子部品の実装構造によれば、ダミー半田１００は、少なくともＡＩＳＣ１０の角部に対応する位置に形成されている。これにより、ＡＳＩＣ１０の自重を角部で支えることになるので、ＡＳＩＣ１０が主制御基板１１に対して傾いた状態で実装されることを防ぐことができる。   Further, according to the electronic component mounting structure of the present embodiment, the dummy solder 100 is formed at a position corresponding to at least the corner of the AISC 10. Thereby, since the weight of the ASIC 10 is supported by the corners, it is possible to prevent the ASIC 10 from being mounted in a tilted state with respect to the main control board 11.

また、本実施形態の電子部品の実装構造によれば、第２の半田部材はクリーム半田１４である。これにより、従来どおりクリーム半田１４を使用したリフロー半田付けを実施できる。すなわち、従来のリフロー半田付けによる実装方法の工程に影響を与えること無く、複数の半田ボール１２が形成されたＡＳＩＣ１０を主制御基板１１に実装する際に、ＡＳＩＣ１０の自重により半田ボール１２が潰れて、他の半田ボール１２に到達してブリッジを形成することを防止できる。   Further, according to the electronic component mounting structure of the present embodiment, the second solder member is the cream solder 14. Thereby, reflow soldering using cream solder 14 can be implemented as usual. That is, when mounting the ASIC 10 on which the plurality of solder balls 12 are formed on the main control board 11 without affecting the steps of the conventional mounting method by reflow soldering, the solder balls 12 are crushed by the weight of the ASIC 10. Therefore, it is possible to prevent the formation of a bridge by reaching another solder ball 12.

また、本実施形態の電子部品の実装方法によれば、複数の半田ボール１２が形成されたＡＳＩＣ１０と、半田ボール１２と対応する主制御基板１１の実装面の所定の領域に形成された複数の電極パッド１３と、電極パッド１３上に形成された複数のクリーム半田１４と、を半田付けしている。更に、主制御基板１１の実装面の所定の領域外にダミー半田１００を形成するメタルマスク３０を主制御基板１１に載置・位置決めする工程と、メタルマスク３０越しに複数の電極パッド１３にクリーム半田１４を形成する工程と、メタルマスク３０を取り外す工程と、主制御基板１１の所定の場所にＡＳＩＣ１０を載置する工程と、電極パッド１３に形成されたクリーム半田１４及びＡＳＩＣ１０に形成された半田ボール１２をリフロー半田付けする工程と、を有している。   Further, according to the electronic component mounting method of the present embodiment, the ASIC 10 on which the plurality of solder balls 12 are formed and the plurality of regions formed on the predetermined area of the mounting surface of the main control board 11 corresponding to the solder balls 12. The electrode pad 13 and a plurality of cream solders 14 formed on the electrode pad 13 are soldered. Furthermore, a step of placing and positioning the metal mask 30 for forming the dummy solder 100 on the main control substrate 11 outside a predetermined region of the mounting surface of the main control substrate 11, and creaming the electrode pads 13 through the metal mask 30. A step of forming the solder 14, a step of removing the metal mask 30, a step of placing the ASIC 10 at a predetermined location on the main control board 11, and the solder formed on the cream solder 14 and the ASIC 10 formed on the electrode pad 13. And reflow soldering the ball 12.

これにより、メタルマスク３０以外、従来のリフロー半田付けによる実装方法と変更点が無いので、上記の実装方法の工程に与える影響を最小にすることができる。また、主制御基板１１の実装面の所定の領域外に対応するメタルマスク３０の位置に貫通穴１７ｃを形成しさえすれば、所定の領域外にダミー半田１００を形成することができる。以上より、従来のリフロー半田付けによる実装方法の工程に影響を与えること無く、複数の半田ボール１２が形成されたＡＳＩＣ１０を主制御基板１１に実装する際に、ＡＳＩＣ１０の自重により半田ボール１２が潰れて、他の半田ボール１２に到達してブリッジを形成することを防止できる。   Thereby, since there is no change point from the mounting method by the conventional reflow soldering except for the metal mask 30, the influence on the process of the mounting method can be minimized. Further, the dummy solder 100 can be formed outside the predetermined region as long as the through hole 17c is formed at the position of the metal mask 30 corresponding to the outside of the predetermined region on the mounting surface of the main control board 11. As described above, when mounting the ASIC 10 on which the plurality of solder balls 12 are formed on the main control board 11 without affecting the steps of the conventional mounting method by reflow soldering, the solder balls 12 are crushed by the weight of the ASIC 10. Thus, it is possible to prevent the formation of a bridge by reaching another solder ball 12.

また、本実施形態のメタルマスクによれば、複数の半田ボール１２が形成されたＡＳＩＣ１０を、実装面の半田ボール１２と対応する所定の領域に複数の電極パッド１３が形成された主制御基板１１に面実装する工程で、複数の電極パッド１３以外の領域を、クリーム半田１４から防護している。更に、複数の電極パッド１３に対応する位置に形成された貫通穴１７ａと、少なくとも主制御基板１１の実装面の所定の領域外に対応する位置に形成された貫通穴１７ｃとを有し、貫通穴１７ｃの穴径は、貫通穴１７ａの穴径よりも大きくしている。   Further, according to the metal mask of the present embodiment, the ASIC 10 on which the plurality of solder balls 12 are formed is replaced by the main control board 11 on which a plurality of electrode pads 13 are formed in a predetermined region corresponding to the solder balls 12 on the mounting surface. In the surface mounting process, areas other than the plurality of electrode pads 13 are protected from the cream solder 14. Furthermore, it has a through-hole 17a formed at a position corresponding to the plurality of electrode pads 13, and a through-hole 17c formed at a position corresponding to at least a predetermined region outside the mounting surface of the main control board 11, The hole diameter of the hole 17c is larger than the hole diameter of the through hole 17a.

これにより、貫通穴１７ｃの穴径を貫通穴１７ａの穴径よりも大きくすることで、ダミー半田１００の量を、複数の電極パッド１３上に形成されるクリーム半田１４の量より多くすることができる。よって、上記ダミー半田１００の高さを、各半田ボール１２と接続させるクリーム半田１４の高さよりも高くすることができる。   Thereby, by making the hole diameter of the through hole 17c larger than the hole diameter of the through hole 17a, the amount of the dummy solder 100 can be made larger than the amount of the cream solder 14 formed on the plurality of electrode pads 13. it can. Therefore, the height of the dummy solder 100 can be made higher than the height of the cream solder 14 connected to each solder ball 12.

また、本実施形態のメタルマスクによれば、複数の半田ボール１２が形成されたＡＳＩＣ１０を、実装面の半田ボール１２と対応する所定の領域に複数の電極パッド１３が形成された主制御基板１１に面実装する工程で、複数の電極パッド１３以外の領域を、クリーム半田１４から防護している。更に、少なくとも複数の電極パッド１３の角部１３ｂに対応する位置に形成された貫通穴１７ｂと、貫通穴１７ｂ以外の電極パッド１３に対応する位置に形成された貫通穴１７ａと、を有し、貫通穴１７ｂの穴径は、貫通穴１７ａの穴径よりも大きくしている。   Further, according to the metal mask of the present embodiment, the ASIC 10 on which the plurality of solder balls 12 are formed is replaced by the main control board 11 on which a plurality of electrode pads 13 are formed in a predetermined region corresponding to the solder balls 12 on the mounting surface. In the surface mounting process, areas other than the plurality of electrode pads 13 are protected from the cream solder 14. Furthermore, it has a through hole 17b formed at a position corresponding to the corner portion 13b of at least the plurality of electrode pads 13, and a through hole 17a formed at a position corresponding to the electrode pad 13 other than the through hole 17b. The diameter of the through hole 17b is larger than the diameter of the through hole 17a.

これにより、貫通穴１７ｂの穴径を貫通穴１７ａの穴径よりも大きくすることで、電極パッド１３ｂに形成するクリーム半田１４の量を、電極パッド１３ａに形成するクリーム半田１４の量より、多くすることができる。よって、電極パッド１３ｂに形成されたクリーム半田１４と、半田ボール１２とが引き剥がされる方向に応力が加わっても、クリーム半田１４の量を多くすることで、電極パッド１３とＡＳＩＣ１０の半田ボール１２との上記接触不良を防止することができる。   Thereby, the amount of cream solder 14 formed on the electrode pad 13b is larger than the amount of cream solder 14 formed on the electrode pad 13a by making the hole diameter of the through hole 17b larger than the hole diameter of the through hole 17a. can do. Therefore, even if stress is applied in a direction in which the cream solder 14 formed on the electrode pad 13b and the solder ball 12 are peeled off, the amount of the cream solder 14 is increased, so that the solder ball 12 of the electrode pad 13 and the ASIC 10 is increased. And the above contact failure.

なお、本発明の範囲は上述した実施形態に限られず、特許請求の範囲の記載に反しない限り、他の様々な実施形態に適用可能である。例えば、本発明の実施形態では、主制御基板１１にＡＳＩＣ１０を、リフロー半田付けで実装しているが、特にこれに限定されるものでなく、他の半田付けで実装しても良い。   Note that the scope of the present invention is not limited to the above-described embodiments, and can be applied to various other embodiments as long as they do not contradict the description of the claims. For example, in the embodiment of the present invention, the ASIC 10 is mounted on the main control board 11 by reflow soldering. However, the present invention is not limited to this, and may be mounted by other soldering.

また、本実施形態では、半田ボール１２と電極パッド１３をクリーム半田１４を介して、導通させているが、特にこれに限定されるものでなく、他の半田を使用しても良い。また、半田でなくても、導通できれば適用可能である。同様に、ダミー半田１００として、クリーム半田１４を使用しているが、特にこれに限定されるものでなく、何れの半田でも適用可能である。   In the present embodiment, the solder balls 12 and the electrode pads 13 are electrically connected via the cream solder 14, but the present invention is not particularly limited thereto, and other solders may be used. Moreover, even if it is not solder, if it can conduct | electrically_connect, it is applicable. Similarly, the cream solder 14 is used as the dummy solder 100. However, the present invention is not limited to this, and any solder can be applied.

また、本実施形態では、ダミー半田１００をＡＳＩＣ１０の角部、４箇所に形成しているが、特にこれに限定されるものでなく、ＡＳＩＣ１０を支えることができれば、他の場所にあっても良い。   In the present embodiment, the dummy solder 100 is formed at the corners and four places of the ASIC 10. However, the present invention is not limited to this, and may be located at other places as long as the ASIC 10 can be supported. .

また、本実施形態では、メタルマスク３０の貫通穴１７ｂの穴径を貫通穴１７ａの穴径よりも大きくしているが、特にこれに限定されるものでなく、同じにしても良い。しかし、貫通穴１７ｂの穴径を貫通穴１７ａの穴径よりも大きくした方が、電極パッド１３とＡＳＩＣ１０の半田ボール１２との接触不良を防止することができる。   In the present embodiment, the diameter of the through hole 17b of the metal mask 30 is larger than the diameter of the through hole 17a. However, the present invention is not limited to this and may be the same. However, a contact failure between the electrode pad 13 and the solder ball 12 of the ASIC 10 can be prevented by making the diameter of the through hole 17b larger than the diameter of the through hole 17a.

ＡＳＩＣ等のように半田ボールを有する電子部品と、主制御基板の実装面との間にダミーのクリーム半田を介在させて、電子部品を実装した主制御基板等を備える記録装置等であれば、例えば、プリンタ、ファクシミリ装置、コピー装置等であっても適用可能である。   If it is a recording device or the like provided with a main control board or the like on which an electronic component is mounted by interposing a dummy cream solder between the electronic part having a solder ball such as an ASIC and the mounting surface of the main control board, For example, the present invention can be applied to a printer, a facsimile machine, a copying machine, and the like.

本発明の実施形態に係る記録装置の外観を示す斜視図である。1 is a perspective view illustrating an appearance of a recording apparatus according to an embodiment of the present invention. 記録装置に内蔵された主制御基板と電源基板及びその周辺付近を示す斜視図である。FIG. 3 is a perspective view showing a main control board, a power supply board, and the vicinity of the main control board built in the recording apparatus. 図２に示す主制御基板のＡＳＩＣ周辺の拡大平面図である。FIG. 3 is an enlarged plan view around an ASIC of a main control board shown in FIG. 2. 図２に示す主制御基板のＡＳＩＣ周辺の拡大正面図である。FIG. 3 is an enlarged front view around an ASIC of a main control board shown in FIG. 2. 図２に示すＡＳＩＣを実装する前のＡＳＩＣの半田ボールの配置を表す裏面図である。FIG. 3 is a back view showing an arrangement of solder balls of the ASIC before the ASIC shown in FIG. 2 is mounted. 図３に示すＡＳＩＣを実装する前の主制御基板のＡＳＩＣ周辺の拡大平面図である。FIG. 4 is an enlarged plan view around the ASIC of the main control board before mounting the ASIC shown in FIG. 3. 図６に示す主制御基板にＡＳＩＣを実装する工程を示す矢視ＡＡにおける断面図である。FIG. 7 is a cross-sectional view taken along arrow AA showing a process of mounting the ASIC on the main control board shown in FIG. 6. 図７に続く断面図である。It is sectional drawing following FIG. 図７に示すメタルマスクの平面図である。It is a top view of the metal mask shown in FIG. 図９に示すメタルマスクの矢視ＢＢにおける断面図である。It is sectional drawing in the arrow BB of the metal mask shown in FIG.

符号の説明Explanation of symbols

１ 記録装置、２ 上部カバー、３ 上部ハウジング、４ 下部ハウジング、
５ 挿入口、８ 被記録物、９ 電源基板、
１０ ＡＳＩＣ、１１ 主制御基板、１２ 半田ボール、
１３、１３ａ、１３ｂ 電極パッド、１４ クリーム半田、１５ 絶縁材、
１７ａ、１７ｂ、１７ｃ 貫通穴、
１８ スキージ、１９ ダミー半田固定用パッド、
３０ メタルマスク、
４１ コネクタ領域、４２ パワー系部品実装領域、４３ ロジック系部品実装領域、
４４ インターフェイス部、５１ １次側部品群、
１００ ダミー半田
1 recording device, 2 upper cover, 3 upper housing, 4 lower housing,
5 insertion slot, 8 recording object, 9 power supply board,
10 ASIC, 11 main control board, 12 solder balls,
13, 13a, 13b Electrode pad, 14 Cream solder, 15 Insulating material,
17a, 17b, 17c through hole,
18 Squeegee, 19 Dummy solder fixing pad,
30 metal mask,
41 Connector area, 42 Power system component mounting area, 43 Logic system component mounting area,
44 interface part, 51 primary side parts group,
100 dummy solder

Claims (9)

複数の第１の半田部材が形成された電子部品と、実装面の前記第１の半田部材と対応する所定の領域に複数の電極パッドが形成された基板とを含み、前記基板
の実装面の前記複数の電極パッド上に複数の第２の半田部材をそれぞれ形成し、前記
各第１の半田部材と各第２の半田部材とを接続させるように前記電子部品を前記基板
に面実装する電子部品の実装構造において、
更に、前記基板の実装面の前記所定の領域外にダミーとして前記第２の半田部材を形成し、前記電子部品と前記基板の実装面との間に介在させることを特徴とする電子部品の実装構造。 An electronic component having a plurality of first solder members formed thereon; and a substrate having a plurality of electrode pads formed in a predetermined region corresponding to the first solder members on the mounting surface. A plurality of second solder members are formed on the plurality of electrode pads, respectively, and the electronic component is surface-mounted on the substrate so as to connect the first solder members and the second solder members. In the component mounting structure,
Furthermore, the second solder member is formed as a dummy outside the predetermined region of the mounting surface of the substrate, and the electronic component is mounted between the electronic component and the mounting surface of the substrate Construction. 請求項１記載の電子部品の実装構造において、前記ダミーとして形成される第２の半田部材の高さは、前記各第１の半田部材と接続させる第２の半田部材の高さよりも高いことを特徴とする電子部品の実装構造。 2. The electronic component mounting structure according to claim 1, wherein a height of the second solder member formed as the dummy is higher than a height of the second solder member to be connected to each of the first solder members. A mounting structure for electronic components. 請求項１又は２記載の電子部品の実装構造において、前記ダミーとして形成される第２の半田部材は、少なくとも前記電子部品の角部に対応する位置に形成さ
れることを特徴とする電子部品の実装構造。 3. The electronic component mounting structure according to claim 1, wherein the second solder member formed as the dummy is formed at a position corresponding to at least a corner portion of the electronic component. Mounting structure. 請求項１ないし３記載の電子部品の実装構造において、前記第２の半田部
材はクリーム半田であることを特徴とする電子部品の実装構造。 4. The electronic component mounting structure according to claim 1, wherein the second solder member is cream solder. 記録媒体に記録する記録装置であって、請求項１ないし４記載の電子部品の実装構造を備えたことを特徴とする記録装置。 A recording apparatus for recording on a recording medium, comprising the electronic component mounting structure according to claim 1. 請求項１ないし４記載の電子部品の実装構造を備えたことを特徴とする電子機器。 An electronic apparatus comprising the electronic component mounting structure according to claim 1. 複数の第１の半田部材が形成された電子部品と、前記第１の半田部材と対応する基板の実装面の所定の領域に形成された複数の電極パッドと、
前記電極パッド上に形成された複数の第２の半田部材と、を半田付けする電子部品の実装方法において、
前記基板の実装面の前記所定の領域外にダミーとして第２の半田部材を形成するメタルマスクを前記基板に載置・位置決めする工程と、
前記メタルマスク越しに前記複数の電極パッドに第２の半田部材を形成する工程と、
前記メタルマスクを取り外す工程と、
前記基板の所定の場所に前記電子部品を載置する工程と、
前記電極パッドに形成された前記第２の半田部材及び前記電子部品に形成された前記第１の半田部材をリフロー半田付けする工程と、を有することを特徴とする電子部品の実装方法。 An electronic component in which a plurality of first solder members are formed; a plurality of electrode pads formed in a predetermined region of a mounting surface of the substrate corresponding to the first solder members;
In the mounting method of an electronic component for soldering a plurality of second solder members formed on the electrode pad,
Placing and positioning a metal mask on the substrate to form a second solder member as a dummy outside the predetermined region of the mounting surface of the substrate;
Forming a second solder member on the plurality of electrode pads over the metal mask;
Removing the metal mask;
Placing the electronic component on a predetermined location of the substrate;
And reflow soldering the second solder member formed on the electrode pad and the first solder member formed on the electronic component. 複数の第１の半田部材が形成された電子部品を、実装面の前記第１の半田部材と対応する所定の領域に複数の電極パッドが形成された基板に面実装する工程で、前記複数の電極パッド以外の領域を、第２の半田部材から防護するメタルマスクにおいて、
前記複数の電極パッドに対応する位置に形成された第１の貫通穴と、少なくとも前記基板の実装面の前記所定の領域外に対応する位置に形成された第２の貫通穴とを有し、前記第２の貫通穴の穴径は、前記第１の貫通穴の穴径よりも大きいことを特徴とするメタルマスク。 In the step of surface mounting the electronic component having the plurality of first solder members formed on a substrate having a plurality of electrode pads formed in a predetermined region corresponding to the first solder member on the mounting surface, In the metal mask that protects the area other than the electrode pad from the second solder member,
A first through hole formed at a position corresponding to the plurality of electrode pads, and a second through hole formed at a position corresponding to at least the predetermined region of the mounting surface of the substrate; A metal mask, wherein a diameter of the second through hole is larger than a diameter of the first through hole. 複数の第１の半田部材が形成された電子部品を、実装面の前記第１の半田部材と対応する所定の領域に複数の電極パッドが形成された基板に面実装する工程で、前記複数の電極パッド以外の領域を、第２の半田部材から防護するメタルマスクにおいて、
少なくとも前記複数の電極パッドの角部に対応する位置に形成された第２の貫通穴と、前記第２の貫通穴以外の電極パッドに対応する位置に形成された第１の貫通穴と、を有し、前記第２の貫通穴の穴径は、前記第１の貫通穴の穴径よりも大きいことを特徴とするメタルマスク。
In the step of surface mounting the electronic component having the plurality of first solder members formed on a substrate having a plurality of electrode pads formed in a predetermined region corresponding to the first solder member on the mounting surface, In the metal mask that protects the area other than the electrode pad from the second solder member,
A second through hole formed at a position corresponding to at least a corner portion of the plurality of electrode pads, and a first through hole formed at a position corresponding to the electrode pad other than the second through hole. A metal mask, wherein a diameter of the second through hole is larger than a diameter of the first through hole.
JP2005078253A 2005-03-17 2005-03-17 Mounting structure of electronic component, recording device provided with this mounting structure, electronic equipment and method of mounting electronic component Pending JP2006261463A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008227271A (en) * 2007-03-14 2008-09-25 Fujitsu Ltd Electronic device and electronic component mounting method
US20130242516A1 (en) * 2010-10-01 2013-09-19 Meiko Electronics Co., Ltd. Method of Manufacturing Component-Embedded Substrate, and Component-Embedded Substrate Manufactured Using the Method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008227271A (en) * 2007-03-14 2008-09-25 Fujitsu Ltd Electronic device and electronic component mounting method
US20130242516A1 (en) * 2010-10-01 2013-09-19 Meiko Electronics Co., Ltd. Method of Manufacturing Component-Embedded Substrate, and Component-Embedded Substrate Manufactured Using the Method
US9320185B2 (en) * 2010-10-01 2016-04-19 Meiko Electronics Co., Ltd. Method of manufacturing a component-embedded substrate

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