JP2006216836A - Circuit-pattern forming method and circuit board - Google Patents

Circuit-pattern forming method and circuit board Download PDF

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JP2006216836A
JP2006216836A JP2005029006A JP2005029006A JP2006216836A JP 2006216836 A JP2006216836 A JP 2006216836A JP 2005029006 A JP2005029006 A JP 2005029006A JP 2005029006 A JP2005029006 A JP 2005029006A JP 2006216836 A JP2006216836 A JP 2006216836A
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circuit
circuit pattern
stamper
pattern
forming method
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JP4679166B2 (en
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Takahito Inamiya
隆人 稲宮
Takahiro Matsuse
貴裕 松瀬
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Bridgestone Corp
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0002—Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit-pattern forming method and a circuit board obtained by this method whereby the forming of a circuit pattern on a wiring board can be performed at a high speed, a high accuracy, and a low cost when manufacturing IC chips and miscellaneous printed boards. <P>SOLUTION: The circuit-pattern forming method has a process (a) for forming successively on a light transmitting substrate 1 a transcription layer 2 having a light-cured material as its main component and a continuity layer 3, a process (b) for pressing on them thereafter a stamper 10 marked by a circuit pattern, and a process (c) for transcribing at the same time the circuit pattern to the continuity layer 3 and the transcription layer 2. The curing of the transcription layer 2 is performed preferably before peeling the stamper 10 from the substrate. By this circuit-pattern forming method, the circuit pattern is formed on the circuit board. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は回路パターンの形成方法（以下、単に「形成方法」とも称する）および回路基板に関し、詳しくは、ＩＣチップや各種プリント基板の製造に好適に適用可能な微細な回路パターンの形成方法、およびこれにより得られる回路基板に関する。   The present invention relates to a circuit pattern forming method (hereinafter also simply referred to as “forming method”) and a circuit board, and more specifically, a fine circuit pattern forming method that can be suitably applied to the manufacture of IC chips and various printed boards, and This relates to a circuit board obtained.

従来、基板上に回路パターンを形成する方法としては、リソグラフィ技術を用いた半導体プロセスによる回路形成や、導電ペーストを用いたスクリーン印刷などの手法が公知である。しかし、半導体プロセスは非常にファインな工程であるため、設備的にもコスト的にも非常に大掛かりになりがちであるという難点があった。また、導電ペーストを用いた方法も、基材の耐熱性や、ペーストの乾燥に時間がかかるなどの問題があるために、コスト的にもタクト的にも効率が悪いものとなっていた。   Conventionally, as a method for forming a circuit pattern on a substrate, methods such as circuit formation by a semiconductor process using a lithography technique and screen printing using a conductive paste are known. However, since the semiconductor process is a very fine process, there is a problem that it tends to be very large in terms of equipment and cost. In addition, the method using the conductive paste has problems such as heat resistance of the base material and time required for drying the paste, so that it is inefficient in terms of cost and tact.

これに対し、上記のような難点を有することなく、低コストで微細なパターン形成が可能な技術として、ナノインプリントの技術が提案されている。ナノインプリントとは、樹脂をスタンパー（モールド）と基板とで挟み込み、スタンパーに形成されたパターンを樹脂に転写する技術であり、光の波長領域以下であるナノメートルオーダーレベルの微細な加工を実現することが可能である。このナノインプリント法を用いたリソグラフィー技術が１９９５年にＣｈｏｕらにより提唱され、光源波長の短い電子線縮小転写法や極紫外線縮小転写法と比較して装置コストや運用コストを安価にできることが期待されるために、最近、特に注目されている。   On the other hand, a nanoimprint technique has been proposed as a technique capable of forming a fine pattern at low cost without having the above-described drawbacks. Nanoimprinting is a technology in which a resin is sandwiched between a stamper (mold) and a substrate, and the pattern formed on the stamper is transferred to the resin. It realizes fine processing on the nanometer order level that is below the wavelength range of light. Is possible. A lithography technique using this nanoimprint method was proposed by Chou et al. In 1995, and it is expected that the apparatus cost and the operation cost can be reduced compared with the electron beam reduction transfer method and the extreme ultraviolet reduction transfer method with a short light source wavelength. Because of this, it has attracted particular attention recently.

例えば、特許文献１には、所定寸法のパターンをスタンピング成型するにあたり硬化収縮率が２％以下である転写材料を使用する微細パターンの製造方法が記載されている。また、特許文献２には、ナノプリント法における基板からスタンパを隔離する工程の改良を目的として、プレス装置を使い、基板上に微細構造を形成するためのスタンパに、剥離機構を設ける技術が記載されている。
特開２００４−７１９３４号公報（特許請求の範囲等） 特開２００４−２８８８４５号公報（特許請求の範囲等） For example, Patent Document 1 describes a method for manufacturing a fine pattern using a transfer material having a curing shrinkage rate of 2% or less when stamping a pattern having a predetermined dimension. Further, Patent Document 2 describes a technique for providing a peeling mechanism on a stamper for forming a fine structure on a substrate using a press device for the purpose of improving the process of isolating the stamper from the substrate in the nanoprint method. Has been.
JP 2004-71934 A (Claims etc.) JP 2004-288845 A (Claims etc.)

近年、ＩＣチップを利用したＩＣタグやＩＣカードなどが実用化されてきていることに伴い、より高速、高精度で、かつ、低コストで微細な回路パターンを形成することが可能な技術の実現が求められてきている。   Realization of technology capable of forming fine circuit patterns at higher speed, higher accuracy, and lower cost as IC tags and IC cards using IC chips have been put into practical use in recent years. Has been demanded.

そこで本発明の目的は、ＩＣチップや各種プリント基板を製造するにあたり、基板上への回路パターンの形成を、高速、高精度で、かつ、低コストで行うことができる回路パターンの形成方法およびこれにより得られる回路基板を提供することにある。   SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a circuit pattern forming method capable of forming a circuit pattern on a substrate at high speed, high accuracy, and low cost when manufacturing an IC chip or various printed boards. Is to provide a circuit board obtained.

本発明者らは鋭意検討した結果、上記ナノインプリント技術を改良して回路パターンの形成に用いることにより、従来に比しより高速でかつ低コスト、高精度の微細な回路パターンを有する回路基板が実現できることを見出して、本発明を完成するに至った。   As a result of intensive studies, the present inventors have improved the nanoimprint technology and used it to form circuit patterns, thereby realizing a circuit board having a fine circuit pattern that is faster, lower cost, and more accurate than conventional ones. The present invention was completed by finding out what can be done.

即ち、本発明の回路パターン形成方法は、光透過性基板上に、光硬化材料を主成分とする転写層と、導通層とを順次形成した後、回路パターンが刻印されたスタンパーをプレスして、該回路パターンを前記導通層および転写層に同時に転写することを特徴とするものである。前述したように、ナノインプリントの技術をパターン形成に適用することは従来公知であるが、本発明においては、あらかじめ導通層までを形成した状態でプレスを行うことにより、一工程で基板上に回路部が形成できる点で、従来に比しより効率の良いパターン形成が可能となったものである。   That is, in the circuit pattern forming method of the present invention, a transfer layer mainly composed of a photo-curing material and a conductive layer are sequentially formed on a light-transmitting substrate, and then a stamper on which the circuit pattern is engraved is pressed. The circuit pattern is simultaneously transferred to the conductive layer and the transfer layer. As described above, it is conventionally known that the nanoimprint technique is applied to pattern formation. However, in the present invention, the circuit portion is formed on the substrate in one step by performing pressing in a state where the conductive layer is formed in advance. Therefore, it is possible to form a pattern more efficiently than in the prior art.

また、本発明の回路基板は、上記回路パターンの形成方法により回路パターンが形成されてなることを特徴とするものである。   The circuit board of the present invention is characterized in that a circuit pattern is formed by the above-described circuit pattern forming method.

本発明の回路パターン形成方法によれば、上記構成としたことにより、配線板上への回路パターンの形成を、従来に比しより高速かつ高精度で行うことができ、これにより、微細な回路パターンを有する回路基板を低コストで提供することができる。また、スタンパーと転写層との界面に導通層を設けることで、ナノインプリント技術において問題となるスタンパーの剥離性を改善するという効果も得られる。   According to the circuit pattern forming method of the present invention, with the above-described configuration, the circuit pattern can be formed on the wiring board at a higher speed and with higher accuracy than in the past. A circuit board having a pattern can be provided at low cost. Further, by providing a conductive layer at the interface between the stamper and the transfer layer, the effect of improving the peelability of the stamper, which is a problem in the nanoimprint technology, can be obtained.

以下、本発明の好適実施形態について詳細に説明する。
図１に、本発明の回路パターン形成方法の工程図を示す。図示するように、本発明においては、（ａ）光透過性基板１上に、転写層２と、導通層３とを順次形成した後、（ｂ）回路パターンが刻印されたスタンパー１０をプレスして、（ｃ）回路パターンを導通層３および転写層２に同時に転写することで、回路部４を形成している。即ち、本発明では、スタンパー１０のプレス時に、スタンパー１０表面に形成された回路パターンの凹凸が、図１（ｂ）に示すように、導通層３における回路部を構成する部分４とそれ以外の部分５とを分断させる点が重要となる。このように、ナノインプリント技術を用いて直接回路部４の形成を行うことで、ナノメーターオーダーレベル微細な回路パターンを有する回路基板の高速かつ高精度での製造が可能となったものである。 Hereinafter, preferred embodiments of the present invention will be described in detail.
FIG. 1 shows a process chart of a circuit pattern forming method of the present invention. As shown in the figure, in the present invention, (a) a transfer layer 2 and a conductive layer 3 are sequentially formed on a light-transmitting substrate 1, and (b) a stamper 10 on which a circuit pattern is impressed is pressed. (C) The circuit portion 4 is formed by simultaneously transferring the circuit pattern to the conductive layer 3 and the transfer layer 2. In other words, in the present invention, when the stamper 10 is pressed, the unevenness of the circuit pattern formed on the surface of the stamper 10 has a portion 4 constituting the circuit portion in the conductive layer 3 and the other portions as shown in FIG. The point of dividing the portion 5 is important. Thus, by directly forming the circuit portion 4 using the nanoimprint technology, it becomes possible to manufacture a circuit board having a fine circuit pattern on the order of nanometers with high speed and high accuracy.

光透過性基板１としては、従来より知られているものから適宜選択して用いることができ、特に制限されるものではない。例えば、シリコン基板や石英基板、ガラス板などの他、ポリエチレンテレフタレート（ＰＥＴ）、ポリイミド（ＰＩ）などの高分子フィルム等、透明性に優れた材料を用いることができる。   The light-transmitting substrate 1 can be appropriately selected from those conventionally known and is not particularly limited. For example, in addition to a silicon substrate, a quartz substrate, a glass plate, or the like, a material having excellent transparency such as a polymer film such as polyethylene terephthalate (PET) or polyimide (PI) can be used.

また、本発明においては、インプリント法の中でも光硬化材料を用いた光インプリント法を用いるため、転写層２は、光硬化材料を主成分として形成することが必要となる。光インプリント法は、一般的に材料の硬化速度が速いので、熱可塑性材料や熱硬化性材料を用いた熱インプリント法と比較して、プロセス時間をより短くできる利点がある。かかる光インプリント法に用いることのできる光硬化材料は、（ａ）重クロム酸塩系感光性樹脂、（ｂ）光分解型感光性樹脂、（ｃ）光二量化型感光性樹脂、（ｄ）光重合型感光性樹脂に分類される。   In the present invention, since the photoimprint method using a photocuring material is used among the imprint methods, the transfer layer 2 needs to be formed using the photocuring material as a main component. The photoimprint method generally has a high curing rate, and therefore has an advantage that the process time can be shortened as compared with the heat imprint method using a thermoplastic material or a thermosetting material. Photocuring materials that can be used in such a photoimprint method include (a) a dichromate-based photosensitive resin, (b) a photodecomposable photosensitive resin, (c) a photodimerized photosensitive resin, (d) It is classified as a photopolymerization type photosensitive resin.

（ａ）重クロム酸塩系感光性樹脂としては、ゼラチン、グルー、卵白、アラビアゴム、セラミックなどの天然高分子、あるいは、ＰＶＡ（ポリビニルアルコール）、ポリアクリルアミドのような合成高分子に、重クロム酸アンモニウムあるいは重クロム酸カリウムを加えたものを挙げることができる。また、（ｂ）光分解型感光性樹脂としては、芳香族ジアゾニウム塩系樹脂、ｏ−キノンジアジド類樹脂、アジド化合物含有樹脂があり、（ｃ）光二量化型感光性樹脂としては、桂皮酸エステル系樹脂が挙げられる。これらはいずれも、光インプリント法における転写層２の材料として用いることができる。   (A) Bichromate-based photosensitive resins include natural polymers such as gelatin, glue, egg white, gum arabic, and ceramics, or synthetic polymers such as PVA (polyvinyl alcohol) and polyacrylamide, and heavy chromium. Examples include ammonium acid or potassium dichromate. In addition, (b) photodegradable photosensitive resins include aromatic diazonium salt resins, o-quinonediazide resins, and azide compound-containing resins. (C) Photodimerized photosensitive resins include cinnamic acid ester resins. Resin. Any of these can be used as the material of the transfer layer 2 in the photoimprint method.

さらに、（ｄ）光重合型感光性樹脂としては、不飽和二重結合のラジカル重合反応を利用した光ラジカル重合系組成物、二重結合へのチオール基の付加反応を利用した光付加反応系組成物、および、エポキシ基の開環付加反応（カチオン重合）を利用した光カチオン重合系組成物等が挙げられる。このうち光ラジカル重合系組成物としては、（メタ）アクリロイル基、マレイン酸、フマル酸基を官能基として導入した不飽和ポリエステル、不飽和ポリウレタン、不飽和エポキシ樹脂、オリゴエステル（メタ）アクリレート、ポリエーテル（メタ）アクリレートなどが挙げられる。また、二重結合へのチオール基の付加反応を利用した光付加反応系組成物としては、ポリウレタンプレポリマーの末端イソシアネート基にアリルアルコールを反応結合させたポリエンにペンタエリスリトールテトラキス（β−メルカプトプロピオネート）のようなチオール基を持つ化合物が挙げられ、光カチオン重合系組成物としては、光の照射により、ＢＦ3、ＳｎＣｌ4、ＰＦ5などのルイス酸を放出する化合物を光カチオン重合開始剤として用いて、エポキシ基などを光開環重合させるものが挙げられる。また、アクリル系、エポキシ系、ポリシラン系等の感光性樹脂も挙げられる。これら光重合型感光性樹脂は、いずれも本発明に使用可能である。 Furthermore, (d) as a photopolymerizable photosensitive resin, a photoradical polymerization composition using a radical polymerization reaction of an unsaturated double bond, a photoaddition reaction system using an addition reaction of a thiol group to a double bond Examples thereof include a composition and a photocationic polymerization composition utilizing a ring-opening addition reaction (cationic polymerization) of an epoxy group. Among these, as radical photopolymerization compositions, unsaturated polyesters, unsaturated polyurethanes, unsaturated epoxy resins, oligoester (meth) acrylates, poly (meth) acryloyl groups, maleic acid, fumaric acid groups introduced as functional groups are used. Examples include ether (meth) acrylate. In addition, as a photoaddition reaction system composition utilizing the addition reaction of a thiol group to a double bond, pentaerythritol tetrakis (β-mercaptopropio A compound having a thiol group such as nate), and the photocationic polymerization composition is a photocationic polymerization initiator that releases a Lewis acid such as BF 3 , SnCl 4 , or PF 5 by light irradiation. Used for photo ring-opening polymerization of an epoxy group or the like. In addition, photosensitive resins such as acrylic, epoxy, and polysilane are also included. Any of these photopolymerizable photosensitive resins can be used in the present invention.

なお、本発明において転写層２には、良好な分断性を得るためにチクソ性が高いこともしばしば求められ、このためアエロジル等のフィラー、粘着付与剤等を添加してもよい。粘着付与剤としては、例えば、クマロン・インデン樹脂及びクマロン樹脂／ナフテン系油／フェノール樹脂の混合物等のクマロン樹脂；テルペン樹脂、変性テルペル樹脂（例えば、芳香族変性テルペン樹脂）、テルペン−フェノール樹脂及び水添テルペン樹脂等のテルペン系樹脂；ガムロジン、トール油ロジン、ウッドロジン、ロジンのペンタエリスリトール・エステル、ロジンのグリセロール・エステル、水素添加ロジン、水素添加ウッドロジン、水素添加ロジンのメチルエステル、水素添加ロジンのペンタエリスリトール・エステル、水素添加ロジンのトリエチレングリコールのエステル、不均化ロジン、重合ロジン、重合ロジンのグリセロール・エステル及び硬化ロジン等のロジン誘導体；テレピン系粘着付与剤；芳香族炭化水素樹脂、脂肪族系炭化水素樹脂、不飽和炭化水素（オレフィン系、ジオレフィン系）の重合体、イソプレン系樹脂、水素添加炭化水素樹脂、炭化水素系粘着化樹脂、ポリブテン、液状ポリブタジエン及び低分子量ブチルゴム等の石油系炭化水素樹脂；スチレン系樹脂；フェノール系樹脂；キシレン系樹脂を挙げることができる。   In the present invention, the transfer layer 2 is also often required to have high thixotropy in order to obtain good fragmentation. For this reason, a filler such as aerosil, a tackifier or the like may be added. Examples of the tackifier include coumarone resins such as coumarone / indene resin and coumarone resin / naphthenic oil / phenol resin mixture; terpene resin, modified terper resin (for example, aromatic modified terpene resin), terpene-phenol resin, and the like. Terpenic resins such as hydrogenated terpene resins; gum rosin, tall oil rosin, wood rosin, rosin pentaerythritol ester, rosin glycerol ester, hydrogenated rosin, hydrogenated wood rosin, hydrogenated rosin methyl ester, hydrogenated rosin Rosin derivatives such as pentaerythritol ester, triethylene glycol ester of hydrogenated rosin, disproportionated rosin, polymerized rosin, glycerol ester of polymerized rosin and cured rosin; terpine tackifier; aromatic hydrocarbon resin Aliphatic hydrocarbon resins, unsaturated hydrocarbon (olefin, diolefin) polymers, isoprene resins, hydrogenated hydrocarbon resins, hydrocarbon tackifying resins, polybutene, liquid polybutadiene, low molecular weight butyl rubber, etc. Examples thereof include petroleum hydrocarbon resins; styrene resins; phenol resins; xylene resins.

光透過性基板１上への転写層２の形成は、使用する材料に応じて慣用の塗工方法により行えばよく、特に制限されるものではない。例えば、コンマ法、グラビア法等を用いることができる。また、塗工溶液の調製に用いる溶剤としては、特に制限されるものではなく、例えば、アセトン、メチルエチルケトン（ＭＥＫ）、酢酸エチル、酢酸セロソルブ、ジオキサン、テトラヒドロフラン（ＴＨＦ）、ベンゼン、シクロヘキサノン等の慣用の有機溶剤から適宜選択して用いることができる。   Formation of the transfer layer 2 on the light-transmitting substrate 1 may be performed by a conventional coating method depending on the material to be used, and is not particularly limited. For example, a comma method, a gravure method, or the like can be used. In addition, the solvent used for preparing the coating solution is not particularly limited. For example, conventional solvents such as acetone, methyl ethyl ketone (MEK), ethyl acetate, cellosolve, dioxane, tetrahydrofuran (THF), benzene, and cyclohexanone are used. It can be appropriately selected from organic solvents.

また、導通層３の材料としては、パターン形成後に回路部４として機能しうる導電性を有する材料であれば特に制限されるものではなく、従来公知の材料のうちから適宜選定して用いることができる。具体的には例えば、金属、導電性セラミックス、導電性有機膜、半導体などを用いることができる。転写層２上への導通層３の形成方法としては、真空蒸着法、スパッタ法、ＣＶＤ法、電気めっき法、無電解めっき法などを用いることができるが、転写層２が有機材料を主成分とすることから、真空蒸着法を用いることが好ましい。   In addition, the material of the conductive layer 3 is not particularly limited as long as it is a conductive material that can function as the circuit portion 4 after pattern formation, and may be appropriately selected and used from conventionally known materials. it can. Specifically, for example, metals, conductive ceramics, conductive organic films, semiconductors, and the like can be used. As a method for forming the conductive layer 3 on the transfer layer 2, a vacuum deposition method, a sputtering method, a CVD method, an electroplating method, an electroless plating method, or the like can be used. The transfer layer 2 is mainly composed of an organic material. Therefore, it is preferable to use a vacuum deposition method.

本発明においてインプリントに用いるスタンパー１０としては、インプリント法に使用可能な公知のものを用いればよく、特に制限されるものではない。スタンパー１０の表面に、目的とする回路部形状に対応した回路パターンを刻印して用いることで、所望の回路基板を得ることが可能となる。プレス条件としては、前述したように、導通層３を回路部を構成する部分４とそれ以外の部分５とで確実に分断できるものであれば、特に制限はない。   The stamper 10 used for imprinting in the present invention may be any known stamper that can be used for imprinting, and is not particularly limited. A desired circuit board can be obtained by imprinting and using a circuit pattern corresponding to a target circuit portion shape on the surface of the stamper 10. As described above, the pressing condition is not particularly limited as long as the conductive layer 3 can be reliably divided into the portion 4 constituting the circuit portion and the other portion 5 as described above.

本発明においては、光透過性基板１上に順次形成した上記転写層２および導通層３に対しスタンパー１０をプレスした後、スタンパー１０の剥離前に、光透過性基板１側から光（紫外線（ＵＶ）、電子線（ＥＢ）等）を照射して転写層２の硬化を行うことが好ましい。これにより、離型後に転写層２のパターンに歪みが生ずることを防止して、形状精度良く回路パターンを形成することが可能となる。   In the present invention, after the stamper 10 is pressed against the transfer layer 2 and the conductive layer 3 sequentially formed on the light transmissive substrate 1, before the stamper 10 is peeled off, light (ultraviolet ( UV), electron beam (EB), etc.) are preferably irradiated to cure the transfer layer 2. Thereby, it is possible to prevent the pattern of the transfer layer 2 from being distorted after the mold release, and to form a circuit pattern with high shape accuracy.

また、転写層２に対するスタンパー１０の凹凸パターンの転写安定性を向上させ、また、スタンパー１０自体の耐久性を向上させるためには、インプリント後に転写層２とスタンパー１０とが容易に剥離可能であることが重要となる。このため、スタンパー１０の剥離性を向上する目的で、シリコーン系やフッ素系の離型剤をあらかじめスタンパー１０表面に塗布しておくことも有効である。インプリント法用の離型剤としては、例えば、商品名オプツールＤＳＸ（ダイキン工業（株）製）等が挙げられる。   Further, in order to improve the transfer stability of the uneven pattern of the stamper 10 with respect to the transfer layer 2 and to improve the durability of the stamper 10 itself, the transfer layer 2 and the stamper 10 can be easily peeled off after imprinting. It is important to be. For this reason, it is also effective to apply a silicone-based or fluorine-based release agent to the surface of the stamper 10 in advance for the purpose of improving the peelability of the stamper 10. Examples of the mold release agent for the imprint method include trade name OPTOOL DSX (manufactured by Daikin Industries, Ltd.).

なお、インプリント法では、光硬化収縮によりある程度の寸法変化が生ずるため、使用する材料に応じて変化量をあらかじめ予測して、回路形状を設計する必要がある。また、スタンパー１０内に樹脂の残膜が発生する場合がある点にも注意を要する。   In the imprint method, a certain amount of dimensional change occurs due to photocuring shrinkage. Therefore, it is necessary to design the circuit shape by predicting the amount of change in advance according to the material used. Also, it should be noted that a resin residual film may be generated in the stamper 10.

本発明の回路パターン形成方法においては、上記ナノインプリントの手法を用いて回路部を形成する工程を含むものであれば、それ以外の形成条件や材料等については、特に制限されるものではなく、公知技術に従うことができる。また、本発明の回路基板についても、上記各種材料を用い、本発明の形成方法により回路パターンが形成されてなるものであれば、特に制限されるものではない。   In the circuit pattern formation method of the present invention, other formation conditions and materials are not particularly limited as long as the method includes the step of forming the circuit portion using the nanoimprint technique. Can follow technology. Also, the circuit board of the present invention is not particularly limited as long as the circuit pattern is formed by the forming method of the present invention using the above-mentioned various materials.

以下、本発明を、実施例を用いてより詳細に説明する。
まず、下記の表１に示す配合の混合物を穏やかに撹拌しながら１５０℃に加熱して重合を開始させ、この温度で３時間撹拌を続けて、ポリマーを得た。次に、得られたポリマー１００質量部、ヘキサンジオールジアクリレート１１０質量部、ジイソシアネート（東洋インキ製造（株）製、品番ＢＸＸ５６２７）１質量部およびイルガキュア６５１（商品名、チバガイギー（株）製）１質量部の混合物を均一に溶解、混練して、アクリル系転写層形成用の光硬化材料を得た。 Hereinafter, the present invention will be described in more detail with reference to examples.
First, a mixture having the composition shown in Table 1 below was heated to 150 ° C. with gentle stirring to initiate polymerization, and stirring was continued at this temperature for 3 hours to obtain a polymer. Next, 100 parts by weight of the obtained polymer, 110 parts by weight of hexanediol diacrylate, 1 part by weight of diisocyanate (manufactured by Toyo Ink Manufacturing Co., Ltd., product number BXX5627) and 1 part by weight of Irgacure 651 (trade name, manufactured by Ciba Geigy Co., Ltd.) Part of the mixture was uniformly dissolved and kneaded to obtain a photocurable material for forming an acrylic transfer layer.

Figure 2006216836
Figure 2006216836

上記光硬化材料を、石英ガラスからなるＵＶ透過性の基板１上に塗布して、厚さ１０μｍのアクリル系転写層２を形成した。次に、真空下で金を蒸着することにより、この転写層２上に、厚さ１０ｎｍの導通層３を形成した。   The photocurable material was applied onto a UV transmissive substrate 1 made of quartz glass to form an acrylic transfer layer 2 having a thickness of 10 μm. Next, a conductive layer 3 having a thickness of 10 nm was formed on the transfer layer 2 by evaporating gold under vacuum.

次に、回路パターンが刻印されたスタンパー１０をプレスして、その回路パターンを導通層３および転写層２に同時に転写することで、導通層３を回路部を構成する部分４とそれ以外の部分５とに分断した。その後、光透過性基板１０を介して紫外線を照射して転写層２を硬化させ、硬化後、スタンパー１０を剥離することで、凸部に幅約５μｍの回路部４が形成された回路基板を得ることができた。   Next, the stamper 10 on which the circuit pattern is engraved is pressed, and the circuit pattern is simultaneously transferred to the conductive layer 3 and the transfer layer 2, so that the conductive layer 3 forms a circuit portion 4 and other portions. Divided into 5. Thereafter, the transfer layer 2 is cured by irradiating ultraviolet rays through the light-transmitting substrate 10, and after curing, the stamper 10 is peeled off to form a circuit substrate on which the circuit portion 4 having a width of about 5 μm is formed on the convex portion. I was able to get it.

本発明の回路の形成方法は、ＩＣチップや各種プリント基板の製造に好適に適用可能であり、これにより従来に比し高速かつ高精度で製造が可能で、しかも低コストな高性能の回路基板を提供することができる。   The circuit forming method of the present invention can be suitably applied to the manufacture of IC chips and various printed circuit boards, thereby enabling high-speed and high-precision manufacturing compared to the prior art, and low-cost high-performance circuit boards. Can be provided.

（ａ）〜（ｃ）は、本発明の回路の形成方法の一実施の形態に係る工程図である。(A)-(c) is process drawing which concerns on one Embodiment of the formation method of the circuit of this invention.

符号の説明Explanation of symbols

１ 光透過性基板
２ 転写層
３ 導通層
４ 回路部
５ 回路部以外の部分
１０ スタンパー DESCRIPTION OF SYMBOLS 1 Light transmissive board | substrate 2 Transfer layer 3 Conductive layer 4 Circuit part 5 Parts other than a circuit part 10 Stamper

Claims (3)

光透過性基板上に、光硬化材料を主成分とする転写層と、導通層とを順次形成した後、回路パターンが刻印されたスタンパーをプレスして、該回路パターンを前記導通層および転写層に同時に転写することを特徴とする回路パターンの形成方法。   A transfer layer mainly composed of a photo-curing material and a conductive layer are sequentially formed on a light-transmitting substrate, and then a stamper on which a circuit pattern is engraved is pressed, and the circuit pattern is transferred to the conductive layer and the transfer layer. A circuit pattern forming method, wherein the transfer is performed simultaneously. 前記スタンパーの剥離前に、前記転写層の硬化を行う請求項１記載の回路パターンの形成方法。   The circuit pattern forming method according to claim 1, wherein the transfer layer is cured before the stamper is peeled off. 請求項１または２記載の回路パターンの形成方法により回路パターンが形成されてなることを特徴とする回路基板。   A circuit board, wherein a circuit pattern is formed by the circuit pattern forming method according to claim 1.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007026605A1 (en) * 2005-08-30 2007-03-08 Riken Method of forming fine pattern
KR100851068B1 (en) * 2007-02-01 2008-08-12 삼성전기주식회사 Stamper and PCB manufacturing method using thereof
KR101032702B1 (en) 2010-04-19 2011-05-06 삼성전기주식회사 Method of manufacturing printed circuit board for semiconductor package

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002060470A (en) * 2000-08-11 2002-02-26 Asahi Kasei Corp Photosensitive resin composition
JP2002270997A (en) * 2001-03-08 2002-09-20 Hitachi Ltd Method for manufacturing wiring board
JP2004288845A (en) * 2003-03-20 2004-10-14 Hitachi Ltd Stamper for nano-printing and microstructure transfer method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002060470A (en) * 2000-08-11 2002-02-26 Asahi Kasei Corp Photosensitive resin composition
JP2002270997A (en) * 2001-03-08 2002-09-20 Hitachi Ltd Method for manufacturing wiring board
JP2004288845A (en) * 2003-03-20 2004-10-14 Hitachi Ltd Stamper for nano-printing and microstructure transfer method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007026605A1 (en) * 2005-08-30 2007-03-08 Riken Method of forming fine pattern
JP4795356B2 (en) * 2005-08-30 2011-10-19 独立行政法人理化学研究所 Fine pattern forming method
KR100851068B1 (en) * 2007-02-01 2008-08-12 삼성전기주식회사 Stamper and PCB manufacturing method using thereof
KR101032702B1 (en) 2010-04-19 2011-05-06 삼성전기주식회사 Method of manufacturing printed circuit board for semiconductor package

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