JP2006140363A - Semiconductor integrated circuit and designing method thereof - Google Patents

Semiconductor integrated circuit and designing method thereof Download PDF

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JP2006140363A
JP2006140363A JP2004329894A JP2004329894A JP2006140363A JP 2006140363 A JP2006140363 A JP 2006140363A JP 2004329894 A JP2004329894 A JP 2004329894A JP 2004329894 A JP2004329894 A JP 2004329894A JP 2006140363 A JP2006140363 A JP 2006140363A
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power supply
power
wiring
supply wiring
cell
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Yoshitoshi Ariga
俊壽 有賀
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To easily form mesh-structured power supply wiring and to easily perform the optimization of the power supply wiring according to the evaluation result of an impedance characteristic and a noise characteristic of a power supply wiring network. <P>SOLUTION: A semiconductor integrated circuit comprises the power supply wiring W121 of a first power supply wiring group, and the power supply wirings W221 and W212 of a second power supply wiring group that traverse or are perpendicular to the power supply wiring W121. A power supply cell C100, in which the end of each power supply wiring is exposed to the outside, is disposed to form the mesh-structured power supply wiring, thereby enabling the easy formation of the mesh-structured power supply wiring. In addition, the power supply wiring is disposed such that it has several kinds of power supply cells having different power supply wiring widths, and the mesh-structured power supply wiring is formed using the optimum power supply width after evaluating the noise interrupting characteristic and power supply wiring impedance. Therefore, it is possible to easily form the mesh-structured power supply wiring and to perform optimization according to the evaluation result of the impedance characteristic and the noise characteristic of the power supply wiring network. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、メッシュ構造の電源配線を有する半導体集積回路およびその設計方法に関するものである。   The present invention relates to a semiconductor integrated circuit having a mesh structure power supply wiring and a design method thereof.

従来の半導体集積回路の電源配線は、複数の単独配線を半導体集積回路上に引き回すことにより、構成されていた。特にメッシュ構造を持った電源配線は複数の配線レイヤを用いてメッシュ構造を作成し、さらに補強の必要な部分に配線を加えるという手法で行なわれていた（例えば、特許文献１参照）。
特開平８−３２１５５１号公報 The power supply wiring of the conventional semiconductor integrated circuit is configured by drawing a plurality of single wirings on the semiconductor integrated circuit. In particular, power supply wiring having a mesh structure has been performed by a method of creating a mesh structure using a plurality of wiring layers and further adding wiring to a portion requiring reinforcement (see, for example, Patent Document 1).
JP-A-8-321551

従来の半導体集積回路における電源配線は、電源配線１本１本それぞれを引くことにより実現しているため、特にメッシュ構造の電源配線等では、電源配線の実現そのものに手間がかかるという問題点があった。また、電源配線ネットワークのインピーダンス特性や、ノイズ特性の評価を行いその結果による最適化を施すことが困難であるという問題点がある。   Since the power supply wiring in the conventional semiconductor integrated circuit is realized by drawing each power supply wiring one by one, there is a problem that the power supply wiring itself is troublesome in particular in the case of mesh power supply wiring. It was. In addition, there is a problem that it is difficult to evaluate the impedance characteristic and noise characteristic of the power supply wiring network and perform optimization based on the result.

以上の問題点を解決するために、本発明の半導体集積回路の電源配線ならびに電源配線設計方法は、メッシュ構造の電源配線を容易に行い、電源配線ネットワークのインピーダンス特性や、ノイズ特性の評価結果に対応した最適化を容易に行なうことを目的とする。   In order to solve the above problems, the power supply wiring and power supply wiring design method of the semiconductor integrated circuit according to the present invention facilitates the power supply wiring of the mesh structure, and the evaluation results of the impedance characteristics and noise characteristics of the power supply wiring network are obtained. The purpose is to easily perform corresponding optimization.

上記目的を達成するために、本発明の請求項１記載の半導体集積回路は、電源セルを介してメッシュ構造の電源配線を行う半導体集積回路であって、前記電源セルが、１または２以上の電位の電源配線より成る第１の電源配線群と、１または２以上の電位の電源配線より成り前記第１の電源配線群と交差する第２の電源配線群と、同電位である前記第１の電源配線群の電源配線および前記第２の電源配線群の電源配線を電気的に接続するビアとを有し、前記第１の電源配線群および前記第２の電源配線群の配線端部は前記電源セルの端部に位置し、複数の前記電源セルを前記電源セルの同電位の電源配線が電気的に接続するように互いに隣接させて配置することによりメッシュ構造の電源配線を形成することを特徴とする。   In order to achieve the above object, a semiconductor integrated circuit according to claim 1 of the present invention is a semiconductor integrated circuit in which mesh structure power supply wiring is performed through power supply cells, and the power supply cell includes one or more power supply cells. A first power supply wiring group consisting of power supply wirings having a potential, a second power supply wiring group consisting of power supply wirings having one or more potentials and intersecting the first power supply wiring group, and the first power supply having the same potential. And a via for electrically connecting the power supply wiring of the second power supply wiring group and the wiring ends of the first power supply wiring group and the second power supply wiring group, A mesh-structured power supply wiring is formed by disposing a plurality of the power supply cells adjacent to each other so that the power supply wirings of the same potential of the power supply cells are electrically connected to each other, positioned at the end of the power supply cell. It is characterized by.

請求項２記載の半導体集積回路は、請求項１記載の半導体集積回路において、前記メッシュ構造の電源配線を形成する電源セルのうち前記第２の電源配線群が不要な領域に配置する電源セルは前記第１の電源配線群のみを有することを特徴とする。   According to a second aspect of the present invention, in the semiconductor integrated circuit according to the first aspect, among the power supply cells forming the mesh-structured power supply wiring, the power supply cell disposed in an area where the second power supply wiring group is not required. It has only the first power supply wiring group.

請求項３記載の半導体集積回路は、請求項１記載の半導体集積回路において、前記第１の電源配線群と前記第２の電源配線群が互いに垂直に交差することを特徴とする。
請求項４記載の半導体集積回路は、請求項１記載の半導体集積回路において、前記電源セルの前記第１の電源配線群が任意の電源配線幅を有し、第１の電源配線群の電源配線幅が異なる電源セルを任意に組み合わせて配置することによりメッシュ構造の電源配線を形成することを特徴とする。 According to a third aspect of the present invention, in the semiconductor integrated circuit according to the first aspect, the first power supply wiring group and the second power supply wiring group intersect each other vertically.
The semiconductor integrated circuit according to claim 4 is the semiconductor integrated circuit according to claim 1, wherein the first power supply wiring group of the power supply cell has an arbitrary power supply wiring width, and the power supply wiring of the first power supply wiring group A power wiring having a mesh structure is formed by arranging power cells having different widths in any combination.

請求項５記載の半導体集積回路は、請求項１記載または請求項４記載の半導体集積回路において、前記電源セルの前記第２の電源配線群が任意の電源配線幅を有し、第２の電源配線群の電源配線幅が異なる電源セルを任意に組み合わせて配置することによりメッシュ構造の電源配線を形成することを特徴とする。   The semiconductor integrated circuit according to claim 5 is the semiconductor integrated circuit according to claim 1 or 4, wherein the second power supply wiring group of the power supply cell has an arbitrary power supply wiring width, and the second power supply A power supply wiring having a mesh structure is formed by arranging power supply cells having different power supply wiring widths in the wiring group in any combination.

請求項６記載の半導体集積回路は、請求項１記載の半導体集積回路において、前記電源セルに対して前記第１の電源配線群に平行して配線された１または２以上の信号配線から成る第１の信号配線群を付加することを特徴とする。   A semiconductor integrated circuit according to claim 6 is the semiconductor integrated circuit according to claim 1, wherein the first integrated circuit includes one or more signal wirings arranged in parallel to the first power supply wiring group with respect to the power supply cell. One signal wiring group is added.

請求項７記載の半導体集積回路は、請求項１または請求項６のいずれかに記載の半導体集積回路において、前記電源セルに対して前記第２の電源配線群に平行して配線された１または２以上の信号配線から成る第２の信号配線群を付加されることを特徴とする。   A semiconductor integrated circuit according to claim 7 is the semiconductor integrated circuit according to claim 1 or 6, wherein the power supply cell is wired in parallel with the second power supply wiring group. A second signal wiring group composed of two or more signal wirings is added.

請求項８記載の半導体集積回路は、請求項１記載の半導体集積回路において、前記電源セルの前記電源配線群の電位差にカップリングキャパシタンスを設けることを特徴とする。
請求項９記載の半導体集積回路は、請求項１記載の半導体集積回路において、前記電源セルに対して第１の電源配線群の電源配線と、前記電源配線と同電位の第２の電源配線群の電源配線の間に、導通状態と非導通状態とを電気的に切り替えることを可能とするスイッチを備えることを特徴とする。 A semiconductor integrated circuit according to an eighth aspect is the semiconductor integrated circuit according to the first aspect, wherein a coupling capacitance is provided in a potential difference of the power supply wiring group of the power supply cell.
The semiconductor integrated circuit according to claim 9 is the semiconductor integrated circuit according to claim 1, wherein a power supply wiring of a first power supply wiring group and a second power supply wiring group having the same potential as the power supply wiring with respect to the power supply cell. The power supply wiring includes a switch that can be electrically switched between a conductive state and a non-conductive state.

請求項１０記載の半導体集積回路は、請求項９記載の半導体集積回路において、前記電源セルに備えたスイッチが、前記第１の電源配線群の電源配線の電位と、前記第２の電源配線群の電源配線の電位の差が生じたときに前記スイッチを導通状態へと制御することを特徴とする。   The semiconductor integrated circuit according to claim 10 is the semiconductor integrated circuit according to claim 9, wherein the switch provided in the power supply cell includes a potential of the power supply wiring of the first power supply wiring group and the second power supply wiring group. The switch is controlled to be in a conductive state when a potential difference occurs between the power supply wirings.

請求項１１記載の半導体集積回路は、請求項１記載の半導体集積回路において、前記メッシュ構造の電源配線を形成するセルの一部が通常動作用のセルとなった場合に、前記通常セルが隣接する電源セルの接続を要する電源配線を配線処理により電気的に接続することを特徴とする。   The semiconductor integrated circuit according to claim 11 is the semiconductor integrated circuit according to claim 1, wherein when the part of the cells forming the mesh-structured power supply wiring becomes a cell for normal operation, the normal cell is adjacent. The power supply wiring that requires connection of the power cells to be connected is electrically connected by wiring processing.

請求項１２記載の半導体集積回路の設計方法は、請求項４または請求項５に記載の半導体集積回路の設計方法であって、メッシュ構造の電源配線を形成するために前記電源セルを初期配置する工程と、電源配線ネットワークのノイズ遮断特性が所定の値を満たすかを評価する工程と、ノイズ遮断特性の悪い箇所の電源セルを抽出する工程と、前記抽出した電源セルをノイズ遮断特性が良化する電源配線幅の電源セルに置き換える工程とを有し、ノイズ遮断特性が所定の値を満たすまでノイズ遮断特性評価から電源セル置き換え工程を繰り返すことを特徴とする。   The semiconductor integrated circuit design method according to claim 12 is the semiconductor integrated circuit design method according to claim 4 or 5, wherein the power supply cells are initially arranged to form a mesh-structured power supply wiring. A process, a step of evaluating whether the noise cutoff characteristic of the power supply wiring network satisfies a predetermined value, a step of extracting a power cell in a location where the noise cutoff characteristic is bad, and the noise cutoff characteristic of the extracted power cell is improved And replacing the power cell with a power cell having a power line width to repeat the power cell replacement process from the noise cutoff characteristic evaluation until the noise cutoff characteristic satisfies a predetermined value.

請求項１３記載の半導体集積回路の設計方法は、請求項４または請求項５に記載の半導体集積回路の設計方法であって、メッシュ構造の電源配線を形成するために前記電源セルを初期配置する工程と、電源配線インピーダンスが所定の値を満たすかを評価する工程と、電源配線インピーダンスの高い箇所の電源セルを抽出する工程と、前記抽出した電源セルを電源配線インピーダンスが低下する電源配線幅の電源セルに置き換える工程とを有し、電源配線インピーダンスが所定の値を満たすまで電源配線インピーダンス評価から電源セル置き換え工程を繰り返すことを特徴とする。   A semiconductor integrated circuit design method according to claim 13 is the semiconductor integrated circuit design method according to claim 4 or 5, wherein the power supply cells are initially arranged to form a power supply wiring having a mesh structure. A step of evaluating whether the power supply wiring impedance satisfies a predetermined value, a step of extracting a power supply cell at a location where the power supply wiring impedance is high, and a power supply wiring width for reducing the power supply wiring impedance of the extracted power supply cell And replacing the power cell with the power cell, and repeating the power cell replacement process from the power wiring impedance evaluation until the power wiring impedance satisfies a predetermined value.

以上により、メッシュ構造の電源配線を容易に行い、電源配線ネットワークのインピーダンス特性や、ノイズ特性の評価結果に対応した最適化を容易に行うことができる。   As described above, power supply wiring having a mesh structure can be easily performed, and optimization corresponding to the evaluation results of the impedance characteristics and noise characteristics of the power supply wiring network can be easily performed.

本発明の半導体集積回路は、第１の電源配線群および第１の電源配線群と交差あるいは直交する第２の電源配線群とを備え、各電源配線の端部が外部に露出する電源セルを、メッシュ構造の電源配線を形成するように配置することにより、メッシュ構造の電源配線を容易に行うことができる。   A semiconductor integrated circuit according to the present invention includes a first power supply wiring group and a second power supply wiring group intersecting or orthogonal to the first power supply wiring group, and a power supply cell in which an end portion of each power supply wiring is exposed to the outside. By arranging so as to form the power wiring of the mesh structure, the power wiring of the mesh structure can be easily performed.

本発明の半導体集積回路および半導体集積回路の製造方法は、電源配線幅が異なる数種類の電源セルを有し、ノイズ遮断特性や電源配線インピーダンスを評価して最適な電源配線幅の電源セルを用いてメッシュ構造の電源配線を形成するように配置することにより、メッシュ構造の電源配線を容易に行い、電源配線ネットワークのインピーダンス特性や、ノイズ特性の評価結果に対応した最適化を容易に行うことができる。   The semiconductor integrated circuit and the method of manufacturing a semiconductor integrated circuit according to the present invention have several types of power cells having different power wiring widths, and use the power cells having the optimum power wiring width by evaluating noise cutoff characteristics and power wiring impedance. By arranging to form mesh structure power supply wiring, mesh structure power supply wiring can be easily performed, and optimization corresponding to the evaluation results of the impedance characteristics and noise characteristics of the power supply wiring network can be easily performed. .

以下、本発明の実施の形態を、図面を参照しながら説明する。
（実施の形態１）
図１は実施の形態１における電源セルの構成を示す図である。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(Embodiment 1)
FIG. 1 is a diagram showing a configuration of a power cell in the first embodiment.

図１において、Ｗ１１１は第１の電源配線群の電位１の配線、Ｗ１１２は第１の電源配線群の電位２の配線、Ｗ２１１は第２の電源配線群の電位１の配線、Ｗ２１２は第２の電源配線群の電位２の配線、ＶＩＡはそれぞれ同電位の電源配線を電気的に接続するビアである。図１（ａ）に示すＣ１００は電源セルであり、電源セルＣ１００の向かい合う２辺にそれぞれ第１の電源配線群の電位１の配線Ｗ１１１と第１の電源配線群の電位２の配線Ｗ１１２を形成し、これらの配線と交差するように第２の電源配線群の電位１の配線Ｗ２１１と第２の電源配線群の電位２の配線Ｗ２１２を平行に形成している。この時、各配線の端部は隣接して配置された電源セルＣ１００の同種の配線と電気的に接続するように電源セルの端部に位置するように形成される。図１（ｂ）に示すＣ１０１は電源セルであり、Ｃ１００の第２の電源配線群とＶＩＡを省き、メッシュ構造の電源配線の内第１の電源配線群のみを形成する構成である。   In FIG. 1, W111 is a potential 1 wiring of the first power wiring group, W112 is a potential 2 wiring of the first power wiring group, W211 is a potential 1 wiring of the second power wiring group, and W212 is a second power wiring. In the power supply wiring group, the potential 2 wiring VIA is a via for electrically connecting the power supply wirings of the same potential. C100 shown in FIG. 1A is a power cell, and the potential W1 of the first power supply wiring group and the wiring W112 of the first power supply wiring group are formed on the two opposite sides of the power supply cell C100, respectively. In addition, the wiring W211 with the potential 1 of the second power supply wiring group and the wiring W212 with the potential 2 of the second power supply wiring group are formed in parallel so as to cross these wirings. At this time, the end portions of the respective wirings are formed so as to be positioned at the end portions of the power supply cells so as to be electrically connected to the same type of wirings of the power supply cell C100 arranged adjacent to each other. C101 shown in FIG. 1B is a power cell, and has a configuration in which the second power supply wiring group of C100 and VIA are omitted, and only the first power supply wiring group of the mesh structure power supply wiring is formed.

また、図２は実施の形態１における電源セルを用いて構成した半導体集積回路を表す図である。
図２において、Ｗ１２１は第１の電源配線群の電位１の配線、Ｗ１２２は第１の電源配線群の電位２の配線、Ｗ２２１は第２の電源配線群の電位１の配線、Ｗ２２２は第２の電源配線群の電位２の配線、Ｗ３２１は第３の電源配線群の電位１の配線、Ｗ３２２は第３の電源配線群の電位２の配線、ＶＩＡはそれぞれ同電位の電源配線を電気的に接続するビアを示し、図２中のＣ１００は図１に示した電源セルであることを示している。図２のように、電源配線がメッシュ構造に形成されるように電源セルＣ１００およびＣ１０１を任意に隣接して配置することですなわち、第１の電源配線群の電位１の配線Ｗ１２１は第２の電源配線群の電位１の配線Ｗ２２１を経て第３の電源配線群の電位１の配線Ｗ３２１と電気的に接続され、同様に電位２の配線Ｗ１２２,Ｗ２２２,Ｗ３２２同士も相互に接続される。 FIG. 2 is a diagram illustrating a semiconductor integrated circuit configured using the power supply cell according to the first embodiment.
In FIG. 2, W121 is a potential 1 wiring of the first power wiring group, W122 is a potential 2 wiring of the first power wiring group, W221 is a potential 1 wiring of the second power wiring group, and W222 is a second power wiring. Wiring of potential 2 of the power supply wiring group, W321 is wiring of potential 1 of the third power supply wiring group, W322 is wiring of potential 2 of the third power supply wiring group, and VIA is a power wiring of the same potential. The vias to be connected are shown, and C100 in FIG. 2 indicates the power cell shown in FIG. As shown in FIG. 2, the power supply cells C100 and C101 are arranged arbitrarily adjacent to each other so that the power supply wiring is formed in a mesh structure. Via the wiring W221 having the potential 1 of the power supply wiring group, the wiring W321 having the potential 1 of the third power supply wiring group is electrically connected. Similarly, the wirings W122, W222, W322 having the potential 2 are also connected to each other.

このことで示される通り、電源セルの端部まで形成された各配線は電源セルの配置により電気的に接続されるので、配線処理を施すことなく電源配線のメッシュ構造が形成されることとなり、メッシュ構造の電源配線を容易に行うことができる。
（実施の形態２）
図３は実施の形態２における電源セルの構成を示す図である。 As shown by this, each wiring formed up to the end of the power cell is electrically connected by the arrangement of the power cell, so that a mesh structure of the power wiring is formed without performing wiring processing. The mesh structure power supply wiring can be easily performed.
(Embodiment 2)
FIG. 3 is a diagram showing a configuration of the power cell in the second embodiment.

図３において、Ｗ１３１は第１の電源配線群の電位１の配線、Ｗ１３２は第１の電源配線群の電位２の配線、Ｗ２３１は第２の電源配線群の電位１の配線、Ｗ２３２は第２の電源配線群の電位２の配線、ＶＩＡはそれぞれ同電位の電源配線を電気的に接続するビアであり、これらで構成される電源セルをＣ１３０とする。この電源セルＣ１３０は図１に示した電源セルＣ１００と異なり電源配線群が直交している。実施の形態１の場合と同様に、電源配線がメッシュ構造に形成されるように電源セルＣ１３０およびＣ１０１を配置することで、電源セルの端部まで形成された各配線が電気的に接続されるので、配線処理を施すことなく電源配線のメッシュ構造が形成されるので、メッシュ構造の電源配線を容易に行うことができる。
（実施の形態３）
図４は実施の形態３における電源セル１の構成を示す図、図５は実施の形態３における電源セル２の構成を示す図、図６は実施の形態３における電源セル１，電源セル２を用いて構成した半導体集積回路を表す図を示す。 In FIG. 3, W131 is a potential 1 wiring of the first power supply wiring group, W132 is a potential 2 wiring of the first power supply wiring group, W231 is a potential 1 wiring of the second power supply wiring group, and W232 is a second wiring. The power supply wiring group VIA and VIA are vias that electrically connect the power supply wirings of the same potential, and the power cell constituted by these is C130. Unlike the power supply cell C100 shown in FIG. 1, the power supply cell C130 has power supply wiring groups orthogonal to each other. As in the case of the first embodiment, by arranging power supply cells C130 and C101 so that the power supply wiring is formed in a mesh structure, the wirings formed up to the end of the power supply cell are electrically connected. Therefore, since the mesh structure of the power supply wiring is formed without performing the wiring process, the power supply wiring of the mesh structure can be easily performed.
(Embodiment 3)
4 is a diagram showing the configuration of the power cell 1 in the third embodiment, FIG. 5 is a diagram showing the configuration of the power cell 2 in the third embodiment, and FIG. 6 shows the power cell 1 and the power cell 2 in the third embodiment. The figure showing the semiconductor integrated circuit comprised using is shown.

図４において、Ｗ１４１は第１の電源配線群の電位１の配線、Ｗ１４２は第１の電源配線群の電位２の配線、Ｗ２４１は第２の電源配線群の電位１の配線、Ｗ２４２は第２の電源配線群の電位２の配線、ＶＩＡは同電位間の電源配線どうしを接続するビア、これらで構成される電源セル１をＣ１４１とし、構造は電源セルＣ１３０と同様である。同じく図５において、Ｗ１５１は第１の電源配線群の電位１の配線、Ｗ１５２は第１の電源配線群の電位２の配線、Ｗ２５１は第２の電源配線群の電位１の配線、Ｗ２５２は第２の電源配線群の電位２の配線、ＶＩＡは同電位間の電源配線どうしを接続するビア、これらで構成される電源セル２をＣ１４２とする。図４で示される電源セル１−Ｃ１４１と図５で示される電源セル２−Ｃ１４２の大きな違いは、第２の電源配線群の配線幅が電源セル２−Ｃ１４２の方が太いことである。   In FIG. 4, W141 is a potential 1 wiring of the first power supply wiring group, W142 is a potential 2 wiring of the first power supply wiring group, W241 is a potential 1 wiring of the second power supply wiring group, and W242 is a second power supply wiring. In the power supply wiring group, the power supply wiring group VIA, VIA is a via for connecting power supply wirings of the same potential, and the power supply cell 1 constituted by these is C141, and the structure is the same as that of the power supply cell C130. Similarly, in FIG. 5, W151 is a potential 1 wiring of the first power supply wiring group, W152 is a potential 2 wiring of the first power supply wiring group, W251 is a potential 1 wiring of the second power supply wiring group, and W252 is a first wiring. Reference numeral 2 in the power supply wiring group 2, VIA is a via for connecting the power supply wirings between the same potential, and the power supply cell 2 constituted by these is C142. The major difference between the power cell 1-C141 shown in FIG. 4 and the power cell 2-C142 shown in FIG. 5 is that the wiring width of the second power supply wiring group is larger in the power cell 2-C142.

図６において、Ｗ１６１は第１の電源配線群の電位１の配線、Ｗ１６２は第１の電源配線群の電位２の配線、Ｗ２６１は第２の電源配線群の電位１の配線、Ｗ２６２は第２の電源配線群の電位２の配線、Ｗ３６１は第３の電源配線群の電位１の配線、Ｗ３６２は第３の電源配線群の電位２の配線、ＶＩＡはそれぞれ同電位の電源配線どうしを接続するビア、Ｃ１４１は図４に示した電源セル１、Ｃ１４２は図５に示した電源セル２を示す。   In FIG. 6, W161 is a potential 1 wiring of the first power wiring group, W162 is a potential 2 wiring of the first power wiring group, W261 is a potential 1 wiring of the second power wiring group, and W262 is a second power wiring. Wiring of potential 2 of the power supply wiring group, W361 is wiring of potential 1 of the third power supply wiring group, W362 is wiring of potential 2 of the third power supply wiring group, and VIA connects power supply wirings of the same potential to each other. Vias C141 indicate the power supply cell 1 shown in FIG. 4, and C142 shows the power supply cell 2 shown in FIG.

図６に示す半導体集積回路は、電源配線がメッシュ構造に形成されるように電源セルＣ１４１，Ｃ１４２およびＣ１０１を隣接して配置することで、電源セルの端部まで形成された各配線が電気的に接続され、配線処理を施すことなく電源配線のメッシュ構造が形成されるので、メッシュ構造の電源配線を容易に行うことができる。   In the semiconductor integrated circuit shown in FIG. 6, the power supply cells C141, C142 and C101 are arranged adjacent to each other so that the power supply wiring is formed in a mesh structure, so that each wiring formed up to the end of the power supply cell is electrically connected. Since the mesh structure of the power supply wiring is formed without performing wiring processing, the power supply wiring of the mesh structure can be easily performed.

また、Ｃ１４１とＣ１４２は第２の電源配線群の配線幅が異なるものの、セルを相互に入れ替えても第２の電源配線群の配線は途切れることなく接続され続ける構成であるため、セルを相互に入れ替えることが可能であり、電源配線ネットワークのインピーダンス特性やノイズ特性の評価結果に対応した最適化を容易に行うことができる。
ここで、第２の電源配線群の配線幅が異なる構成について説明したが、第１の電源配線群の配線幅が異なる構成としても同様の効果を得ることができる。
（実施の形態４）
図７は実施の形態４における電源セルの構成を示す図である。 In addition, although C141 and C142 have a configuration in which the wiring width of the second power supply wiring group is different, the wiring of the second power supply wiring group continues to be connected without interruption even if the cells are replaced with each other. It is possible to replace them, and optimization corresponding to the evaluation results of the impedance characteristics and noise characteristics of the power supply wiring network can be easily performed.
Here, the configuration in which the wiring width of the second power supply wiring group is different has been described, but the same effect can be obtained even if the wiring width of the first power supply wiring group is different.
(Embodiment 4)
FIG. 7 is a diagram showing the configuration of the power cell in the fourth embodiment.

図７において、Ｗ１７１は第１の電源配線群の電位１の配線、Ｗ１７２は第１の電源配線群の電位２の配線、Ｗ２７１は第２の電源配線群の電位１の配線、Ｗ２７２は第２の電源配線群の電位２の配線、Ｓ１７０は１本以上の信号配線からなる第１の信号配線群の配線、ＶＩＡは同電位の配線どうしを接続するビア、これらにより構成される電源セルをＣ１７０としている。電源セルＣ１７０は既に説明した電源セルに対して第１の信号配線群の配線Ｓ１７０を追加した構成であり、第１の電源配線群と、第１の信号配線群Ｓ１７０は平行に配線された電源セルとなっている。   In FIG. 7, W171 is a potential 1 wiring of the first power wiring group, W172 is a potential 2 wiring of the first power wiring group, W271 is a potential 1 wiring of the second power wiring group, and W272 is a second power wiring. A wiring of potential 2 of the power supply wiring group, S170 is a wiring of the first signal wiring group made up of one or more signal wirings, VIA is a via connecting the wirings of the same potential, and a power cell constituted by these is C170. It is said. The power cell C170 has a configuration in which a wiring S170 of the first signal wiring group is added to the power cell described above, and the first power wiring group and the first signal wiring group S170 are power supplies wired in parallel. It is a cell.

このことにより、メッシュ構造の電源配線を容易に行うことができると共に、例えばシールドの必要な信号に対して第１の信号配線群の配線Ｓ１７０を用いることで、第１の信号配線群の配線Ｓ１７０が電源配線間に隣接して配線されているためにシールド効果を得られ、電源配線を有効に利用した配線が可能となる。
（実施の形態５）
図８は実施の形態５における電源セルの構成を示す図である。 Accordingly, the power wiring of the mesh structure can be easily performed, and the wiring S170 of the first signal wiring group is used by using the wiring S170 of the first signal wiring group for a signal that needs to be shielded, for example. Is provided adjacent to each other between the power supply wirings, a shielding effect can be obtained, and wiring using the power supply wirings effectively is possible.
(Embodiment 5)
FIG. 8 is a diagram showing the configuration of the power cell in the fifth embodiment.

図８において、Ｗ１８１は第１の電源配線群の電位１の配線、Ｗ１８２は第１の電源配線群の電位２の配線、Ｗ２８１は第２の電源配線群の電位１の配線、Ｗ２８２は第２の電源配線群の電位２の配線、Ｓ１８１は１本以上の信号配線からなる第２の信号配線群の配線１、Ｓ１８２は１本以上の信号配線からなる第２の信号配線群の配線２、ＶＩＡは同電位の配線どうしを接続するビア、これらにより構成される電源セルをＣ１８０としている。電源セルＣ１８０は既に説明した電源セルに対して第２の信号配線群の配線を追加した構成であり、第２の電源配線群と、第２の信号配線群は平行に配線された電源セルとなっている。   In FIG. 8, W181 is a potential 1 wiring of the first power wiring group, W182 is a potential 2 wiring of the first power wiring group, W281 is a potential 1 wiring of the second power wiring group, and W282 is a second power wiring. Wiring of potential 2 in the power supply wiring group, S181 is wiring 1 of the second signal wiring group consisting of one or more signal wirings, S182 is wiring 2 of the second signal wiring group consisting of one or more signal wirings, VIA has a via for connecting wirings of the same potential, and a power cell constituted by these via C180. The power cell C180 has a configuration in which the wiring of the second signal wiring group is added to the power cell described above, and the second power wiring group and the second signal wiring group are power cells that are wired in parallel. It has become.

このことにより、メッシュ構造の電源配線を容易に行うことができると共に、例えばシールドの必要な信号に対して第２の信号配線群の配線を用いることで、第２の信号配線群の配線が電源配線間に隣接して配線されているためにシールド効果を得られ、電源配線を有効に利用した配線が可能となる。
（実施の形態６）
図９は実施の形態６における電源セルの構成を示す図である。 As a result, the power wiring of the mesh structure can be easily performed and, for example, the wiring of the second signal wiring group can be connected to the power by using the wiring of the second signal wiring group for the signal that needs to be shielded. Since the wiring is arranged adjacent to each other between the wirings, a shielding effect can be obtained, and wiring using the power supply wiring effectively becomes possible.
(Embodiment 6)
FIG. 9 is a diagram showing a configuration of a power cell in the sixth embodiment.

図９において、Ｗ１９１は第１の電源配線群の電位１の配線、Ｗ１９２は第１の電源配線群の電位２の配線、Ｗ２９１は第２の電源配線群の電位１の配線、Ｗ２９２は第２の電源配線群の電位２の配線、Ｓ１９１は１本以上の信号配線からなる第１の信号配線群の配線１、Ｓ２９１は１本以上の信号配線からなる第２の信号配線群の配線１、Ｓ２９２は１本以上の信号配線からなる第２の信号配線群の配線２、ＶＩＡは同電位の配線どうしを接続するビア、これらにより構成される電源セルをＣ１９０としている。電源セルＣ１９０は実施の形態４の第１の信号配線群Ｓ１７０と実施の形態５の第２の信号配線群Ｓ１８１とを同時に備える構成であり、第１の電源配線群と、第１の信号配線群は平行に配線され、また第２の電源配線群と第２の信号配線群は平行に配線された電源セルとなっている。   In FIG. 9, W191 is a potential 1 wiring of the first power wiring group, W192 is a potential 2 wiring of the first power wiring group, W291 is a potential 1 wiring of the second power wiring group, and W292 is a second power wiring. Wiring of potential 2 in the power supply wiring group, S191 is wiring 1 of the first signal wiring group consisting of one or more signal wirings, S291 is wiring 1 of the second signal wiring group consisting of one or more signal wirings, S292 is the wiring 2 of the second signal wiring group consisting of one or more signal wirings, VIA is the via connecting the wirings of the same potential, and the power cell constituted by these is C190. The power supply cell C190 is configured to include the first signal wiring group S170 of the fourth embodiment and the second signal wiring group S181 of the fifth embodiment at the same time, and the first power wiring group and the first signal wiring The groups are wired in parallel, and the second power wiring group and the second signal wiring group are power cells wired in parallel.

このことにより、メッシュ構造の電源配線を容易に行うことができると共に、例えばシールドの必要な信号に対して第１または第２の信号配線群の配線を用いることで、第１または第２の信号配線群の配線が電源配線間に隣接して配線されているためにシールド効果を得られ、電源配線を有効に利用した配線が可能となる。
（実施の形態７）
図１０は実施の形態７における電源セルの構成を示す図である。 As a result, the power supply wiring of the mesh structure can be easily performed, and the first or second signal can be obtained by using the wiring of the first or second signal wiring group for the signal that needs to be shielded, for example. Since the wiring of the wiring group is wired adjacently between the power supply wirings, a shielding effect can be obtained, and wiring using the power supply wirings effectively is possible.
(Embodiment 7)
FIG. 10 is a diagram showing the configuration of the power cell in the seventh embodiment.

図１０において、Ｗ１１０１は第１の電源配線群の電位１の配線、Ｗ１１０２は第１の電源配線群の電位２の配線、Ｗ１２０１は第２の電源配線群の電位１の配線、Ｗ１２０２は第２の電源配線群の電位２の配線、ＣＡＰ１０００は電位１と電位２の配線間につながるカップリングキャパシタ、ＶＩＡは同電位の電源配線間を接続するビアを示し、これらで構成される電源セルをＣ１０００とする。電源セルＣ１０００は既に説明した電源セルに対して電源配線の電位１と電位２の間にカップリングキャパシタＣＡＰ１０００を付加した構成である。   In FIG. 10, W1101 is a potential 1 wiring of the first power supply wiring group, W1102 is a potential 2 wiring of the first power supply wiring group, W1201 is a potential 1 wiring of the second power supply wiring group, and W1202 is a second power supply wiring. CAP1000 is a coupling capacitor connected between the potential 1 and potential 2 wirings, VIA is a via connecting the power supply wirings of the same potential, and the power cell constituted by these is indicated by C1000. And The power supply cell C1000 has a configuration in which a coupling capacitor CAP1000 is added between the potential 1 and the potential 2 of the power supply wiring with respect to the power supply cell already described.

このＣ１０００を用いた半導体集積回路は、メッシュ構造の電源配線を容易に行うことができると共に、カップリングキャパシタの効果を利用し、電源ラインの安定化をも可能とする半導体集積回路が実現できる。
（実施の形態８）
図１１は実施の形態８における電源セルの構成を示す図である。 The semiconductor integrated circuit using C1000 can realize a power supply wiring having a mesh structure, and can realize a semiconductor integrated circuit capable of stabilizing the power supply line by utilizing the effect of the coupling capacitor.
(Embodiment 8)
FIG. 11 is a diagram showing the configuration of the power cell in the eighth embodiment.

図１１において、Ｗ１１１１は第１の電源配線群の電位１の配線で例えばＶＳＳに接続し、Ｗ１１１２は第１の電源配線群の電位２の配線で例えばＶＤＤに接続し、Ｗ１２１１は第２の電源配線群の電位１の配線で例えばＶＳＳに接続し、Ｗ１２１２は第２の電源配線群の電位２の配線で例えばＶＤＤに接続し、ＶＩＡは同電位の配線間を接続するビアである。これらの他に図１１に示したような、ソースを第２の電源配線群の電位２の配線Ｗ１２１２に、ドレインおよびゲートを第１の電源配線群の電位２の配線Ｗ１１１２に接続した構成のトランジスタのスイッチ回路を含む電源セルをＣ１１００とする。例えば図１１の電源セルでは、ＶＤＤの電源経路はトランジスタの回路を経るために、Ｗ１１１２の電位の状態によりＷ１２１２とＷ１１１２間の導通状態と非導通状態とを電気的に切り替えることが可能となる。したがって、電力供給源側に第２の電源配線群の電位２の配線Ｗ１２１２があり、電力消費回路側に繋がる第１の電源配線群の電位２の配線Ｗ１１１２が繋がっている場合、電力消費回路の電力消費が増大するとＷ１１１２の電位ＶＤＤが次第に下降し、Ｗ１２１２との電位差が生じるために、トランジスタ回路が導通しはじめＷ１１１２の電位は再びＷ１２１２と同等に保たれる。一方で、電力消費回路の電力消費が極めて小さい場合には、Ｗ１１１２とＷ１２１２間の電位差は生じず、電源配線Ｗ１１１２とＷ１２１２間は非導通状態が保たれる。この動作により、電力消費が大きくなったときに電流供給経路が構成される電源回路が実現できる。   In FIG. 11, W1111 is a potential 1 wiring of the first power supply wiring group and is connected to, for example, VSS, W1112 is a potential 2 wiring of the first power supply wiring group, and is connected to, for example, VDD, and W1211 is a second power supply. A wiring with a potential of 1 in the wiring group is connected to, for example, VSS, W1212 is a wiring with a potential of 2 in the second power supply wiring group, and is connected to, for example, VDD, and VIA is a via that connects wirings of the same potential. In addition to these, as shown in FIG. 11, the transistor is configured such that the source is connected to the wiring W1212 having the potential 2 of the second power supply wiring group and the drain and the gate are connected to the wiring W1112 having the potential 2 of the first power supply wiring group. A power cell including the switch circuit is C1100. For example, in the power supply cell of FIG. 11, since the power supply path of VDD passes through a transistor circuit, it is possible to electrically switch between a conductive state and a nonconductive state between W1212 and W1112 depending on the state of the potential of W1112. Therefore, when the power supply source side has the wiring 21212 with the potential 2 of the second power supply wiring group and the wiring 211 with the potential 2 of the first power supply wiring group connected to the power consumption circuit side, the power consumption circuit When the power consumption increases, the potential VDD of W1112 gradually decreases and a potential difference with W1212 occurs, so that the transistor circuit begins to conduct and the potential of W1112 is again kept equal to W1212. On the other hand, when the power consumption of the power consuming circuit is extremely small, a potential difference between W1112 and W1212 does not occur, and the non-conductive state is maintained between the power supply wirings W1112 and W1212. With this operation, a power supply circuit in which a current supply path is configured when power consumption increases can be realized.

以上の実施の形態１〜８では電源セルを全て隣接して配置したが、仮に電源セルを配置したい領域の一部分に通常のセルを配置する必要が生じても、その部分だけの配線処理を行うことにより電源配線のメッシュ構造が形成されるので、従来に比べればメッシュ構造の電源配線を容易に行うことができる。   In the above first to eighth embodiments, all the power cells are arranged adjacent to each other. However, even if it is necessary to arrange a normal cell in a part of a region where the power cell is desired to be arranged, only the wiring process is performed on that part. As a result, the mesh structure of the power supply wiring is formed. Therefore, the power supply wiring of the mesh structure can be easily performed as compared with the conventional structure.

また、以上の例では電源セルＣ１０１を用いて電源配線を形成したが、オープンな余分な電源配線が残るものの、各実施の形態で説明した電源セルＣ１０１以外の電源セルのみで電源配線を形成することもできる。
（実施の形態９）
図１２は本発明の半導体集積回路の電源配線設計方法を示すフローチャートである。 In the above example, the power supply wiring is formed by using the power supply cell C101. However, although the power supply wiring is open, the power supply wiring is formed only by the power supply cells other than the power supply cell C101 described in each embodiment. You can also.
(Embodiment 9)
FIG. 12 is a flowchart showing a power supply wiring design method for a semiconductor integrated circuit according to the present invention.

この手順では、あらかじめ実施の形態３で説明したような電源セルを複数種類用意しておき、メッシュ構造を有する電源配線を構成する電源セルの初期配置を行った後（Ｓ１）、電源配線ネットワークのノイズ遮断特性を評価して各電源配線ネットワークが所望のノイズ遮断特性を満たすかどうか判定する（Ｓ２）。次に、ノイズ遮断特性の悪い箇所の電源セルを抽出し（Ｓ３）、その電源セルを電源配線幅の異なるノイズ遮断特性が良化するほかの種類の電源セルに置き換え（Ｓ４）、再度ノイズ遮断特性を評価する（Ｓ２）。この特性が所望の値になるまでセルの置き換え→評価という一連の流れを繰り返し実行する。   In this procedure, a plurality of types of power cells as described in the third embodiment are prepared in advance, and after initial arrangement of the power cells constituting the power wiring having a mesh structure (S1), the power wiring network The noise cutoff characteristic is evaluated to determine whether each power supply wiring network satisfies a desired noise cutoff characteristic (S2). Next, a power supply cell having a poor noise cutoff characteristic is extracted (S3), and the power supply cell is replaced with another type of power supply cell having a different noise cutoff characteristic with a different power line width (S4), and the noise cutoff is performed again. The characteristics are evaluated (S2). A series of steps of cell replacement → evaluation is repeatedly executed until this characteristic reaches a desired value.

また、電源配線ネットワークのノイズ遮断特性評価に替えて電源配線インピーダンス評価を行い、評価結果に基づいて電源配線インピーダンスが低下するように電源セルを置き換えても良い。   Further, power supply wiring impedance evaluation may be performed instead of the noise cutoff characteristic evaluation of the power supply wiring network, and the power supply cell may be replaced so that the power supply wiring impedance is lowered based on the evaluation result.

この設計方法は、実施の形態３で示したものと同様な構造を持つ電源セルを複数種類持つ場合に実行可能な設計方法であり、この手法により、電源配線幅の異なる複数種の電源セルを評価結果に応じて自由に選択して容易に設計できるので、半導体集積回路の電源配線を一旦行った後でもその電源配線特性を改善することが可能であり、メッシュ構造の電源配線を容易に行い、電源配線ネットワークのインピーダンス特性やノイズ特性の評価結果に対応した最適化を容易に行うことができる。   This design method is a design method that can be executed when there are a plurality of types of power cells having the same structure as that shown in the third embodiment. By this method, a plurality of types of power cells having different power wiring widths can be obtained. Since the design can be easily selected and easily selected according to the evaluation results, the power supply wiring characteristics can be improved even after the power supply wiring of the semiconductor integrated circuit is performed once, and the power supply wiring of the mesh structure can be easily performed. Therefore, optimization corresponding to the evaluation results of the impedance characteristics and noise characteristics of the power supply wiring network can be easily performed.

本発明は、メッシュ構造の電源配線を容易に行い、電源配線ネットワークのインピーダンス特性やノイズ特性の評価結果に対応した最適化を容易に行うことができ、メッシュ構造の電源配線を有する半導体集積回路およびその設計方法等に有用である。   The present invention can easily perform mesh-structured power supply wiring, can easily perform optimization corresponding to the evaluation results of the impedance characteristics and noise characteristics of the power supply wiring network, and has a mesh-structured power supply wiring, It is useful for its design method.

実施の形態１における電源セルの構成を示す図FIG. 5 shows a structure of a power cell in the first embodiment. 実施の形態１における電源セルを用いて構成した半導体集積回路を表す図FIG. 6 illustrates a semiconductor integrated circuit configured using the power supply cell according to the first embodiment. 実施の形態２における電源セルの構成を示す図FIG. 5 shows a structure of a power supply cell in Embodiment 2. 実施の形態３における電源セル１の構成を示す図FIG. 5 shows a configuration of power supply cell 1 in the third embodiment. 実施の形態３における電源セル２の構成を示す図FIG. 9 shows a configuration of power supply cell 2 in the third embodiment. 実施の形態３における電源セル１，電源セル２を用いて構成した半導体集積回路を表す図The figure showing the semiconductor integrated circuit comprised using the power supply cell 1 in Embodiment 3, and the power supply cell 2 実施の形態４における電源セルの構成を示す図FIG. 6 shows a structure of a power cell in a fourth embodiment 実施の形態５における電源セルの構成を示す図FIG. 7 shows a structure of a power cell in a fifth embodiment 実施の形態６における電源セルの構成を示す図FIG. 7 shows a structure of a power cell in a sixth embodiment 実施の形態７における電源セルの構成を示す図FIG. 7 shows a structure of a power cell in a seventh embodiment 実施の形態８における電源セルの構成を示す図FIG. 10 shows a structure of a power cell in an eighth embodiment. 本発明の半導体集積回路の電源配線設計方法を示すフローチャート1 is a flowchart showing a power supply wiring design method for a semiconductor integrated circuit according to the present invention.

符号の説明Explanation of symbols

Ｗ１１１ 第１の電源配線群の電位１の配線
Ｗ１１２ 第１の電源配線群の電位２の配線
Ｗ２１１ 第２の電源配線群の電位１の配線
Ｗ２１２ 第２の電源配線群の電位２の配線
ＶＩＡ 同電位の電源配線を電気的に接続するビア
Ｃ１００ 電源セル
Ｃ１０１ 電源セル
Ｗ１２１ 第１の電源配線群の電位１の配線
Ｗ１２２ 第１の電源配線群の電位２の配線
Ｗ２２１ 第２の電源配線群の電位１の配線
Ｗ２２２ 第２の電源配線群の電位２の配線
Ｗ３２１ 第３の電源配線群の電位１の配線
Ｗ３２２ 第３の電源配線群の電位２の配線
Ｗ１３１ 第１の電源配線群の電位１の配線
Ｗ１３２ 第１の電源配線群の電位２の配線
Ｗ２３１ 第２の電源配線群の電位１の配線
Ｗ２３２ 第２の電源配線群の電位２の配線
Ｃ１３０ 電源セル
Ｗ１４１ 第１の電源配線群の電位１の配線
Ｗ１４２ 第１の電源配線群の電位２の配線
Ｗ２４１ 第２の電源配線群の電位１の配線
Ｗ２４２ 第２の電源配線群の電位２の配線
Ｃ１４１ 電源セル１
Ｗ１５１ 第１の電源配線群の電位１の配線
Ｗ１５２ 第１の電源配線群の電位２の配線
Ｗ２５１ 第２の電源配線群の電位１の配線
Ｗ２５２ 第２の電源配線群の電位２の配線
Ｃ１４２ 電源セル２
Ｗ１６１ 第１の電源配線群の電位１の配線
Ｗ１６２ 第１の電源配線群の電位２の配線
Ｗ２６１ 第２の電源配線群の電位１の配線
Ｗ２６２ 第２の電源配線群の電位２の配線
Ｗ３６１ 第３の電源配線群の電位１の配線
Ｗ３６２ 第３の電源配線群の電位２の配線
Ｗ１７１ 第１の電源配線群の電位１の配線
Ｗ１７２ 第１の電源配線群の電位２の配線
Ｗ２７１ 第２の電源配線群の電位１の配線
Ｗ２７２ 第２の電源配線群の電位２の配線
Ｓ１７０ 第１の信号配線群の配線
Ｃ１７０ 電源セル
Ｗ１８１ 第１の電源配線群の電位１の配線
Ｗ１８２ 第１の電源配線群の電位２の配線
Ｗ２８１ 第２の電源配線群の電位１の配線
Ｗ２８２ 第２の電源配線群の電位２の配線
Ｓ１８１ 第２の信号配線群の配線１
Ｓ１８２ 第２の信号配線群の配線２
Ｃ１８０ 電源セル
Ｗ１９１ 第１の電源配線群の電位１の配線
Ｗ１９２ 第１の電源配線群の電位２の配線
Ｗ２９１ 第２の電源配線群の電位１の配線
Ｗ２９２ 第２の電源配線群の電位２の配線
Ｓ１９１ 第１の信号配線群の配線
Ｓ２９１ 第２の信号配線群の配線１
Ｓ２９２ 第２の信号配線群の配線２
Ｃ１９０ 電源セル
Ｗ１１０１ 第１の電源配線群の電位１の配線
Ｗ１１０２ 第１の電源配線群の電位２の配線
Ｗ１２０１ 第２の電源配線群の電位１の配線
Ｗ１２０２ 第２の電源配線群の電位２の配線
ＣＡＰ１０００ 電位１と電位２の間に接続されたカップリングキャパシタ
Ｃ１０００ 電源セル
Ｗ１１１１ 第１の電源配線群の電位１の配線
Ｗ１１１２ 第１の電源配線群の電位２の配線
Ｗ１２１１ 第２の電源配線群の電位１の配線
Ｗ１２１２ 第２の電源配線群の電位２の配線
Ｃ１１００ 電源セル W111 Wiring of potential 1 of the first power supply wiring group W112 Wiring of potential 2 of the first power supply wiring group W211 Wiring of potential 1 of the second power supply wiring group W212 Wiring of potential 2 of the second power supply wiring group VIA Same Via for electrically connecting power supply lines of potential C100 power supply cell C101 power supply cell W121 Wiring of potential 1 of the first power supply wiring group W122 Wiring of potential 2 of the first power supply wiring group W221 Potential of the second power supply wiring group 1 wiring W222 potential 2 wiring of the second power supply wiring group W321 wiring of potential 1 of the third power supply wiring group W322 wiring of potential 2 of the third power supply wiring group W131 potential 1 of the first power supply wiring group Wiring W132 Wiring with potential 2 of the first power wiring group W231 Wiring with potential 1 of the second power wiring group W232 Wiring with potential 2 of the second power wiring group C130 Power cell W141 First power Wiring of potential 1 in the wiring group W142 Wiring of potential 2 in the first power wiring group W241 Wiring of potential 1 in the second power wiring group W242 Wiring of potential 2 in the second power wiring group C141 Power cell 1
W151 potential 1 wiring of the first power supply wiring group W152 potential 2 wiring of the first power supply wiring group W251 potential 1 wiring of the second power supply wiring group W252 potential 2 wiring of the second power supply wiring group C142 power supply Cell 2
W161 Wiring of potential 1 of the first power supply wiring group W162 Wiring of potential 2 of the first power supply wiring group W261 Wiring of potential 1 of the second power supply wiring group W262 Wiring of potential 2 of the second power supply wiring group W361 First Wiring of potential 1 in power supply wiring group 3 W362 Wiring of potential 2 in third power supply wiring group W171 Wiring of potential 1 in first power supply wiring group W172 Wiring of potential 2 in first power supply wiring group W271 Second Power supply wiring group potential 1 wiring W272 Second power supply wiring group potential 2 wiring S170 First signal wiring group wiring C170 Power cell W181 First power supply wiring group potential 1 wiring W182 First power supply wiring Wiring of potential 2 of the group W281 Wiring of potential 1 of the second power wiring group W282 Wiring of potential 2 of the second power wiring group S181 Wiring 1 of the second signal wiring group
S182: wiring 2 of the second signal wiring group
C180 power cell W191 potential 1 wiring of the first power wiring group W192 potential 2 wiring of the first power wiring group W291 potential 1 wiring of the second power wiring group W292 potential 2 of the second power wiring group Wiring S191 Wiring of the first signal wiring group S291 Wiring 1 of the second signal wiring group
S292: wiring 2 of the second signal wiring group
C190 power supply cell W1101 potential 1 wiring of the first power supply wiring group W1102 potential 2 wiring of the first power supply wiring group W1201 potential 1 wiring of the second power supply wiring group W1202 potential 2 of the second power supply wiring group Wiring CAP1000 Coupling capacitor connected between electric potential 1 and electric potential 2 C1000 power cell W1111 Wiring of electric potential 1 of first power supply wiring group W1112 Wiring of electric potential 2 of first power supply wiring group W1211 Second power supply wiring group Wiring of potential 1 of W1212 Wiring of potential 2 of second power wiring group C1100 Power cell

Claims (13)

電源セルを介してメッシュ構造の電源配線を行う半導体集積回路であって、
前記電源セルが、
１または２以上の電位の電源配線より成る第１の電源配線群と、
１または２以上の電位の電源配線より成り前記第１の電源配線群と交差する第２の電源配線群と、
同電位である前記第１の電源配線群の電源配線および前記第２の電源配線群の電源配線を電気的に接続するビアと
を有し、前記第１の電源配線群および前記第２の電源配線群の配線端部は前記電源セルの端部に位置し、
複数の前記電源セルを前記電源セルの同電位の電源配線が電気的に接続するように互いに隣接させて配置することによりメッシュ構造の電源配線を形成することを特徴とする半導体集積回路。 A semiconductor integrated circuit that performs power wiring of a mesh structure through power cells,
The power cell is
A first power supply wiring group composed of power supply wirings having one or more potentials;
A second power supply wiring group consisting of power supply wirings having one or more potentials and intersecting the first power supply wiring group;
A power supply line of the first power supply line group and a via which electrically connects the power supply lines of the second power supply line group and the first power supply line group and the second power supply having the same potential; The wiring end of the wiring group is located at the end of the power cell,
A semiconductor integrated circuit characterized in that a plurality of power cells are arranged adjacent to each other so that power wires having the same potential of the power cells are electrically connected to each other, thereby forming a mesh-structured power wire. 前記メッシュ構造の電源配線を形成する電源セルのうち前記第２の電源配線群が不要な領域に配置する電源セルは前記第１の電源配線群のみを有することを特徴とする請求項１記載の半導体集積回路。   2. The power cell arranged in an area where the second power wiring group is unnecessary among the power cells forming the power wiring of the mesh structure has only the first power wiring group. Semiconductor integrated circuit. 前記第１の電源配線群と前記第２の電源配線群が互いに垂直に交差することを特徴とする請求項１記載の半導体集積回路。   2. The semiconductor integrated circuit according to claim 1, wherein the first power supply wiring group and the second power supply wiring group intersect each other vertically. 前記電源セルの前記第１の電源配線群が任意の電源配線幅を有し、第１の電源配線群の電源配線幅が異なる電源セルを任意に組み合わせて配置することによりメッシュ構造の電源配線を形成することを特徴とする請求項１に記載の半導体集積回路。   The first power supply wiring group of the power supply cells has an arbitrary power supply wiring width, and power supply cells having a mesh structure are arranged by arbitrarily combining power supply cells having different power supply wiring widths of the first power supply wiring group. The semiconductor integrated circuit according to claim 1, wherein the semiconductor integrated circuit is formed. 前記電源セルの前記第２の電源配線群が任意の電源配線幅を有し、第２の電源配線群の電源配線幅が異なる電源セルを任意に組み合わせて配置することによりメッシュ構造の電源配線を形成することを特徴とする請求項１または請求項４のいずれかに記載の半導体集積回路。   The second power supply wiring group of the power supply cells has an arbitrary power supply wiring width, and power supply cells having a mesh structure are arranged by arbitrarily combining power supply cells having different power supply wiring widths of the second power supply wiring group. The semiconductor integrated circuit according to claim 1, wherein the semiconductor integrated circuit is formed. 前記電源セルに対して前記第１の電源配線群に平行して配線された１または２以上の信号配線から成る第１の信号配線群を付加することを特徴とする請求項１記載の半導体集積回路。   2. The semiconductor integrated circuit according to claim 1, wherein a first signal wiring group composed of one or more signal wirings wired in parallel to the first power wiring group is added to the power cell. circuit. 前記電源セルに対して前記第２の電源配線群に平行して配線された１または２以上の信号配線から成る第２の信号配線群を付加されることを特徴とする請求項１または請求項６のいずれかに記載の半導体集積回路。   The second signal wiring group comprising one or more signal wirings wired in parallel to the second power wiring group is added to the power cell. The semiconductor integrated circuit according to any one of 6. 前記電源セルが前記電源配線群の電位差にカップリングキャパシタンスを設けることを特徴とする請求項１記載の半導体集積回路。   2. The semiconductor integrated circuit according to claim 1, wherein the power supply cell provides a coupling capacitance to a potential difference of the power supply wiring group. 前記電源セルに対して第１の電源配線群の電源配線と、前記電源配線と同電位の第２の電源配線群の電源配線の間に、導通状態と非導通状態とを電気的に切り替えることを可能とするスイッチを備えることを特徴とする請求項１記載の半導体集積回路。   Electrically switching between a conductive state and a non-conductive state between the power supply line of the first power supply line group and the power supply line of the second power supply line group having the same potential as the power supply line with respect to the power supply cell. The semiconductor integrated circuit according to claim 1, further comprising a switch that enables the switching. 前記電源セルに備えたスイッチが、
前記第１の電源配線群の電源配線の電位と、前記第２の電源配線群の電源配線の電位の差が生じたときに前記スイッチを導通状態へと制御することを特徴とする請求項９記載の半導体集積回路。 A switch provided in the power cell,
10. The switch is controlled to be in a conductive state when a difference between a potential of a power supply wiring of the first power supply wiring group and a potential of a power supply wiring of the second power supply wiring group occurs. The semiconductor integrated circuit as described. 前記メッシュ構造の電源配線を形成するセルの一部が通常動作用のセルとなった場合に、前記通常セルが隣接する電源セルの接続を要する電源配線を配線処理により電気的に接続することを特徴とする請求項１記載の半導体集積回路。   When a part of the cells forming the mesh structure power supply wiring becomes a cell for normal operation, the power supply wiring that requires connection of the power cell adjacent to the normal cell is electrically connected by wiring processing. The semiconductor integrated circuit according to claim 1. 請求項４または請求項５のいずれかに記載の半導体集積回路の設計方法であって、
メッシュ構造の電源配線を形成するために前記電源セルを初期配置する工程と、
電源配線ネットワークのノイズ遮断特性が所定の値を満たすかを評価する工程と、
ノイズ遮断特性の悪い箇所の電源セルを抽出する工程と、
前記抽出した電源セルをノイズ遮断特性が良化する電源配線幅の電源セルに置き換える工程と
を有し、ノイズ遮断特性が所定の値を満たすまでノイズ遮断特性評価から電源セル置き換え工程を繰り返すことを特徴とする半導体集積回路の設計方法。 A method for designing a semiconductor integrated circuit according to claim 4, wherein:
Initial placement of the power cells to form mesh-structured power wiring;
A step of evaluating whether the noise cutoff characteristic of the power supply wiring network satisfies a predetermined value;
A process of extracting a power cell in a location with a poor noise blocking characteristic;
Replacing the extracted power cell with a power cell having a power line width that improves noise cutoff characteristics, and repeating the power cell replacement process from the noise cutoff characteristic evaluation until the noise cutoff characteristic satisfies a predetermined value. A method for designing a semiconductor integrated circuit. 請求項４または請求項５のいずれかに記載の半導体集積回路の設計方法であって、
メッシュ構造の電源配線を形成するために前記電源セルを初期配置する工程と、
電源配線インピーダンスが所定の値を満たすかを評価する工程と、
電源配線インピーダンスの高い箇所の電源セルを抽出する工程と、
前記抽出した電源セルを電源配線インピーダンスが低下する電源配線幅の電源セルに置き換える工程と
を有し、電源配線インピーダンスが所定の値を満たすまで電源配線インピーダンス評価から電源セル置き換え工程を繰り返すことを特徴とする半導体集積回路の設計方法。 A method for designing a semiconductor integrated circuit according to claim 4, wherein:
Initial placement of the power cells to form mesh-structured power wiring;
A step of evaluating whether the power supply wiring impedance satisfies a predetermined value;
A step of extracting a power cell in a location having a high power wiring impedance;
Replacing the extracted power cell with a power cell having a power line width that reduces power line impedance, and repeating the power cell replacement process from the power line impedance evaluation until the power line impedance satisfies a predetermined value. A method for designing a semiconductor integrated circuit.
JP2004329894A 2004-11-15 2004-11-15 Semiconductor integrated circuit and designing method thereof Pending JP2006140363A (en)

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