JP2006128638A5 - - Google Patents
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- JP2006128638A5 JP2006128638A5 JP2005269420A JP2005269420A JP2006128638A5 JP 2006128638 A5 JP2006128638 A5 JP 2006128638A5 JP 2005269420 A JP2005269420 A JP 2005269420A JP 2005269420 A JP2005269420 A JP 2005269420A JP 2006128638 A5 JP2006128638 A5 JP 2006128638A5
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- Prior art keywords
- insulating film
- forming
- interlayer insulating
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- less
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- 239000010408 film Substances 0.000 claims 52
- 239000011229 interlayer Substances 0.000 claims 23
- 239000004065 semiconductor Substances 0.000 claims 16
- 239000011347 resin Substances 0.000 claims 15
- 229920005989 resin Polymers 0.000 claims 15
- 238000004519 manufacturing process Methods 0.000 claims 11
- 239000011261 inert gas Substances 0.000 claims 10
- 239000001301 oxygen Substances 0.000 claims 9
- 229910052760 oxygen Inorganic materials 0.000 claims 9
- MYMOFIZGZYHOMD-UHFFFAOYSA-N oxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 claims 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims 9
- 239000011810 insulating material Substances 0.000 claims 8
- 239000010410 layer Substances 0.000 claims 7
- 229920000642 polymer Polymers 0.000 claims 6
- 125000005373 siloxane group Chemical group [SiH2](O*)* 0.000 claims 6
- 239000000758 substrate Substances 0.000 claims 6
- 230000015572 biosynthetic process Effects 0.000 claims 5
- 238000005755 formation reaction Methods 0.000 claims 5
- 239000010409 thin film Substances 0.000 claims 5
- 238000010438 heat treatment Methods 0.000 claims 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims 2
- 125000002496 methyl group Chemical group [H]C([H])([H])* 0.000 claims 1
- 229910052757 nitrogen Inorganic materials 0.000 claims 1
- 125000001997 phenyl group Chemical group [H]C1=C([H])C([H])=C(*)C([H])=C1[H] 0.000 claims 1
Claims (11)
前記ゲート絶縁膜及び前記ゲート電極上に第1の層間絶縁膜を形成し、
前記第1の層間絶縁膜に第1のコンタクトホールを形成し、
前記第1の層間絶縁膜上に前記第1のコンタクトホールを介して前記ソース領域または前記ドレイン領域に電気的に接続する配線を形成し、
前記第1の層間絶縁膜及び前記配線上にシロキサンポリマーを含有する樹脂を塗布した後、不活性ガスを主成分とし、酸素の濃度が5vol%以下且つ水の濃度が1vol%以下の雰囲気で前記樹脂を加熱処理して第2の層間絶縁膜を形成し、
前記第2の層間絶縁膜に第2のコンタクトホールを形成し、
前記第2の層間絶縁膜上に前記第2のコンタクトホールを介して前記配線に電気的に接続する電極を形成することを特徴とする半導体装置の作製方法。 A thin film transistor including a semiconductor layer having a source region, a drain region, and a channel formation region, a gate insulating film, and a gate electrode is formed over an insulating substrate.
Forming a first interlayer insulating film on the gate insulating film and the gate electrode;
Forming a first contact hole in the first interlayer insulating film;
Forming a wiring electrically connected to the source region or the drain region through the first contact hole on the first interlayer insulating film;
After applying a resin containing a siloxane polymer on the first interlayer insulating film and the wiring, the main component is an inert gas, and the oxygen concentration is 5 vol% or less and the water concentration is 1 vol% or less. The resin is heat-treated to form a second interlayer insulating film,
Forming a second contact hole in the second interlayer insulating film;
A method for manufacturing a semiconductor device, comprising: forming an electrode electrically connected to the wiring through the second contact hole over the second interlayer insulating film.
前記ゲート絶縁膜及び前記ゲート電極上に第1の層間絶縁膜を形成し、
前記第1の層間絶縁膜に第1のコンタクトホールを形成し、
前記第1の層間絶縁膜上に前記第1のコンタクトホールを介して前記ソース領域または前記ドレイン領域に電気的に接続する配線を形成し、
前記第1の層間絶縁膜及び前記配線上にシロキサンポリマーを含有する樹脂を塗布した後、不活性ガスを主成分とし、酸素の濃度が5vol%以下且つ水の濃度が1vol%以下の雰囲気で前記樹脂を加熱処理して第2の層間絶縁膜を形成し、
前記第2の層間絶縁膜に第2のコンタクトホールを形成し、
前記第2の層間絶縁膜上に前記第2のコンタクトホールを介して前記配線に電気的に接続する電極を形成した後、不活性ガスを主成分とし、酸素の濃度が5vol%以下且つ水の濃度が1vol%以下の雰囲気で前記樹脂を加熱処理することを特徴とする半導体装置の作製方法。 A thin film transistor including a semiconductor layer having a source region, a drain region, and a channel formation region, a gate insulating film, and a gate electrode is formed over an insulating substrate.
Forming a first interlayer insulating film on the gate insulating film and the gate electrode;
Forming a first contact hole in the first interlayer insulating film;
Forming a wiring electrically connected to the source region or the drain region through the first contact hole on the first interlayer insulating film;
After applying a resin containing a siloxane polymer on the first interlayer insulating film and the wiring, the main component is an inert gas, and the oxygen concentration is 5 vol% or less and the water concentration is 1 vol% or less. The resin is heat-treated to form a second interlayer insulating film,
Forming a second contact hole in the second interlayer insulating film;
After an electrode electrically connected to the wiring through the second contact hole is formed on the second interlayer insulating film, an inert gas is a main component, the oxygen concentration is 5 vol% or less, and water A method for manufacturing a semiconductor device, wherein the resin is heat-treated in an atmosphere having a concentration of 1 vol% or less.
前記ゲート絶縁膜及び前記ゲート電極上に第1の層間絶縁膜を形成し、
前記第1の層間絶縁膜に第1のコンタクトホールを形成し、
前記第1の層間絶縁膜上に前記第1のコンタクトホールを介して前記ソース領域または前記ドレイン領域に電気的に接続する配線を形成し、
前記第1の層間絶縁膜及び前記配線上にシロキサンポリマーを含有する樹脂を塗布した後、不活性ガスを主成分とし、酸素の濃度が5vol%以下且つ水の濃度が1vol%以下の雰囲気で前記樹脂を加熱処理して第2の層間絶縁膜を形成し、
前記第2の層間絶縁膜に第2のコンタクトホールを形成し、
前記第2の層間絶縁膜上に前記第2のコンタクトホールを介して前記配線に電気的に接続する第1の電極を形成した後、不活性ガスを主成分とし、酸素の濃度が5vol%以下且つ水の濃度が1vol%以下の雰囲気で前記樹脂を加熱処理し、
前記第1の電極の一部を覆うように絶縁膜を形成した後、不活性ガスを主成分とし、酸素の濃度が5vol%以下且つ水の濃度が1vol%以下の雰囲気で前記樹脂を加熱処理し、
前記第1の電極において前記絶縁膜に覆われていない領域を覆って電界発光層を形成し、
前記電界発光層上に第2の電極を形成することを特徴とする半導体装置の作製方法。 A thin film transistor including a semiconductor layer having a source region, a drain region, and a channel formation region, a gate insulating film, and a gate electrode is formed over an insulating substrate.
Forming a first interlayer insulating film on the gate insulating film and the gate electrode;
Forming a first contact hole in the first interlayer insulating film;
Forming a wiring electrically connected to the source region or the drain region through the first contact hole on the first interlayer insulating film;
After applying a resin containing a siloxane polymer on the first interlayer insulating film and the wiring, the main component is an inert gas, and the oxygen concentration is 5 vol% or less and the water concentration is 1 vol% or less. The resin is heat-treated to form a second interlayer insulating film,
Forming a second contact hole in the second interlayer insulating film;
After forming a first electrode electrically connected to the wiring through the second contact hole on the second interlayer insulating film, an inert gas as a main component and an oxygen concentration of 5 vol% or less And heat-treating the resin in an atmosphere having a water concentration of 1 vol% or less,
After forming an insulating film so as to cover a part of the first electrode, the resin is heat-treated in an atmosphere containing an inert gas as a main component, an oxygen concentration of 5 vol% or less, and a water concentration of 1 vol% or less. And
Forming an electroluminescent layer covering a region of the first electrode that is not covered with the insulating film;
A method for manufacturing a semiconductor device, wherein a second electrode is formed over the electroluminescent layer.
前記ゲート絶縁膜及び前記ゲート電極上に無機絶縁性材料からなる膜を形成し、
前記無機絶縁性材料からなる膜上にシロキサンポリマーを含有する樹脂を塗布した後、不活性ガスを主成分とし、酸素の濃度が5vol%以下且つ水の濃度が1vol%以下の雰囲気で前記樹脂を加熱処理して絶縁膜を形成し、
前記無機絶縁性材料からなる膜及び前記絶縁膜にコンタクトホールを形成し、
前記無機絶縁性材料からなる膜及び前記絶縁膜上に前記コンタクトホールを介して前記ソース領域または前記ドレイン領域に電気的に接続する配線を形成することを特徴とする半導体装置の作製方法。 A thin film transistor including a semiconductor layer having a source region, a drain region, and a channel formation region, a gate insulating film, and a gate electrode is formed over an insulating substrate.
Forming a film made of an inorganic insulating material on the gate insulating film and the gate electrode;
After applying a resin containing a siloxane polymer on the film made of the inorganic insulating material, the resin is used in an atmosphere containing an inert gas as a main component, an oxygen concentration of 5 vol% or less, and a water concentration of 1 vol% or less. Heat treatment to form an insulating film,
A contact hole is formed in the film made of the inorganic insulating material and the insulating film;
A method for manufacturing a semiconductor device, comprising: forming a film made of an inorganic insulating material; and a wiring electrically connected to the source region or the drain region through the contact hole over the insulating film.
前記ゲート絶縁膜及び前記ゲート電極上に無機絶縁性材料からなる膜を形成し、
前記無機絶縁性材料からなる膜上にシロキサンポリマーを含有する樹脂を塗布した後、不活性ガスを主成分とし、酸素の濃度が5vol%以下且つ水の濃度が1vol%以下の雰囲気で前記樹脂を加熱処理して絶縁膜を形成し、
前記無機絶縁性材料からなる膜及び前記絶縁膜にコンタクトホールを形成し、
前記無機絶縁性材料からなる膜及び前記絶縁膜上に前記コンタクトホールを介して前記ソース領域または前記ドレイン領域に電気的に接続する配線を形成し、
前記配線上の一部に重なるように電極を形成した後、不活性ガスを主成分とし、酸素の濃度が5vol%以下且つ水の濃度が1vol%以下の雰囲気で前記樹脂を加熱処理することを特徴とする半導体装置の作製方法。 A thin film transistor including a semiconductor layer having a source region, a drain region, and a channel formation region, a gate insulating film, and a gate electrode is formed over an insulating substrate.
Forming a film made of an inorganic insulating material on the gate insulating film and the gate electrode;
After applying a resin containing a siloxane polymer on the film made of the inorganic insulating material, the resin is used in an atmosphere containing an inert gas as a main component, an oxygen concentration of 5 vol% or less, and a water concentration of 1 vol% or less. Heat treatment to form an insulating film,
A contact hole is formed in the film made of the inorganic insulating material and the insulating film;
Forming a wiring electrically connected to the source region or the drain region via the contact hole on the film made of the inorganic insulating material and the insulating film,
After the electrode is formed so as to overlap a part of the wiring, the resin is heat-treated in an atmosphere containing an inert gas as a main component, an oxygen concentration of 5 vol% or less, and a water concentration of 1 vol% or less. A method for manufacturing a semiconductor device.
In any one of claims 1 to 10, a method for manufacturing a semiconductor device wherein the inert gas is nitrogen.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005269420A JP5008288B2 (en) | 2004-09-29 | 2005-09-16 | Method for manufacturing semiconductor device |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004284952 | 2004-09-29 | ||
JP2004284952 | 2004-09-29 | ||
JP2005269420A JP5008288B2 (en) | 2004-09-29 | 2005-09-16 | Method for manufacturing semiconductor device |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2006128638A JP2006128638A (en) | 2006-05-18 |
JP2006128638A5 true JP2006128638A5 (en) | 2008-08-21 |
JP5008288B2 JP5008288B2 (en) | 2012-08-22 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2005269420A Expired - Fee Related JP5008288B2 (en) | 2004-09-29 | 2005-09-16 | Method for manufacturing semiconductor device |
Country Status (1)
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JP (1) | JP5008288B2 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100769444B1 (en) * | 2006-06-09 | 2007-10-22 | 삼성에스디아이 주식회사 | Organic light emitting diode |
JP4616359B2 (en) * | 2007-01-09 | 2011-01-19 | 韓國電子通信研究院 | Method for forming ZnO semiconductor film for electronic device and thin film transistor including the semiconductor film |
KR101447048B1 (en) | 2007-04-20 | 2014-10-06 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Method for manufacturing soi substrate and semiconductor device |
JP2012142528A (en) * | 2011-01-06 | 2012-07-26 | Elpida Memory Inc | Manufacturing method of semiconductor device |
JP2013110014A (en) * | 2011-11-22 | 2013-06-06 | Panasonic Corp | Organic el element manufacturing method and organic el display panel |
TWI713943B (en) * | 2013-09-12 | 2020-12-21 | 日商新力股份有限公司 | Display device and electronic equipment |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH09255369A (en) * | 1996-03-18 | 1997-09-30 | Toshiba Corp | Highly heat resistant light shielding member, array substrate, liquid crystal display device and production of array substrate |
JP3612529B2 (en) * | 2001-10-30 | 2005-01-19 | Nec液晶テクノロジー株式会社 | Transflective liquid crystal display device and manufacturing method thereof |
US6617609B2 (en) * | 2001-11-05 | 2003-09-09 | 3M Innovative Properties Company | Organic thin film transistor with siloxane polymer interface |
JP4030759B2 (en) * | 2001-12-28 | 2008-01-09 | 株式会社半導体エネルギー研究所 | Method for manufacturing display device |
JP3745343B2 (en) * | 2002-04-23 | 2006-02-15 | 株式会社半導体エネルギー研究所 | Semiconductor element |
JP2004161877A (en) * | 2002-11-13 | 2004-06-10 | Shin Etsu Chem Co Ltd | Composition for forming porous film, porous film and its manufacturing process, interlayer dielectrics and semiconductor device |
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2005
- 2005-09-16 JP JP2005269420A patent/JP5008288B2/en not_active Expired - Fee Related
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