JP2006128567A - 半導体パッケージのプリント配線板への接続方法 - Google Patents
半導体パッケージのプリント配線板への接続方法 Download PDFInfo
- Publication number
- JP2006128567A JP2006128567A JP2004318225A JP2004318225A JP2006128567A JP 2006128567 A JP2006128567 A JP 2006128567A JP 2004318225 A JP2004318225 A JP 2004318225A JP 2004318225 A JP2004318225 A JP 2004318225A JP 2006128567 A JP2006128567 A JP 2006128567A
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- JP
- Japan
- Prior art keywords
- adhesive film
- solder
- wiring board
- array package
- bump
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Images
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
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- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
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- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
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- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
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- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
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- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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Abstract
【解決手段】はんだバンプ2を有するバンプアレイパッケージ1の表面に熱流動性でかつ熱硬化性の接着フィルム3を配置し、前記はんだバンプと前記接着フィルムとからなる平坦な表面を有するバンプアレイパッケージを形成すること、前記はんだバンプと接着フィルムとからなる平坦な表面を配線板5上に配置し、前記接着フィルムの硬化を完了させるのに十分な温度であってかつ前記はんだの融解温度より高い温度に加熱することで、バンプアレイパッケージを配線板に接続するバンプアレイパッケージを配線板に電気接続するための方法。
【選択図】図1
Description
本発明の別の目的は、上記の電気接続方法に用いることができる熱硬化性接着フィルム付き半導体パッケージを提供することである。
前記はんだバンプと前記接着フィルムとからなる平坦な表面を有するバンプアレイパッケージを形成すること、
前記はんだバンプと接着フィルムとからなる平坦な表面を配線板上に配置し、前記接着フィルムの硬化を完了させるのに十分な温度であってかつ前記はんだの融解温度より高い温度に加熱することで、バンプアレイパッケージを配線板に接続すること、
の工程を含む、
バンプアレイパッケージを配線板に電気接続するための方法が提供される。
このような方法のより具体的な態様によると、
半導体チップの入出力端子として複数のはんだバンプを平面状に有するバンプアレイパッケージを配線板に電気接続するための方法であって、
前記バンプアレイパッケージのはんだバンプを有する面に対して、熱流動性でかつ熱硬化性の接着フィルムを配置すること、
前記接着フィルムが流動するには十分な温度であるが、前記接着フィルムの硬化を完了させるには不十分な温度であって、かつ、前記はんだの融解温度よりも低い温度において、平坦な表面を有する板状体で前記接着フィルムを加圧することで、前記はんだバンプの各々の先端が部分的に平坦化して表面に露出した状態となった、各はんだバンプと接着フィルムとからなる平坦な表面を有するバンプアレイパッケージを形成すること、
前記はんだバンプと接着フィルムとからなる平坦な表面を配線板上に配置し、前記接着フィルムの硬化を完了させるのに十分な温度であってかつ前記はんだの融解温度より高い温度に加熱することで、バンプアレイパッケージを配線板に接続すること、
の工程を含む、
上記のバンプアレイパッケージを配線板に電気接続するための方法が提供される。
より具体的な態様によると、半導体チップの入出力端子として複数のはんだバンプを平面状に有するバンプアレイパッケージを用意し、前記バンプアレイパッケージのはんだバンプを有する面に対して、熱流動性でかつ熱硬化性の接着フィルムを配置すること、前記接着フィルムが流動するには十分な温度であるが、前記接着フィルムの硬化を完了させるには不十分な温度であって、かつ、前記はんだの融解温度よりも低い温度において、平坦な表面を有する板状体で前記接着フィルムを加圧することにより得られる、上記の接着フィルム付きバンプアレイパッケージが提供される。
また、本発明の方法では、溶剤を用いないドライプロセスであるから、溶剤除去工程を必要とせず、また、溶剤によるパッケージの汚染の問題がない。
また、接着フィルムにフラックスを含有する必要がないので、従来のフラックスを配線板側に塗布した後に接続工程を行うことができる。
また、本発明の方法では、レーザー加工などの微細加工を伴わないので、個片化されたチップからなるパッケージにおいても簡単に適用できる。
また、本発明の方法では、接続工程の前に、バンプアレイパッケージのはんだバンプ面に対して、接着フィルムを配置し、それを加熱及び加圧することで、接着フィルムを流動化させ、はんだを露出した状態で平坦な表面を得ることができる。表面が平坦であるから、配線板と隙間なく接触することができる。このため、次の接続工程時に、接着フィルムの樹脂が十分に充填した状態で硬化及びはんだ溶融を行なうことができる。
最初に、図面にそって本発明を説明する。図1は、バンプアレイパッケージを配線板に電気接続するための方法の工程図を示している。「バンプアレイパッケージ」とは、半導体チップの入出力端子として複数のはんだバンプを平面状に有する半導体パッケージである。具体的には、ボールグリッドアレイ(BGA)、チップスケールパッケージ(CSP)、ウエハーレベルCSPなどのエリアバンプアレイパッケージが挙げられる。バンプアレイパッケージ1の上には、一般に球状曲面の表面を有するはんだバンプ2を有する。パッケージ1のはんだバンプ2の側に、熱流動性でかつ熱硬化性の接着フィルム3を配置し(図1(a))、その後、平坦な表面を有する加熱板4で加熱及び加圧することで、接着フィルム3を流動化させ、はんだバンプの周囲に流れ出させ、はんだバンプ2の先端部を部分的に平坦化させた状態で露出させる。これにより、接着フィルム3と、はんだパンプ2の露出面とからなる平坦な表面を有する、接着フィルム3付きパッケージ1を得る(図1(b))。通常、バンプアレイパッケージのはんだバンプの上に接着フィルムを配置し、ポリテトラフルオロエチレン(PTFE)フィルムやシリコーン処理したポリエステルフィルムなどの剥離性フィルムによって覆い、該フィルム上に温度及び圧力をかけることで上記工程を行なうことができる。また、このような加熱及び加圧工程はパルスヒートボンダーなどのサーマルボンダーを用いて行なえる。ボンダーヘッドはチップサイズより大きいものを用いるべきであり、応力はチップに対して垂直方向に加えられるべきである。加熱板4での加熱温度は接着フィルム3が流動するには十分な温度であるが、接着フィルム3の硬化を完了させるには不十分な温度であって、かつ、前記はんだの融解温度よりも低い温度である。加圧の圧力は、はんだバンプ2の各々の先端が平坦化して表面に露出した状態となるの十分な圧力である。なお、上記の温度及び圧力は、選択される接着フィルムの樹脂組成及びはんだの融点などによって決まるものであり、限定されない。一般には、本発明の方法では、60〜170℃の流動化温度を有しかつ170〜260℃の硬化温度を有する樹脂成分を含む接着フィルム及び180〜300℃の融点のはんだを用いることが好ましい。この場合には、約100〜180℃程度の加熱温度及び1〜10秒の加熱時間、5〜100N/cm2の加圧圧力が好適に用いられる。
バンプアレイパッケージ及び配線板
バンプアレイパッケージとして、Top Line社より購入したボールグリッドアレイ(BGA)を用いた。図2にその底面図を示す。このBGAは8×8mmのサイズであり、はんだボールは0.5mmピッチで、はんだボール高さ0.31mm(錫/鉛はんだ)で、外周に14×14個、内周に12×12個で配置されており、ポリイミド(PI)インターポーザーを含む半導体パッケージであった。
一方、配線板として、ガラスエポキシ基板(厚さ0.5mm)上に、バンプアレイパッケージのはんだボールピッチに対応するピッチで導電パターンを形成したものを用いた。
下記の表1に示す組成で接着剤樹脂溶液を形成し、それをシリコーン処理ポリエチレンテレフタレート(PET)フィルム上にナイフコーティングにより塗布し、100℃のオーブン内で20分間乾燥し、厚さ25μmのフィルムを得た。同様の作業をさらに5回行い、これらのフィルム6枚を120℃で熱ラミネートし、厚さ150μmの接着フィルムを形成した。
2 はんだバンプ
3 接着フィルム
4 加熱板
5 配線板
Claims (10)
- はんだバンプを有するバンプアレイパッケージの表面に熱流動性でかつ熱硬化性の接着フィルムを配置すること、
前記はんだバンプと前記接着フィルムとからなる平坦な表面を有するバンプアレイパッケージを形成すること、
前記はんだバンプと接着フィルムとからなる平坦な表面を配線板上に配置し、前記接着フィルムの硬化を完了させるのに十分な温度であってかつ前記はんだの融解温度より高い温度に加熱することで、バンプアレイパッケージを配線板に接続すること、
の工程を含む、
バンプアレイパッケージを配線板に電気接続するための方法。 - 半導体チップの入出力端子として複数のはんだバンプを平面状に有するバンプアレイパッケージを配線板に電気接続するための方法であって、
前記バンプアレイパッケージのはんだバンプを有する面に対して、熱流動性でかつ熱硬化性の接着フィルムを配置すること、
前記接着フィルムが流動するには十分な温度であるが、前記接着フィルムの硬化を完了させるには不十分な温度であって、かつ、前記はんだの融解温度よりも低い温度において、平坦な表面を有する板状体で前記接着フィルムを加圧することで、前記はんだバンプの各々の先端が部分的に平坦化して表面に露出した状態となった、各はんだバンプと接着フィルムとからなる平坦な表面を有するバンプアレイパッケージを形成すること、
前記はんだバンプと接着フィルムとからなる平坦な表面を配線板上に配置し、前記接着フィルムの硬化を完了させるのに十分な温度であってかつ前記はんだの融解温度より高い温度に加熱することで、バンプアレイパッケージを配線板に接続すること、
の工程を含む、
請求項1記載のバンプアレイパッケージを配線板に電気接続するための方法。 - 前記熱流動性でかつ熱硬化性の接着フィルムは、熱可塑性成分と熱硬化性成分の両方を含む、請求項1又は2記載の方法。
- 前記熱流動性でかつ熱硬化性の接着フィルムは、カプロラクトン変性エポキシ樹脂を含む熱硬化性接着剤組成物からなる、請求項3記載の方法。
- 前記熱流動性でかつ熱硬化性の接着フィルムは、前記接着フィルムの総質量を基準として、35〜100%の有機物粒子を含む、請求項1〜4のいずれか1項記載の方法。
- 前記はんだバンプと接着フィルムとからなる平坦な表面を配線板上に配置する前に、前記配線板の接続すべき部分にフラックスを塗布する工程を含む、請求項1〜5のいずれか1項記載の方法。
- バンプアレイパッケージを配線板に接続する工程ははんだリフローオーブン中で行なわれる、請求項1〜6のいずれか1項記載の方法。
- はんだバンプの各々の先端が部分的に平坦化して表面に露出した状態となっており、そのため、各はんだバンプと接着フィルムとからなる平坦な表面を有する、接着フィルム付きバンプアレイパッケージ。
- はんだボールのバンプの高さがもとの高さの50〜90%の高さにまで押し潰されて先端が部分的に平坦化されている、請求項8記載の接着フィルム付きバンプアレイパッケージ。
- 半導体チップの入出力端子として複数のはんだバンプを平面状に有するバンプアレイパッケージを用意し、前記バンプアレイパッケージのはんだバンプを有する面に対して、熱流動性でかつ熱硬化性の接着フィルムを配置すること、前記接着フィルムが流動するには十分な温度であるが、前記接着フィルムの硬化を完了させるには不十分な温度であって、かつ、前記はんだの融解温度よりも低い温度において、平坦な表面を有する板状体で前記接着フィルムを加圧することにより得られる、請求項8又は9記載の接着フィルム付きバンプアレイパッケージ。
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JP2004318225A JP2006128567A (ja) | 2004-11-01 | 2004-11-01 | 半導体パッケージのプリント配線板への接続方法 |
PCT/US2005/037287 WO2006049853A2 (en) | 2004-11-01 | 2005-10-14 | Method of connecting a semiconductor package to a printed wiring board |
US11/577,921 US20090127692A1 (en) | 2004-11-01 | 2005-10-14 | Method of connecting a semiconductor package to a printed wiring board |
KR1020077012273A KR20070084607A (ko) | 2004-11-01 | 2005-10-14 | 인쇄 회로 기판에 반도체 패키지를 접속하는 방법 |
EP05812409A EP1810325A2 (en) | 2004-11-01 | 2005-10-14 | Method of connecting a semiconductor package to a printed wiring board |
CNB2005800382096A CN100550329C (zh) | 2004-11-01 | 2005-10-14 | 将半导体封装连接到印刷线路板上的方法 |
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CN100550329C (zh) | 2009-10-14 |
WO2006049853A3 (en) | 2006-08-24 |
CN101103449A (zh) | 2008-01-09 |
KR20070084607A (ko) | 2007-08-24 |
TW200620513A (en) | 2006-06-16 |
WO2006049853A2 (en) | 2006-05-11 |
EP1810325A2 (en) | 2007-07-25 |
US20090127692A1 (en) | 2009-05-21 |
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