JP2006066530A - Electronic device - Google Patents

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JP2006066530A
JP2006066530A JP2004245668A JP2004245668A JP2006066530A JP 2006066530 A JP2006066530 A JP 2006066530A JP 2004245668 A JP2004245668 A JP 2004245668A JP 2004245668 A JP2004245668 A JP 2004245668A JP 2006066530 A JP2006066530 A JP 2006066530A
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Prior art keywords
circuit board
circuit
electronic device
substrate
circuit element
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Japanese (ja)
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Yohei Yugawa
洋平 湯川
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Denso Corp
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Denso Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/2405Shape
    • H01L2224/24051Conformal with the semiconductor or solid-state device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/24227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30105Capacitance

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic device that can reduce the occurrence of disconnection. <P>SOLUTION: A circuit board 10 is provided with a substrate-side electrode 11 and a mounting section 12 which is a step for mounting a circuit element 20 and the like, as shown in Fig.(a). The mounting section 12 is formed to reduce the step between surfaces of the circuit board 10 and the circuit element 20, has a shape corresponding to the external form of the circuit element 20, and has such a size that the circuit element 20 can be inserted into the section 12 without approximately forming a gap between the circuit board 10 and the circuit element 20. Then, in a state that the circuit element 20 is inserted into the mounting section 12 as shown in Fig. (b), conductive paste 30 is screen-printed by using a squeegee plate 80 and a squeegee 82 as shown in Fig. (c). Therefore, the conductive paste 30 is applied in a state that the surfaces of the circuit board 10 and the circuit elements 20 roughly become the same flat surface as shown in Fig. (d). <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、電子装置に関するものである。   The present invention relates to an electronic device.

従来、回路基板10に回路素子20が実装された電子装置として図5に示すものがあった。図5は、従来技術における電子装置の模式的な断面図である。   Conventionally, there has been an electronic device shown in FIG. 5 as an electronic device in which a circuit element 20 is mounted on a circuit board 10. FIG. 5 is a schematic cross-sectional view of an electronic device in the prior art.

従来における電子装置は、図5に示すように回路基板10の上に回路素子20が搭載され、回路基板10に設けられた基板側電極11と回路素子20に設けられた素子側電極21とがスクリーン印刷された導電性ペースト(印刷材料)30にて電気的に接続されるものである。   As shown in FIG. 5, the conventional electronic device includes a circuit element 20 mounted on a circuit board 10, and a substrate-side electrode 11 provided on the circuit board 10 and an element-side electrode 21 provided on the circuit element 20. It is electrically connected by a screen-printed conductive paste (printing material) 30.

しかしながら、従来における電子装置では、回路基板10の表面と回路素子20の表面との間に、回路素子20の厚さ分の段差が形成される。この段差が形成された状態で回路基板10と回路素子20とに渡って導電性ペースト30をスクリーン印刷すると、段差の付け根付近には導電性ペースト30が印刷されにくく隙間Iが生じることがある。この隙間I付近の導電性ペースト30は、回路基板10や回路素子20などに接触しておらず強度が弱いため断線する可能性があった。   However, in the conventional electronic device, a step corresponding to the thickness of the circuit element 20 is formed between the surface of the circuit board 10 and the surface of the circuit element 20. When the conductive paste 30 is screen-printed across the circuit board 10 and the circuit element 20 in a state where the step is formed, the conductive paste 30 is difficult to be printed near the base of the step, and a gap I may be generated. The conductive paste 30 in the vicinity of the gap I is not in contact with the circuit board 10, the circuit element 20, and the like and has a low strength, so there is a possibility of disconnection.

また、回路基板10と回路素子20とに渡って窒化シリコンなどからなる印刷材料がスクリーン印刷されることによって保護膜が形成されるような場合も、回路基板10の表面と回路素子20の表面との間に形成された段差によって保護膜が損傷する可能性があった。   Also, when a protective film is formed by screen printing a printing material made of silicon nitride or the like across the circuit board 10 and the circuit element 20, the surface of the circuit board 10 and the surface of the circuit element 20 There was a possibility that the protective film was damaged by the step formed between the two.

本発明は、上記問題点に鑑みなされたものであり、被実装基材と電子部材間とに渡ってスクリーン印刷される印刷材料の損傷を抑制することができる電子装置を提供することを目的とする。   The present invention has been made in view of the above problems, and an object of the present invention is to provide an electronic device that can suppress damage to a printing material that is screen-printed across a substrate to be mounted and an electronic member. To do.

上記目的を達成するために請求項1に記載の電子装置は、被実装基材に電子部材を実装し、被実装基材の表面と電子部材の表面とに渡って印刷材料がスクリーン印刷にて設けられる電子装置において、被実装基材は、電子部材を実装する位置に電子部材の外形に応じた段差からなる実装部を有することを特徴とするものである。   In order to achieve the above object, an electronic device according to claim 1, an electronic member is mounted on a substrate to be mounted, and a printing material is screen-printed across the surface of the substrate to be mounted and the surface of the electronic member. In the electronic device provided, the substrate to be mounted has a mounting portion having a step corresponding to the outer shape of the electronic member at a position where the electronic member is mounted.

このように、被実装基板に電子部材の外形に応じた実装部(段差)を設けることによって、この実装部の深さ分だけ被実装基板の表面と電子部材の表面との段差が低減されることになる。したがって、実装基材の表面と電子部材の表面とに渡って印刷材料をスクリーン印刷しても被実装基板の表面と電子部材の表面との段差の付け根には隙間が生じにくく、印刷材料の損傷を抑制することができる。   Thus, by providing the mounting substrate with a mounting portion (step) corresponding to the outer shape of the electronic member, the step between the surface of the mounting substrate and the surface of the electronic member is reduced by the depth of the mounting portion. It will be. Therefore, even if the printing material is screen-printed across the surface of the mounting substrate and the surface of the electronic member, a gap is hardly formed at the base of the step between the surface of the mounting substrate and the surface of the electronic member, and the printing material is damaged. Can be suppressed.

また、請求項2に示すように、実装部は、電子部材が挿入された状態で被実装基材の表面と電子部材の表面とが略同一平面となる深さとすることによって、より一層隙間が生じにくくし損傷を抑制することができる。   Further, as shown in claim 2, the mounting portion has a further gap by setting the depth so that the surface of the substrate to be mounted and the surface of the electronic member are substantially flush with the electronic member inserted. It is difficult to occur and damage can be suppressed.

また、被実装基材に複数の電子部材が実装されるような場合であっても、請求項3に示すように、被実装基材が複数の実装部を有することによって、被実装基材における電子部材との段差による凸凹が減少され印刷材料を一括でスクリーン印刷することができる。   Further, even when a plurality of electronic members are mounted on the substrate to be mounted, as shown in claim 3, the substrate to be mounted has a plurality of mounting portions, so that The unevenness due to the step with the electronic member is reduced, and the printing material can be screen-printed collectively.

また、請求項4に示すように被実装基材としては回路基板もしくは筐体、電子部材としては回路素子、回路基板、センサ素子、コネクタ部材の端子、半導体基板の少なくとも一つとすることができる。   According to a fourth aspect of the present invention, the substrate to be mounted can be a circuit board or housing, and the electronic member can be at least one of a circuit element, a circuit board, a sensor element, a connector member terminal, and a semiconductor substrate.

また、請求項5に記載の電子装置では、被実装基材は、電子部材として一対の湿度検出電極を形成するための湿度センサ用半導体基板、及び湿度センサの検出信号を処理する処理回路が実装されるものであり、印刷材料は、被実装基材を介して湿度センサ用半導体基板と処理回路とに渡って設けられることを特徴とするものである。   In the electronic device according to claim 5, the substrate to be mounted is mounted with a humidity sensor semiconductor substrate for forming a pair of humidity detection electrodes as electronic members, and a processing circuit for processing the detection signal of the humidity sensor. The printing material is provided across the humidity sensor semiconductor substrate and the processing circuit via the substrate to be mounted.

このように、被実装基材を介して電子部材である湿度センサ用半導体基板と処理回路とに渡って印刷材料が設けられることによって、湿度検出電極及び湿度検出電極と処理回路との配線を構成する印刷材料を一括でスクリーン印刷することができる。さらに、電子部材に保護膜をスクリーン印刷する場合でも、被実装基材における電子部材(湿度センサ用半導体基板、処理回路)の実装面の凸凹が減少されるので、保護膜に関しても一括でスクリーン印刷することができる。また、実装面の凸凹が減少されることによって保護膜の損傷が抑制されるので保護機能の低下を抑制することができる。   In this manner, the humidity detection electrode and the wiring between the humidity detection electrode and the processing circuit are configured by providing the printing material over the semiconductor substrate for the humidity sensor, which is an electronic member, and the processing circuit via the mounted substrate. It is possible to screen-print the printing materials to be batched. Furthermore, even when screen-printing a protective film on the electronic member, the unevenness of the mounting surface of the electronic member (humidity sensor semiconductor substrate, processing circuit) on the substrate to be mounted is reduced, so that the protective film is also screen-printed collectively. can do. Moreover, since the damage of a protective film is suppressed by reducing the unevenness | corrugation of a mounting surface, the fall of a protective function can be suppressed.

また、請求項6に記載の電子装置のように、印刷材料は、導電性部材からなることを特徴とすることによって、導電性部材を被実装基材の表面と電子部材の表面との段差によって生じる断線を抑制することができる。   Further, as in the electronic device according to claim 6, the printing material is made of a conductive member, and the conductive member is formed by a step between the surface of the substrate to be mounted and the surface of the electronic member. The disconnection which arises can be suppressed.

(第1の実施の形態)
以下、本発明の第1の実施の形態を図に基づいて説明する。図1は、本発明の第1の実施の形態における電子装置の模式的な断面図であり、(a)は回路基板の断面図であり、(b)は回路基板に回路素子を実装した際の断面図であり、(c)は導電性ペーストを印刷する際の断面図であり、(d)は回路基板と回路素子をスクリーン印刷にて電気的に接続した際の断面図である。図2は、本発明の第1の実施の形態における複数の回路素子を備える電子装置の模式的な断面図である。
(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a schematic cross-sectional view of an electronic device according to a first embodiment of the present invention, (a) is a cross-sectional view of a circuit board, and (b) is when a circuit element is mounted on the circuit board. (C) is a cross-sectional view when the conductive paste is printed, and (d) is a cross-sectional view when the circuit board and the circuit element are electrically connected by screen printing. FIG. 2 is a schematic cross-sectional view of an electronic device including a plurality of circuit elements according to the first embodiment of the present invention.

本実施の形態における電子装置は、導電性ペースト(導電性部材)30によって電気的に接続された回路基板10と回路素子20とを含むものである。なお、回路基板10は、本発明の被実装基材に相当するものであり、回路素子20は、本発明の電子部材に相当するものであり、導電性ペースト(導電性部材)30は、本発明の導電性部材に相当するものである。   The electronic device in the present embodiment includes a circuit board 10 and a circuit element 20 that are electrically connected by a conductive paste (conductive member) 30. The circuit board 10 corresponds to the mounted substrate of the present invention, the circuit element 20 corresponds to the electronic member of the present invention, and the conductive paste (conductive member) 30 This corresponds to the conductive member of the invention.

回路基板10は、図1(a)に示すように基板側電極11、回路素子20を実装する段差である実装部12などを備える。この実装部12は、回路基板10の表面と回路素子20の表面との段差を低減させるためのものであり、回路素子20の外形に応じた形状であり、回路基板10と回路素子20との間に略隙間がないように回路素子20を挿入できる程度の大きさを有する。また、実装部12の深さは、回路素子20の厚さと略同じとすることによって、回路素子20を実装部12に実装した際に、回路基板10の表面と回路素子20の表面とが略同一平面上に位置することとなり好適である。   As shown in FIG. 1A, the circuit board 10 includes a board-side electrode 11, a mounting portion 12 that is a step for mounting the circuit element 20, and the like. The mounting portion 12 is for reducing a step between the surface of the circuit board 10 and the surface of the circuit element 20, and has a shape corresponding to the outer shape of the circuit element 20. The circuit element 20 has such a size that the circuit element 20 can be inserted so that there is substantially no gap therebetween. The depth of the mounting portion 12 is substantially the same as the thickness of the circuit element 20, so that when the circuit element 20 is mounted on the mounting portion 12, the surface of the circuit board 10 and the surface of the circuit element 20 are substantially the same. It is preferable to be located on the same plane.

なお、回路基板10に関しては、熱可塑性樹脂からなる樹脂フィルムと導体パターンとを交互に積層し、加熱しつつ加圧することによって形成される多層基板でもよい。この場合、実装部12は、回路基板10を形成する樹脂フィルムのうち、回路素子20の厚みに相当する程度の枚数の樹脂フィルムに回路素子20に応じた形状の開口を施す。そして、多層基板の表面となる方に開口部を備える樹脂フィルムを積層し、この樹脂フィルムの開口位置を揃えて、多層基板を構成するほかの樹脂フィルムと一緒に加熱しつつ加圧することによって形成する。回路素子20は、MOSFETやトランジスタなどの回路構成要素が形成されるものであり素子側電極21などを備える。   The circuit board 10 may be a multilayer board formed by alternately laminating a resin film made of a thermoplastic resin and a conductor pattern and applying pressure while heating. In this case, the mounting portion 12 provides openings having a shape corresponding to the circuit element 20 to a number of resin films corresponding to the thickness of the circuit element 20 among the resin films forming the circuit board 10. And it is formed by laminating a resin film with an opening on the surface of the multilayer substrate, aligning the opening position of this resin film, and applying pressure while heating together with other resin films constituting the multilayer substrate To do. The circuit element 20 is formed with circuit components such as a MOSFET and a transistor, and includes an element side electrode 21 and the like.

ここで、本実施の形態における電子装置の製造方法に関して説明する。まず、回路基板10の実装部12に回路素子20を接着するための接着剤(図示せず)を塗布する。次に、図1(b)に示すように実装部12に回路素子20を挿入することによって回路基板10と回路素子20とを接着固定する。このように回路基板10の実装部12に回路素子20が実装された状態においてスクリーン印刷工程を行う。   Here, a method for manufacturing the electronic device in the present embodiment will be described. First, an adhesive (not shown) for bonding the circuit element 20 is applied to the mounting portion 12 of the circuit board 10. Next, the circuit board 10 and the circuit element 20 are bonded and fixed by inserting the circuit element 20 into the mounting portion 12 as shown in FIG. In this way, the screen printing process is performed in a state where the circuit element 20 is mounted on the mounting portion 12 of the circuit board 10.

スクリーン印刷工程には、電子装置に施す導電性ペースト30のパターン(以下、配線パターンとも称する)に応じた開口部81を備えたスキージ板80、スキージ板80に充填されている印刷材料である導電性ペースト30を開口部81から押し出すためのスキージ82などを用いる。   In the screen printing process, a squeegee plate 80 having an opening 81 corresponding to a pattern (hereinafter also referred to as a wiring pattern) of a conductive paste 30 applied to an electronic device, and a conductive material that is a printing material filled in the squeegee plate 80. A squeegee 82 for extruding the conductive paste 30 from the opening 81 is used.

スクリーン印刷工程においては、まず、図1(c)に示すようにスキージ板80を開口部81が回路基板10の配線パターンと対応するように位置合わせした状態で回路基板10の表面に密接させる。次に、導電性ペースト30をスキージ板80に押し付けるようにしてスキージ82を移動させる。図1(c)に示す例では、紙面右から左へ移動させる。   In the screen printing process, first, as shown in FIG. 1C, the squeegee plate 80 is brought into close contact with the surface of the circuit board 10 in a state where the opening 81 is aligned with the wiring pattern of the circuit board 10. Next, the squeegee 82 is moved so as to press the conductive paste 30 against the squeegee plate 80. In the example shown in FIG. 1C, the sheet is moved from the right side to the left side.

このスキージ82の移動に伴って導電性ペースト30が開口部81から押し出されることによって、図1(d)に示すように回路基板10と回路素子20とに渡って導電性ペースト30が印刷される。そして、印刷された導電性ペースト30によって基板側電極11と素子側電極21とが接続され、回路基板10と回路素子20とが電気的に接続される。   As the squeegee 82 moves, the conductive paste 30 is pushed out from the opening 81, whereby the conductive paste 30 is printed across the circuit board 10 and the circuit element 20 as shown in FIG. . And the board | substrate side electrode 11 and the element side electrode 21 are connected by the printed conductive paste 30, and the circuit board 10 and the circuit element 20 are electrically connected.

このように、回路基板10に設けた実装部12に回路素子20を挿入することによって回路基板10の表面と回路素子20の表面との段差が低減される。従って、実装部12に回路素子20を挿入した状態で、回路基板10と回路素子20とに渡って導電性ペースト30を印刷する際に、回路基板10の表面と回路素子20の表面との段差の付け根付近に隙間が生じにくく、導電性ペースト30の断線を抑制することができる。   As described above, the step between the surface of the circuit board 10 and the surface of the circuit element 20 is reduced by inserting the circuit element 20 into the mounting portion 12 provided on the circuit board 10. Therefore, when the conductive paste 30 is printed across the circuit board 10 and the circuit element 20 with the circuit element 20 inserted into the mounting portion 12, the level difference between the surface of the circuit board 10 and the surface of the circuit element 20. It is difficult for a gap to be generated near the base of the conductive paste 30, and disconnection of the conductive paste 30 can be suppressed.

また、図2に示すように回路基板10に複数の実装部12を設けるようにしてもよい。回路基板10に複数の回路素子20を実装するような場合であっても、複数の実装部12を設けることによって、回路基板10における回路素子20との段差による凸凹が減少され導電性ペースト30を一括でスクリーン印刷することができる。   Further, as shown in FIG. 2, a plurality of mounting portions 12 may be provided on the circuit board 10. Even when a plurality of circuit elements 20 are mounted on the circuit board 10, by providing the plurality of mounting portions 12, unevenness due to a step with the circuit elements 20 on the circuit board 10 is reduced, and the conductive paste 30 is added. Screen printing can be performed at once.

また、回路素子20に保護膜をスクリーン印刷する場合でも、実装部12を設けることによって回路基板10における回路素子20との段差による凸凹が減少されるので保護膜を一括でスクリーン印刷することができる。さらに、回路基板10における回路素子20との段差による実装面の凸凹が減少されるので、保護膜の損傷による保護機能の低下を抑制することができる。   Further, even when the protective film is screen-printed on the circuit element 20, by providing the mounting portion 12, unevenness due to a step with the circuit element 20 on the circuit board 10 is reduced, so that the protective film can be screen-printed collectively. . Furthermore, since the unevenness of the mounting surface due to the level difference with the circuit element 20 in the circuit board 10 is reduced, it is possible to suppress a reduction in the protective function due to damage to the protective film.

なお、本実施の形態においては、基板側電極11及び素子側電極21上に導電性ペースト30を印刷する例を用いて説明したが、本発明はこれに限定されるものではない。基板側電極11及び素子側電極21を導電性ペースト30のスクリーン印刷によって形成するようにしてもよい。こうすることによって、基板側電極11及び素子側電極21を設ける必要がなくなる。   In the present embodiment, the example in which the conductive paste 30 is printed on the substrate side electrode 11 and the element side electrode 21 has been described. However, the present invention is not limited to this. The substrate side electrode 11 and the element side electrode 21 may be formed by screen printing of the conductive paste 30. By doing so, it is not necessary to provide the substrate side electrode 11 and the element side electrode 21.

なお、本実施の形態においては、電子部材として回路素子20を用いる例にて説明したが、本発明はこれに限定されるものではなく、回路基板、センサ素子、半導体基板などの電子部材でもよい。   In the present embodiment, the circuit element 20 is used as an electronic member. However, the present invention is not limited to this, and an electronic member such as a circuit board, a sensor element, or a semiconductor substrate may be used. .

(第2の実施の形態)
次に、本発明の第2の実施の形態を図3に基づいて説明する。図3は、本発明の第2の実施の形態における電子装置の模式的な平面図である。
(Second Embodiment)
Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 3 is a schematic plan view of an electronic device according to the second embodiment of the present invention.

第2の実施の形態における電子装置は、第1の実施の形態によるものと共通するところが多いので、以下、共通部分についての詳しい説明は省略し、異なる部分を重点的に説明する。第2の実施の形態において、第1の実施の形態と異なる点は、電子部材として湿度センサ40用の半導体基板と処理回路50(回路素子)とを用いた点である。   Since the electronic device according to the second embodiment is often in common with that according to the first embodiment, a detailed description of the common parts will be omitted, and different parts will be described mainly. The second embodiment is different from the first embodiment in that a semiconductor substrate for the humidity sensor 40 and a processing circuit 50 (circuit element) are used as electronic members.

本実施の形態における電子装置は、回路基板10の実装部12に湿度センサ40用の半導体基板と処理回路50とが実装され、この湿度センサ40と処理回路50とが接続部42(導電性ペースト30)で電気的に接続されている。   In the electronic device according to the present embodiment, the semiconductor substrate for the humidity sensor 40 and the processing circuit 50 are mounted on the mounting portion 12 of the circuit board 10, and the humidity sensor 40 and the processing circuit 50 are connected to the connection portion 42 (conductive paste). 30).

湿度センサ40は、容量式湿度センサであり、湿度に応じて一対の湿度検出電極41間の静電容量が変化するものである。この湿度センサ40は、シリコンなどの半導体基板の上面に絶縁膜として酸化シリコン膜が形成されている。そして、湿度センサ40は、この酸化シリコン膜上の略同一平面に一対の湿度検出電極41が離間して対向配置される。   The humidity sensor 40 is a capacitive humidity sensor, and the capacitance between the pair of humidity detection electrodes 41 changes according to the humidity. In the humidity sensor 40, a silicon oxide film is formed as an insulating film on the upper surface of a semiconductor substrate such as silicon. In the humidity sensor 40, a pair of humidity detection electrodes 41 are disposed opposite to each other on substantially the same plane on the silicon oxide film.

湿度検出電極41の形状は特に限定されるものではないが、本実施の形態においては、図3に示すように、一対の櫛歯形状の電極が対向する状態で配置されている。このように櫛歯形状を用いることにより、湿度検出電極41の配置面積を小さくしつつ、櫛歯部が互いに対向する面積を大きくすることができる。これにより、周囲の湿度変化に伴って変化する湿度検出電極41間の静電容量の変化量が大きくなり、容量式湿度センサの感度が向上する。   The shape of the humidity detection electrode 41 is not particularly limited, but in the present embodiment, as shown in FIG. 3, a pair of comb-shaped electrodes are arranged in a state of facing each other. By using the comb-tooth shape in this way, the area where the comb-tooth portions oppose each other can be increased while reducing the arrangement area of the humidity detection electrode 41. As a result, the amount of change in capacitance between the humidity detection electrodes 41 that changes with changes in ambient humidity increases, and the sensitivity of the capacitive humidity sensor improves.

そして、水分によって湿度検出電極41が腐食するのを抑制するために、湿度検出電極を覆うように保護膜としての窒化シリコン膜が形成されている。さらに、窒化シリコン膜40の上には、吸湿性の高分子材料からなる感湿膜が形成されている。   And in order to suppress that the humidity detection electrode 41 corrodes with a water | moisture content, the silicon nitride film as a protective film is formed so that a humidity detection electrode may be covered. Further, a moisture sensitive film made of a hygroscopic polymer material is formed on the silicon nitride film 40.

処理回路50は、湿度センサ40からの検出信号(静電容量値)を信号処理したり、検出信号を補正したりする回路であり、CMOSトランジスタや電極などが形成されている。そして、処理回路50の表面にも保護膜が形成されている。   The processing circuit 50 is a circuit that processes a detection signal (capacitance value) from the humidity sensor 40 and corrects the detection signal, and includes a CMOS transistor, an electrode, and the like. A protective film is also formed on the surface of the processing circuit 50.

ここで、本実施の形態における電子装置の製造方法に関して説明する。まず、回路基板10の実装部12に接着剤を塗布する。次に、実装部12に湿度センサ40用の半導体基板と処理回路50とを挿入して回路基板10と湿度センサ40用の半導体基板、処理回路50とを接着固定する。   Here, a method for manufacturing the electronic device in the present embodiment will be described. First, an adhesive is applied to the mounting portion 12 of the circuit board 10. Next, the semiconductor substrate for the humidity sensor 40 and the processing circuit 50 are inserted into the mounting portion 12, and the circuit board 10, the semiconductor substrate for the humidity sensor 40, and the processing circuit 50 are bonded and fixed.

このように回路基板10の実装部12に湿度センサ40用の半導体基板と処理回路50とが実装された状態においてスクリーン印刷工程を行う。本実施の形態におけるスクリーン印刷は、湿度検出電極41と接続部42とを構成する導電性ペースト30を一括でスクリーン印刷する。   In this manner, the screen printing process is performed in a state where the semiconductor substrate for the humidity sensor 40 and the processing circuit 50 are mounted on the mounting portion 12 of the circuit board 10. In the screen printing in the present embodiment, the conductive paste 30 constituting the humidity detection electrode 41 and the connection portion 42 is screen-printed in a lump.

上述の実施の形態のように、スキージ板80を湿度センサ40用の半導体基板及び処理回路50が実装部12に挿入された回路基板10に位置合わせした状態で密接させる。そして、導電性ペースト30をスキージ板80に押し付けるようにしてスキージ82を移動させることによって湿度センサ40用の半導体基板と処理回路50とに渡って導電性ペースト30が印刷される。このようにして、湿度検出電極41及び接続部42が形成されることによって湿度センサ40と処理回路50とが電気的に接続される。   As in the above-described embodiment, the squeegee plate 80 is brought into close contact with the circuit board 10 in which the semiconductor substrate for the humidity sensor 40 and the processing circuit 50 are inserted into the mounting portion 12. Then, the conductive paste 30 is printed across the semiconductor substrate for the humidity sensor 40 and the processing circuit 50 by moving the squeegee 82 so as to press the conductive paste 30 against the squeegee plate 80. In this way, the humidity sensor 40 and the processing circuit 50 are electrically connected by forming the humidity detection electrode 41 and the connection portion 42.

さらに本実施の形態においては、導電性ペースト30が印刷された回路基板10、湿度センサ40用の半導体基板及び処理回路50の表面に窒化シリコン膜からなる保護膜がスクリーン印刷される。そして、湿度センサ40の表面のみに吸湿性の高分子材料からなる感湿膜がスクリーン印刷される。   Furthermore, in the present embodiment, a protective film made of a silicon nitride film is screen-printed on the surface of the circuit board 10 on which the conductive paste 30 is printed, the semiconductor substrate for the humidity sensor 40 and the processing circuit 50. A moisture sensitive film made of a hygroscopic polymer material is screen-printed only on the surface of the humidity sensor 40.

このように、回路基板10に設けた実装部12に湿度センサ40用の半導体基板及び処理回路50を挿入することによって回路基板10の表面と湿度センサ40用の半導体基板及び処理回路50の表面との段差が低減される。従って、湿度検出電極41と接続部42とを構成する導電性ペースト30を一括でスクリーン印刷することができる。   In this way, by inserting the semiconductor substrate and processing circuit 50 for the humidity sensor 40 into the mounting portion 12 provided on the circuit board 10, the surface of the circuit substrate 10, the semiconductor substrate for the humidity sensor 40 and the surface of the processing circuit 50, and The step is reduced. Therefore, the conductive paste 30 constituting the humidity detection electrode 41 and the connection portion 42 can be screen-printed in a batch.

なお、本実施の形態においては、センサ素子である湿度センサ40と回路素子である処理回路50をそれぞれ単数設ける例を用いて説明したが、本発明はこれに限定されるものではない。複数の湿度センサ40及び複数の処理回路50を用いるようにしてもよいし、複数の湿度センサ40及び単数の処理回路50を用いるようにしてもよいし、単数の湿度センサ40及び複数の処理回路50を用いるようにしてもよい。   Although the present embodiment has been described using an example in which a single humidity sensor 40 as a sensor element and a single processing circuit 50 as a circuit element are provided, the present invention is not limited to this. A plurality of humidity sensors 40 and a plurality of processing circuits 50 may be used, a plurality of humidity sensors 40 and a single processing circuit 50 may be used, or a single humidity sensor 40 and a plurality of processing circuits. 50 may be used.

また、本実施の形態においては、電子部材として回路素子である処理回路50を用いる例にて説明したが、本発明はこれに限定されるものではなく、処理回路50が実装された回路基板でもよい。   In the present embodiment, the processing circuit 50 that is a circuit element is used as the electronic member. However, the present invention is not limited to this, and a circuit board on which the processing circuit 50 is mounted may be used. Good.

(第3の実施の形態)
次に、本発明の第3の実施の形態を図4に基づいて説明する。図4は、本発明の第3の実施の形態における電子装置の模式的な斜視図である。
(Third embodiment)
Next, a third embodiment of the present invention will be described with reference to FIG. FIG. 4 is a schematic perspective view of an electronic device according to the third embodiment of the present invention.

第3の実施の形態における電子装置は、上述の実施の形態によるものと共通するところが多いので、以下、共通部分についての詳しい説明は省略し、異なる部分を重点的に説明する。第3の実施の形態において、第1の実施の形態と異なる点は、被実装基材としてコネクタ70を実装する筐体60、電子部材としてコネクタ70の端子71及び回路基板10を用いた点である。   Since the electronic device according to the third embodiment is often in common with that according to the above-described embodiment, a detailed description of the common parts will be omitted, and different parts will be mainly described below. The third embodiment is different from the first embodiment in that a housing 60 for mounting the connector 70 as a mounting base material, terminals 71 of the connector 70 and the circuit board 10 as electronic members are used. is there.

筐体60は、図4(a)に示すように実装部61、端子実装部62などを備える。実装部61は、上述の実施の形態における実装部12と同じものであるので説明は省略する。端子実装部62は、筐体60の表面とコネクタ70の端子71の表面との段差を低減させるためのものであり、端子71の外形に応じた形状であり、筐体60と端子71との間に略隙間がないように端子71を挿入できる程度の大きさを有する。また、端子実装部62の深さは、端子71の厚さと略同じとすることによって、端子71を筐体60に実装した際に、筐体60の表面と端子71の表面とが略同一平面となり好適である。   The housing 60 includes a mounting portion 61, a terminal mounting portion 62, and the like as shown in FIG. Since the mounting unit 61 is the same as the mounting unit 12 in the above-described embodiment, the description thereof is omitted. The terminal mounting portion 62 is for reducing a step between the surface of the housing 60 and the surface of the terminal 71 of the connector 70, has a shape corresponding to the outer shape of the terminal 71, and is formed between the housing 60 and the terminal 71. The terminal 71 is large enough to be inserted so that there is almost no gap between them. The depth of the terminal mounting portion 62 is substantially the same as the thickness of the terminal 71, so that when the terminal 71 is mounted on the housing 60, the surface of the housing 60 and the surface of the terminal 71 are substantially flush. It is suitable.

ここで、本実施の形態における電子装置の製造方法に関して説明する。まず、筐体60の実装部61及び端子実装部62に接着剤を塗布する。次に、実装部61に回路基板10を挿入して筐体60と回路基板10とを接着固定すると共に、端子実装部62に端子71を挿入して筐体60と端子71(コネクタ70)とを接着固定する。   Here, a method for manufacturing the electronic device in the present embodiment will be described. First, an adhesive is applied to the mounting part 61 and the terminal mounting part 62 of the housing 60. Next, the circuit board 10 is inserted into the mounting portion 61 to bond and fix the housing 60 and the circuit board 10, and the terminal 71 is inserted into the terminal mounting portion 62 to connect the housing 60 and the terminal 71 (connector 70). Adhere and fix.

このように筐体60の実装部61及び端子実装部62に回路基板10及び端子71が実装された状態においてスクリーン印刷工程を行う。上述の実施の形態のように、スキージ板80を回路基板10及び端子71が実装部に挿入された筐体60に位置合わせした状態で密接させる。そして、導電性ペースト30をスキージ板80に押し付けるようにしてスキージ82を移動させることによって回路基板10と端子71とに渡って導電性ペースト30が印刷される。   Thus, the screen printing process is performed in a state where the circuit board 10 and the terminals 71 are mounted on the mounting portion 61 and the terminal mounting portion 62 of the housing 60. As in the above-described embodiment, the squeegee plate 80 is brought into close contact with the circuit board 10 and the terminal 71 in alignment with the housing 60 inserted in the mounting portion. Then, the conductive paste 30 is printed across the circuit board 10 and the terminals 71 by moving the squeegee 82 so as to press the conductive paste 30 against the squeegee plate 80.

このように、筐体60に設けた端子実装部62に端子71を挿入することによって筐体60の表面と端子71の表面との段差が低減される。従って、実装部61に回路基板10を挿入した状態及び端子実装部62に端子71を挿入した状態で、回路基板10と端子71とに渡って導電性ペースト30を印刷する際に、筐体61の表面と回路基板10の表面及び端子71の表面との段差の付け根付近に隙間が生じにくく、導電性ペースト30の断線を抑制することができる。   As described above, by inserting the terminal 71 into the terminal mounting portion 62 provided in the housing 60, the level difference between the surface of the housing 60 and the surface of the terminal 71 is reduced. Accordingly, when the conductive paste 30 is printed across the circuit board 10 and the terminal 71 with the circuit board 10 inserted into the mounting part 61 and the terminal 71 inserted into the terminal mounting part 62, the housing 61 A gap is unlikely to be formed near the base of the step between the surface of the circuit board 10 and the surface of the circuit board 10 and the surface of the terminal 71, and disconnection of the conductive paste 30 can be suppressed.

なお、本実施の形態においては、電子部材として回路基板50を用いる例にて説明したが、本発明はこれに限定されるものではなく、電子部材としては回路素子、センサ素子、半導体基板などであってもよい。   In the present embodiment, the circuit board 50 is used as an electronic member. However, the present invention is not limited to this, and the electronic member may be a circuit element, a sensor element, a semiconductor substrate, or the like. There may be.

本発明の第1の実施の形態における電子装置の模式的な断面図であり、(a)は回路基板の断面図であり、(b)は回路基板に回路素子を実装した際の断面図であり、(c)は導電性ペーストを印刷する際の断面図であり、(d)は回路基板と回路素子をスクリーン印刷にて電気的に接続した際の断面図である。BRIEF DESCRIPTION OF THE DRAWINGS It is typical sectional drawing of the electronic device in the 1st Embodiment of this invention, (a) is sectional drawing of a circuit board, (b) is sectional drawing at the time of mounting a circuit element on a circuit board. (C) is a cross-sectional view when the conductive paste is printed, and (d) is a cross-sectional view when the circuit board and the circuit element are electrically connected by screen printing. 本発明の第1の実施の形態における複数の回路素子を備える電子装置の模式的な断面図である。It is a typical sectional view of an electronic device provided with a plurality of circuit elements in a 1st embodiment of the present invention. 本発明の第2の実施の形態における電子装置の模式的な平面図である。It is a typical top view of the electronic device in the 2nd Embodiment of this invention. 本発明の第3の実施の形態における電子装置の模式的な斜視図である。It is a typical perspective view of the electronic device in the 3rd Embodiment of this invention. 図5は、従来技術における電子装置の模式的な断面図である。FIG. 5 is a schematic cross-sectional view of an electronic device in the prior art.

符号の説明Explanation of symbols

10 回路基板、11 基板側電極、12 実装部、20 回路素子、21 素子側電極、30 導電性ペースト(導電性部材)、40 湿度センサ、41 湿度検出電極、42 接続部、50 処理回路、60 筐体、61 実装部、62 端子実装部、70 コネクタ、71 端子、80 スキージ板、81 開口部、82 スキージ DESCRIPTION OF SYMBOLS 10 Circuit board, 11 Board | substrate side electrode, 12 Mounting part, 20 Circuit element, 21 Element side electrode, 30 Conductive paste (conductive member), 40 Humidity sensor, 41 Humidity detection electrode, 42 Connection part, 50 Processing circuit, 60 Housing, 61 mounting portion, 62 terminal mounting portion, 70 connector, 71 terminal, 80 squeegee plate, 81 opening, 82 squeegee

Claims (6)

被実装基材に電子部材を実装し、当該被実装基材の表面と当該電子部材の表面とに渡って印刷材料がスクリーン印刷にて設けられる電子装置において、
前記被実装基材は、前記電子部材を実装する位置に当該電子部材の外形に応じた段差からなる実装部を有することを特徴とする電子装置。
In an electronic device in which an electronic member is mounted on a substrate to be mounted, and a printing material is provided by screen printing across the surface of the substrate to be mounted and the surface of the electronic member,
The electronic device according to claim 1, wherein the mounting substrate has a mounting portion having a step corresponding to the outer shape of the electronic member at a position where the electronic member is mounted.
前記実装部は、前記電子部材が挿入された状態で前記被実装基材の表面と当該電子部材の表面とが略同一平面となる深さであることを特徴とする請求項1に記載の電子装置。   2. The electron according to claim 1, wherein the mounting portion has a depth at which a surface of the substrate to be mounted and a surface of the electronic member are substantially flush with the electronic member inserted. apparatus. 前記被実装基材は、複数の前記実装部を有することを特徴とする請求項1又は請求項2に記載の電子装置。   The electronic device according to claim 1, wherein the mount base includes a plurality of the mounting portions. 前記被実装基材は回路基板もしくは筐体からなり、前記電子部材は回路素子、回路基板、センサ素子、コネクタ部材の端子、半導体基板の少なくとも一つからなることを特徴とする請求項1乃至請求項3のいずれかに記載の電子装置。   The said mounting base material consists of a circuit board or a housing | casing, and the said electronic member consists of at least one of a circuit element, a circuit board, a sensor element, the terminal of a connector member, and a semiconductor substrate. Item 4. The electronic device according to any one of Items 3. 前記被実装基材は、前記電子部材として一対の湿度検出電極を形成するための湿度センサ用半導体基板、及び前記湿度センサの検出信号を処理する処理回路が実装されるものであり、前記印刷材料は、前記被実装基材を介して前記湿度センサ用半導体基板と前記処理回路とに渡って設けられることを特徴とする請求項1乃至請求項4のいずれかに記載の電子装置。   The mounting substrate is mounted with a humidity sensor semiconductor substrate for forming a pair of humidity detection electrodes as the electronic member, and a processing circuit for processing a detection signal of the humidity sensor, and the printing material 5. The electronic device according to claim 1, wherein the electronic device is provided across the humidity sensor semiconductor substrate and the processing circuit via the mounted substrate. 前記印刷材料は、導電性部材からなることを特徴とする請求項1乃至請求項5のいずれかに記載の電子装置。   The electronic device according to claim 1, wherein the printing material is made of a conductive member.
JP2004245668A 2004-08-25 2004-08-25 Electronic device Pending JP2006066530A (en)

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