JP2005340309A - Resin sealed semiconductor device and its manufacturing method - Google Patents

Resin sealed semiconductor device and its manufacturing method Download PDF

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JP2005340309A
JP2005340309A JP2004154032A JP2004154032A JP2005340309A JP 2005340309 A JP2005340309 A JP 2005340309A JP 2004154032 A JP2004154032 A JP 2004154032A JP 2004154032 A JP2004154032 A JP 2004154032A JP 2005340309 A JP2005340309 A JP 2005340309A
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resin
die pad
semiconductor element
semiconductor device
sealing
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Shigeru Oki
滋 大木
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201—Structure
    • H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32014—Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205—Shape
    • H01L2224/32052—Shape in top view
    • H01L2224/32055—Shape in top view being circular or elliptic
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To prevent the occurrence of a resin void in a resin sealed semiconductor device with residual air of the periphery of a chip by resin flowing differences of the center and the periphery of the chip. <P>SOLUTION: The resin sealed semiconductor device includes a die pad 1 for carrying a semiconductor element, a hanging lead 2 supporting the die pad 1, a semiconductor element 3 carried on the die pad 1, a plurality of leads 4 arranged at tips oppositely to the die pad 1, a metal fine wire 5 for connecting the electrode of the semiconductor element 3 to the lead 4, and a sealing resin 6 for sealing the connecting region of the metal fine wire 5. The semiconductor device has a cavity 15 in at least the part of the periphery of the sealing resin 6. The thicknesses of the sealing resin 6 at the center and the periphery are changed by the cavity 15. The flowing velocity of the resin at the sealing time is made uniform. Thus, the occurrence of an air trap can be prevented. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

この発明は、半導体素子を搭載した樹脂封止型半導体装置およびその製造方法に関し、特に封止樹脂中への樹脂ボイドの発生を防止した樹脂封止型半導体装置およびその製造方法に関するものである。   The present invention relates to a resin-encapsulated semiconductor device on which a semiconductor element is mounted and a method for manufacturing the same, and more particularly to a resin-encapsulated semiconductor device that prevents generation of resin voids in an encapsulating resin and a method for manufacturing the same.

近年、電子機器の小型化に対応するために、樹脂封止型半導体装置などの半導体部品の高密度実装が要求され、それにともなって、半導体部品の小型、薄型化が進んでいる。また小型で薄型でありながら、多ピン化が進み、高密度の小型、薄型の樹脂封止型半導体装置が要望されている。   In recent years, in order to cope with the downsizing of electronic devices, high-density mounting of semiconductor components such as resin-encapsulated semiconductor devices is required, and along with this, semiconductor components are becoming smaller and thinner. In addition, while being small and thin, the number of pins has been increased, and a high-density small and thin resin-encapsulated semiconductor device has been demanded.

従来の樹脂封止型半導体装置としては、エアベントタイプがあった。   As a conventional resin-encapsulated semiconductor device, there is an air vent type.

例えば、特許文献１には、エアベントを設けることで、ボイドを削減することを特徴としていた。   For example, Patent Document 1 is characterized in that voids are reduced by providing an air vent.

以下、従来のダイパッド部露出型の樹脂封止型半導体装置について説明する。図１０は従来の樹脂封止型半導体装置を示す図であり、図１０（ａ）は平面図、図１０（ｂ）は底面図、図１０（ｃ）は図１０（ｂ）のＡ−Ａ’箇所の断面図である。   Hereinafter, a conventional die pad portion exposed type resin-encapsulated semiconductor device will be described. 10A and 10B are diagrams showing a conventional resin-encapsulated semiconductor device, in which FIG. 10A is a plan view, FIG. 10B is a bottom view, and FIG. 10C is an AA view of FIG. FIG.

図１０に示すように、リードフレームのダイパッド部１０１上に半導体素子１０２が搭載され、その半導体素子１０２とインナーリード部１０３とが金属細線１０４により電気的に接続されている。そしてダイパッド部１０１上の半導体素子１０２、インナーリード部１０３の外囲は封止樹脂１０５により封止されている。また封止樹脂１０５の側面とインナーリード部１０３の末端部とは同一面に配置されているものであり、ダイパッド部１０１の底面が封止樹脂１０５から露出しているダイパッド部露出型の樹脂封止型半導体装置である。またインナーリード部１０３の先端部が外部端子１０６として露出しているものである。   As shown in FIG. 10, the semiconductor element 102 is mounted on the die pad portion 101 of the lead frame, and the semiconductor element 102 and the inner lead portion 103 are electrically connected by a thin metal wire 104. The outer periphery of the semiconductor element 102 and the inner lead portion 103 on the die pad portion 101 is sealed with a sealing resin 105. Further, the side surface of the sealing resin 105 and the end portion of the inner lead portion 103 are arranged on the same surface, and the die pad portion exposed type resin sealing in which the bottom surface of the die pad portion 101 is exposed from the sealing resin 105. It is a stationary semiconductor device. The tip of the inner lead 103 is exposed as the external terminal 106.

次に従来の樹脂封止型半導体装置の製造方法について説明する。図１１はリードフレームを用いた従来の樹脂封止型半導体装置の製造方法を示す工程ごとの断面図である。
まず図１１（ａ）に示すように、フレーム枠と、そのフレーム枠内に、半導体素子が載置される矩形状のダイパッド部１０１と、ダイパッド部１０１を支持する吊りリード部と、半導体素子を載置した場合、その載置した半導体素子と金属細線等の接続手段により電気的接続するビーム状のインナーリード部１０３とを有したリードフレームを用意する。 Next, a conventional method for manufacturing a resin-encapsulated semiconductor device will be described. FIG. 11 is a cross-sectional view for each process showing a conventional method for manufacturing a resin-encapsulated semiconductor device using a lead frame.
First, as shown in FIG. 11A, a frame frame, a rectangular die pad portion 101 on which a semiconductor element is placed, a suspension lead portion that supports the die pad portion 101, and a semiconductor element are placed in the frame frame. When mounted, a lead frame having a beam-shaped inner lead portion 103 that is electrically connected to the mounted semiconductor element by a connecting means such as a thin metal wire is prepared.

次に図１１（ｂ）に示すように、リードフレームのダイパッド部１０１上に半導体素子１０２を銀ペースト等の接着剤により接合する（ダイボンド工程）。   Next, as shown in FIG. 11B, the semiconductor element 102 is bonded onto the die pad portion 101 of the lead frame with an adhesive such as silver paste (die bonding step).

次に図１１（ｃ）に示すように、ダイパッド部１０１上に搭載した半導体素子１０２の表面の電極パッド（図示せず）と、リードフレームのインナーリード部１０３の先端部とを金属細線１０４により接続する（ワイヤーボンド工程）。   Next, as shown in FIG. 11C, an electrode pad (not shown) on the surface of the semiconductor element 102 mounted on the die pad portion 101 and the tip end portion of the inner lead portion 103 of the lead frame are connected by a thin metal wire 104. Connect (wire bonding process).

その後、図１１（ｄ）に示すように、封止シートをリードフレームに密着させた状態でダイパッド部１０１、半導体素子１０２、インナーリード部１０３の外囲を封止樹脂１０５により封止する。この工程ではリードフレームの底面に封止シートを密着させて封止しているので、ダイパッド部１０１の底面を除く領域、吊りリード部、半導体素子１０２、インナーリード部１０３の底面を除く領域、および金属細線１０４の接続領域を封止するものであり、封止後は封止樹脂１０５の底面からダイパッド部１０１の底面が露出した構成となる。
特開２００３−１７６４６号公報 Thereafter, as shown in FIG. 11D, the outer periphery of the die pad portion 101, the semiconductor element 102, and the inner lead portion 103 is sealed with a sealing resin 105 in a state where the sealing sheet is in close contact with the lead frame. In this step, since the sealing sheet is closely attached to the bottom surface of the lead frame and sealed, the region excluding the bottom surface of the die pad portion 101, the suspension lead portion, the semiconductor element 102, the region excluding the bottom surface of the inner lead portion 103, and The connection region of the thin metal wire 104 is sealed, and after sealing, the bottom surface of the die pad portion 101 is exposed from the bottom surface of the sealing resin 105.
JP 2003-17646 A

しかしながら従来の樹脂封止型半導体装置およびその製造方法では、チップのある中央部に比較し、周辺部では樹脂厚みが異なるために樹脂の流れ込む流動抵抗が異なる。そのため、流動速度の差が生じ、チップの裏にエアートラップが発生し、結果として空気が残留することから、樹脂ボイドとなってダイパッド部近傍の封止樹脂中に発生してしまう。特許文献１において、エアベントを設置してもボイドを削減することができても同様な結果となった。   However, in the conventional resin-encapsulated semiconductor device and the manufacturing method thereof, the flow resistance into which the resin flows is different because the resin thickness is different in the peripheral portion as compared with the central portion where the chip is present. Therefore, a difference in flow rate occurs, an air trap is generated on the back of the chip, and as a result, air remains, resulting in a resin void in the sealing resin near the die pad portion. In Patent Document 1, even if an air vent is installed and voids can be reduced, similar results are obtained.

このような現象は近年、パッケージの薄型化とチップの積層化に伴い、チップ上部と樹脂下面のクリアランスが減少したために樹脂封止工程の際に発生することが多く、樹脂封止型半導体装置を製造する上で大きな問題となっていた。   In recent years, such a phenomenon often occurs during the resin sealing process because the clearance between the upper part of the chip and the lower surface of the resin has decreased with the thinning of the package and the stacking of the chip. It was a big problem in manufacturing.

封止樹脂中に樹脂ボイドが発生している場合、樹脂封止型半導体装置を基板実装した際、加熱環境下での動作中に樹脂へのクラック、実装不良が発生し、信頼性上、好ましくない状況となる。   When resin voids are generated in the sealing resin, when the resin-encapsulated semiconductor device is mounted on a substrate, cracks in the resin and mounting defects occur during operation in a heating environment, which is preferable in terms of reliability. There will be no situation.

したがって、この発明の目的は、前記した従来の課題を解決するものであり、チップ中央部と周辺部の樹脂流動差により、チップ周辺の残留空気による樹脂封止型半導体装置への樹脂ボイドの発生を防止した樹脂封止型半導体装置およびその製造方法を提供することである。   Accordingly, an object of the present invention is to solve the above-described conventional problems, and the generation of resin voids in the resin-encapsulated semiconductor device due to residual air around the chip due to the resin flow difference between the chip central part and the peripheral part. The present invention provides a resin-encapsulated semiconductor device and a method for manufacturing the same.

上記課題を解決するためにこの発明の請求項１記載の樹脂封止型半導体装置は、半導体素子搭載用のダイパッド部と、前記ダイパッド部を支持した吊りリード部と、前記ダイパッド部上に搭載された半導体素子と、先端部が前記ダイパッド部に対向して配列された複数のリード部と、前記半導体素子の電極と前記リード部とを接続した金属細線と、前記金属細線の接続領域を封止した封止樹脂とを備え、前記封止樹脂の周辺部の少なくとも一部に空洞部を持つ。   In order to solve the above problems, a resin-encapsulated semiconductor device according to claim 1 of the present invention is mounted on a die pad portion for mounting a semiconductor element, a suspension lead portion supporting the die pad portion, and the die pad portion. A semiconductor element, a plurality of lead portions whose tip portions are arranged to face the die pad portion, a fine metal wire connecting the electrode of the semiconductor element and the lead portion, and a connection region of the fine metal wire is sealed And at least a part of the periphery of the sealing resin has a hollow portion.

請求項２記載の樹脂封止型半導体装置は、外部電極端子を底面に有し、前記外部電極端子と電気的に接続した複数の電極を上面に有した複数の導電体からなる多層基板と、前記多層基板上に実装された半導体素子と、前記多層基板上面の複数の電極と前記半導体素子とを接続した金属細線と、前記多層基板上面と前記半導体素子と前記金属細線とを封止した封止樹脂とを備え、前記封止樹脂の周辺部の少なくとも一部に空洞部を持つ。   The resin-encapsulated semiconductor device according to claim 2, wherein the multilayer substrate is formed of a plurality of conductors having an external electrode terminal on a bottom surface and a plurality of electrodes electrically connected to the external electrode terminal on the top surface; A semiconductor element mounted on the multilayer substrate; a plurality of electrodes on the upper surface of the multilayer substrate; and a thin metal wire connecting the semiconductor element; a sealing member sealing the upper surface of the multilayer substrate, the semiconductor element, and the thin metal wire; And at least a part of the periphery of the sealing resin has a cavity.

請求項３記載の樹脂封止型半導体装置は、半導体素子搭載用のダイパッド部と、前記ダイパッド部を支持した吊りリード部と、前記ダイパッド部上に搭載された半導体素子と、先端部が前記ダイパッド部に対向して配列された複数のリード部と、前記半導体素子の電極と前記リード部とを接続した金属細線と、前記金属細線の接続領域を封止した封止樹脂とを備え、前記封止樹脂の周辺部の少なくとも一部に空洞部があり、その空洞部に熱伝導性の高い材料が埋め込まれている。   The resin-encapsulated semiconductor device according to claim 3, wherein a die pad portion for mounting a semiconductor element, a suspension lead portion supporting the die pad portion, a semiconductor element mounted on the die pad portion, and a tip portion of the die pad A plurality of lead portions arranged opposite to each other, a metal thin wire connecting the electrode of the semiconductor element and the lead portion, and a sealing resin sealing a connection region of the metal thin wire. There is a cavity in at least a part of the periphery of the stop resin, and a material having high thermal conductivity is embedded in the cavity.

請求項４記載の樹脂封止型半導体装置は、外部電極端子を底面に有し、前記外部電極端子と電気的に接続した複数の電極を上面に有した複数の導電体からなる多層基板と、前記多層基板上に実装された半導体素子と、前記多層基板上面の複数の電極と前記半導体素子とを接続した金属細線と、前記多層基板上面と前記半導体素子と前記金属細線とを封止した封止樹脂とを備え、前記封止樹脂の周辺部の少なくとも一部に空洞部があり、その空洞部に熱伝導性の高い材料が埋め込まれている。   The resin-encapsulated semiconductor device according to claim 4, wherein the multi-layer substrate includes a plurality of conductors having an external electrode terminal on a bottom surface and a plurality of electrodes electrically connected to the external electrode terminal on the top surface; A semiconductor element mounted on the multilayer substrate; a plurality of electrodes on the upper surface of the multilayer substrate; and a thin metal wire connecting the semiconductor element; a sealing member sealing the upper surface of the multilayer substrate, the semiconductor element, and the thin metal wire; A sealing resin, and there is a cavity in at least a part of the periphery of the sealing resin, and a material having high thermal conductivity is embedded in the cavity.

請求項５記載の樹脂封止型半導体装置は、請求項１，２，３または４記載の樹脂封止型半導体装置において、複数の半導体素子が搭載される。   A resin-sealed semiconductor device according to a fifth aspect is the resin-sealed semiconductor device according to the first, second, third, or fourth aspect, wherein a plurality of semiconductor elements are mounted.

請求項６記載の樹脂封止型半導体装置は、請求項１，２，３または４記載の樹脂封止型半導体装置において、前記空洞部は封止樹脂の中央側から周辺に行くに従い深くなり、その深さが異なる空洞部の底の位置が金属細線の角度と略平行になる。   The resin-encapsulated semiconductor device according to claim 6 is the resin-encapsulated semiconductor device according to claim 1, 2, 3 or 4, wherein the hollow portion becomes deeper from the center side to the periphery of the encapsulating resin, The positions of the bottoms of the cavities having different depths are substantially parallel to the angle of the fine metal wires.

請求項７記載の樹脂封止型半導体装置の製造方法は、金属板よりなるフレーム枠内に設けられた半導体素子搭載用のダイパッド部と、前記フレーム枠より延出した先端部で前記ダイパッド部の各角部を支持する吊りリード部と、前記フレーム枠より延出した先端部が前記ダイパッド部に対向して配列された複数のリード部とからなるリードフレームを用意する工程と、前記リードフレームの前記ダイパッド部上に半導体素子を搭載する工程と、前記ダイパッド部上に搭載した前記半導体素子の電極と前記リードフレームのリード部とを金属細線により接続する工程と、前記リードフレームの下面側に封止シートを配置して少なくとも前記リード部、ダイパッド部の底面に前記封止シートを密着させる工程と、前記リードフレームの上面側を封止樹脂により樹脂封止する工程とを含み、前記樹脂封止の際に外殻全体を構成する凹形部と周辺部に空洞部を作成するための凸形部とを有する金型を用いて、樹脂充填注入方向に対し、封止樹脂の周辺部の少なくとも一部に前記凸形部を配置し、前記金属細線の接続領域を封止する。   The method for manufacturing a resin-encapsulated semiconductor device according to claim 7 includes: a die pad portion for mounting a semiconductor element provided in a frame frame made of a metal plate; and a tip portion extending from the frame frame. A step of preparing a lead frame comprising a suspension lead portion that supports each corner portion and a plurality of lead portions in which tip portions extending from the frame frame are arranged to face the die pad portion; A step of mounting a semiconductor element on the die pad portion, a step of connecting an electrode of the semiconductor element mounted on the die pad portion and a lead portion of the lead frame with a thin metal wire, and sealing the lower surface side of the lead frame. A step of disposing a stop sheet to bring the sealing sheet into close contact with at least the bottom surface of the lead portion and die pad portion; and sealing the top surface side of the lead frame. Using a mold having a concave portion that constitutes the entire outer shell and a convex portion for creating a hollow portion in the peripheral portion during the resin sealing, The convex portion is arranged at least at a part of the peripheral portion of the sealing resin with respect to the resin filling and injection direction, and the connection region of the thin metal wires is sealed.

請求項８記載の樹脂封止型半導体装置は、請求項７記載の樹脂封止型半導体装置の製造方法において、複数個の半導体装置の樹脂封止を一括成形する。   A resin-encapsulated semiconductor device according to an eighth aspect of the present invention is the method for producing a resin-encapsulated semiconductor device according to the seventh aspect, wherein the resin encapsulation of a plurality of semiconductor devices is collectively formed.

この発明の請求項１記載の樹脂封止型半導体装置によれば、ダイパッド部上に搭載された半導体素子と、先端部がダイパッド部に対向して配列された複数のリード部と、半導体素子の電極とリード部とを接続した金属細線と、金属細線の接続領域を封止した封止樹脂とを備え、封止樹脂の周辺部の少なくとも一部に空洞部を持つので、チップ周辺部での封止時の流動速度を抑制する効果を持つ樹脂封止型半導体装置となる。具体的には、封止樹脂は、流動中もかなりの粘度を有するため、チップ上部の封止厚みの狭くなった空間に流れ込もうとすると流動抵抗が生じ、流動速度が遅くなり、チップ周辺部と速度差が生じる。従って、チップを包み込むように樹脂流れが発生し、チップの後方にエアートラップが発生し易い。これがプランジャー圧力によりつぶれることもあるが、そのまま残り課題となる。そのため、上記のように空洞部により封止樹脂の厚みを中央部と周辺部で変化させることで、封止時の樹脂の流動速度を均一にし、エアートラップ発生を防止できるものである。特にダイパッド部が封止樹脂から露出したタイプの樹脂封止型半導体装置において、ダイパッド部の近傍の封止樹脂中にボイドの発生のない樹脂封止型半導体装置を実現できるものである。   According to the resin-encapsulated semiconductor device of the first aspect of the present invention, a semiconductor element mounted on the die pad portion, a plurality of lead portions whose tip portions are arranged to face the die pad portion, and a semiconductor element Since it has a metal thin wire connecting the electrode and the lead portion, and a sealing resin sealing the connection region of the metal thin wire, and has a hollow portion in at least a part of the peripheral portion of the sealing resin, The resin-encapsulated semiconductor device has an effect of suppressing the flow rate during sealing. Specifically, since the sealing resin has a considerable viscosity even during flow, if it tries to flow into the space where the sealing thickness is narrow at the top of the chip, flow resistance occurs, the flow speed becomes slow, and the periphery of the chip And speed difference. Therefore, a resin flow is generated so as to wrap the chip, and an air trap is easily generated behind the chip. Although this may be crushed by the plunger pressure, it remains as it is. Therefore, by changing the thickness of the sealing resin between the central portion and the peripheral portion by the hollow portion as described above, the flow rate of the resin at the time of sealing can be made uniform, and the occurrence of air traps can be prevented. In particular, in a resin-encapsulated semiconductor device in which the die pad portion is exposed from the encapsulating resin, a resin-encapsulated semiconductor device in which no void is generated in the encapsulating resin near the die pad portion can be realized.

この発明の請求項２記載の樹脂封止型半導体装置によれば、多層基板上に実装された半導体素子と、多層基板上面の複数の電極と半導体素子とを接続した金属細線と、多層基板上面と半導体素子と金属細線とを封止した封止樹脂とを備え、封止樹脂の周辺部の少なくとも一部に空洞部を持つので、多層基板で構成された樹脂封止型半導体装置において請求項１と同様の効果が得られる。   According to the resin-encapsulated semiconductor device of the second aspect of the present invention, the semiconductor element mounted on the multilayer substrate, the fine metal wire connecting the plurality of electrodes on the multilayer substrate and the semiconductor element, and the multilayer substrate upper surface And a sealing resin that seals the semiconductor element and the fine metal wire, and at least a part of the peripheral portion of the sealing resin has a hollow portion. The same effect as 1 is obtained.

この発明の請求項３記載の樹脂封止型半導体装置によれば、ダイパッド部上に搭載された半導体素子と、先端部がダイパッド部に対向して配列された複数のリード部と、半導体素子の電極とリード部とを接続した金属細線と、金属細線の接続領域を封止した封止樹脂とを備え、封止樹脂の周辺部の少なくとも一部に空洞部があり、その空洞部に熱伝導性の高い材料が埋め込まれているので、請求項１の効果に加えて、パッケージ全体の剛性を高めながら、全体の放熱性を高めることができる。さらに空洞部に水分が溜まることを防ぐ役割も果たす。   According to the resin-encapsulated semiconductor device of the third aspect of the present invention, the semiconductor element mounted on the die pad part, the plurality of lead parts arranged with the tip part facing the die pad part, and the semiconductor element It has a fine metal wire that connects the electrode and the lead part, and a sealing resin that seals the connection area of the fine metal wire, and there is a cavity in at least a part of the periphery of the sealing resin, and heat conduction in the cavity Since the high-performance material is embedded, in addition to the effect of the first aspect, the overall heat dissipation can be enhanced while enhancing the rigidity of the entire package. Furthermore, it plays a role of preventing water from accumulating in the cavity.

この発明の請求項４記載の樹脂封止型半導体装置によれば、多層基板上に実装された半導体素子と、多層基板上面の複数の電極と半導体素子とを接続した金属細線と、多層基板上面と半導体素子と金属細線とを封止した封止樹脂とを備え、封止樹脂の周辺部の少なくとも一部に空洞部があり、その空洞部に熱伝導性の高い材料が埋め込まれているので、多層基板で構成された樹脂封止型半導体装置において請求項１の効果に加えて、パッケージ全体の剛性を高めながら、全体の放熱性を高めることができる。さらに空洞部に水分が溜まることを防ぐ役割も果たす。   According to the resin-encapsulated semiconductor device of the fourth aspect of the present invention, the semiconductor element mounted on the multilayer substrate, the metal wires connecting the plurality of electrodes on the multilayer substrate and the semiconductor element, and the multilayer substrate upper surface And a sealing resin in which the semiconductor element and the fine metal wire are sealed, and there is a cavity in at least a part of the periphery of the sealing resin, and a material having high thermal conductivity is embedded in the cavity. In the resin-encapsulated semiconductor device constituted by a multilayer substrate, in addition to the effect of the first aspect, the overall heat dissipation can be enhanced while enhancing the rigidity of the entire package. Furthermore, it plays a role of preventing water from accumulating in the cavity.

請求項５では、複数の半導体素子が搭載される構成であり、複数のチップからなる半導体装置に適用できる。   According to a fifth aspect of the present invention, a plurality of semiconductor elements are mounted and can be applied to a semiconductor device including a plurality of chips.

請求項６では、請求項１，２，３または４記載の樹脂封止型半導体装置において、空洞部は封止樹脂の中央側から周辺に行くに従い深くなり、その深さが異なる空洞部の底の位置が金属細線の角度と略平行になることが望ましい。チップ中央部と周辺部を結ぶ稜線を、ワイヤ角度にできるだけ平行に保つことで、樹脂速度差が生じなくなり、ワイヤ流れを防止する効果をもつ。   According to a sixth aspect of the present invention, in the resin-encapsulated semiconductor device according to the first, second, third, or fourth aspect, the cavity portion becomes deeper from the center side to the periphery of the sealing resin, and the bottoms of the cavity portions having different depths. It is desirable that the position of is substantially parallel to the angle of the fine metal wire. By keeping the ridge line connecting the center part and the peripheral part of the chip parallel to the wire angle as much as possible, there is no difference in the resin speed, and the wire flow is prevented.

この発明の請求項７記載の樹脂封止型半導体装置の製造方法によれば、樹脂封止の際に外殻全体を構成する凹形部と周辺部に空洞部を作成するための凸形部とを有する金型を用いて、樹脂充填注入方向に対し、封止樹脂の周辺部の少なくとも一部に凸形部を配置し、金属細線の接続領域を封止するので、周辺部の空洞を作成する凸形部からなる金型を有することで、周辺部の樹脂速度を遅くすることで全体の速度バランスを保ち、エアートラップ発生が起こしにくい樹脂封止が可能になる。また、一括成形時には、パッケージにより、凸形部のみを変更することで、全体金型を変更することなく、活用することを可能とする。これにより、ボイドの発生を防止できるものであり、ダイパッド部露出型の片面封止タイプの樹脂封止型半導体装置の製造方法に広く適用できる優れた製法である。   According to the method for manufacturing a resin-encapsulated semiconductor device according to claim 7 of the present invention, a concave portion constituting the entire outer shell and a convex portion for creating a cavity in the peripheral portion at the time of resin sealing A convex portion is disposed at least at a part of the peripheral portion of the sealing resin in the resin filling and injection direction with respect to the resin filling and injection direction, and the connection region of the metal thin wire is sealed. By having the mold made of the convex part to be created, the resin speed of the peripheral part can be slowed to maintain the overall speed balance, and the resin can be sealed without causing air traps. Moreover, at the time of collective molding, it is possible to utilize the package without changing the entire mold by changing only the convex portion by the package. As a result, the generation of voids can be prevented, and this is an excellent manufacturing method that can be widely applied to the manufacturing method of a die pad portion exposed type single-side sealing type resin-encapsulated semiconductor device.

請求項８では、請求項７記載の樹脂封止型半導体装置の製造方法において、複数個の半導体装置の樹脂封止を一括成形することが望ましい。   According to an eighth aspect of the present invention, in the method for manufacturing a resin-encapsulated semiconductor device according to the seventh aspect, it is desirable that resin encapsulation of a plurality of semiconductor devices is collectively formed.

以下、本発明の樹脂封止型半導体装置およびその製造方法の一実施形態について図面を参照しながら説明する。   Hereinafter, an embodiment of a resin-encapsulated semiconductor device and a manufacturing method thereof according to the present invention will be described with reference to the drawings.

この発明の第１の実施の形態を図１〜図５に基づいて説明する。図１は本発明の第１の実施形態の樹脂封止型半導体装置を示す図であり、図１（ａ）は平面図、図１（ｂ）は底面図、図１（ｃ）は図１（ｂ）のＡ−Ａ’箇所の断面図である。   A first embodiment of the present invention will be described with reference to FIGS. 1A and 1B are diagrams showing a resin-encapsulated semiconductor device according to a first embodiment of the present invention. FIG. 1A is a plan view, FIG. 1B is a bottom view, and FIG. It is sectional drawing of the AA 'location of (b).

図１に示すように、本実施形態の樹脂封止型半導体装置は、半導体素子搭載用の上方に突出部１ａを半切断状態で有したダイパッド部１と、そのダイパッド部１を支持した吊りリード部２と、ダイパッド部１の支持部１ａ上に搭載された半導体素子３と、先端部がダイパッド部１に対向して配列された複数のリード部４と、半導体素子３の電極とリード部４とを接続した金属細線５と、金属細線５の接続領域を封止した封止樹脂６とを備えている。   As shown in FIG. 1, the resin-encapsulated semiconductor device of this embodiment includes a die pad portion 1 having a protruding portion 1a in a semi-cut state above a semiconductor element mounting, and a suspension lead that supports the die pad portion 1. Part 2, semiconductor element 3 mounted on support part 1 a of die pad part 1, a plurality of lead parts 4 whose tip parts are arranged to face die pad part 1, electrodes of semiconductor element 3 and lead part 4 Are connected to each other, and a sealing resin 6 that seals the connection region of the metal thin wires 5 is provided.

この場合、複数のリード部４は、先端部がダイパッド部１に対向して配列された第１のリード部４ａと、先端部が第１のリード部４ａの先端部領域よりもダイパッド部１側に延在して配置された第２のリード部４ｂとからなる。半導体素子３の電極と第１、第２のリード部４ａ，４ｂとを金属細線５で接続している。また、ダイパッド部１の底面を除く領域、吊りリード部２、半導体素子３、第１、第２のリード部４ａ，４ｂの底面と末端部を除く領域、および金属細線５の接続領域を封止樹脂６により封止している。第１、第２の各リード部４ａ，４ｂの末端部は封止樹脂６の側面と略同一面に配列され、封止樹脂６の周辺部の少なくとも一部に空洞部１５が存在する。空洞部１５は封止樹脂６の中央側から周辺に行くに従い深くなり、その深さが異なる空洞部１５の底の位置が金属細線５の角度と略平行になる。   In this case, the plurality of lead portions 4 include a first lead portion 4a whose tip portion is arranged facing the die pad portion 1, and a tip portion closer to the die pad portion 1 side than the tip portion region of the first lead portion 4a. And a second lead portion 4b disposed extending in the direction. The electrode of the semiconductor element 3 and the first and second lead portions 4 a and 4 b are connected by a thin metal wire 5. Further, the region excluding the bottom surface of the die pad portion 1, the suspension lead portion 2, the semiconductor element 3, the region excluding the bottom surface and the end portion of the first and second lead portions 4 a and 4 b, and the connection region of the fine metal wires 5 are sealed. Sealed with resin 6. The end portions of the first and second lead portions 4 a and 4 b are arranged on substantially the same plane as the side surface of the sealing resin 6, and the cavity 15 exists in at least a part of the peripheral portion of the sealing resin 6. The cavity 15 becomes deeper as it goes from the center side to the periphery of the sealing resin 6, and the position of the bottom of the cavity 15 having a different depth becomes substantially parallel to the angle of the thin metal wire 5.

次に本実施形態の樹脂封止型半導体装置におけるダイパッド部の構成について説明する。
図２は本発明の第１の実施形態のダイパッド部の形態を示す図であり、図２（ａ）は平面図、図２（ｂ）は図２（ａ）のＣ−Ｃ１箇所の断面図である。 Next, the structure of the die pad part in the resin-encapsulated semiconductor device of this embodiment will be described.
2A and 2B are views showing the form of the die pad portion according to the first embodiment of the present invention. FIG. 2A is a plan view, and FIG. 2B is a cross-sectional view taken along the line C-C1 in FIG. It is.

まず図２（ａ），（ｂ）に示すように、本実施形態の樹脂封止型半導体装置で採用しているダイパッド部１は、平面形状が略四角形の形状であり、略中央部に上方に突出した半導体素子を支持する支持部１ａが形成されているものである。支持部１ａの形成としては、ダイパッド部を構成する金属板に対して、下方から上方に向けて押圧し、半切断状態で突出させているものである。   First, as shown in FIGS. 2A and 2B, the die pad portion 1 employed in the resin-encapsulated semiconductor device according to the present embodiment has a substantially quadrangular planar shape, and is substantially above the central portion. The support part 1a which supports the semiconductor element which protruded in this is formed. As the formation of the support portion 1a, the metal plate constituting the die pad portion is pressed upward from below and protruded in a semi-cut state.

以上、本実施形態の樹脂封止型半導体装置では、封止樹脂の厚みを中央部と周辺部で変化させることで、封止時の樹脂の流動速度を均一にし、エアートラップ発生を防止できるものである。   As described above, in the resin-encapsulated semiconductor device according to the present embodiment, the thickness of the encapsulating resin is changed between the central portion and the peripheral portion, so that the flow rate of the resin at the time of sealing can be made uniform and the occurrence of air traps can be prevented. It is.

次に本実施形態の半導体装置の製造方法について説明する。   Next, a method for manufacturing the semiconductor device of this embodiment will be described.

図３〜図５は本発明の第１の実施形態の樹脂封止型半導体装置の製造方法を示す図であり、図３は本実施形態で用いるリードフレームを示す図であり、図３（ａ）は平面図、図３（ｂ）は図３（ａ）のＤ−Ｄ１箇所の断面図である。図４は本実施形態の製造方法の主要な工程を示す断面図である。   3 to 5 are views showing a method of manufacturing a resin-encapsulated semiconductor device according to the first embodiment of the present invention. FIG. 3 is a view showing a lead frame used in this embodiment. ) Is a plan view, and FIG. 3B is a cross-sectional view taken along a line D-D1 in FIG. FIG. 4 is a cross-sectional view showing the main steps of the manufacturing method of this embodiment.

まず本実施形態の樹脂封止型半導体装置の製造方法で用いるリードフレームについて説明する。   First, the lead frame used in the method for manufacturing the resin-encapsulated semiconductor device of this embodiment will be described.

図３に示すように、銅材または、４２−アロイ等の通常のリードフレームに用いられている金属板よりなり、半導体素子を搭載する支持部１ａを有した略四角形のダイパッド部１と、その末端でフレーム枠と接続し、先端部でダイパッド部１の四隅角を支持する吊りリード部２と、その先端部がダイパッド部１に対向し、末端部がフレーム枠と接続して配置された直線状の第１のリード部４ａと、直線状の第２のリード部４ｂとよりなるリードフレームであり、第１のリード部４ａ、第２のリード部４ｂはそれぞれその先端底面で外部端子（ランド部）を構成するものであり、第１のリード部４ａはその底面に加えて外方側面でも外部端子として実装基板と接続できるものである。   As shown in FIG. 3, a substantially square die pad portion 1 having a support portion 1a on which a semiconductor element is mounted, made of a copper plate or a metal plate used for a normal lead frame such as 42-alloy, A suspension lead portion 2 that is connected to the frame frame at the end and supports the four corners of the die pad portion 1 at the tip portion, and a straight line that is arranged with the tip portion facing the die pad portion 1 and the end portion connected to the frame frame. The lead frame is composed of a first lead portion 4a and a second lead portion 4b. The first lead portion 4a and the second lead portion 4b are external terminals (land The first lead portion 4a can be connected to the mounting substrate as an external terminal on the outer side surface in addition to the bottom surface thereof.

そして詳細には、ダイパッド部１にはその表面の略中央部分に円形の支持部１ａが設けられ、その支持部１ａは、ダイパッド部１を構成している平板に対してプレス加工により半切断状態のプレスを施し、上方に突出させたものである。この支持部１ａが実質的に半導体素子を支持する部分となり、半導体素子を搭載した際、ダイパッド部１の支持部１ａを除く表面と半導体素子裏面との間には間隙が形成されるよう構成されている。本実施形態では、２００μｍの金属板よりなるダイパッド部１（リードフレーム厚）の厚みに対して、５０μｍ〜１００μｍ（金属板自体の厚みの２５％〜５０％）突出した支持部１ａを形成している。   In detail, the die pad portion 1 is provided with a circular support portion 1a at a substantially central portion of the surface thereof, and the support portion 1a is in a semi-cut state by pressing the flat plate constituting the die pad portion 1. Is pressed and protruded upward. The support portion 1a substantially becomes a portion that supports the semiconductor element, and when the semiconductor element is mounted, a gap is formed between the surface of the die pad portion 1 excluding the support portion 1a and the back surface of the semiconductor element. ing. In the present embodiment, a supporting portion 1a is formed that protrudes 50 μm to 100 μm (25% to 50% of the thickness of the metal plate itself) with respect to the thickness of the die pad portion 1 (lead frame thickness) made of a 200 μm metal plate. Yes.

また、本実施形態のリードフレームの第１のリード部４ａと第２のリード部４ｂは、フレーム枠と接続した状態では交互配列の並列配置となっており、ダイパッド部１に対向する配置においては、第２のリード部４ｂの先端部が第１のリード部４ａの先端部よりもダイパッド部１側に延在し、それら先端部どうしは平面配置上、千鳥状に配置されているものである。この配置は、半導体素子を搭載し、樹脂封止した際には、パッケージ底面に２列の外部端子が千鳥状に配置されるようにしたものであり、各リード部の先端部底面がパッケージ底面に配置されるものである。そして各リード部は直線形状のリードであり、その先端部の底面部分に外部端子となる先端部が曲率を有したランド部が形成されており、第２のリード部４ａのランド部を形成する部分以外はハーフエッチ加工により厚みが薄く加工され、ランド部はリード本来の厚みを有するものである。   In addition, the first lead portion 4a and the second lead portion 4b of the lead frame of the present embodiment are arranged in parallel in an alternating arrangement when connected to the frame frame, and in an arrangement facing the die pad portion 1. The tip portions of the second lead portions 4b extend to the die pad portion 1 side with respect to the tip portions of the first lead portions 4a, and the tip portions are arranged in a staggered manner in plan view. . This arrangement is such that when a semiconductor element is mounted and resin-sealed, two rows of external terminals are arranged in a staggered pattern on the bottom surface of the package. Is to be arranged. Each lead part is a linear lead, and a land part having a curvature at the tip part serving as an external terminal is formed on the bottom part of the tip part, thereby forming a land part of the second lead part 4a. The portions other than the portion are processed to be thin by half-etching, and the land portion has the original thickness of the lead.

以下、前述のリードフレームを用いて樹脂封止型半導体装置を製造する工程について説明する。   A process for manufacturing a resin-encapsulated semiconductor device using the above-described lead frame will be described below.

まず図４（ａ）に示すように、金属板よりなるフレーム枠内に設けられた半導体素子搭載用のダイパッド部１と、そのダイパッド部１の各角部をその先端部で支持し、末端部がフレーム枠に接続した吊りリード部と、先端部がダイパッド部１に対向して配列され、末端部がフレーム枠に接続した複数の第１、第２のリード部４ａ，４ｂとよりなるリードフレームであって、ダイパッド部１の底面には、エアベントが設けられているリードフレームを用意する。   First, as shown in FIG. 4 (a), a die pad portion 1 for mounting a semiconductor element provided in a frame made of a metal plate, and each corner portion of the die pad portion 1 are supported by the tip portion, and the end portion. A lead frame comprising: a suspension lead portion connected to the frame frame; and a plurality of first and second lead portions 4a and 4b whose end portions are arranged to face the die pad portion 1 and whose end portions are connected to the frame frame. A lead frame provided with an air vent is prepared on the bottom surface of the die pad portion 1.

次に図４（ｂ）に示すように、用意したリードフレームのダイパッド部１の支持部１ａ上に半導体素子３をその主面を上にして接着搭載する。   Next, as shown in FIG. 4B, the semiconductor element 3 is bonded and mounted on the support portion 1a of the die pad portion 1 of the prepared lead frame with its main surface facing up.

次に図４（ｃ）に示すように、ダイパッド部１上に搭載した半導体素子３の電極と、リードフレームの第１、第２のリード部４ａ，４ｂとを金属細線５により電気的に接続する。   Next, as shown in FIG. 4 (c), the electrodes of the semiconductor element 3 mounted on the die pad portion 1 and the first and second lead portions 4 a and 4 b of the lead frame are electrically connected by the fine metal wires 5. To do.

そして図４（ｄ）に示すように、リードフレームの下面であって、少なくとも第１、第２のリード部４ａ，４ｂ、ダイパッド部１の底面に封止シート８を貼付により密着させ、リードフレームの上面側を封止樹脂６により樹脂封止し、ダイパッド部１の底面を除く領域、吊りリード部、半導体素子３、第１、第２のリード部４ａ，４ｂの底面を除く領域、および金属細線５の接続領域を全体の凹形部（凹金型１４）と周辺部の凸形部（凸金型１３）からなる金型で封止する。   Then, as shown in FIG. 4 (d), a sealing sheet 8 is adhered to the bottom surface of the lead frame at least on the first and second lead portions 4a and 4b and the bottom surface of the die pad portion 1 by sticking. The top surface side of the resin is sealed with a sealing resin 6, the region excluding the bottom surface of the die pad portion 1, the suspension lead portion, the region excluding the bottom surfaces of the semiconductor element 3, the first and second lead portions 4a and 4b, and the metal The connection region of the thin wire 5 is sealed with a mold including the entire concave portion (concave die 14) and the peripheral convex portion (convex die 13).

このとき、図５（ａ）に示すように、カル１１に固形化された樹脂がつめられ、ランナー１２を通過し、樹脂が充填される。図５（ｂ）は、図５（ａ）のＡ−Ａ’の断面図であり、凹金型１４と樹脂周辺部に配置された凸金型１３で構成されることで、内部空間に樹脂６が充填され、空洞部１５が形成される。空洞部１５の底は、水平またはテーパ状でもよい。また、樹脂の充填方向が変わると、凸金型１３の配置位置が変わる。   At this time, as shown in FIG. 5A, the solidified resin is packed in the cal 11 and passes through the runner 12 to be filled with the resin. FIG. 5B is a cross-sectional view taken along the line AA ′ of FIG. 5A, and includes a concave mold 14 and a convex mold 13 disposed in the resin peripheral portion, so that resin is formed in the internal space. 6 is filled, and the cavity 15 is formed. The bottom of the cavity 15 may be horizontal or tapered. Further, when the resin filling direction is changed, the arrangement position of the convex mold 13 is changed.

図６は本発明の第２の実施形態の樹脂封止型半導体装置を示す図であり、図６（ａ）は、平面図、図６（ｂ）は底面図、図６（ｃ）は図６（ｂ）のＡ−Ａ’箇所の断面図である。すなわち、樹脂の注入方向を変化させた時の構成であり、樹脂注入口の位置により周辺部の空洞部の位置が変化する。図６（ａ）においては、樹脂ゲート１０がコーナ部にあり、その両側の対向する２コーナーに空洞部１５を形成している。このように、樹脂注入方向が変わると凸金型の形状と位置が変わる。樹脂流動の流れ方により、凸金型１３は変わるが凹金型１４は共通で利用可能である。この封止工程では、パッケージタイプにより凸形部を変更することで全体の凹形部は、変更することなく活用可能となる。   6A and 6B are views showing a resin-encapsulated semiconductor device according to a second embodiment of the present invention. FIG. 6A is a plan view, FIG. 6B is a bottom view, and FIG. It is sectional drawing of the AA 'location of 6 (b). In other words, this is a configuration when the injection direction of the resin is changed, and the position of the peripheral cavity changes depending on the position of the resin injection port. In FIG. 6A, the resin gate 10 is in the corner portion, and the hollow portion 15 is formed at two opposing corners on both sides thereof. Thus, when the resin injection direction changes, the shape and position of the convex mold change. Depending on how the resin flows, the convex mold 13 changes, but the concave mold 14 can be used in common. In this sealing step, the entire concave portion can be used without being changed by changing the convex portion depending on the package type.

図７は本発明の第３の実施形態の樹脂封止型半導体装置を示す図であり、図７（ａ）は、平面図、図７（ｂ）は底面図、図７（ｃ）は図７（ｂ）のＡ−Ａ’箇所の断面図である。図７に示すように、複数の半導体素子が積層して搭載した例を示している。このように、複数チップ時の構成としても、その効果は同様である。   7A and 7B are views showing a resin-encapsulated semiconductor device according to a third embodiment of the present invention. FIG. 7A is a plan view, FIG. 7B is a bottom view, and FIG. It is sectional drawing of the AA 'location of 7 (b). FIG. 7 shows an example in which a plurality of semiconductor elements are stacked and mounted. As described above, the effect is the same even in a configuration with a plurality of chips.

さらに空洞部１５に熱伝導性の高い材料からなる金属埋め込み部１６を埋め込むことで、チップ全体の放熱性を高めることが可能となる。さらに付属的にパッケージ全体の剛性を高める効果を有する。さらに空洞部１５に水分等がたまることを防ぐために耐湿性にも優れた効果を合わせてもつことが可能となる。   Further, by embedding the metal embedded portion 16 made of a material having high thermal conductivity in the cavity portion 15, it is possible to improve the heat dissipation of the entire chip. In addition, it has the effect of increasing the rigidity of the entire package. Furthermore, in order to prevent moisture and the like from accumulating in the hollow portion 15, it is possible to have an effect excellent in moisture resistance.

図８は本発明の第４の実施形態の樹脂封止型半導体装置を示す図であり、図８（ａ）は、平面図、図８（ｂ）は底面図、図８（ｃ）は図８（ｂ）のＡ−Ａ’箇所の断面図である。図８に示すように、周辺部全体に樹脂空洞部１５を持つ構成となり、その効果は、同様である。ここでは、複数の半導体素子が積層して搭載した例を示している。   8A and 8B are views showing a resin-encapsulated semiconductor device according to a fourth embodiment of the present invention. FIG. 8A is a plan view, FIG. 8B is a bottom view, and FIG. It is sectional drawing of the AA 'location of 8 (b). As shown in FIG. 8, it has the structure which has the resin cavity part 15 in the whole peripheral part, and the effect is the same. Here, an example in which a plurality of semiconductor elements are stacked and mounted is shown.

図９は本発明の第５の実施形態の樹脂封止型半導体装置を示す図であり、図９（ａ）は、平面図、図９（ｂ）は、図９（ａ）のＡ−Ａ’箇所の断面図である。   9A and 9B are views showing a resin-encapsulated semiconductor device according to a fifth embodiment of the present invention. FIG. 9A is a plan view, and FIG. 9B is an AA view of FIG. FIG.

図９に示すように、この樹脂封止型半導体装置は、複数の導電体からなる多層基板（半導体キャリア基板）で構成されている。すなわち、外部電極端子８を底面に有し、外部電極端子８と電気的に接続した複数の電極を上面に有した複数の導電体からなる多層基板７と、多層基板７上に実装された半導体素子３と、多層基板７上面の複数の電極と半導体素子３とを接続した金属細線５と、多層基板７上面と半導体素子３と金属細線５とを封止した封止樹脂６とを備え、封止樹脂の周辺部の少なくとも一部に空洞部１５を持つ。半導体素子３は１つでも複数積層しても同様である。なお、第３の実施形態と同様に空洞部１５に熱伝導性の高い材料からなる金属埋め込み部を埋め込む構成にしてもよい。本実施形態においても同様の効果がある。   As shown in FIG. 9, this resin-encapsulated semiconductor device is composed of a multilayer substrate (semiconductor carrier substrate) made of a plurality of conductors. That is, the multilayer substrate 7 made of a plurality of conductors having the external electrode terminals 8 on the bottom surface and the plurality of electrodes electrically connected to the external electrode terminals 8 on the top surface, and the semiconductor mounted on the multilayer substrate 7 A metal thin wire 5 connecting the element 3, a plurality of electrodes on the upper surface of the multilayer substrate 7 and the semiconductor element 3; and a sealing resin 6 sealing the upper surface of the multilayer substrate 7, the semiconductor element 3 and the metal thin wire 5; A cavity 15 is provided in at least a part of the periphery of the sealing resin. The same applies to one semiconductor element 3 or a plurality of stacked semiconductor elements 3. Note that, similarly to the third embodiment, the cavity portion 15 may be embedded with a metal embedded portion made of a material having high thermal conductivity. This embodiment also has the same effect.

なお、第１〜４の実施形態では、第１のリード部の底面、第２のリード部の底面はランド電極を構成し、封止樹脂の下面領域において平面配列で少なくとも２列を構成している樹脂封止型半導体装置を例に説明したが、１列タイプ、３列以上の多列であっても、ダイパッド部露出型の片面封止タイプの樹脂封止型半導体装置の製造方法に広く適用できるものである。なお、複数個の半導体装置の樹脂封止を一括成形してもよい。   In the first to fourth embodiments, the bottom surface of the first lead portion and the bottom surface of the second lead portion constitute land electrodes, and at least two rows are formed in a planar arrangement in the bottom surface region of the sealing resin. Although the resin-sealed semiconductor device has been described as an example, a wide variety of methods for manufacturing a single-side sealed type resin-sealed semiconductor device of a die pad portion exposed type, even in a single-row type, multi-row of three or more rows, are used. Applicable. Note that resin sealing of a plurality of semiconductor devices may be collectively formed.

本発明にかかる樹脂封止型半導体製造装置およびその製造方法は、ダイパッド部の近傍の封止樹脂中にボイドの発生のない樹脂封止型半導体装置を実現できる等の効果を有し、高密度の小型、薄型の樹脂封止型半導体装置として有用である。   INDUSTRIAL APPLICABILITY The resin-encapsulated semiconductor manufacturing apparatus and method for manufacturing the same according to the present invention have an effect that a resin-encapsulated semiconductor apparatus in which no void is generated in the encapsulating resin near the die pad portion can be realized, and the density It is useful as a small and thin resin-encapsulated semiconductor device.

本発明の第１の実施形態の樹脂封止型半導体装置を示す図である。1 is a view showing a resin-encapsulated semiconductor device according to a first embodiment of the present invention. 本発明の第１の実施形態のダイパッド部の形態を示す図である。It is a figure which shows the form of the die pad part of the 1st Embodiment of this invention. 本発明の第１の実施形態の樹脂封止型半導体装置の製造方法で用いるリードフレームを示す図である。It is a figure which shows the lead frame used with the manufacturing method of the resin sealing type semiconductor device of the 1st Embodiment of this invention. 本発明の第１の実施形態の樹脂封止型半導体装置の製造方法を示す工程断面図である。It is process sectional drawing which shows the manufacturing method of the resin sealing type semiconductor device of the 1st Embodiment of this invention. 本発明の第１の実施形態の樹脂封止型半導体装置の製造方法の説明図である。It is explanatory drawing of the manufacturing method of the resin sealing type | mold semiconductor device of the 1st Embodiment of this invention. 本発明の第２の実施形態の樹脂封止型半導体装置を示す図である。It is a figure which shows the resin sealing type semiconductor device of the 2nd Embodiment of this invention. 本発明の第３の実施形態の樹脂封止型半導体装置を示す図である。It is a figure which shows the resin-sealed semiconductor device of the 3rd Embodiment of this invention. 本発明の第４の実施形態の樹脂封止型半導体装置を示す図である。It is a figure which shows the resin-encapsulated semiconductor device of the 4th Embodiment of this invention. 本発明の第５の実施形態の樹脂封止型半導体装置を示す図である。It is a figure which shows the resin-encapsulated semiconductor device of the 5th Embodiment of this invention. 従来の樹脂封止型半導体装置を示す図である。It is a figure which shows the conventional resin-encapsulated semiconductor device. 従来の樹脂封止型半導体装置の製造方法を示す工程断面図である。It is process sectional drawing which shows the manufacturing method of the conventional resin sealing type semiconductor device.

符号の説明Explanation of symbols

１ ダイパッド部
１ａ 突出部
２ 吊りリード部
３ 半導体素子
４ａ 第１のリード部
４ｂ 第２のリード部
５ 金属細線
６ 封止樹脂
７ 多層基板
８ 外部電極端子
９ 接着剤
１０ 樹脂ゲート
１１ カル
１２ ランナー
１３ 凸金型
１４ 凹金型
１５ 空洞部
１６ 金属埋め込み部
１０１ ダイパッド部
１０２ 半導体素子
１０３ インナーリード部
１０４ 金属細線
１０５ 封止樹脂
１０６ 外部端子 DESCRIPTION OF SYMBOLS 1 Die pad part 1a Protrusion part 2 Suspension lead part 3 Semiconductor element 4a 1st lead part 4b 2nd lead part 5 Metal fine wire 6 Sealing resin 7 Multilayer substrate 8 External electrode terminal 9 Adhesive 10 Resin gate 11 Cal 12 Runner 13 Convex die 14 Concave die 15 Cavity portion 16 Metal embedded portion 101 Die pad portion 102 Semiconductor element 103 Inner lead portion 104 Metal fine wire 105 Sealing resin 106 External terminal

Claims (8)

半導体素子搭載用のダイパッド部と、前記ダイパッド部を支持した吊りリード部と、前記ダイパッド部上に搭載された半導体素子と、先端部が前記ダイパッド部に対向して配列された複数のリード部と、前記半導体素子の電極と前記リード部とを接続した金属細線と、前記金属細線の接続領域を封止した封止樹脂とを備え、前記封止樹脂の周辺部の少なくとも一部に空洞部を持つことを特徴とする樹脂封止型半導体装置。   A die pad portion for mounting a semiconductor element; a suspension lead portion supporting the die pad portion; a semiconductor element mounted on the die pad portion; and a plurality of lead portions having tips aligned with the die pad portion. A fine metal wire that connects the electrode of the semiconductor element and the lead portion, and a sealing resin that seals a connection region of the fine metal wire, and a hollow portion is formed in at least a part of the peripheral portion of the sealing resin. A resin-encapsulated semiconductor device, characterized by comprising: 外部電極端子を底面に有し、前記外部電極端子と電気的に接続した複数の電極を上面に有した複数の導電体からなる多層基板と、前記多層基板上に実装された半導体素子と、前記多層基板上面の複数の電極と前記半導体素子とを接続した金属細線と、前記多層基板上面と前記半導体素子と前記金属細線とを封止した封止樹脂とを備え、前記封止樹脂の周辺部の少なくとも一部に空洞部を持つことを特徴とする樹脂封止型半導体装置。   A multilayer substrate made of a plurality of conductors having an external electrode terminal on the bottom surface and a plurality of electrodes electrically connected to the external electrode terminal on the top surface; a semiconductor element mounted on the multilayer substrate; A metal fine wire connecting the plurality of electrodes on the upper surface of the multilayer substrate and the semiconductor element; and a sealing resin sealing the upper surface of the multilayer substrate, the semiconductor element and the metal thin wire, and a peripheral portion of the sealing resin. A resin-encapsulated semiconductor device having a hollow portion at least in part. 半導体素子搭載用のダイパッド部と、前記ダイパッド部を支持した吊りリード部と、前記ダイパッド部上に搭載された半導体素子と、先端部が前記ダイパッド部に対向して配列された複数のリード部と、前記半導体素子の電極と前記リード部とを接続した金属細線と、前記金属細線の接続領域を封止した封止樹脂とを備え、前記封止樹脂の周辺部の少なくとも一部に空洞部があり、その空洞部に熱伝導性の高い材料が埋め込まれていることを特徴とする樹脂封止型半導体装置。   A die pad portion for mounting a semiconductor element; a suspension lead portion supporting the die pad portion; a semiconductor element mounted on the die pad portion; and a plurality of lead portions having tips aligned with the die pad portion. A fine metal wire that connects the electrode of the semiconductor element and the lead portion, and a sealing resin that seals a connection region of the fine metal wire, and a cavity portion is provided in at least a part of the peripheral portion of the sealing resin. A resin-encapsulated semiconductor device, wherein a material having high thermal conductivity is embedded in the cavity. 外部電極端子を底面に有し、前記外部電極端子と電気的に接続した複数の電極を上面に有した複数の導電体からなる多層基板と、前記多層基板上に実装された半導体素子と、前記多層基板上面の複数の電極と前記半導体素子とを接続した金属細線と、前記多層基板上面と前記半導体素子と前記金属細線とを封止した封止樹脂とを備え、前記封止樹脂の周辺部の少なくとも一部に空洞部があり、その空洞部に熱伝導性の高い材料が埋め込まれていることを特徴とする樹脂封止型半導体装置。   A multilayer substrate made of a plurality of conductors having an external electrode terminal on the bottom surface and a plurality of electrodes electrically connected to the external electrode terminal on the top surface; a semiconductor element mounted on the multilayer substrate; A metal fine wire connecting the plurality of electrodes on the upper surface of the multilayer substrate and the semiconductor element; and a sealing resin sealing the upper surface of the multilayer substrate, the semiconductor element and the metal thin wire, and a peripheral portion of the sealing resin. A resin-encapsulated semiconductor device characterized in that at least a part thereof has a cavity, and a material having high thermal conductivity is embedded in the cavity. 複数の半導体素子が搭載される請求項１，２，３または４記載の樹脂封止型半導体装置。   5. The resin-encapsulated semiconductor device according to claim 1, wherein a plurality of semiconductor elements are mounted. 前記空洞部は封止樹脂の中央側から周辺に行くに従い深くなり、その深さが異なる前記空洞部の底の位置は金属細線の角度と略平行になる請求項１，２，３または４記載の樹脂封止型半導体装置。   The said hollow part becomes deep as it goes to the periphery from the center side of sealing resin, The position of the bottom of the said cavity part from which the depth differs is substantially parallel to the angle of a metal fine wire. Resin-sealed semiconductor device. 金属板よりなるフレーム枠内に設けられた半導体素子搭載用のダイパッド部と、前記フレーム枠より延出した先端部で前記ダイパッド部の各角部を支持する吊りリード部と、前記フレーム枠より延出した先端部が前記ダイパッド部に対向して配列された複数のリード部とからなるリードフレームを用意する工程と、前記リードフレームの前記ダイパッド部上に半導体素子を搭載する工程と、前記ダイパッド部上に搭載した前記半導体素子の電極と前記リードフレームのリード部とを金属細線により接続する工程と、前記リードフレームの下面側に封止シートを配置して少なくとも前記リード部、ダイパッド部の底面に前記封止シートを密着させる工程と、前記リードフレームの上面側を封止樹脂により樹脂封止する工程とを含み、前記樹脂封止の際に外殻全体を構成する凹形部と周辺部に空洞部を作成するための凸形部とを有する金型を用いて、樹脂充填注入方向に対し、封止樹脂の周辺部の少なくとも一部に前記凸形部を配置し、前記金属細線の接続領域を封止することを特徴とする樹脂封止型半導体装置の製造方法。   A die pad portion for mounting a semiconductor element provided in a frame frame made of a metal plate, a suspension lead portion for supporting each corner of the die pad portion at a tip portion extending from the frame frame, and extending from the frame frame A step of preparing a lead frame having a plurality of lead portions arranged so that the leading end portion is opposed to the die pad portion, a step of mounting a semiconductor element on the die pad portion of the lead frame, and the die pad portion A step of connecting the electrode of the semiconductor element mounted thereon and the lead portion of the lead frame by a fine metal wire, and a sealing sheet is disposed on the lower surface side of the lead frame so that at least the bottom surface of the lead portion and the die pad portion A step of closely attaching the sealing sheet; and a step of resin-sealing the upper surface side of the lead frame with a sealing resin. Using a mold having a concave part constituting the entire outer shell and a convex part for creating a cavity part in the peripheral part, and at least the peripheral part of the sealing resin with respect to the resin filling injection direction. A method for manufacturing a resin-encapsulated semiconductor device, wherein the convex portion is disposed in part and a connection region of the thin metal wire is sealed. 複数個の半導体装置の樹脂封止を一括成形する請求項７記載の樹脂封止型半導体装置の製造方法。   The method of manufacturing a resin-encapsulated semiconductor device according to claim 7, wherein the resin encapsulation of a plurality of semiconductor devices is collectively formed.
JP2004154032A 2004-05-25 2004-05-25 Resin sealed semiconductor device and its manufacturing method Pending JP2005340309A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100950751B1 (en) 2007-02-09 2010-04-05 주식회사 하이닉스반도체 Semiconductor package and mold equipment for manufacturing of the same
CN108364930A (en) * 2018-05-04 2018-08-03 扬州扬杰电子科技股份有限公司 A kind of VDMOS power device chips welding layer cavity collocation structure

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100950751B1 (en) 2007-02-09 2010-04-05 주식회사 하이닉스반도체 Semiconductor package and mold equipment for manufacturing of the same
CN108364930A (en) * 2018-05-04 2018-08-03 扬州扬杰电子科技股份有限公司 A kind of VDMOS power device chips welding layer cavity collocation structure
CN108364930B (en) * 2018-05-04 2024-01-26 扬州扬杰电子科技股份有限公司 VDMOS power device chip welding layer cavity compensation structure

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