JP2005260141A - Hybrid integrated circuit - Google Patents

Hybrid integrated circuit Download PDF

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JP2005260141A
JP2005260141A JP2004072595A JP2004072595A JP2005260141A JP 2005260141 A JP2005260141 A JP 2005260141A JP 2004072595 A JP2004072595 A JP 2004072595A JP 2004072595 A JP2004072595 A JP 2004072595A JP 2005260141 A JP2005260141 A JP 2005260141A
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conductor pattern
bonding pad
dielectric layer
integrated circuit
hybrid integrated
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Tokuyuki Henmi
徳幸 逸見
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Fuji Electric Co Ltd
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Fuji Electric Device Technology Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a hybrid integrated circuit wherein a surge protection structure built on the substrate is improved so that cost reduction by the reduction of the number of manufacturing processes, and the reduction of the contour of the substrate can be achieved. <P>SOLUTION: In the hybrid integrated circuit 1, external leads 9 are led to conductor patterns 6, 7 formed on an insulating substrate 5 via bonding pads 8. As a surge protection means for the circuit 1, a dielectric layer 10 is sandwiched between conductor patterns at different potentials led to external electrodes 2, 3 to form a gap between them. This gap is formed by the dielectric layer 10 sandwiched between the bonding pads 8 joined to the conductor pattern 6 and the branched conductor pattern 7a which is branched sideward from the conductor pattern 7 and faces the lower surface of the bonding pad 8. In a concrete embodiment, the partial region of a land of the conductor pattern 6 is removed, the branched conductor pattern 7a is led therein, the bonding pad 8 is superposed thereon with the dielectric layer coated on the branched conductor pattern sandwiched between them, and the bonding pad is soldered to the land of the conductor pattern 6 in this position. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、自動車に搭載したイグナイタ等を対象とした樹脂封止形半導体デバイスの混成集積回路に関し、詳しくは混成集積回路に装備したサージ保護回路の構造に係わる。   The present invention relates to a hybrid integrated circuit of a resin-encapsulated semiconductor device intended for an igniter or the like mounted on an automobile, and more particularly to a structure of a surge protection circuit provided in the hybrid integrated circuit.

頭記イグナイタは点火コイルと組み合わせて自動車エンジンに搭載することから、その半導体デバイスには耐熱性のほかに、エンジンの点火火花に起因して発生する外部サージ電圧で集積回路の回路素子が破壊しないサージ耐量が要求される。
一方、かかる混成集積回路のサージ保護手段として、絶縁基板(例えばセラミック基板)上に形成した回路導体パターンに対して、デバイスの入出力端子に通じる異電位の導体パターン(GND側の導体パターンと非GND側の導体パターン)の間に高抵抗の誘電体層を挟んでサージ電圧放電用のギャップを形成し、外部からサージが進入した際に前記ギャップを介してサージ電圧をGND側に放電させて回路素子を保護するようにしたものが公知である(例えば、特許文献1,特許文献2参照)。
また、前記したサージ保護手段のギャップ構造に関して、異電位の各導体パターンから側方に分岐形成したパターン部分の間に誘電体層を挟んで上下に対向するギャップを形成した構成のものも知られている(例えば、特許文献3参照)。
Since the head igniter is mounted on an automobile engine in combination with an ignition coil, the semiconductor device does not break down due to the external surge voltage generated by the ignition spark of the engine in addition to the heat resistance of the semiconductor device. Surge resistance is required.
On the other hand, as a surge protection means for such a hybrid integrated circuit, with respect to a circuit conductor pattern formed on an insulating substrate (for example, a ceramic substrate), a conductor pattern having a different potential leading to an input / output terminal of the device (a non-GND conductor pattern) A gap for surge voltage discharge is formed by sandwiching a high-resistance dielectric layer between the conductor pattern on the GND side), and when a surge enters from the outside, the surge voltage is discharged to the GND side through the gap. Devices that protect circuit elements are known (see, for example, Patent Document 1 and Patent Document 2).
In addition, regarding the gap structure of the surge protection means described above, there is also known a structure in which a vertically opposing gap is formed by sandwiching a dielectric layer between pattern portions branched laterally from conductor patterns having different potentials. (For example, refer to Patent Document 3).

図4は上記の特許文献3に対応したサージ保護手段の従来構造図であり、1は混成集積回路、2,3は入出力の外部端子(3はGND側)、4は樹脂パッケージである。ここで、混成集積回路1は絶縁基板(セラミック基板)5の上面に形成した導体パターン6,7に各種IC,チップ抵抗などの回路素子(図示せず)を搭載し、導体パターン6,7の入出力端側のランド部にはアルミワイヤをボンディングするために、ボンディングパッド8を半田接合し、該ボンディングパッド8と外部端子2,3との間が外部リード(アルミのボンディングワイヤ)9で接続されている。なお、ボンディングパッド8の材料は、例えば42アロイ(ニッケル,鉄合金)である。
また、回路のサージ保護手段として、導体パターン6,7から側方に延在する分岐導体パターン(ギャップの対向電極となる)6aと7aを形成し、その上下重なり面に誘電体層(誘電体膜)10を挟んで前記のギャップを形成している。
特公昭61−39742号公報 特開平6−224367号公報 特開2002−299480号公報
FIG. 4 is a conventional structural diagram of surge protection means corresponding to the above-mentioned Patent Document 3, wherein 1 is a hybrid integrated circuit, 2 and 3 are input / output external terminals (3 is the GND side), and 4 is a resin package. Here, in the hybrid integrated circuit 1, circuit elements (not shown) such as various ICs and chip resistors are mounted on the conductor patterns 6 and 7 formed on the upper surface of the insulating substrate (ceramic substrate) 5. In order to bond an aluminum wire to the land portion on the input / output end side, a bonding pad 8 is soldered and an external lead (aluminum bonding wire) 9 is connected between the bonding pad 8 and the external terminals 2 and 3. Has been. The material of the bonding pad 8 is, for example, 42 alloy (nickel, iron alloy).
Further, as a circuit surge protection means, branch conductor patterns 6a and 7a extending laterally from the conductor patterns 6 and 7 are formed, and a dielectric layer (dielectric material) is formed on the upper and lower overlapping surfaces thereof. The gap is formed with the (film) 10 interposed therebetween.
Japanese Patent Publication No. 61-39742 JP-A-6-224367 JP 2002-299480 A

ところで、前記した従来構造の混成集積回路は次記のような問題点がある。すなわち、図4の構成で絶縁基板5に導体パターン6,7および誘電体層10を形成するには、まず分岐導体パターン6aの部分を除いて絶縁基板5に導体パターン6,7を印刷,焼成により形成し、次いでGND側導体パターン7の分岐導体パターン7aを覆うように誘電体層10を形成した上で、さらに導体パターン6と誘電体層10の上面との間にまたがって上部側の電極となる分岐導体パターン6aを印刷形成し、さらに、導体パターンにオーバーガラス処理を施して回路基板が完成する。なお、部品の搭載工程では。導体パターンにクリーム半田を印刷した上で、各種回路素子を搭載し、さらに導体パターン6,7の入出力端側ランド部にボンディングパッド8を搭載して半田接合する。
上記の説明で判るように、絶縁基板5の上で導体パターン6と7との間に誘電体層10を挟んでサージ放電用のギャップを形成するためには、導体パターンを2段階の印刷工程に分けて形成する必要がある。
By the way, the hybrid integrated circuit having the conventional structure has the following problems. That is, in order to form the conductor patterns 6 and 7 and the dielectric layer 10 on the insulating substrate 5 with the configuration of FIG. 4, first, the conductor patterns 6 and 7 are printed and fired on the insulating substrate 5 except for the branch conductor pattern 6a. And then the dielectric layer 10 is formed so as to cover the branch conductor pattern 7a of the GND side conductor pattern 7, and the upper electrode is further straddled between the conductor pattern 6 and the upper surface of the dielectric layer 10. The branch conductor pattern 6a is printed and formed, and the conductor pattern is over-glazed to complete the circuit board. In the component mounting process. After the cream solder is printed on the conductor pattern, various circuit elements are mounted, and the bonding pads 8 are mounted on the input / output end side land portions of the conductor patterns 6 and 7 and soldered.
As can be seen from the above description, in order to form a gap for surge discharge by sandwiching the dielectric layer 10 between the conductor patterns 6 and 7 on the insulating substrate 5, the conductor pattern is formed in a two-step printing process. It is necessary to form it separately.

また、ギャップを導体パターン6,7から側方に延在する分岐導体パターン6aと7aの間に誘電体層10を挟んで形成しているために、絶縁基板上における導体パターンの入出力端側では導体パターン6と7との間にギャップの占有スペースを確保する必要があって絶縁基板5の外形が大形化する。
本発明は上記の点に鑑みなされたものであり、その目的は前記課題を解決し、製作工程の削減によるコスト低減と併せて基板外形サイズの小形化が図れるように基板上に構築したサージ保護構造を改良した混成集積回路を提供することにある。
Further, since the gap is formed by sandwiching the dielectric layer 10 between the branched conductor patterns 6a and 7a extending laterally from the conductor patterns 6 and 7, the input / output end side of the conductor pattern on the insulating substrate In this case, it is necessary to secure a space occupied by the gap between the conductor patterns 6 and 7, and the outer shape of the insulating substrate 5 is increased.
SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and its purpose is to solve the above-mentioned problems and to provide surge protection constructed on the substrate so that the size of the substrate can be reduced along with cost reduction by reducing the manufacturing process. It is an object of the present invention to provide a hybrid integrated circuit having an improved structure.

上記目的を達成するために、本発明によれば、絶縁基板上に形成した導体パターンに回路素子を実装した上で、前記導体パターンにボンディングパッドを介して入力出力端子の外部リードを引き出した構成になる混成集積回路で、該回路のサージ保護手段として、入出力端子に通じる異電位の導体パターン間に誘電体層を挟んで対向するギャップを形成したものにおいて、
前記ギャップを、一方の導体パターンに接合したボンディングパッドと他方の導体パターンから分岐して前記ボンディングパッドの裏面側に対峙させた分岐導体パターンとの重なり面に誘電体層を挟んで形成パターンから分岐して前記ボンディングパッドに対峙させた分岐導体パターンとの重なり面に誘電体層を挟んで形成する(請求項1)ものとし、具体的には次記のような態様で構成する。
In order to achieve the above object, according to the present invention, a circuit element is mounted on a conductor pattern formed on an insulating substrate, and external leads of input / output terminals are drawn out to the conductor pattern via bonding pads. In the hybrid integrated circuit, as a surge protection means of the circuit, a gap is formed between the conductor patterns of different potentials leading to the input / output terminals with a dielectric layer interposed therebetween,
The gap is branched from the formation pattern with a dielectric layer sandwiched between the bonding pad joined to one conductor pattern and the branch conductor pattern branched from the other conductor pattern and opposed to the back side of the bonding pad. Then, the dielectric layer is sandwiched between the overlapping conductor patterns facing the bonding pads (claim 1), and specifically configured as follows.

すなわち、前記構成における一方の導体パターンにはボンディングパッドと接合するランド部の面域一部を欠如し、かつこの欠如部位に他方の導体パターンの分岐導体パターンを引き入れ形成した上で、該分岐導体パターンに被覆形成した誘電体層を挟んでその上にボンディングパッドを重ね、該ボンディングパッドと導体パターンのランドとを半田接合する(請求項2)。   That is, one conductor pattern in the above configuration lacks a part of the surface area of the land portion to be bonded to the bonding pad, and the branch conductor pattern of the other conductor pattern is drawn into the lacking portion, and then the branch conductor is formed. A bonding pad is placed on the dielectric layer covered with the pattern, and the bonding pad and the land of the conductor pattern are soldered together.

前記構成によれば、サージ放電用のギャップが一方の導体パターンに接合したボンディングパッドの下面側領域に誘電体層を挟んで形成されるので、図4に示した従来構造と比べてギャップ形成のために絶縁基板上に確保するスペースを縮小して基板の外形が小形化できる。しかも、一方の導体パターンに半田接合するボンディングパッドにギャップ上部側電極の機能を持たせたので、従来構造のように誘電体層の形成の前後で導体パターンの印刷工程を二段階に分ける必要がなく、これにより製作コストの低減化が図れる。   According to the above configuration, the gap for surge discharge is formed by sandwiching the dielectric layer in the lower surface side region of the bonding pad joined to one conductor pattern, so that compared to the conventional structure shown in FIG. Therefore, the space secured on the insulating substrate can be reduced to reduce the outer shape of the substrate. In addition, since the bonding pad to be soldered to one conductor pattern has the function of the upper electrode of the gap, it is necessary to divide the printing process of the conductor pattern into two stages before and after the formation of the dielectric layer as in the conventional structure. In this way, the manufacturing cost can be reduced.

以下、本発明の実施の形態を図1〜図3に示す実施例に基づいて説明する。なお、実施例の図中で図4に対応する部材には同じ符号を付してその説明は省略する。
すなわち、図示実施例においては、外部リード9を介して外部端子2に通じる導体パターン6とGND側の外部端子3に通じる導体パターン7との間にまたがって形成したサージ放電用のギャップが、導体パターン6のランド部に半田接合したボンディングパッド8と導体パターン7から側方に分岐して前記ボンディングパッド8の下面に延在する分岐導体パターン7aとの間に誘電体層10を挟んで形成されている。
次に、前記ギャップの詳細構造を図3(a),(b)で説明する。すなわち、導体パターン6の入出力端側に形成したランド部6bの面域一部を切り欠いてコ字形の欠如部6cを形成し、かつこの欠如部6cの内方に導体パターン7から側方に延在する舌片状の分岐導体パターン7aを引き込んだ上で、分岐導体パターン7aの先端部分に誘電体層10を被覆形成している。そして、誘電体層10の上面にボンディングパッド8を重ね、この状態で導体パターン6のランド部6bとの間を半田11で接合している。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below based on the examples shown in FIGS. In addition, in the figure of an Example, the same code | symbol is attached | subjected to the member corresponding to FIG. 4, and the description is abbreviate | omitted.
That is, in the illustrated embodiment, a surge discharge gap formed between the conductor pattern 6 leading to the external terminal 2 via the external lead 9 and the conductor pattern 7 leading to the GND side external terminal 3 is a conductor. The dielectric layer 10 is sandwiched between the bonding pad 8 solder-bonded to the land portion of the pattern 6 and the branched conductor pattern 7a branched laterally from the conductor pattern 7 and extending to the lower surface of the bonding pad 8. ing.
Next, the detailed structure of the gap will be described with reference to FIGS. That is, a part of the surface area of the land portion 6b formed on the input / output end side of the conductor pattern 6 is cut away to form a U-shaped lacking portion 6c, and the conductor pattern 7 is formed laterally from the inside of the lacking portion 6c. A dielectric layer 10 is formed on the tip of the branch conductor pattern 7a after the tongue-shaped branch conductor pattern 7a extending in the direction is drawn. Then, the bonding pad 8 is placed on the upper surface of the dielectric layer 10, and in this state, the land portion 6 b of the conductor pattern 6 is joined with the solder 11.

一方、前記構造のギャップは次記工程の手順で製作する。まず導体パターン6,7、導体パターン6のランド部切欠部6c、および該切欠部6cに引き入れる分岐導体パターン7aを一回のスクリーン印刷により絶縁基板5の上に同時印刷し、続いて分岐導体パターン7aの先端部分を覆うように誘電体層10をスクリーン印刷した後、ボンディングパッド8を接合するランド部を除いて導体パターン6,7の表面に保護用のオーバーガラスを印刷して焼成する。
また、続く搭載部品の実装工程では、導体パターン6,7のランド部にクリーム半田を塗布した上で、各種の回路素子,およびボンディングパッド8を定位置に搭載し、リフロー半田付けにより導体パターン6,7に接合する。さらに、ボンディングパッド8と外部端子2,3との間に外部リード9をワイヤボンディングした後、この組立体をトランスファー成形して周域を樹脂パッケージ4で封止する。図2は完成した製品の平面図である。
On the other hand, the gap of the structure is manufactured by the following procedure. First, the conductor patterns 6 and 7, the land portion notch portion 6 c of the conductor pattern 6, and the branch conductor pattern 7 a drawn into the notch portion 6 c are simultaneously printed on the insulating substrate 5 by one screen printing, and then the branch conductor pattern After the dielectric layer 10 is screen-printed so as to cover the tip portion of 7a, a protective overglass is printed on the surface of the conductor patterns 6 and 7 except for the land portion to which the bonding pad 8 is bonded, and fired.
Further, in the subsequent mounting component mounting process, after applying cream solder to the land portions of the conductor patterns 6 and 7, various circuit elements and bonding pads 8 are mounted at fixed positions, and the conductor pattern 6 is reflow soldered. , 7. Further, after the external leads 9 are wire-bonded between the bonding pads 8 and the external terminals 2 and 3, the assembly is transfer molded and the peripheral area is sealed with the resin package 4. FIG. 2 is a plan view of the finished product.

上記の構造,製作工程の説明で明らかなように、図示実施例ではサージ放電用のギャップが、導体パターン6のランド部6bに半田接合したボンディングパッド8の下面とこれに対峙して絶縁基板上に形成した導体パターン7の分岐導体パターン7aとの間に誘電体層10挟んで形成されている。これにより、図4に示した従来構造と比べてギャップ形成のために絶縁基板上に確保するスペースを縮小して絶縁基板5の外形を小形化できる。
さらに、導体パターン6のランド部6bに半田接合したボンディングパッド8がギャップの上部側電極を兼用しているので、従来構造(図4参照)における導体パターン6の分岐導体パターン6aが必要なく、したがって導体パターン6,7の印刷は1回で済む。したがって、従来のように導体パターンの印刷工程を誘電体層10の印刷前と後に分けて行う必要がなく、これにより製作工程の削減,コストの低減化が図れる
As is apparent from the above description of the structure and manufacturing process, in the illustrated embodiment, the surge discharge gap is formed on the insulating substrate opposite to the lower surface of the bonding pad 8 solder-bonded to the land portion 6b of the conductor pattern 6. The dielectric layer 10 is sandwiched between the conductor pattern 7 and the branched conductor pattern 7a. Thereby, compared with the conventional structure shown in FIG. 4, the space secured on the insulating substrate for gap formation can be reduced and the outer shape of the insulating substrate 5 can be reduced.
Furthermore, since the bonding pad 8 solder-bonded to the land portion 6b of the conductor pattern 6 also serves as the upper electrode of the gap, the branch conductor pattern 6a of the conductor pattern 6 in the conventional structure (see FIG. 4) is not necessary, and therefore The conductor patterns 6 and 7 need only be printed once. Therefore, it is not necessary to perform the conductor pattern printing process before and after the printing of the dielectric layer 10 as in the prior art, thereby reducing the manufacturing process and the cost.

本発明の実施例による混成集積回路の要部平面図The principal part top view of the hybrid integrated circuit by the Example of this invention 図1の混成集積回路で構成した樹脂封止型半導体デバイスの全体図Overall view of a resin-encapsulated semiconductor device composed of the hybrid integrated circuit of FIG. 図1におけるギャップ部の詳細構造図で、(a)は縦断側面図、(b)は(a)における各部品の重なり合いを模式的に表した平面図FIG. 2 is a detailed structural view of a gap portion in FIG. 1, (a) is a longitudinal side view, and (b) is a plan view schematically showing the overlap of each part in (a). 従来における混成集積回路の要部構造図で、(a)は平面図、(b)は(a)の矢視X−X断面図It is a principal part structure figure of the conventional hybrid integrated circuit, (a) is a top view, (b) is XX sectional drawing of (a).

符号の説明Explanation of symbols

1 混成集積回路
2,3 外部端子
4 樹脂パッケージ
5 絶縁基板
6,7 導体パターン
6b ランド部
6c 欠如部
7a 分岐導体パターン
8 ボンディングパッド
9 外部リード
10 誘電体層
DESCRIPTION OF SYMBOLS 1 Hybrid integrated circuit 2, 3 External terminal 4 Resin package 5 Insulation board 6, 7 Conductor pattern
6b Land portion 6c Lack portion 7a Branching conductor pattern 8 Bonding pad 9 External lead 10 Dielectric layer

Claims (2)

絶縁基板上に形成した導体パターンに回路素子を実装した上で、前記導体パターンにボンディングパッドを介して入力出力端子の外部リードを引き出した構成になる混成集積回路であり、該回路のサージ保護手段として、入出力端子に通じる異電位の導体パターン間に誘電体層を挟んで対向するギャップを形成したものにおいて、
前記ギャップを、一方の導体パターンに接合したボンディングパッドと他方の導体パターンから分岐して前記ボンディングパッドの裏面側に対峙させた分岐導体パターンとの重なり面に誘電体層を挟んで形成したことを特徴とする混成集積回路。
A hybrid integrated circuit having a structure in which circuit elements are mounted on a conductor pattern formed on an insulating substrate, and external leads of input / output terminals are drawn out from the conductor pattern through bonding pads, and surge protection means for the circuit As the gap formed between the conductor patterns of different potentials leading to the input / output terminals with the dielectric layer sandwiched therebetween,
The gap is formed by sandwiching a dielectric layer on an overlapping surface between a bonding pad joined to one conductor pattern and a branch conductor pattern branched from the other conductor pattern and facing the back surface side of the bonding pad. A hybrid integrated circuit characterized.
請求項1記載の混成集積回路において、一方の導体パターンにはボンディングパッドと接合するランド部の面域一部を欠如し、かつこの欠如部位に他方の導体パターンの分岐導体パターンを引き入れ形成した上で、該分岐導体パターンに被覆形成した誘電体層を挟んでその上にボンディングパッドを重ね、該ボンディングパッドと導体パターンのランドとを半田接合したことを特徴とする混成集積回路。 2. The hybrid integrated circuit according to claim 1, wherein one conductor pattern lacks a part of a surface area of a land portion to be bonded to a bonding pad, and a branch conductor pattern of the other conductor pattern is drawn into the lacking portion. A hybrid integrated circuit, wherein a bonding pad is placed on the branched conductor pattern with a dielectric layer sandwiched therebetween, and the bonding pad and the land of the conductor pattern are soldered together.
JP2004072595A 2004-03-15 2004-03-15 Hybrid integrated circuit Pending JP2005260141A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013110515A (en) * 2011-11-18 2013-06-06 Denso Corp Circuit for driving power semiconductor element
US11322436B2 (en) 2019-11-08 2022-05-03 Fuji Electric Co., Ltd. Semiconductor module and method of manufacturing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013110515A (en) * 2011-11-18 2013-06-06 Denso Corp Circuit for driving power semiconductor element
US11322436B2 (en) 2019-11-08 2022-05-03 Fuji Electric Co., Ltd. Semiconductor module and method of manufacturing the same

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