JP2005065083A

JP2005065083A - Semiconductor device

Info

Publication number: JP2005065083A
Application number: JP2003295129A
Authority: JP
Inventors: Koji Takada; 浩司高田; Seiki Yamaguchi; 誠毅山口
Original assignee: Matsushita Electric Industrial Co Ltd
Current assignee: Panasonic Holdings Corp
Priority date: 2003-08-19
Filing date: 2003-08-19
Publication date: 2005-03-10

Abstract

<P>PROBLEM TO BE SOLVED: To make an input of a power switch element low potential, and make the power switch element off to be protected from a destroy when an excessive current and a short-circuit current flow, with respect to a power switch element which drives a load of a lamp, an LED, and an inductor. <P>SOLUTION: Two resistors are connected to a low potential side (ground potential) from an IN terminal. After an IN terminal voltage of a power element rises up to a potential at which a load 17 can be sufficiently driven, a switch element 6 is turned on, a detection of a current flowing through the power switch element is made possible. When an excessive current and a short-circuit current flow, a protection function works, and the load 17 can be driven according to a high/low signal from the IN terminal regardless of an application of power 9 and an order of a signal from the IN terminal. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、ランプ、ＬＥＤ、インダクタなどの負荷を駆動するパワースイッチ素子に関し、過電流、短絡電流が流れた場合、パワースイッチ素子の入力を低電位にし、パワースイッチ素子をオフして破壊から守る。また、正常時パワースイッチ素子の入力の信号に応じ正常にスイッチ動作をするパワースイッチ素子に関する。 The present invention relates to a power switch element that drives a load such as a lamp, an LED, and an inductor. When an overcurrent or a short-circuit current flows, the input of the power switch element is set to a low potential and the power switch element is turned off to protect it from destruction. . The present invention also relates to a power switch element that normally performs a switching operation in accordance with a signal input to the power switch element in a normal state.

従来、ランプやコイル等の負荷を駆動する手法として図３に示すように負荷の低電位側に１の半導体装置を設け、その半導体装置のオン、オフにより、負荷を駆動する方法は一般的によく用いられている。図３において９は電源、１７は例えば抵抗、コイル等の負荷、１はスイッチである半導体装置を示す。この半導体装置は過電流、短絡保護機能を備えたものが一般的に用いられている。 Conventionally, as a method of driving a load such as a lamp or a coil, a method of driving a load by providing one semiconductor device on the low potential side of the load as shown in FIG. It is often used. In FIG. 3, 9 is a power source, 17 is a load such as a resistor and a coil, and 1 is a semiconductor device which is a switch. A semiconductor device having an overcurrent and short circuit protection function is generally used.

その保護機能は、パワースイッチ素子がオン状態で、負荷が異常となり、過電流、短絡電流が流れると、その電流に応じＤ端子電位は上昇し、抵抗３，４で分圧された電圧がスイッチ素子５のゲートに加わりスイッチ素子５はオンし、パワー素子のゲートは０Ｖ近くになりパワースイッチ素子２はオフし破壊から守られる（例えば、特許文献１参照）。
特開平０１−２９５５２０号公報（第３図） The protection function is that when the power switch element is on, the load becomes abnormal, and overcurrent and short-circuit current flow, the D terminal potential rises according to the current, and the voltage divided by resistors 3 and 4 is switched In addition to the gate of the element 5, the switch element 5 is turned on, the gate of the power element is close to 0V, and the power switch element 2 is turned off to be protected from destruction (for example, see Patent Document 1).
Japanese Patent Laid-Open No. 01-295520 (FIG. 3)

従来の技術を用いた場合、過電流、短絡電流が流れると保護機能は働くが、ＩＮ端子からのハイ、ロー信号に応じて負荷１７を駆動できない。一般には電源９は常時負荷に印加されており、Ｄ端子電圧は電源９の高い電圧（５〜３０Ｖ程度）が加わり、抵抗３，４で分圧された電圧がスイッチ素子５に加わりパワースイッチ素子のゲートは０Ｖ近くに維持されパワースイッチ素子２はオフし、ＩＮ端子からパワー素子を駆動するハイ信号が加わってもパワー素子は駆動出来ずオフしラッチ状態となる。 When the conventional technique is used, the protection function works when an overcurrent or a short-circuit current flows, but the load 17 cannot be driven according to a high or low signal from the IN terminal. In general, the power source 9 is always applied to the load, and the D terminal voltage is applied with a high voltage (about 5 to 30 V) of the power source 9, and the voltage divided by the resistors 3 and 4 is applied to the switch element 5 to be applied to the power switch element. The power switch element 2 is turned off and the power switch element 2 is turned off, and even if a high signal for driving the power element is applied from the IN terminal, the power element cannot be driven and is turned into a latch state.

正常動作させるためには、ＩＮ端子に信号を印加後、電源９の電圧を印加する必要があり、これはＩＮ端子電圧と電源９のオン、オフの電圧印加を同期させる必要があり、一般的ではないし、システムとして大掛かりになり複雑になる。 In order to operate normally, it is necessary to apply the voltage of the power supply 9 after applying a signal to the IN terminal, and this is necessary to synchronize the IN terminal voltage and the on / off voltage application of the power supply 9. Rather, it becomes large and complicated as a system.

上記課題を解決するために、本発明の半導体装置１は、ＩＮ端子から低電位側（グランド電位）に２つの抵抗を接続し、パワー素子が十分負荷１７を駆動出来る電位までＩＮ端子電圧が上昇した後、スイッチ素子６をオンさせ、パワースイッチ素子に流れる電流を検出可能にし、過電流、短絡電流が流れると保護機能は働き、電源９の印加とＩＮ端子からの信号順番に関係なく、ＩＮ端子からのハイ、ロー信号に応じて負荷１７を駆動出来るものである。 In order to solve the above problems, the semiconductor device 1 of the present invention connects two resistors from the IN terminal to the low potential side (ground potential), and the IN terminal voltage rises to a potential at which the power element can sufficiently drive the load 17. After that, the switch element 6 is turned on so that the current flowing through the power switch element can be detected. When an overcurrent or short-circuit current flows, the protection function is activated and the IN is applied regardless of the application of the power supply 9 and the signal order from the IN terminal. The load 17 can be driven according to the high and low signals from the terminals.

以上のように本発明によれば、ＩＮ端子からのハイ、ロー信号に応じて負荷１７を正常駆動でき、負荷に異常が発生し、パワー素子に過電流、短絡電流が流れると、パワースイッチ素子に流れる電流を検出しパワースイッチ素子２をオフして破壊から守り、信頼性を向上させるという効果がある。また電源９の印加とＩＮ端子からの信号順番に関係なく、半導体装置を複雑でなく、簡素に構成できるという効果がある。 As described above, according to the present invention, when the load 17 can be normally driven in response to the high and low signals from the IN terminal, an abnormality occurs in the load, and an overcurrent and a short-circuit current flow in the power element, the power switch element The current flowing through is detected, the power switch element 2 is turned off to protect it from destruction, and the reliability is improved. Further, there is an effect that the semiconductor device can be simply configured without being complicated regardless of the application of the power source 9 and the signal order from the IN terminal.

以下、本発明の実施の形態１について、図を用いて説明する。 Embodiment 1 of the present invention will be described below with reference to the drawings.

図１は本発明の半導体装置である。ＩＮ端子から低電位側（グランド電位）に２つ（以上）の抵抗を接続し、入力の電圧を分圧しその分圧された電圧をスイッチ素子６のゲートに加える。パワー素子は正常な負荷を駆動出来るＩＮ端子電圧はパワー素子の特性上決まっており、その正常な負荷を駆動出来る入力電圧以上にＩＮ電圧が上昇した後、スイッチ素子６がオンする様に抵抗７，８の値を決める。ＩＮ端子に電圧が印加され、パワー素子２はオンし、負荷１７を駆動する。その時Ｄ端子は電源９の電圧から、パワー素子２と負荷１７の値で決まるオン電圧の低い電圧になり、負荷１７を駆動する。正常な負荷を駆動出来る入力端子電圧以上にＩＮ電圧が上昇し、負荷１７に電流が流れた後にスイッチ素子６はオン状態になり、過電流、ショート監視状態となる。負荷に異常が無ければ、ＩＮ端子が低電位になれば、パワー素子２はオフし、その後、ＩＮ端子の入力電圧に応じて、負荷１７を駆動する。過電流、ショート監視状態となった後、負荷１７の異常が発生し、過電流、ショート電流が負荷１７およびパワー素子２に流れると、Ｄ端子電圧はその電流に応じて上昇し、抵抗３，４で分圧された電圧がスイッチ素子５に加わり、スイッチ素子６はすでにオンしているため、パワー素子２のゲートは低電位側と接続されたことになりその電位はほぼ０Ｖになり、パワー素子２はオフして、過電流、ショート電流からパワー素子２を守る。 FIG. 1 shows a semiconductor device of the present invention. Two (or more) resistors are connected from the IN terminal to the low potential side (ground potential), the input voltage is divided, and the divided voltage is applied to the gate of the switch element 6. The IN terminal voltage capable of driving a normal load is determined by the characteristics of the power element, and the resistance 7 is set so that the switch element 6 is turned on after the IN voltage rises above the input voltage capable of driving the normal load. , 8 is determined. A voltage is applied to the IN terminal, and the power element 2 is turned on to drive the load 17. At that time, the D terminal changes from the voltage of the power supply 9 to a low ON voltage determined by the values of the power element 2 and the load 17 and drives the load 17. After the IN voltage rises above the input terminal voltage capable of driving a normal load and a current flows through the load 17, the switch element 6 is turned on, and an overcurrent / short circuit monitoring state is established. If there is no abnormality in the load, if the IN terminal becomes a low potential, the power element 2 is turned off, and then the load 17 is driven according to the input voltage of the IN terminal. After the overcurrent / short-circuit monitoring state occurs, when an abnormality occurs in the load 17 and the overcurrent / short-circuit current flows through the load 17 and the power element 2, the D terminal voltage rises according to the current, and the resistance 3, Since the voltage divided by 4 is applied to the switch element 5 and the switch element 6 is already turned on, the gate of the power element 2 is connected to the low potential side, and the potential becomes almost 0 V, and the power The element 2 is turned off to protect the power element 2 from overcurrent and short-circuit current.

本発明の実施の形態２について、図を用いて説明する。 Embodiment 2 of the present invention will be described with reference to the drawings.

図２は負荷がランプ駆動の場合有効な本発明の半導体装置である。ランプ負荷１８の場合、フィラメントが温まるまで、定格の数倍の突入電流が流れる。この突入電流が流れている間は過電流、ショート電流の検出を短い時間（１０ｎ秒〜数ｕ秒）遅らせ、ランプの点灯個数を増やすものである。これは、電流、時間共パワー素子の破壊レベルより以下になる様に設定する必要がある。 FIG. 2 shows a semiconductor device of the present invention which is effective when the load is driven by a lamp. In the case of the lamp load 18, an inrush current several times the rated value flows until the filament warms up. While the inrush current is flowing, detection of overcurrent and short current is delayed for a short time (10 nsec to several u sec) to increase the number of lamps to be lit. This needs to be set so as to be less than the breakdown level of the power element for both current and time.

動作は、ＩＮ端子から低電位側（グランド電位）に２つ（以上）の抵抗を接続し、低電位に接続された抵抗８と並列にコンデンサー１１を接続することにより、スイッチ素子６が過電流、ショート電流の監視状態になる時間を少し（１０ｎ秒〜数ｕ秒）遅らせ、その間負荷１７に流れる突入電流は感知しないようにする。突入電流が流れた後、Ｄ端子電圧を検知し、異常電流がパワー素子２に流れた場合は、パワー素子２のゲートの電位はほぼ０Ｖとし、パワー素子２はオフして、過電流、ショート電流からパワー素子２を守る。他の動作の明細は実施の形態１と同じであるため、省略する。 The operation is performed by connecting two (or more) resistors from the IN terminal to the low potential side (ground potential), and connecting the capacitor 11 in parallel with the resistor 8 connected to the low potential, so that the switch element 6 is overcurrent. The time for monitoring the short current is slightly delayed (10 nsec to several u sec), and the inrush current flowing through the load 17 is not detected during that time. When the D terminal voltage is detected after the inrush current flows and an abnormal current flows to the power element 2, the potential of the gate of the power element 2 is set to approximately 0 V, the power element 2 is turned off, and an overcurrent or short circuit occurs. Protect power element 2 from current. The details of the other operations are the same as those in the first embodiment, and will be omitted.

本発明にかかる半導体装置は、信頼性の向上と、半導体装置の簡素化に有用である。 The semiconductor device according to the present invention is useful for improving reliability and simplifying the semiconductor device.

本発明の半導体装置の形態１を示す回路図A circuit diagram showing form 1 of a semiconductor device of the present invention 本発明の半導体装置の形態２を示す回路図The circuit diagram which shows the form 2 of the semiconductor device of this invention 従来の半導体装置の形態を示す回路図Circuit diagram showing the form of a conventional semiconductor device

符号の説明Explanation of symbols

１半導体装置
２パワースイッチ素子
３，４，７，８，１０抵抗
５，６スイッチ素子
９電源
１１コンデンサー
１７負荷
１８ランプ負荷 DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Power switch element 3,4,7,8,10 Resistance 5,6 Switch element 9 Power supply 11 Condenser 17 Load 18 Lamp load

Claims

パワースイッチ素子とその制御回路を１チップ上に構成する半導体装置であって、パワースイッチ素子の異常電流を検出した時、そのパワースイッチ素子をオフにし、その半導体装置を破壊から守る保護機能を備え、正常時、入力の信号に応じ正常にスイッチ動作をすることを特徴とした半導体装置。 A semiconductor device in which a power switch element and its control circuit are configured on a single chip, and has a protection function to turn off the power switch element when the abnormal current of the power switch element is detected and protect the semiconductor device from destruction. A semiconductor device that normally performs a switching operation in response to an input signal.

パワースイッチ素子の異常電流を検出した時、そのパワースイッチ素子をオフにする手段が、入力端子から低電位側に接続された２つの抵抗による分圧電圧で駆動するスイッチ素子の高電位側が異常電流を検出しパワースイッチ素子のゲートを低電位にすることを特徴とする請求項１記載の半導体装置。 When an abnormal current of the power switch element is detected, the means for turning off the power switch element is an abnormal current on the high potential side of the switch element driven by the divided voltage by two resistors connected from the input terminal to the low potential side. 2. The semiconductor device according to claim 1, wherein the potential of the power switch element is set to a low potential.

入力端子から低電位側に接続された２つの抵抗による分圧電圧で駆動するスイッチ素子の２つの抵抗の低電位側に並列にコンデンサーを接続されたことを特徴とした請求項２記載の半導体装置。 3. The semiconductor device according to claim 2, wherein a capacitor is connected in parallel to the low potential side of the two resistors of the switching element driven by the divided voltage by the two resistors connected from the input terminal to the low potential side. .

パワースイッチ素子がＮ型ＭＯＳＦＥＴで構成されることを特徴とする請求項１、２あるいは３記載の半導体装置。 4. The semiconductor device according to claim 1, wherein the power switch element is composed of an N-type MOSFET.

パワースイッチ素子がＩＧＢＴで構成されることを特徴とする請求項１、２あるいは３記載の半導体装置。 4. The semiconductor device according to claim 1, wherein the power switch element is composed of an IGBT.

パワースイッチ素子がバイポーラトランジスタで構成されることを特徴とする請求項１、２あるいは３記載の半導体装置。 4. The semiconductor device according to claim 1, wherein the power switch element is composed of a bipolar transistor.