JP2005064544A - Resin package-type semiconductor device - Google Patents

Resin package-type semiconductor device Download PDF

Info

Publication number
JP2005064544A
JP2005064544A JP2004352039A JP2004352039A JP2005064544A JP 2005064544 A JP2005064544 A JP 2005064544A JP 2004352039 A JP2004352039 A JP 2004352039A JP 2004352039 A JP2004352039 A JP 2004352039A JP 2005064544 A JP2005064544 A JP 2005064544A
Authority
JP
Japan
Prior art keywords
wire
internal lead
resin package
semiconductor chip
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2004352039A
Other languages
Japanese (ja)
Other versions
JP4010458B2 (en
Inventor
Kazutaka Shibata
和孝 柴田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP2004352039A priority Critical patent/JP4010458B2/en
Publication of JP2005064544A publication Critical patent/JP2005064544A/en
Application granted granted Critical
Publication of JP4010458B2 publication Critical patent/JP4010458B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45015—Cross-sectional shape being circular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48455—Details of wedge bonds
    • H01L2224/48456—Shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301—Capillary
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512—Aligning
    • H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518—Translational movements
    • H01L2224/85181—Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852—Applying energy for connecting
    • H01L2224/85201—Compression bonding
    • H01L2224/85203—Thermocompression bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a wire for electrically connecting a semiconductor chip and an internal lead from being cut by heat generated when a semiconductor device is mounted on a printed circuit board. <P>SOLUTION: In a resin package-type semiconductor device provided with the semiconductor chip, a die pad on which the semiconductor chip is loaded, at least one piece of the wire 12 whose one end is contact bonded to the semiconductor chip, the internal lead 13 which is electrically connected to the semiconductor chip by contact bonding the other end of the wire 12 and a resin package for enclosing the semiconductor chip and the internal lead 13, the wire 12 has a part thereof which is laid on the surface of the internal lead by a certain distance from the reference end of the pressure-bonded part 12b with the internal lead 13 and a bent part 12d located at the end of the section in the vicinity of the reference end of the pressure-bonded part 12b with the internal lead 13. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本願発明は、半導体チップおよびワイヤなどが樹脂パッケージによって包み込まれた樹脂パッケージ型半導体装置に関する。   The present invention relates to a resin package type semiconductor device in which a semiconductor chip and a wire are encased in a resin package.

図７に、従来のこの種の樹脂パッケージ型半導体装置１の構造例を示す。この樹脂パッケージ型半導体装置１は、半導体チップ１０と、この半導体チップ１０が搭載されるダイパッド１１と、金線などのワイヤ１２を介して上記半導体チップ１０と電気的に導通さ
せられている複数本の内部リード１３と、を備えて構成されている。 FIG. 7 shows a structural example of a conventional resin package type semiconductor device 1 of this type. The resin package type semiconductor device 1 includes a plurality of semiconductor chips 10, a die pad 11 on which the semiconductor chip 10 is mounted, and a plurality of wires electrically connected to the semiconductor chip 10 through wires 12 such as gold wires. The internal lead 13 is provided.

上記ワイヤ１２の一端部は上記半導体チップ１０と、他端部は内部リード１３と、それぞれ熱圧着などの手段によって接続されている。すなわち、上記半導体チップ１０と上記内部リード１３とがワイヤ１２によって連結されて電気的な導通が図られている。また、上記半導体チップ１０、ダイパッド１１、ワイヤ１２、および各内部リード１３は、エポキシ樹脂などの熱硬化性樹脂によりパッケージングされているとともに、この樹脂パッケージ１４からは上記各内部リード１３と連続して外部リード１５が形成されている。この外部リード１５は、先端部が屈曲させられて水平部１６が形成されており、プリント基板上に面実装可能とされている。   One end of the wire 12 is connected to the semiconductor chip 10 and the other end is connected to the internal lead 13 by means such as thermocompression bonding. That is, the semiconductor chip 10 and the internal lead 13 are connected by the wire 12 to achieve electrical conduction. The semiconductor chip 10, the die pad 11, the wire 12, and the internal leads 13 are packaged with a thermosetting resin such as an epoxy resin, and are continuous with the internal leads 13 from the resin package 14. External leads 15 are formed. The external lead 15 is bent at a tip portion to form a horizontal portion 16, and can be surface-mounted on a printed circuit board.

上記のように構成された樹脂パッケージ型半導体装置１は、所定の配線パターンが形成されたプリント基板上に、たとえばハンダリフローの手法などによって実装される。具体的には、プリント基板上に予めハンダペーストを印刷しておき、このハンダペースト部に対応するように上記樹脂パッケージ型半導体装置の水平部１６を載置し、リフロー炉内に移送して加熱した後に上記ハンダを冷却固化させることにより上記樹脂パッケージ型半導体装置１が上記プリント基板上に実装される。   The resin package type semiconductor device 1 configured as described above is mounted on a printed circuit board on which a predetermined wiring pattern is formed by, for example, a solder reflow method. Specifically, solder paste is printed on a printed circuit board in advance, and the horizontal portion 16 of the resin package type semiconductor device is placed so as to correspond to the solder paste portion, and is transferred to a reflow furnace and heated. Then, the resin package type semiconductor device 1 is mounted on the printed board by cooling and solidifying the solder.

上述したハンダリフローの手法により上記樹脂パッケージ型半導体装置１をプリント基板上に実装すべく、上記樹脂パッケージ型半導体装置１をリフロー炉内に移送して加熱した場合には、上記樹脂パッケージ１４は熱膨張し、上記ワイヤ１２もまた熱膨張する。ところが、エポキシ樹脂などにより形成された上記樹脂パッケージ１４は、上記ワイヤ１２よりも熱膨張係数が大きいために、上記樹脂パッケージ１４の方が上記ワイヤ１２よりも伸びようとするので、上記ワイヤ１２に応力がかかってしまう。   When the resin package type semiconductor device 1 is transferred to a reflow furnace and heated to mount the resin package type semiconductor device 1 on a printed circuit board by the solder reflow method described above, the resin package 14 is heated. The wire 12 also expands thermally. However, since the resin package 14 formed of epoxy resin or the like has a larger thermal expansion coefficient than the wire 12, the resin package 14 tends to extend more than the wire 12. Stress is applied.

また、上記ワイヤ１２の内部リード１３との圧着部１２ｂは、加圧によって圧し潰されてその厚みが上記ワイヤ１２の直径よりもさらに小さくなっており、この圧着部１２ｂの基端からは、上記内部リード１３に対して比較的大きな角度、具体的には図７にαで示した角度が３０度程度、あるいはそれ以上の角度でワイヤ１２が延出している。   Further, the crimping portion 12b of the wire 12 with the internal lead 13 is crushed by pressurization and the thickness thereof is further smaller than the diameter of the wire 12, and from the proximal end of the crimping portion 12b, The wire 12 extends at a relatively large angle with respect to the internal lead 13, specifically, an angle indicated by α in FIG. 7 is about 30 degrees or more.

したがって、上記圧着部１２ｂの基端、言い換えれば上記ワイヤ１２が屈曲している部分１２ｄに上述した上記樹脂パッケージ１４と上記ワイヤ１２の熱膨張係数の差に起因した応力が変形応力として集中してしまう。上述したように、上記屈曲部１２ｄの厚みが小さいため、屈曲部１２ｄにおける変形応力の集中によってワイヤのこの部分１２ｄが切断されてしまう場合がある。このため、上記ワイヤ１２の断線により上記半導体
チップ１０に電力が十分に供給されないといった事態が生じ、上記樹脂パッケージ型半導体装置１が本来有する機能を発揮することができなくなってしまう。 Therefore, the stress caused by the difference in thermal expansion coefficient between the resin package 14 and the wire 12 is concentrated as a deformation stress at the proximal end of the crimping portion 12b, in other words, the portion 12d where the wire 12 is bent. End up. As described above, since the thickness of the bent portion 12d is small, the portion 12d of the wire may be cut due to the concentration of deformation stress in the bent portion 12d. For this reason, the situation that the electric power is not sufficiently supplied to the semiconductor chip 10 due to the disconnection of the wire 12 occurs, and the function inherent to the resin package type semiconductor device 1 cannot be exhibited.

本願発明は、上記した事情のもとで考え出されたものであって、半導体装置をプリント基板に実装する時の熱によって半導体チップと内部リードとを電気的に導通しているワイヤが切断されてしまうことを回避することをその課題とする。   The present invention has been conceived under the circumstances described above, and the wire that electrically connects the semiconductor chip and the internal leads is cut by heat when the semiconductor device is mounted on the printed circuit board. The problem is to avoid this.

上記の課題を解決するため、本願発明では、次の技術的手段を講じている。   In order to solve the above problems, the present invention takes the following technical means.

すなわち、本願発明の第１の側面によれば、半導体チップと、この半導体チップに一端部が圧着されたワイヤと、このワイヤの他端部が圧着されて上記半導体チップと電気的に導通させられている複数本の内部リードと、上記半導体チップないし上記各内部リードを包み込む樹脂パッケージと、を備えた樹脂パッケージ型半導体装置であって、上記ワイヤが上記内部リードとの圧着部の基端から延出する角度は、上記圧着部の基端から少なくとも上記ワイヤの直径の２倍に相当する長さまでは上記内部リードに対して１５度以下であることを特徴とする、樹脂パッケージ型半導体装置が提供される。   That is, according to the first aspect of the present invention, a semiconductor chip, a wire whose one end is crimped to the semiconductor chip, and the other end of the wire are crimped to be electrically connected to the semiconductor chip. A resin package type semiconductor device comprising a plurality of internal leads and a resin package enclosing the semiconductor chip or each internal lead, wherein the wire extends from a proximal end of a crimping portion with the internal lead. Provided is a resin package type semiconductor device characterized in that a protruding angle is 15 degrees or less with respect to the internal lead in a length corresponding to at least twice the diameter of the wire from the base end of the crimping portion. Is done.

好ましくは、上記ワイヤが上記圧着部の基端から延出する角度が１０度以下であり、より好ましくは、上記ワイヤが上記圧着部の基端から延出する角度が５度以下である。   Preferably, the angle at which the wire extends from the proximal end of the crimping part is 10 degrees or less, and more preferably, the angle at which the wire extends from the proximal end of the crimping part is 5 degrees or less.

上記内部リードとの圧着部の基端から延出するワイヤの角度が大きい場合には、半導体装置のプリント基板に対する実装時における上記樹脂パッケージと上記ワイヤの熱膨張係数の差に起因して、上記ワイヤの屈曲している部分が切断されてしまう場合があるのは上述の通りである。   When the angle of the wire extending from the proximal end of the crimping portion with the internal lead is large, due to the difference in thermal expansion coefficient between the resin package and the wire when mounted on the printed circuit board of the semiconductor device, As described above, the bent portion of the wire may be cut.

本願発明は、上記内部リードとの圧着部から延出する上記ワイヤの角度を小さく、具体的には圧着部の基端から延出する上記ワイヤの角度を上記内部リードに対して１５度以下とすることにより、ワイヤが切断されてしまうことを回避するものである。   In the present invention, the angle of the wire extending from the crimping portion with the internal lead is small, specifically, the angle of the wire extending from the proximal end of the crimping portion is 15 degrees or less with respect to the internal lead. By doing this, the wire is prevented from being cut.

上記ワイヤの角度を１５度以下と限定したのは、この角度以下であれば上記ワイヤと上記内部リードとの圧着部の基端部が切断された不良品が製造される可能性が低いことが本願発明者の実験によって確認されたからである。本願発明者は、従来より採用されているワイヤの延出角度、すなわち約３０度を含む様々な角度でワイヤを内部リードに圧着した樹脂パッケージ型半導体装置を製造し、各角度における不良品が製造される割合を調べた。その結果を図１に示すが、この図から明らかなように、１５度以下の場合に角度低減による効果が顕著に表れ、不良品が製造される割合が格段に低くなっている。   The reason why the angle of the wire is limited to 15 degrees or less is that if the angle is equal to or less than this angle, there is a low possibility that a defective product in which the proximal end portion of the crimp portion between the wire and the internal lead is cut is manufactured. This is because it was confirmed by the experiment of the present inventor. The inventor of this application manufactures a resin package type semiconductor device in which a wire is crimped to an internal lead at various angles including a conventional wire extension angle, that is, about 30 degrees, and defective products at each angle are manufactured. Investigate the proportion of being. The result is shown in FIG. 1. As is clear from this figure, when the angle is 15 degrees or less, the effect of the angle reduction is remarkably exhibited, and the ratio of defective products is remarkably reduced.

上述したように、半導体装置のプリント基板に対する実装時に上記ワイヤと上記内部リードとの圧着部が切断される原因は、圧着部の厚みが小さく、この圧着部の基端からワイヤが比較的大きな角度で延出していることにあると考えられる。したがって、上記圧着部からのワイヤの延出角度を小さくすることにより、上記ワイヤの屈曲している部分に集中する変形応力を低減し、引張り応力としてワイヤ全体にある程度分散できると考えられる。また、引張り応力に対しては、上記ワイヤが展性に優れる金線などであるために、上記樹脂パッケージの伸びに追従して良好に伸びることができると考えられる。このような理由から、上記内部リードに対するワイヤの延出角度が１５度以下の場合には、不良品が製造される割合が格段に低くなると考えられる。   As described above, when the semiconductor device is mounted on the printed board, the crimped portion between the wire and the internal lead is cut because the crimped portion has a small thickness and the wire has a relatively large angle from the proximal end of the crimped portion. It is thought that there is in extending. Therefore, it is considered that by reducing the extension angle of the wire from the crimping portion, the deformation stress concentrated on the bent portion of the wire can be reduced, and the tensile stress can be dispersed to some extent throughout the wire. Further, it is considered that the tensile stress can be satisfactorily extended following the elongation of the resin package since the wire is a gold wire having excellent malleability. For this reason, it is considered that when the wire extension angle with respect to the internal lead is 15 degrees or less, the rate of defective products is remarkably reduced.

本願発明の第２の側面によれば、半導体チップと、半導体チップが搭載されるダイパッドと、半導体チップに一端部が圧着された少なくとも１本のワイヤと、このワイヤの他端部が圧着されて上記半導体チップと電気的に導通させられている内部リードと、上記半導体チップないし上記内部リードを包み込む樹脂パッケージと、を備えた樹脂パッケージ型半導体装置であって、上記ワイヤは、上記内部リードとの圧着部の基端から一定距離だけ上記内部リードの表面に添わせられている部分と、その部分の端に位置する屈曲部分と、を上記内部リードとの圧着部の基端の近傍に有することを特徴とする、樹脂パッケージ型半導体装置が提供される。上記ワイヤにおける上記一定距離は、具体的には、少なくとも上記ワイヤの直径の２倍に相当する長さ分である。   According to the second aspect of the present invention, a semiconductor chip, a die pad on which the semiconductor chip is mounted, at least one wire having one end crimped to the semiconductor chip, and the other end of the wire are crimped. A resin package type semiconductor device comprising: an internal lead electrically connected to the semiconductor chip; and a resin package enclosing the semiconductor chip or the internal lead, wherein the wire is connected to the internal lead. A portion that is attached to the surface of the internal lead by a certain distance from the base end of the crimping portion and a bent portion that is positioned at the end of the portion are in the vicinity of the base end of the crimping portion with the internal lead. A resin package type semiconductor device is provided. Specifically, the fixed distance in the wire is at least a length corresponding to twice the diameter of the wire.

本側面においては、上記ワイヤを上記内部リードとの圧着部の基端から一定距離、具体的には、少なくとも上記ワイヤの直径の２倍に相当する長さ分、だけ上記内部リードの表面に添わせることにより、ワイヤの屈曲部分が厚みの小さい圧着部を避けてこの圧着部から一定距離だけ離れた部位に位置することとなる。すなわち、ワイヤの屈曲している部分の厚みがワイヤの厚みと略同一、言い換えればワイヤの屈曲している部分の厚みが従来の樹脂パッケージ型半導体装置と比べると大きくなっている。したがって、本側面に係る樹脂パッケージ型半導体装置は、従来の樹脂パッケージ型半導体装置と比べて、ワイヤの屈曲部分の変形応力に対する耐性が向上していることは明らかである。   In this aspect, the wire is attached to the surface of the internal lead by a certain distance from the base end of the crimping portion with the internal lead, specifically, a length corresponding to at least twice the diameter of the wire. By doing so, the bent portion of the wire is positioned at a position away from the crimping portion by a certain distance while avoiding the crimping portion having a small thickness. That is, the thickness of the bent portion of the wire is substantially the same as the thickness of the wire, in other words, the thickness of the bent portion of the wire is larger than that of the conventional resin package type semiconductor device. Therefore, it is clear that the resin package type semiconductor device according to this aspect has improved resistance to the deformation stress of the bent portion of the wire as compared with the conventional resin package type semiconductor device.

また、上記構成は、見方を変えれば上記した第１の側面における上記ワイヤの圧着部の基端からの延出角度が略０度である場合に相当するとも考えられる。すなわち、厚みの小さい圧着部に変形応力が集中することが回避されており、厚みの小さい圧着部が上記ワイヤが半導体装置の実装時の熱によって切断される可能性が低減されるのはいうまでもない。   In addition, the above configuration is considered to correspond to the case where the extension angle from the proximal end of the crimping portion of the wire on the first side surface is approximately 0 degrees from a different viewpoint. That is, it is avoided that the deformation stress is concentrated on the crimping portion having a small thickness, and the possibility that the crimping portion having a small thickness is cut by heat when the semiconductor device is mounted is reduced. Nor.

上記構成の樹脂パッケージ型半導体装置においても、不良品が製造される割合が格段に低くなることは、本願発明者の実験によって確認されている。   It has been confirmed by experiments of the present inventor that the proportion of defective products manufactured in the resin package type semiconductor device having the above configuration is significantly reduced.

好ましくは、上記ワイヤにおける上記内部リードに添わせられている部分から延出する角度は、上記内部リードに対して１５度以下である。   Preferably, an angle extending from a portion of the wire attached to the internal lead is 15 degrees or less with respect to the internal lead.

上記構成によれば、上記ワイヤを上記内部リードとの圧着部から一定長さ上記内部リードの表面に添わせることにより上記屈曲部分の変形応力に対する耐性が向上されていることに加えて、上述した第１の側面と同様の理由により上記屈曲部分に集中する変形応力が緩和されている。すなわち、上記屈曲部が実装時の熱によって切断される可能性が格段に低減されている。   According to the above configuration, in addition to the fact that the resistance to the deformation stress of the bent portion is improved by adding the wire to the surface of the internal lead for a certain length from the crimping portion with the internal lead, the above-described configuration The deformation stress concentrated on the bent portion is relaxed for the same reason as the first side surface. That is, the possibility that the bent portion is cut by heat during mounting is significantly reduced.

本願発明のその他の特徴および利点は、添付図面を参照して後述の詳細な説明によって、より明らかとなろう。   Other features and advantages of the present invention will become more apparent from the detailed description given below with reference to the accompanying drawings.

本願発明により、ワイヤが切断される可能性が低減される。   The present invention reduces the possibility that the wire will be cut.

以下、本願発明の好ましい実施の形態を、図面を参照して具体的に説明する。   Hereinafter, preferred embodiments of the present invention will be specifically described with reference to the drawings.

図２は、本願発明に係る樹脂パッケージ型半導体装置１の断面図および一部拡大図であり、図３、図４および図５は、上記樹脂パッケージ型半導体装置１の製造工程の１つであるワイヤボンディング工程を説明するための図である。なお、図２ないし図５において、図７を参照して説明した従来例に係る樹脂パッケージ型半導体装置と同一の部材および要素については、同一の符号を付してある。   FIG. 2 is a cross-sectional view and a partially enlarged view of the resin package type semiconductor device 1 according to the present invention, and FIGS. 3, 4 and 5 are one of the manufacturing steps of the resin package type semiconductor device 1. It is a figure for demonstrating a wire bonding process. 2 to 5, the same members and elements as those of the resin package type semiconductor device according to the conventional example described with reference to FIG. 7 are denoted by the same reference numerals.

図２に示すように、上記樹脂パッケージ型半導体装置１は、半導体チップ１０と、この半導体チップ１０が搭載されるダイパッド１１と、金線などのワイヤ１２を介して上記半導体チップ１０と電気的に導通させられている複数本の内部リード１３と、を備えて構成されている。   As shown in FIG. 2, the resin package type semiconductor device 1 is electrically connected to the semiconductor chip 10 through a semiconductor chip 10, a die pad 11 on which the semiconductor chip 10 is mounted, and a wire 12 such as a gold wire. And a plurality of internal leads 13 that are made conductive.

上記半導体チップ１０、ダイパッド１１、ワイヤ１２、および各内部リード１３は、エポキシ樹脂などの熱硬化性樹脂を用いた金型成形などによって樹脂パッケージ１４に包み込まれているとともに、この樹脂パッケージ１４からは上記各内部リード１３と連続して外部リード１５が形成されている。この外部リード１５は、先端部が屈曲させられて水平部１６が形成されており、プリント基板上に面実装可能とされている。   The semiconductor chip 10, the die pad 11, the wire 12, and each internal lead 13 are encased in a resin package 14 by molding using a thermosetting resin such as an epoxy resin, and the resin package 14 External leads 15 are formed continuously with the internal leads 13. The external lead 15 is bent at a tip portion to form a horizontal portion 16, and can be surface-mounted on a printed circuit board.

上記ワイヤ１２の一端部は上記半導体チップ１０と、他端部は内部リード１３と、それぞれ熱圧着などの手段によって接続されている。すなわち、上記半導体チップ１０と上記内部リード１３とがワイヤ１２によって連結されて電気的な導通が図られている。   One end of the wire 12 is connected to the semiconductor chip 10 and the other end is connected to the internal lead 13 by means such as thermocompression bonding. That is, the semiconductor chip 10 and the internal lead 13 are connected by the wire 12 to achieve electrical conduction.

上記ワイヤ１２が上記内部リード１３との圧着部１２ｂの基端から延出する角度、すなわち図２にβで示す角度は、上記内部リード１３に対して１５度以下に設定されている。より具体的には、上記角度βは、上記圧着部１２ｂの基端と、この圧着部１２ｂの基端から、たとえば上記ワイヤの直径の２倍に相当する距離を隔てたワイヤ１２上の地点とを結ぶ直線が上記内部リード１３と交差する角度として表される。   The angle at which the wire 12 extends from the proximal end of the crimping part 12 b with the internal lead 13, that is, the angle indicated by β in FIG. 2 is set to 15 degrees or less with respect to the internal lead 13. More specifically, the angle β is defined as a base end of the crimping part 12b and a point on the wire 12 that is separated from the base end of the crimping part 12b by a distance corresponding to, for example, twice the diameter of the wire. Is represented as an angle intersecting the internal lead 13.

次に、図３、図４および図５を参照して上記樹脂パッケージ型半導体装置１の製造方法を簡単に説明する。   Next, a method for manufacturing the resin package type semiconductor device 1 will be briefly described with reference to FIGS.

まず、上記ダイパッド１１や内部リード１３などが形成されたリードフレームのダイパッド１１の上面に半導体チップ１０を実装する。なお、上記リードフレームは、金属薄板に打ち抜きプレス加工を施すことにより作成されている。   First, the semiconductor chip 10 is mounted on the upper surface of the die pad 11 of the lead frame on which the die pad 11 and the internal leads 13 are formed. The lead frame is created by punching a thin metal plate.

次に、上記半導体チップ１３の上面に形成されたボンディングパッド（図示略）と上記各内部リード１６の先端部の上面とをワイヤ１９を用いて連結して電気的に導通するようにする。具体的には、以下に示すような行程を経て上記半導体チップ１０と上記内部リード１３とがワイヤ１２によって連結される。   Next, a bonding pad (not shown) formed on the upper surface of the semiconductor chip 13 and the upper surface of the tip of each internal lead 16 are connected using a wire 19 so as to be electrically connected. Specifically, the semiconductor chip 10 and the internal lead 13 are connected by the wire 12 through the following process.

先ず、図３に示すように、上記リードフレームをヒートブロック２５上に載置して上記リードフレーム２２全体を４００℃程度に加熱しておく。次に、ボンディング装置が備えるキャピラリ２０と呼ばれる治具に金線２１を通し、上記キャピラリ２０の先端部から金線２１の先端部を突出させておく。そして、金線２１の先端部を水素炎などによって加熱して溶融させる。図３に示すように、キャピラリ２０を下動させて金線２１の溶融部２２を上記半導体チップ１０に形成されたボンディングパッドに圧し付けることにより、上記半導体チップ１０上に金線２１の先端部を熱圧着する。   First, as shown in FIG. 3, the lead frame is placed on the heat block 25 and the entire lead frame 22 is heated to about 400 ° C. Next, the gold wire 21 is passed through a jig called a capillary 20 included in the bonding apparatus, and the tip of the gold wire 21 is projected from the tip of the capillary 20. Then, the tip of the gold wire 21 is heated and melted with a hydrogen flame or the like. As shown in FIG. 3, the tip end of the gold wire 21 is placed on the semiconductor chip 10 by moving the capillary 20 downward to press the molten portion 22 of the gold wire 21 against the bonding pad formed on the semiconductor chip 10. Is thermocompression bonded.

続いて、金線２１を引き出しつつ上記内部リード１３の所定位置、すなわち図５に示す状態となるようにキャピラリ２０を移動させ、上記内部リード１３の先端部の上面に圧し付ける。すなわち、ヒートブロック２５によって供給される熱と、上記キャピラリ２０による押圧力とによって金線２１を上記内部リード１３の上面に熱圧着する。さらに、上記キャピラリ２０を上記内部リード１３に圧し付けながらスライドさせるようにして移動させて金線２１を圧し切り、ワイヤボンディング行程を終了する。   Subsequently, while pulling out the gold wire 21, the capillary 20 is moved so as to be in a predetermined position of the internal lead 13, that is, in the state shown in FIG. 5, and pressed against the upper surface of the tip of the internal lead 13. That is, the gold wire 21 is thermocompression bonded to the upper surface of the internal lead 13 by the heat supplied by the heat block 25 and the pressing force by the capillary 20. Further, the capillary 20 is moved while being pressed against the internal lead 13 so as to completely press the gold wire 21, and the wire bonding process is completed.

なお、上記半導体チップ１０と上記内部リード１３とがワイヤ１２によって連結された状態において、上記内部リード１３との圧着部１２ｂの基端から上記ワイヤ１２が延出する角度βが１５度以下となるように上記キャピラリ２０を上記半導体チップ１０の圧着部１２ａから上記内部リード１３の所定位置まで移動させる経路を適宜選択しなければならない。   In the state where the semiconductor chip 10 and the internal lead 13 are connected by the wire 12, the angle β at which the wire 12 extends from the proximal end of the crimping portion 12b with the internal lead 13 is 15 degrees or less. Thus, a path for moving the capillary 20 from the crimping portion 12a of the semiconductor chip 10 to a predetermined position of the internal lead 13 must be selected as appropriate.

ワイヤボンディング行程が終了した場合には、上記半導体チップ１０、ワイヤ１２、各内部リード１３などを所定の金型を用いてエポキシ樹脂などの熱硬化性樹脂によりパッケージングを行う。   When the wire bonding process is completed, the semiconductor chip 10, the wires 12, the internal leads 13 and the like are packaged with a thermosetting resin such as an epoxy resin using a predetermined mold.

最後に、リードフレームに対するハンダメッキ、樹脂パッケージ１４に対する標印、上記リードフレームの所定部位のカット、およびリードフォーミングなどの行程を経て、図２に示したような単位半導体装置１が得られる。   Finally, the unit semiconductor device 1 as shown in FIG. 2 is obtained through processes such as solder plating on the lead frame, marking on the resin package 14, cutting of a predetermined portion of the lead frame, and lead forming.

このようにして製造された半導体装置１は、所定の配線パターンが形成されたプリント基板上に、たとえばハンダリフローの手法などにより実装される。具体的には、プリント基板上に予めハンダペーストを印刷しておき、このハンダペースト部に対応するように上記樹脂パッケージ型半導体装置の水平部１６を載置し、リフロー炉内に移送して加熱した後に上記ハンダを冷却固化させることにより上記樹脂パッケージ型半導体装置１が上記プリント基板上に実装される。   The semiconductor device 1 manufactured in this way is mounted on a printed circuit board on which a predetermined wiring pattern is formed by, for example, a solder reflow method. Specifically, solder paste is printed on a printed circuit board in advance, and the horizontal portion 16 of the resin package type semiconductor device is placed so as to correspond to the solder paste portion, and is transferred to a reflow furnace and heated. Then, the resin package type semiconductor device 1 is mounted on the printed board by cooling and solidifying the solder.

上記ようにして製造された樹脂パッケージ型半導体装置１においては、上記圧着部１２ｂからのワイヤ１２の延出角度βが従来の樹脂パッケージ型半導体装置１におけるワイヤ１２の延出角度αに比べて小さく設定されているので、半導体装置１のプリント基板に対する実装時に上記ワイヤ１２の屈曲している部分１２ｄに集中する変形応力を引張り応力としてワイヤ１２全体にある程度分散できると考えられる。また、引張り応力に対しては、上記ワイヤ１２が展性に優れる金線などであるために、上記樹脂パッケージ１４の伸びに追従して良好に伸びることができると考えられる。   In the resin package type semiconductor device 1 manufactured as described above, the extension angle β of the wire 12 from the crimping portion 12b is smaller than the extension angle α of the wire 12 in the conventional resin package type semiconductor device 1. Therefore, it is considered that the deformation stress concentrated on the bent portion 12d of the wire 12 when the semiconductor device 1 is mounted on the printed circuit board can be dispersed to some extent as the tensile stress. Further, with respect to tensile stress, since the wire 12 is a gold wire having excellent malleability, it can be considered that the resin package 14 can be satisfactorily stretched following the elongation of the resin package 14.

これらのことから、上記構成の樹脂パッケージ型半導体装置１においては、プリント基板への実装時の熱によって上記ワイヤ１２の屈曲部１２ｄが切断されてしまうことを良好に回避することができると考えられる。このことは、上述した本願発明者の実験から明かである。   From these facts, in the resin package type semiconductor device 1 having the above configuration, it is considered that the bending portion 12d of the wire 12 can be satisfactorily prevented from being cut by heat during mounting on the printed circuit board. . This is clear from the above-mentioned experiment by the present inventors.

図６は、本願発明の第２の実施形態に係る樹脂パッケージ型半導体装置１の要部拡大断面図である。   FIG. 6 is an enlarged cross-sectional view of a main part of the resin package type semiconductor device 1 according to the second embodiment of the present invention.

本実施形態に係る樹脂パッケージ型半導体装置１の基本的な構成は、上述した第１の実施形態に係る樹脂パッケージ型半導体装置１と略同様である。本実施形態が第１の実施形態を異なる点は、上記ワイヤを上記内部リードとの圧着部の基端から少なくとも上記ワイヤの直径の２倍に相当する長さ分だけ上記内部リードの表面に添わせた点である。   The basic configuration of the resin package semiconductor device 1 according to the present embodiment is substantially the same as that of the resin package semiconductor device 1 according to the first embodiment described above. This embodiment differs from the first embodiment in that the wire is attached to the surface of the internal lead by a length corresponding to at least twice the diameter of the wire from the proximal end of the crimping portion with the internal lead. It is a point that I let you.

すなわち、ワイヤ１２の屈曲部分１２ｄが厚みの小さい圧着部１２ｂを避けてこの圧着部１２ｂから一定距離だけ離れた厚みの大きい部位に位置することとなる。このため、ワイヤ１２の屈曲している部分の厚みがワイヤ１２の厚みと略同一、言い換えればワイヤ１２の屈曲している部分の厚みが従来の樹脂パッケージ型半導体装置１と比べると大きくなっている。したがって、本実施形態に係る樹脂パッケージ型半導体装置１は、従来の樹脂パッケージ型半導体装置１と比べて、ワイヤの屈曲部分１２ｄの変形応力に対する耐性が向上していることは明らかである。   That is, the bent portion 12d of the wire 12 is positioned at a thick portion away from the crimping portion 12b by a certain distance while avoiding the crimping portion 12b having a small thickness. Therefore, the thickness of the bent portion of the wire 12 is substantially the same as the thickness of the wire 12, in other words, the thickness of the bent portion of the wire 12 is larger than that of the conventional resin package type semiconductor device 1. . Therefore, it is clear that the resin package type semiconductor device 1 according to the present embodiment has improved resistance to the deformation stress of the bent portion 12d of the wire as compared with the conventional resin package type semiconductor device 1.

また、上記構成は、見方を変えれば上記した第１の実施形態における上記ワイヤ１２の圧着部１２ｂの基端からの延出角度βが略０度である場合に相当するとも考えられる。すなわち、厚みの小さい圧着部１２ｂの近傍に変形応力がかかることが回避されており、上記圧着部１２ｂあるいはその近傍において上記ワイヤ１２が半導体装置１のプリント基板に対する実装時の熱によって切断される可能性が低減されるのはいうまでもない。   In addition, the above configuration can be considered to correspond to a case where the extension angle β from the proximal end of the crimping portion 12b of the wire 12 in the first embodiment described above is approximately 0 degrees in a different way of viewing. That is, it is possible to prevent deformation stress from being applied in the vicinity of the crimping portion 12b having a small thickness, and the wire 12 can be cut by heat at the time of mounting the semiconductor device 1 on the printed circuit board in or near the crimping portion 12b. Needless to say, the property is reduced.

なお、上記屈曲部分１２ｄから延出するワイヤ１２の角度γは、上記した第１の実施形態と同様に１５度以下に設定することが好ましい。この場合には、上記第１の実施形態と同様の理由によって上記屈曲部１２ｄに集中する変形応力を緩和することができる。すなわち、半導体装置１のプリント基板に対する実装時の熱によって、上記屈曲部１２ｄが切断される可能性がさらに低減されている。   The angle γ of the wire 12 extending from the bent portion 12d is preferably set to 15 degrees or less as in the first embodiment. In this case, the deformation stress concentrated on the bent portion 12d can be relaxed for the same reason as in the first embodiment. That is, the possibility that the bent portion 12d is cut due to heat when the semiconductor device 1 is mounted on the printed board is further reduced.

内部リードとの圧着部からのワイヤの延出角度と、不良品が製造される割合との関係を表すグラフである。It is a graph showing the relationship between the extension angle of the wire from the crimping | compression-bonding part with an internal lead, and the ratio with which a defective article is manufactured. 本願発明の第１の実施形態に係る樹脂パッケージ型半導体装置の断面図およびその要部拡大図である。It is sectional drawing and the principal part enlarged view of the resin package type semiconductor device which concerns on 1st Embodiment of this invention. ワイヤボンディング工程を説明するための図である。It is a figure for demonstrating a wire bonding process. ワイヤボンディング工程を説明するための図である。It is a figure for demonstrating a wire bonding process. ワイヤボンディング工程を説明するための図である。It is a figure for demonstrating a wire bonding process. 本願発明の第２の実施形態に係る樹脂パッケージ型半導体装置の要部拡大断面図である。It is a principal part expanded sectional view of the resin package type semiconductor device which concerns on the 2nd Embodiment of this invention. 従来例の説明図である。It is explanatory drawing of a prior art example.

符号の説明Explanation of symbols

１ 樹脂パッケージ型半導体装置
１０ 半導体チップ
１１ ダイパッド
１２ ワイヤ
１２ａ 圧着部（半導体チップとワイヤとの）
１２ｂ 圧着部（内部リードとワイヤとの）
１２ｄ 屈曲部（ワイヤの）
１３ 内部リード
１４ 樹脂パッケージ
１５ 外部リード
DESCRIPTION OF SYMBOLS 1 Resin package type semiconductor device 10 Semiconductor chip 11 Die pad 12 Wire 12a Crimp part (a semiconductor chip and a wire)
12b Crimp part (with internal lead and wire)
12d bent part (of wire)
13 Internal lead 14 Resin package 15 External lead

Claims (4)

半導体チップと、半導体チップが搭載されるダイパッドと、半導体チップに一端部が圧着された少なくとも１本のワイヤと、このワイヤの他端部が圧着されて上記半導体チップと電気的に導通させられている内部リードと、上記半導体チップないし上記内部リードを包み込む樹脂パッケージと、を備えた樹脂パッケージ型半導体装置であって、
上記ワイヤは、上記内部リードとの圧着部の基端から一定距離だけ上記内部リードの表面に添わせられている部分と、その部分の端に位置する屈曲部分と、を上記内部リードとの圧着部の基端の近傍に有することを特徴とする、樹脂パッケージ型半導体装置。 A semiconductor chip, a die pad on which the semiconductor chip is mounted, at least one wire having one end crimped to the semiconductor chip, and the other end of the wire is crimped to be electrically connected to the semiconductor chip. A resin package type semiconductor device comprising: an internal lead; and a resin package enclosing the semiconductor chip or the internal lead,
The wire has a portion that is attached to the surface of the internal lead by a certain distance from the base end of the crimp portion with the internal lead, and a bent portion that is positioned at the end of the portion, and is crimped to the internal lead. A resin package type semiconductor device, characterized in that the resin package type semiconductor device is provided near the base end of the portion. 半導体チップと、半導体チップが搭載されるダイパッドと、半導体チップに一端部が圧着された少なくとも１本のワイヤと、このワイヤの他端部が圧着されて上記半導体チップと電気的に導通させられている内部リードと、上記半導体チップないし上記内部リードを包み込む樹脂パッケージと、を備えた樹脂パッケージ型半導体装置であって、
上記ワイヤは、上記内部リードとの圧着部の基端から延出する角度が略０度であり、上記内部リードとの圧着部の基端から一定距離だけ存在する部分と、その部分の端に位置する屈曲部分と、を上記内部リードとの圧着部の基端の近傍に有することを特徴とする、樹脂パッケージ型半導体装置。 A semiconductor chip, a die pad on which the semiconductor chip is mounted, at least one wire having one end crimped to the semiconductor chip, and the other end of the wire is crimped to be electrically connected to the semiconductor chip. A resin package type semiconductor device comprising: an internal lead; and a resin package enclosing the semiconductor chip or the internal lead,
The wire has an angle extending from the proximal end of the crimping portion with the internal lead of approximately 0 degrees, and is located at a certain distance from the proximal end of the crimping portion with the internal lead, and at the end of the portion. A resin package type semiconductor device comprising: a bent portion positioned in the vicinity of a proximal end of a crimping portion with the internal lead. 上記ワイヤにおける上記一定距離は少なくとも上記ワイヤの直径の２倍に相当する長さ分である、請求項１または２に記載の樹脂パッケージ型半導体装置。   3. The resin package type semiconductor device according to claim 1, wherein the fixed distance in the wire is a length corresponding to at least twice the diameter of the wire. 上記ワイヤにおける上記屈曲部分から延出する角度は、上記内部リードに対して１５度以下である、請求項３に記載の樹脂パッケージ型半導体装置。
The resin package type semiconductor device according to claim 3, wherein an angle of the wire extending from the bent portion is 15 degrees or less with respect to the internal lead.
JP2004352039A 2004-12-03 2004-12-03 Resin package type semiconductor device Expired - Lifetime JP4010458B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004352039A JP4010458B2 (en) 2004-12-03 2004-12-03 Resin package type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004352039A JP4010458B2 (en) 2004-12-03 2004-12-03 Resin package type semiconductor device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP14910497A Division JP3634566B2 (en) 1997-06-06 1997-06-06 Resin package type semiconductor device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007210288A Division JP4666395B2 (en) 2007-08-10 2007-08-10 Manufacturing method of resin package type semiconductor device

Publications (2)

Publication Number Publication Date
JP2005064544A true JP2005064544A (en) 2005-03-10
JP4010458B2 JP4010458B2 (en) 2007-11-21

Family

ID=34373972

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004352039A Expired - Lifetime JP4010458B2 (en) 2004-12-03 2004-12-03 Resin package type semiconductor device

Country Status (1)

Country Link
JP (1) JP4010458B2 (en)

Also Published As

Publication number Publication date
JP4010458B2 (en) 2007-11-21

Similar Documents

Publication Publication Date Title
US7176570B2 (en) Method for forming bump, semiconductor element having bumps and method of manufacturing the same, semiconductor device and method of manufacturing the same, circuit board, and electronic equipment
US7064425B2 (en) Semiconductor device circuit board, and electronic equipment
US8133759B2 (en) Leadframe
US6921016B2 (en) Semiconductor device and method of manufacturing the same, circuit board, and electronic equipment
CN107230668A (en) Structures and methods for the stable lead in the semiconductor devices of wire bonding
US6780679B2 (en) Semiconductor device and method of manufacturing the same
US6617200B2 (en) System and method for fabricating a semiconductor device
JPH05136317A (en) Semiconductor device and its manufacture
US20140367838A1 (en) Leadframe with lead of varying thickness
JP4666395B2 (en) Manufacturing method of resin package type semiconductor device
JP3634566B2 (en) Resin package type semiconductor device
JP2005019778A (en) Wire bonding method
JP4010458B2 (en) Resin package type semiconductor device
JP6815217B2 (en) Semiconductor device
JP2011035437A (en) Resin package type semiconductor device
KR101698431B1 (en) Semiconductor power module pakage and methods of fabricating the same
US8378468B2 (en) Semiconductor device and method of manufacturing the same
US7064451B2 (en) Area array semiconductor device and electronic circuit board utilizing the same
JP2010225892A (en) Semiconductor device, manufacturing method of the same, and electronic apparatus
JPH05152485A (en) Semiconductor devices and manufacture thereof
US20110018135A1 (en) Method of electrically connecting a wire to a pad of an integrated circuit chip and electronic device
JP2005167178A (en) Semiconductor device and wire bonding method
JP2007088220A (en) Manufacturing method of semiconductor device
KR100752664B1 (en) Semiconductor device having an wire loop, method of forming the same and wire bonding system for forming the wire loop
JP2008034830A (en) Semiconductor device, and lead frame and its manufacturing method

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20041228

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20070601

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070615

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070810

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20070830

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20070830

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100914

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110914

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120914

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120914

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130914

Year of fee payment: 6

EXPY Cancellation because of completion of term