JP2004349526A - Spiral capacitor, wiring circuit board incorporating the spiral capacitor, and manufacturing method thereof - Google Patents

Spiral capacitor, wiring circuit board incorporating the spiral capacitor, and manufacturing method thereof Download PDF

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Publication number
JP2004349526A
JP2004349526A JP2003145893A JP2003145893A JP2004349526A JP 2004349526 A JP2004349526 A JP 2004349526A JP 2003145893 A JP2003145893 A JP 2003145893A JP 2003145893 A JP2003145893 A JP 2003145893A JP 2004349526 A JP2004349526 A JP 2004349526A
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Japan
Prior art keywords
capacitor
circuit board
spiral
wiring
manufacturing
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JP2003145893A
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Japanese (ja)
Inventor
Akiko Saeki
明子 佐伯
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Toppan Inc
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Toppan Printing Co Ltd
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Priority to JP2003145893A priority Critical patent/JP2004349526A/en
Publication of JP2004349526A publication Critical patent/JP2004349526A/en
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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a capacitor used for a wiring circuit board, which is downsized and provides a stable output in spite of a high capacitance as designed and to provide a capacitor built-in wiring circuit board wherein a degree of design freedom of capacitor layout is enhanced, and a manufacturing method thereof. <P>SOLUTION: A spiral capacitor adopting a structure comprising: double spiral conductor patterns; and an insulator including a dielectric material embedded between the conductor patterns is employed for the capacitor and the wiring circuit board incorporating the spiral capacitor and the manufacturing method of applying greater packaging density to the circuit board are provided. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明の半導体パッケージ用の配線回路基板において、スパイラル型キャパシタ及びそのスパイラル型キャパシタ内蔵配線回路基板及びその製造方法に関する。
【0002】
【従来の技術】
従来の技術では、電子機器の小型化、高密度化、高性能化が進んでいる中で、そこに用いられる配線回路版も小型化、高密度化、高速化の要求が高まっており、それらの要求を満たした配線回路基板が求められている。
【0003】
配線回路基板には半導体チップ、抵抗素子、キャパシタ、インダクタ等の部品が表面実装され、実装する部品を小型化することで配線回路基板の小型化、高密度化の対応を図っている。
【0004】
しかしながら、表面実装だけでは限界があり、さらなる部品実装密度の向上が求められ、抵抗素子、キャパシタ、インダクタ等の部品を内蔵した部品機能内蔵配線回路基板の開発が進められている。
【0005】
配線回路基板に内蔵用キャパシタを形成する場合、キャパシタの形状としては、配線回路板内部に絶縁体層を設け、その両面に電極を形成する構造を採っていた(例えば、特許文献1参照)。誘電性材料を含む絶縁体粉末と樹脂を混合し高誘電率な絶縁体層を形成し、その両面に電極を形成し、電極形状はエッチングで形成している。
【0006】
しかしながら、従来の内蔵用キャパシタを用いた場合、層構造は二層構造となる。この形状では、基板上の上下重ね方向でしかキャパシタを形成することができないため、設計の自由度が少ない問題がある。またキャパシタ容量を大きくしようとすると従来の技術では電極サイズが大きくなり、基板内部のキャパシタの占有率が大きくなる。そのため、配線回路を引き回すことができなくなり実装密度の向上に限界があった。さらに、従来のキャパシタ構造は、電極間に存在する絶縁体の厚さのバラツキによって容量が大きく変化し不安定となり、設計通りのキャパシタ容量を得ることが難しい問題があった。
【0007】
【特許文献1】
特願平03−282324号公報
【0008】
【発明が解決しようとする課題】
本発明は上記の問題に鑑みて発明されたものであり、小型化でその大容量で安定した出力のキャパシタを形成することにより、キャパシタの配置の設計自由度が多くなり、設計値通りの容量となるキャパシタ及びそのキャパシタ内蔵配線回路基板及びその製造方法を提供することを目的とする。
【0009】
【課題を解決するための手段】
本発明の請求項1に係る発明は、多角形状または円状を呈するように形成した二重渦状の導体パターンと、該導体パターン間に埋没された誘電性材料を含む絶縁体から成ることを特徴とするスパイラル型キャパシタである。
【0010】
本発明の請求項2に係る発明は、キャパシタを内蔵した配線回路基板において、スパイラル型キャパシタを用いたことを特徴とする請求項1記載のスパイラル型キャパシタ内蔵配線回路基板である。
【0011】
本発明の請求項3に係る発明は、配線回路基板の製造方法において、回路配線を高密度化することを特徴とする請求項2記載のスパイラル型キャパシタ内蔵配線回路基板の製造方法である。
【0012】
【発明の実施の形態】
以下本発明の実施の形態につき説明する。図1は、本発明の配線回路板内蔵用のスパイラル型キャパシタの一例を示す斜視図である。
【0013】
配線回路基材11上に二重渦状(以下スパイラル型と記す)の配線であるスパイラル型キャパシタ用パターン22aを配置し、そのスパイラル型配線の二重の配線間22aa,22abに誘電性材料を含む絶縁体51を埋没してなる構造である。スパイラル型配線の厚みと配線ピッチ(配線22aa,22abの間隔長)によって容量を調整し、またスパイラル型配線間に誘電率の高い誘電性材料を含む絶縁体51を埋め込むことで容量の拡大を計ることができる。前記誘電性材料を含む絶縁体としては、チタン酸バリウム等の高誘電材のフィラーを熱硬化性樹脂液に分散させたものがあげられる。
【0014】
本発明のスパイラル型キャパシタ内蔵配線回路板の製造方法について説明する。
【0015】
図2及び図3は、本発明のスパイラル型キャパシタ内蔵配線回路板のビルドアップ工法による製造方法における製造工程の一例を示す。
【0016】
まず、絶縁基材11の両面に銅箔からなる導体層21が形成された両面銅貼り積層板(図2(a)参照)の導体層21上に、ドライフィルムを貼り合わせる等の方法で感光層(レジスト)を形成し、露光、現像等の一連のパターニング処理を行って、レジストパターン31及び、レジストパターン32を形成する。(図2(b)参照)
【0017】
次に、レジストパターン31及び32をマスクにして、導体層21をエッチング処理し、レジストパターン31及びレジストパターン32を専用の剥離液で除去して、絶縁体層11の両面に第1配線層21a及び、第1配線層21bが形成された回路基板20を作成する。(図2(c)参照)
【0018】
ここで、回路基板は両面に配線層が形成された両面配線板の事例について説明したが、配線層数は特に限定されるものではなく、任意の層数の回路基板が適用できる。
【0019】
次に回路基板20の両面に樹脂フィルムを貼付する等の方法で、絶縁層41を形成し、絶縁層41の所定位置にレーザー加工等によりビア用孔42を形成する。(図2(d)参照)
【0020】
次に絶縁層41上及びビア用孔42内を粗化処理、触媒核付与及び、活性化処理した後、無電解銅めっき等により絶縁層41上及びビア用孔42内にめっき下地層を形成し、めっき下地層をカソードにして電解銅めっきを行い、絶縁層41上に所定厚の導体層22と、ビア用孔42内にフィルドビア23を形成する。(図2(e)参照)
【0021】
次に、導体層22上にドライフィルムを貼り合わせる等の方法で感光層(レジスト)を形成し、露光、現像等の一連のパターニング処理を行って、レジストパターン33及び、レジストパターン34を形成する。(図2(f)参照)
【0022】
次に、レジストパターン33及び34をマスクにして、導体層22をエッチング処理し、レジストパターン33及びレジストパターン34を専用の剥離液で除去して、絶縁体層11の一方の面にスパイラル型キャパシタ用パターン22a及び、第2配線層22b、他方の面に第2配線層22cが形成された回路基板40を作成する。(図3(g)参照)
【0023】
ここでは、配線パターンをサブトラクティブ法により形成した事例について説明したが、セミアディティブ法によっても配線パターンの形成は可能である。
【0024】
次に回路基板40の一方の面のスパイラル型キャパシタ用の渦状パターン22a上に、誘電材フィルムをラミネートする方法、又は誘電材ペーストをスクリーン印刷するなどの方法で誘電性材料を含む絶縁体層51を形成し、スパイラル型キャパシタ50を有する4層のスパイラル型キャパシタ内蔵配線回路基板100を得る。(図3(h)参照)
【0025】
ここでは、図3(h)は、全面に絶縁体層を形成した事例で説明しているが、別方法として、図3(i)に示すように、前期誘電性材料を含む絶縁体層51は、多角形状、円状等のキャパシタ部分に形成する方法であり、キャパシタ配線間に絶縁体が充填された状態であればよい。
【0026】
図3(h)又は(i)のキャパシタを形成後、必要に応じて絶縁層、配線層を所定の層数形成することにより、スパイラル型キャパシタ内蔵配線回路板を得ることができる。
【0027】
次に、本発明のスパイラル型キャパシタ内蔵配線回路板の一括積層法による製造方法について説明する。
【0028】
図4は、本発明のスパイラル型キャパシタ内蔵配線回路板の積層工法による製造方法における製造工程の一例を示す。
【0029】
まず、絶縁基材11の両面に銅箔からなる導体層21が形成された両面銅貼り積層板(図4(a)参照)の導体層21上に、ドライフィルムを貼り合わせる等の方法で感光層(レジスト)を形成し、露光、現像等の一連のパターニング処理を行って、レジストパターン31及び、レジストパターン32を形成する。(図4(b)参照)
【0030】
次に、レジストパターン31及び32をマスクにして、導体層21をエッチング処理し、レジストパターン31及びレジストパターン32を専用の剥離液で除去して、絶縁体層11の両面に第1配線層21a及び、第1配線層21bが形成された回路基板20を作成する。(図4(c)参照)
【0031】
図4(c)に示す回路基板20の製造工程と同様に、図4(a)と(b)と(d)の工程により、スパイラル型キャパシタパターン22aを含む回路基板20aを作成する。(図4(d)参照)
【0032】
次に、これらの回路基板20,20aに黒化処理等の前処理を施し、図4(e)に示すように、銅箔61、プリプレグ60、回路基板20a、誘電材料70用フイルム、回路基板20、プリプレグ60銅箔61、の順番に重ねて帳合し、所定の積層条件によりプレス加工し、多層の回路基板40を作成する。なお、回路基板20aのスパイラル型キャパシタパターン22a形成面側には、スパイラル型配線間が誘電材料で満たされるよう、誘電材料70を挟み積層する。(図4(e)参照)
【0033】
次に、回路基板40の所定の位置に基板を貫通するスルーホール24を形成する。続いて、無電解銅めっき、レジストパターン形成、電解銅めっき、レジスト剥離、エッチング処理等、一連の工程を経て、外層パターン25形成を行うことより、多層のスパイラル型キャパシタ内蔵配線回路板100を得ることができる。(図4(f)参照)
【0034】
【実施例】
以下、実施例について詳細に説明する。
【0035】
〈実施例1〉
片面銅張積層板の導体層上に厚さ15μmのドライフィルムレジストをラミネータを用いて110℃、3kg/cmでラミネートコーティングを行った。次に、露光量55mJの条件でパターンを露光し、1%炭酸ナトリウム水溶液で現像を行うことでレジストパターンを形成した。
【0036】
次に、レジストパターンをマスクにして塩化第二鉄液を用いてエッチング処理した。レジストパターンを5%水酸化ナトリウム水溶液により除去することで第一配線層を形成した。
【0037】
第一配線層を形成した基板を、120℃のオーブンで乾燥した後、熱硬化型の絶縁樹脂フイルムを真空ラミネータを用いて130℃、30秒、3kg/cmの条件でラミネートし、160℃、1時間の加熱によって硬化させ、絶縁層を形成した。
【0038】
基板の表上層と裏下層の絶縁層の導通路部分にレーザー光加工を用いて80μmφの穴加工を行った。レーザー光加工には、炭酸ガスレーザーやUV−YAGレーザー、エキシマレーザーのレーザー光を用いることができる。
【0039】
レーザー光加工後に、絶縁層及び前記穴内に無電解銅めっきによって薄膜導体層を形成した。無電解銅めっきの膜厚は、1μm程度めっきすれば良い。次に厚さ50μmのドライフィルムレジストを薄膜導体層上にラミネータを用いてラミネートコーティングを行った。
【0040】
前記ドライフィルムレジスト上にフォトリソグラフィ工程によってパターン露光、現像を行うことでスパイラル型配線レジストパターンを形成した。
【0041】
スパイラル型配線レジストパターンの開口部に薄膜導体層をカソードにして2A/dmで30分間電解銅めっきを行い、スパイラル型の電極部を形成した。スパイラル型配線レジストパターンを5%水酸化ナトリウム水溶液で剥離除去を行い、過硫酸アンモニウム溶液(200g/l)でフラッシュエッチングにより薄膜導体層を除去し、スパイラル型キャパシタの電極パターンを形成した。
【0042】
基板を純水で洗浄し、120℃のオーブンで乾燥した後、チタン酸バリウムのフィラーを分散させた熱硬化型のエポキシ樹脂の絶縁樹脂フイルムを真空ラミネータを用いてラミネート後、焼付及び現像処理をして、160℃、1時間の加熱によって硬化させ、所定の位置に誘電性材料の絶縁層を形成した。
【0043】
上記の工程で本発明のスパイラル型キャパシタ内蔵配線回路板用のスパイラル型キャパシタを製造することができる。キャパシタの容量は、電極の高さ、すなわち実施例1の場合は前記電解銅めっきの厚さ、又は電極間の距離、又は誘電性材料の誘電率を変えることで容易に調整ができる。
【0044】
【発明の効果】
本発明の基板内蔵用スパイラル型キャパシタの構造を用いることで、小型化ができるため、配置設計の自由度が大きくなり、実装密度の高いキャパシタ内蔵配線回路板を得ることができる。設計時のキャパシタの容量は、電極の厚さ高さ、二重渦状の配線間距離、または誘電材料を変えることで容易に調整が可能となり、さらに、キャパシタの出力が大幅に安定する効果もある。
【図面の簡単な説明】
【図1】本発明のスパイラル型キャパシタ内蔵配線回路板の一例を示す斜視図である。
【図2】(a)〜(f)は、本発明のスパイラル型キャパシタ内蔵配線回路板のビルドアップ工法における製造工程の一部を示す模式断面図である。
【図3】(g)〜(i)は、本発明のスパイラル型キャパシタ内蔵配線回路板のビルドアップ工法における製造工程の一部を示す模式断面図である。
【図4】(a)〜(f)は、本発明のスパイラル型キャパシタ内蔵配線回路板の一括積層法における製造工程の一部を示す模式断面図である。
【符号の説明】
11…絶縁基材
20、40…回路基板
21…導体層
21a、21b…第一配線層
22、24…導体層
22a…スパイラル型キャパシタ用パターン
22aa、22ab…スパイラル型キャパシタ用パターン
22b、22c…第二配線層
23…フィルドビア
24…スルーホール
25…外層パターン
31、32、33、34…レジストパターン
41…絶縁層
42…ビア用孔
50…スパイラル型キャパシタ
51…誘電性材料を含む絶縁体(層)
60…プリプレグ
61…銅箔
70…誘電材料
100…スパイラル型キャパシタ内蔵配線回路板
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a spiral-type capacitor, a spiral-type capacitor-embedded wired circuit board, and a method of manufacturing the same in a wired circuit board for a semiconductor package of the present invention.
[0002]
[Prior art]
In the conventional technology, as electronic devices are becoming smaller, higher in density and higher in performance, the demand for smaller, higher density and higher speed is also increasing for the wiring circuit version used there. There is a demand for a printed circuit board that satisfies the above requirements.
[0003]
Components such as a semiconductor chip, a resistor, a capacitor, and an inductor are surface-mounted on the printed circuit board, and the size of the mounted components is reduced so that the printed circuit board can be made smaller and more dense.
[0004]
However, there is a limit to surface mounting alone, and there is a demand for further improvement in component mounting density, and development of a wiring circuit board with a built-in component function incorporating components such as a resistive element, a capacitor, and an inductor is in progress.
[0005]
When a built-in capacitor is formed on a printed circuit board, the shape of the capacitor has been such that an insulating layer is provided inside the printed circuit board and electrodes are formed on both surfaces thereof (for example, see Patent Document 1). An insulating powder containing a dielectric material and a resin are mixed to form a high dielectric constant insulating layer, electrodes are formed on both surfaces thereof, and the electrode shape is formed by etching.
[0006]
However, when a conventional built-in capacitor is used, the layer structure has a two-layer structure. In this shape, since the capacitor can be formed only in the vertical direction on the substrate, there is a problem that the degree of freedom in design is small. In order to increase the capacitance of the capacitor, the size of the electrode is increased in the conventional technique, and the occupancy of the capacitor inside the substrate is increased. For this reason, the wiring circuit cannot be routed, and there is a limit in improving the mounting density. Further, the conventional capacitor structure has a problem that the capacitance is largely changed due to the variation in the thickness of the insulator existing between the electrodes, and becomes unstable, so that it is difficult to obtain the designed capacitor capacitance.
[0007]
[Patent Document 1]
Japanese Patent Application No. 03-282324
[Problems to be solved by the invention]
The present invention has been made in view of the above-described problems. By forming a large-capacity, stable-output capacitor with a small size, the degree of freedom in designing the arrangement of the capacitors is increased, and the capacitance according to the design value is increased. It is an object of the present invention to provide a capacitor, a wiring circuit board with a built-in capacitor, and a method of manufacturing the same.
[0009]
[Means for Solving the Problems]
The invention according to claim 1 of the present invention is characterized by comprising a double-vortex conductive pattern formed to have a polygonal shape or a circular shape, and an insulator including a dielectric material buried between the conductive patterns. Is a spiral type capacitor.
[0010]
The invention according to claim 2 of the present invention is the printed circuit board with a built-in spiral capacitor according to claim 1, wherein a spiral type capacitor is used in the printed circuit board having a built-in capacitor.
[0011]
The invention according to claim 3 of the present invention is the method of manufacturing a wired circuit board with a built-in spiral capacitor according to claim 2, wherein the density of circuit wiring is increased in the method of manufacturing a wired circuit board.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described. FIG. 1 is a perspective view showing an example of a spiral-type capacitor for incorporating a printed circuit board according to the present invention.
[0013]
A spiral capacitor pattern 22a, which is a double spiral (hereinafter, referred to as a spiral type) wiring, is arranged on the wiring circuit substrate 11, and a dielectric material is contained in the double wiring 22aa, 22ab of the spiral wiring. This is a structure in which the insulator 51 is buried. The capacitance is adjusted by the thickness of the spiral wiring and the wiring pitch (interval length between the wirings 22aa and 22ab), and the capacitance is increased by embedding an insulator 51 containing a dielectric material having a high dielectric constant between the spiral wirings. be able to. Examples of the insulator containing the dielectric material include a material obtained by dispersing a filler of a high dielectric material such as barium titanate in a thermosetting resin liquid.
[0014]
The manufacturing method of the spiral-type capacitor-containing wiring circuit board of the present invention will be described.
[0015]
2 and 3 show an example of a manufacturing process in a method of manufacturing a wiring circuit board with a built-in spiral capacitor by a build-up method according to the present invention.
[0016]
First, a photosensitive film is formed on the conductor layer 21 of a double-sided copper-clad laminate (see FIG. 2A) in which a conductor layer 21 made of copper foil is formed on both surfaces of the insulating base material 11 by a method such as laminating a dry film. A layer (resist) is formed, and a series of patterning processes such as exposure and development are performed to form a resist pattern 31 and a resist pattern 32. (See FIG. 2 (b))
[0017]
Next, using the resist patterns 31 and 32 as masks, the conductor layer 21 is subjected to an etching treatment, the resist patterns 31 and the resist patterns 32 are removed with a dedicated stripper, and the first wiring layers 21a are formed on both surfaces of the insulator layer 11. Then, the circuit board 20 on which the first wiring layer 21b is formed is created. (See Fig. 2 (c))
[0018]
Here, the circuit board has been described as an example of a double-sided wiring board having a wiring layer formed on both sides, but the number of wiring layers is not particularly limited, and a circuit board having an arbitrary number of layers can be applied.
[0019]
Next, an insulating layer 41 is formed by, for example, attaching a resin film to both sides of the circuit board 20, and a via hole 42 is formed at a predetermined position of the insulating layer 41 by laser processing or the like. (See Fig. 2 (d))
[0020]
Next, after a roughening treatment, a catalyst nucleus provision, and an activation treatment on the insulating layer 41 and the inside of the via hole 42, a plating base layer is formed on the insulating layer 41 and the inside of the via hole 42 by electroless copper plating or the like. Then, electrolytic copper plating is performed using the plating base layer as a cathode to form a conductor layer 22 having a predetermined thickness on the insulating layer 41 and a filled via 23 in the via hole 42. (See Fig. 2 (e))
[0021]
Next, a photosensitive layer (resist) is formed by a method such as laminating a dry film on the conductor layer 22, and a series of patterning processes such as exposure and development are performed to form a resist pattern 33 and a resist pattern. . (See FIG. 2 (f))
[0022]
Next, using the resist patterns 33 and 34 as a mask, the conductor layer 22 is subjected to an etching treatment, the resist pattern 33 and the resist pattern 34 are removed with a dedicated stripper, and a spiral type capacitor is formed on one surface of the insulator layer 11. The circuit board 40 having the pattern 22a for use, the second wiring layer 22b, and the second wiring layer 22c formed on the other surface is formed. (See Fig. 3 (g))
[0023]
Here, the case where the wiring pattern is formed by the subtractive method has been described, but the wiring pattern can also be formed by the semi-additive method.
[0024]
Next, an insulating layer 51 containing a dielectric material is laminated on the spiral pattern 22a for the spiral capacitor on one surface of the circuit board 40 by a method of laminating a dielectric material film or a method of screen-printing a dielectric material paste. Is formed to obtain a four-layer spiral-type capacitor-containing wiring circuit board 100 having a spiral-type capacitor 50. (See FIG. 3 (h))
[0025]
Here, FIG. 3H illustrates an example in which an insulator layer is formed on the entire surface. Alternatively, as illustrated in FIG. 3I, the insulator layer 51 including a dielectric material may be used. Is a method of forming a capacitor portion in a polygonal shape, a circular shape, or the like, as long as an insulator is filled between capacitor wirings.
[0026]
After forming the capacitor of FIG. 3 (h) or (i), if necessary, a predetermined number of insulating layers and wiring layers are formed, whereby a wiring circuit board with a built-in spiral capacitor can be obtained.
[0027]
Next, a description will be given of a method of manufacturing the wiring circuit board with a built-in spiral capacitor according to the present invention by the batch lamination method.
[0028]
FIG. 4 shows an example of a manufacturing process in a manufacturing method of a wiring circuit board with a built-in spiral capacitor according to the present invention by a lamination method.
[0029]
First, a photosensitive film is applied to the conductor layer 21 of a double-sided copper-clad laminate (see FIG. 4A) in which a conductor layer 21 made of copper foil is formed on both sides of the insulating base material 11 by, for example, laminating a dry film. A layer (resist) is formed, and a series of patterning processes such as exposure and development are performed to form a resist pattern 31 and a resist pattern 32. (See FIG. 4B)
[0030]
Next, using the resist patterns 31 and 32 as masks, the conductor layer 21 is subjected to an etching treatment, the resist patterns 31 and the resist patterns 32 are removed with a dedicated stripper, and the first wiring layers 21a are formed on both surfaces of the insulator layer 11. Then, the circuit board 20 on which the first wiring layer 21b is formed is created. (See FIG. 4 (c))
[0031]
As in the process of manufacturing the circuit board 20 shown in FIG. 4C, the circuit board 20a including the spiral capacitor pattern 22a is formed by the steps of FIGS. 4A, 4B, and 4D. (See Fig. 4 (d))
[0032]
Next, these circuit boards 20 and 20a are subjected to a pretreatment such as a blackening process, and as shown in FIG. 4 (e), copper foil 61, prepreg 60, circuit board 20a, film for dielectric material 70, circuit board 20, a prepreg 60 and a copper foil 61 are superposed and assembled in the order, and pressed under a predetermined lamination condition to form a multilayer circuit board 40. The dielectric material 70 is laminated on the surface of the circuit board 20a on which the spiral capacitor pattern 22a is formed, so that the space between the spiral wirings is filled with the dielectric material. (See FIG. 4 (e))
[0033]
Next, a through hole 24 is formed at a predetermined position of the circuit board 40 so as to penetrate the board. Subsequently, through a series of steps such as electroless copper plating, resist pattern formation, electrolytic copper plating, resist stripping, etching treatment, etc., the outer layer pattern 25 is formed to obtain a multilayer wiring circuit board 100 with a built-in spiral capacitor. be able to. (See FIG. 4 (f))
[0034]
【Example】
Hereinafter, examples will be described in detail.
[0035]
<Example 1>
A dry film resist having a thickness of 15 μm was laminated and coated on the conductor layer of the single-sided copper-clad laminate at 110 ° C. and 3 kg / cm using a laminator. Next, the pattern was exposed under the conditions of an exposure amount of 55 mJ, and developed with a 1% aqueous solution of sodium carbonate to form a resist pattern.
[0036]
Next, etching was performed using a ferric chloride solution using the resist pattern as a mask. The first wiring layer was formed by removing the resist pattern with a 5% aqueous sodium hydroxide solution.
[0037]
After the substrate on which the first wiring layer is formed is dried in an oven at 120 ° C., a thermosetting insulating resin film is laminated using a vacuum laminator under conditions of 130 ° C., 30 seconds, 3 kg / cm 2 , and 160 ° C. And cured by heating for 1 hour to form an insulating layer.
[0038]
A hole of 80 μmφ was formed in the conductive path portion between the upper and lower insulating layers of the substrate by using laser light processing. Laser light such as a carbon dioxide gas laser, a UV-YAG laser, or an excimer laser can be used for laser light processing.
[0039]
After the laser beam processing, a thin film conductor layer was formed in the insulating layer and the hole by electroless copper plating. The film thickness of the electroless copper plating may be about 1 μm. Next, a 50 μm-thick dry film resist was laminated on the thin-film conductor layer using a laminator.
[0040]
A spiral wiring resist pattern was formed on the dry film resist by pattern exposure and development by a photolithography process.
[0041]
Electrolytic copper plating was performed on the opening of the spiral wiring resist pattern at 2 A / dm 2 for 30 minutes using the thin film conductor layer as a cathode to form a spiral electrode portion. The spiral wiring resist pattern was peeled and removed with a 5% aqueous sodium hydroxide solution, and the thin film conductor layer was removed by flash etching with an ammonium persulfate solution (200 g / l) to form an electrode pattern of the spiral capacitor.
[0042]
After washing the substrate with pure water and drying in an oven at 120 ° C., laminating an insulating resin film of a thermosetting epoxy resin in which a barium titanate filler is dispersed using a vacuum laminator, and then performing baking and developing treatment. Then, the resultant was cured by heating at 160 ° C. for one hour to form an insulating layer of a dielectric material at a predetermined position.
[0043]
Through the above steps, the spiral capacitor for a wiring circuit board with a built-in spiral capacitor of the present invention can be manufactured. The capacitance of the capacitor can be easily adjusted by changing the height of the electrodes, that is, in the case of the first embodiment, the thickness of the electrolytic copper plating, the distance between the electrodes, or the dielectric constant of the dielectric material.
[0044]
【The invention's effect】
By using the structure of the spiral-type capacitor with a built-in substrate according to the present invention, the size can be reduced, so that the degree of freedom in layout design is increased and a capacitor-mounted wiring circuit board with a high mounting density can be obtained. The capacitance of the capacitor at the time of design can be easily adjusted by changing the electrode thickness, the height of the double spiral wiring, or the dielectric material, and the output of the capacitor is also greatly stabilized. .
[Brief description of the drawings]
FIG. 1 is a perspective view showing an example of a wiring circuit board with a built-in spiral capacitor of the present invention.
FIGS. 2A to 2F are schematic cross-sectional views showing a part of a manufacturing process in a build-up method of a wiring circuit board with a built-in spiral capacitor according to the present invention.
3 (g) to 3 (i) are schematic cross-sectional views showing a part of a manufacturing process in a build-up method of a wiring circuit board with a built-in spiral capacitor according to the present invention.
FIGS. 4A to 4F are schematic cross-sectional views showing a part of a manufacturing process in a batch lamination method of a wiring circuit board with a built-in spiral capacitor according to the present invention.
[Explanation of symbols]
11 Insulating base material 20, 40 Circuit board 21 Conductive layers 21a, 21b First wiring layers 22, 24 Conductive layer 22a Spiral capacitor pattern 22aa, 22ab Spiral capacitor pattern 22b, 22c First Double wiring layer 23 Filled via 24 Through hole 25 Outer layer pattern 31, 32, 33, 34 Resist pattern 41 Insulating layer 42 Via hole 50 Spiral capacitor 51 Insulator (layer) containing dielectric material
Reference Signs List 60 prepreg 61 copper foil 70 dielectric material 100 spiral-type built-in wiring circuit board

Claims (3)

多角形状または円状を呈するように形成した二重渦状の導体パターンと、該導体パターン間に埋没された誘電性材料を含む絶縁体から成ることを特徴とするスパイラル型キャパシタ。A spiral capacitor comprising a double-vortex conductor pattern formed to have a polygonal or circular shape, and an insulator containing a dielectric material buried between the conductor patterns. キャパシタを内蔵した配線回路基板において、スパイラル型キャパシタを用いたことを特徴とする請求項1記載のスパイラル型キャパシタ内蔵配線回路基板。2. The printed circuit board with a built-in spiral capacitor according to claim 1, wherein the printed circuit board having a built-in capacitor includes a spiral capacitor. 配線回路基板の製造方法において、回路配線を高密度化することを特徴とする請求項2記載のスパイラル型キャパシタ内蔵配線回路基板の製造方法。3. The method of manufacturing a printed circuit board with a built-in spiral capacitor according to claim 2, wherein the method of manufacturing the printed circuit board includes increasing the density of circuit wiring.
JP2003145893A 2003-05-23 2003-05-23 Spiral capacitor, wiring circuit board incorporating the spiral capacitor, and manufacturing method thereof Pending JP2004349526A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7763925B2 (en) 2006-05-30 2010-07-27 Samsung Electronics Co., Ltd. Semiconductor device incorporating a capacitor and method of fabricating the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7763925B2 (en) 2006-05-30 2010-07-27 Samsung Electronics Co., Ltd. Semiconductor device incorporating a capacitor and method of fabricating the same

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